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JP2012212713A - Mounting structure of semiconductor device - Google Patents

Mounting structure of semiconductor device Download PDF

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Publication number
JP2012212713A
JP2012212713A JP2011076411A JP2011076411A JP2012212713A JP 2012212713 A JP2012212713 A JP 2012212713A JP 2011076411 A JP2011076411 A JP 2011076411A JP 2011076411 A JP2011076411 A JP 2011076411A JP 2012212713 A JP2012212713 A JP 2012212713A
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Prior art keywords
semiconductor device
mounting structure
bonding
electrode
joining
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Inventor
Hajime Nakajima
元 中島
Kohei Hiyama
浩平 樋山
Miki Mori
三樹 森
Jun Karasawa
純 唐沢
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Toshiba Corp
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Toshiba Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/3701—Shape
    • H01L2224/37012—Cross-sectional shape
    • H01L2224/37013—Cross-sectional shape being non uniform along the connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H01L2224/4009—Loop shape
    • H01L2224/40095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/84801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a mounting structure of a semiconductor device that achieves further space-saving and can ensure the connection reliability.SOLUTION: A mounting structure of a semiconductor device comprises: a wiring substrate 2 that has a wiring layer 7 formed on a part of a base 5 and a resist layer 8 formed above and on an insulating layer 6 and the wiring layer 7 so as to surround a plurality of pads of the wiring layer 7; a first bonding material 9 that is provided on one of the plurality of pads of the wiring substrate 2; a semiconductor device 3 that has a first electrode 3a and a second electrode 3b at the opposite surface side of the first electrode 3a and is provided so that the first bonding material 9 and the first electrode 3a are in contact with each other; a second bonding material 10 that is provided by electrically connecting the other of the plurality of pads; and a connection member 4 that is provided so as to contact a third bonding member 11 provided on the second electrode 3b of the semiconductor device 3 and has a stress dispersion part.

Description

本発明の実施形態は、半導体装置の実装構造に関する。   Embodiments described herein relate generally to a semiconductor device mounting structure.

従来、半導体装置を配線基板上に実装する場合、半導体装置を含む半導体パッケージを配線基板上に実装してきた。   Conventionally, when a semiconductor device is mounted on a wiring board, a semiconductor package including the semiconductor device has been mounted on the wiring board.

より具体的に説明すると、半導体パッケージは、半導体装置が複数のリードフレームのうちの１つに設けられ、他のリードフレームとワイヤボンディング等の接続部材により電気的に接続している。そして、樹脂によりリードフレームのリード端子を露出するように樹脂封止して形成されている。   More specifically, in the semiconductor package, a semiconductor device is provided in one of a plurality of lead frames, and is electrically connected to another lead frame by a connecting member such as wire bonding. And it is formed by resin sealing so as to expose the lead terminals of the lead frame with resin.

また、半導体パッケージを配線基板上に実装する際には、露出しているリード端子を配線基板の金属パッドに位置合わせして半田等により接続させて実装を行ってきた。   Further, when mounting a semiconductor package on a wiring board, the exposed lead terminals are aligned with metal pads of the wiring board and connected by soldering or the like.

特開２００６−４０９２８号JP 2006-40928 A

しかし、従来の半導体装置の実装構造では、半導体装置を有する半導体パッケージのリードフレームの厚みや、接続部材まで覆うように封止している樹脂の厚みにより、半導体パッケージが大型化してしまっていた。また、従来の半導体パッケージへと電流を流した際、配線基板や半導体パッケージのリードフレームが熱膨張することで、配線基板と半導体パッケージのリードフレームとの接合部へと応力がかかり、接合部が破断することがあった。そのため、接続信頼性が十分に確保できなかった。   However, in the conventional semiconductor device mounting structure, the size of the semiconductor package has been increased due to the thickness of the lead frame of the semiconductor package having the semiconductor device and the thickness of the resin sealed to cover the connection member. In addition, when a current is applied to a conventional semiconductor package, the wiring substrate and the lead frame of the semiconductor package thermally expand, so that stress is applied to the joint between the wiring substrate and the lead frame of the semiconductor package, and the joint is It sometimes broke. Therefore, sufficient connection reliability could not be secured.

そこで本発明では、より省スペースで、接続信頼性の確保が可能な半導体装置の実装構造の提供を目的とする。   Accordingly, an object of the present invention is to provide a mounting structure of a semiconductor device that can save connection space and ensure connection reliability.

上記目的を達成するために、実施形態の半導体装置の実装構造は、基材上の一部に形成されている配線層と、配線層の複数のパッド部を囲むように絶縁層と配線層上に形成されているレジスト層とを有する配線基板と、配線基板の複数のパッド部の一方に設けられている第１の接合材と、第１の電極と第１の電極の対向面側に第２の電極を有し、第１の接合材と第１の電極とが接するように設けられている半導体装置と、複数のパッド部の他方に電気的に接続して設けられている第２の接合材と、半導体装置の第２の電極上に設けられている第３の接合材とに接するように設けられ、応力分散部が形成されている接続部材とを有することを特徴としている。   In order to achieve the above object, the mounting structure of the semiconductor device of the embodiment includes a wiring layer formed on a part of a base material, and an insulating layer and a wiring layer so as to surround a plurality of pad portions of the wiring layer. A wiring board having a resist layer formed on the wiring board, a first bonding material provided on one of the plurality of pad portions of the wiring board, and a first electrode and a first electrode on the opposite surface side of the first electrode. A semiconductor device having two electrodes, the first bonding material and the first electrode being in contact with each other, and a second electrically connected to the other of the plurality of pad portions. It is characterized by having a connecting member provided in contact with the bonding material and a third bonding material provided on the second electrode of the semiconductor device, and having a stress dispersion portion.

本発明の第１実施形態に係る半導体装置の実装構造を示す図で、（ａ）は上面図、（ｂ）は配線基板の上面図、（ｃ）は（ａ）のＡ−Ａ線に沿う断面図。1A and 1B are diagrams illustrating a mounting structure of a semiconductor device according to a first embodiment of the present invention, in which FIG. 1A is a top view, FIG. 1B is a top view of a wiring board, and FIG. Sectional drawing. 本発明の第１実施形態の応用例に係る半導体装置の実装構造を示す図で、（ａ）は上面図、（ｂ）は配線基板の上面図、（ｃ）は（ａ）のＢ−Ｂ線に沿う断面図。1A and 1B are diagrams illustrating a mounting structure of a semiconductor device according to an application example of the first embodiment of the present invention, where FIG. 1A is a top view, FIG. 1B is a top view of a wiring board, and FIG. Sectional drawing which follows a line. 本発明の第１実施形態に係る接続部材を示す図で、（ａ）は上面図、（ｂ）は（ａ）のＡ´−Ａ´線に沿う断面図。It is a figure which shows the connection member which concerns on 1st Embodiment of this invention, (a) is a top view, (b) is sectional drawing which follows the A'-A 'line of (a). 本発明の第２実施形態に係る半導体装置の実装構造を示す図で、（ａ）は上面図、（ｂ）は配線基板の上面図、（ｃ）は（ａ）のＣ−Ｃ線に沿う断面図。It is a figure which shows the mounting structure of the semiconductor device which concerns on 2nd Embodiment of this invention, (a) is a top view, (b) is a top view of a wiring board, (c) follows the CC line of (a). Sectional drawing. 本発明の第２実施形態に係る接続部材を示す図で、（ａ）は上面図、（ｂ）は（ａ）のＣ´−Ｃ´線に沿う断面図。It is a figure which shows the connection member which concerns on 2nd Embodiment of this invention, (a) is a top view, (b) is sectional drawing which follows the C'-C 'line of (a). 本発明の第２実施形態に係る接続部材の応用例を示す図で、（ａ）は上面図、（ｂ）は（ａ）のＤ−Ｄ線に沿う断面図。It is a figure which shows the application example of the connection member which concerns on 2nd Embodiment of this invention, (a) is a top view, (b) is sectional drawing which follows the DD line | wire of (a).

以下、本発明の実施形態に係るより省スペースで、接続信頼性の確保が可能な接続部材、半導体装置の実装構造を、図面を参照して詳細に説明する。   DESCRIPTION OF EMBODIMENTS Hereinafter, a mounting member and a mounting structure of a semiconductor device capable of ensuring connection reliability in a smaller space according to an embodiment of the present invention will be described in detail with reference to the drawings.

（第１実施形態）
まず、本発明の第１実施形態に係る半導体装置の実装構造について、図１乃至図３を参照して説明する。図１（ａ），（ｂ），（ｃ）に示すように、半導体装置の実装構造１は、配線基板２と、半導体装置３と、接続部材４とから構成されている。 (First embodiment)
First, the mounting structure of the semiconductor device according to the first embodiment of the present invention will be described with reference to FIGS. As shown in FIGS. 1A, 1 </ b> B, and 1 </ b> C, the semiconductor device mounting structure 1 includes a wiring substrate 2, a semiconductor device 3, and a connection member 4.

配線基板２は、基材５と絶縁層６、配線層７、レジスト層８とから構成されている。また、基材５の材質としては、本実施形態ではＣｕから形成されている。これは、半導体装置３に大電流を流した際に発生する熱を効率よく放熱させるために設けている。なお、本実施形態では基材５の材質はＣｕであるが、これに限られることはなく、例えばＡｌ等の放熱性の高い金属や、ＡｌＮやＳｉ３Ｎ４等の放熱性の高いセラミックから形成されていれば良い。また、セラミックから形成されている場合、絶縁性が確保出来るため、絶縁層６が不要となる。 The wiring board 2 includes a base material 5, an insulating layer 6, a wiring layer 7, and a resist layer 8. Moreover, as a material of the base material 5, in this embodiment, it is formed from Cu. This is provided to efficiently dissipate heat generated when a large current is passed through the semiconductor device 3. In this embodiment, the material of the base material 5 is Cu, but is not limited to this. For example, the material 5 is made of a metal having a high heat dissipation property such as Al, or a ceramic having a high heat dissipation property such as AlN or Si 3 N 4. It only has to be formed. Moreover, when it forms from a ceramic, since insulation can be ensured, the insulating layer 6 becomes unnecessary.

絶縁層６は、基材５を覆うように設けられており、基材５と後述する配線層７との導通を防ぐために設けられている。また、配線層７の材質としては、絶縁性の樹脂、あるいは絶縁性の樹脂内に、例えばＳｉＯ２やＡｌ２Ｏ３等の放熱性の高い絶縁性粒子を含むものから形成されている。 The insulating layer 6 is provided so as to cover the substrate 5 and is provided to prevent conduction between the substrate 5 and a wiring layer 7 described later. The wiring layer 7 is made of an insulating resin or an insulating resin containing insulating particles having high heat dissipation such as SiO 2 or Al 2 O 3 .

配線層７は、絶縁層６上の所定の位置に設けられており、配線層７の端部には、半導体装置３及び接続部材４と接続するための第１，第２のパッド部Ｐ１，Ｐ２が形成されている。また、配線層７の第１のパッド部Ｐ１の面積は、半導体装置３の面積と同等又は大きい面積に形成されており、第２のパッド部Ｐ２の面積は、後述する接続部材４の第１の接合部材４ａの面積と同等又は大きい面積となるように形成されている。   The wiring layer 7 is provided at a predetermined position on the insulating layer 6, and the first and second pad portions P <b> 1 and P <b> 1 for connecting to the semiconductor device 3 and the connection member 4 are provided at the end of the wiring layer 7. P2 is formed. The area of the first pad portion P1 of the wiring layer 7 is formed to be equal to or larger than the area of the semiconductor device 3, and the area of the second pad portion P2 is the first of the connection member 4 described later. It is formed so as to have an area equal to or larger than the area of the joining member 4a.

配線層７の材質としては、本実施形態ではＣｕから形成されているが、これに限られることはなく、導電性の金属であればよい。   The material of the wiring layer 7 is made of Cu in this embodiment, but is not limited to this, and any conductive metal may be used.

レジスト層８は、配線層７の第１，第２のパッド部Ｐ１，Ｐ２から一定の間隔を設けて囲むように、絶縁層６と配線層７上に形成されている。そのため、第１，第２のパッド部Ｐ１，Ｐ２と接続する配線層７の一部が露出する。また、レジスト層８の材質としては、絶縁性の樹脂から形成されている。なお、本実施形態では第１，第２のパッド部Ｐ１，Ｐ２から一定の間隔を設けて囲むようにレジスト層８が形成されているが、これに限られることはなく、例えば図２（ａ），（ｂ），（ｃ）に示すように、間隔を設けずに第１，第２のパッド部Ｐ１，Ｐ２を囲むように設けても良く、また、配線層７の一部を覆うように形成されていてもよい。   The resist layer 8 is formed on the insulating layer 6 and the wiring layer 7 so as to surround the first and second pad portions P1 and P2 of the wiring layer 7 with a certain distance therebetween. Therefore, a part of the wiring layer 7 connected to the first and second pad portions P1 and P2 is exposed. The material of the resist layer 8 is formed from an insulating resin. In the present embodiment, the resist layer 8 is formed so as to surround the first and second pad portions P1 and P2 with a certain distance therebetween. However, the present invention is not limited to this. For example, FIG. ), (B), (c) may be provided so as to surround the first and second pad portions P1, P2 without providing an interval, and so as to cover a part of the wiring layer 7. It may be formed.

半導体装置３は、一方の面に第１の電極３ａが形成され、他方の面に第２の電極３ｂが形成されており、お互いが対向するように設けられている。また、半導体装置３は、半導体装置３の第１の電極３ａと、配線層７の第１のパッド部Ｐ１とを第１の接合材９を介して接続するように設けている。接続の為に用いている第１の接合材９の材質としては、本実施形態では半田を使用しているが、これに限られることはなく、導電性の金属であればよい。   The semiconductor device 3 is provided with a first electrode 3a formed on one surface and a second electrode 3b formed on the other surface so as to face each other. Further, the semiconductor device 3 is provided so as to connect the first electrode 3 a of the semiconductor device 3 and the first pad portion P <b> 1 of the wiring layer 7 via the first bonding material 9. As a material of the first bonding material 9 used for connection, solder is used in the present embodiment, but it is not limited to this, and any conductive metal may be used.

このように、配線基板２の第１のパッド部Ｐ１上に第１の接合材９を介して半導体装置３を設けることにより、従来の半導体パッケージのリードフレームの厚みや、接続部材まで覆うように封止している樹脂の厚みの分だけ薄くすることが可能となる。また、リードフレームのリード端子の長さを配慮して実装面積を確保する必要がないため、より省スペースに半導体装置３を実装することが可能となる。   As described above, by providing the semiconductor device 3 on the first pad portion P1 of the wiring board 2 via the first bonding material 9, the lead frame thickness of the conventional semiconductor package and the connection member are covered. It is possible to reduce the thickness by the thickness of the resin being sealed. Further, since it is not necessary to secure a mounting area in consideration of the length of the lead terminal of the lead frame, the semiconductor device 3 can be mounted in a more space-saving manner.

更に、配線基板２と半導体装置３を第１の接合材９を介して設けていることにより、大電流を流した際に半導体装置３から発生する熱を、効率よく配線基板２へと放熱することが可能となる。その結果、半導体装置３の寿命を伸ばす事ができる。   Further, by providing the wiring board 2 and the semiconductor device 3 via the first bonding material 9, heat generated from the semiconductor device 3 when a large current is passed is efficiently radiated to the wiring board 2. It becomes possible. As a result, the life of the semiconductor device 3 can be extended.

接続部材４は、板状のＣｕから形成されており、第２の接合材１０と接する第１の接合部材４ａと、第３の接合材１１と接する第２の接合部材４ｂと、第１の接合部材４ａと第２の接合部材４ｂと一定の間隔を設けて形成され、応力分散部である第１の部材４ｃと、第１の部材４ｃを支持し、第１の接合部材４ａと接続している第２の部材４ｄと、第１の部材４ｃを支持し、第２の接合部材４ｂと接続している第３の部材４ｅとから構成されている。   The connection member 4 is made of plate-like Cu, and includes a first bonding member 4a that contacts the second bonding material 10, a second bonding member 4b that contacts the third bonding material 11, and a first bonding member 4a. The bonding member 4a and the second bonding member 4b are formed with a certain distance therebetween, and support the first member 4c and the first member 4c, which are stress distribution portions, and are connected to the first bonding member 4a. The second member 4d, and the third member 4e that supports the first member 4c and is connected to the second bonding member 4b.

なお、本実施形態では接合部材４はＣｕから形成されているが、これに限られることはなく、導電性金属のもの、望ましくは配線基板２の基材５の材質と同じ材質又は近似する熱膨張係数のものを用いても良い。これにより、熱膨張により発生する応力を同程度とすることができるため、熱膨張率の差による応力の発生の抑制することが可能となる。   In the present embodiment, the bonding member 4 is made of Cu, but is not limited to this, and is made of a conductive metal, preferably the same material as the base material 5 of the wiring board 2 or a similar heat. Those having an expansion coefficient may be used. Thereby, since the stress generated by thermal expansion can be made comparable, it becomes possible to suppress generation | occurrence | production of the stress by the difference in a thermal expansion coefficient.

より詳しく説明すると、図１（ａ），図３（ａ）に示すように、接続部材４の第１の接合部材４ａの幅Ｗ１と第２の接合部材４ｂの幅Ｗ２は、ほぼ同じ幅となるように形成されており、半導体装置３の第２の電極３ｂや第２のパッド部Ｐ２に対して同じ幅、もしくは少し狭くなるように形成されている。なお、本実施形態では第１，第２の接合部材４ａ，４ｂの幅Ｗ１，Ｗ２がほぼ同じ幅となるように形成されているが、これに限られることはなく、異なる幅となるように形成されていてもよい。その際、第１，第２の接合部４ａ，４ｂのＹ方向の断面積をそれぞれＳＡ，ＳＢとし、例えばＳＡ≦ＳＢであった場合、ＳＡが仕様電流を流せる最小の面積以上となるように形成されていればよい。 More specifically, as shown in FIGS. 1A and 3A, the width W1 of the first joining member 4a and the width W2 of the second joining member 4b of the connecting member 4 are substantially the same width. The second electrode 3b and the second pad portion P2 of the semiconductor device 3 are formed to have the same width or slightly narrower. In the present embodiment, the widths W1 and W2 of the first and second joining members 4a and 4b are formed to be substantially the same width, but the present invention is not limited to this, and the widths are different. It may be formed. At this time, the cross-sectional areas in the Y direction of the first and second joints 4a and 4b are S A and S B , respectively. For example, when S A ≦ S B , S A is the minimum area through which the specified current can flow. What is necessary is just to be formed so that it may become above.

また、接続部材４の応力分散部である第１の部材４ｃは、第１，第２の接合部材４ａ，４ｂの幅Ｗ１，Ｗ２より第１の部材４ｃの幅Ｗ３の方が広くなるように形成されている。そして、図３（ｂ）に示すように、第１の部材４ｃの厚みＴ１は、第１，第２の接合部材４ａ、４ｂの厚みＴ２，Ｔ３より薄くなるように形成されている。また、第１の部材４ｃの厚みＴ１と幅Ｗ３は、第１，第２の接合部材４ａ，４ｂのＹ方向の断面積と同じ断面積となるように形成されている。なお、本実施形態の第１の部材４ｃのＹ方向の断面積が第１，第２の接合部材４ａ，４ｂと同じとなるように形成されているが、これに限られることはなく、第１，第２の接合材４ａ，４ｂの断面積よりも大きくなるように形成されていてもよい。すなわち、第１，第２の接合部４ａ，４ｂのＹ方向の断面積をそれぞれＳＡ，ＳＢとし、第１の部材４ｃのＹ方向の断面積をＳＣとし、例えばＳＡ≦ＳＢであった場合、ＳＣはＳＡ≦ＳＣとなるように形成されていてもよい。 Further, the first member 4c, which is the stress dispersion portion of the connecting member 4, is such that the width W3 of the first member 4c is wider than the widths W1, W2 of the first and second joining members 4a, 4b. Is formed. As shown in FIG. 3B, the thickness T1 of the first member 4c is formed to be thinner than the thicknesses T2 and T3 of the first and second joining members 4a and 4b. Further, the thickness T1 and the width W3 of the first member 4c are formed to have the same cross-sectional area as the cross-sectional area in the Y direction of the first and second joining members 4a and 4b. The first member 4c of the present embodiment is formed so that the cross-sectional area in the Y direction is the same as that of the first and second bonding members 4a and 4b, but the present invention is not limited to this. It may be formed so as to be larger than the cross-sectional area of the first and second bonding materials 4a and 4b. That is, the first and second joint portions 4a, 4b of the Y-direction of the cross-sectional area of the S A, S B, respectively, the cross-sectional area of the Y direction of the first member 4c as S C, eg S A ≦ S B In this case, S C may be formed so that S A ≦ S C.

第２，第３の部材４ｄ，４ｅの長さＬ１，Ｌ２は、第１の部材４ｃが配線基板２に対して略平行となるように形成されており、本実施形態では第２の部材４ｄの長さＬ１の方が第３の部材４ｅの長さよりも長くなるように形成されている。なお、本実施形態では第２，第３の部材４ｄ，４ｅの長さＬ１，Ｌ２が異なる長さとなるように形成されているが、これに限られることはなく、例えば第２，第３の部材４ｄ，４ｅの長さＬ１，Ｌ２がほぼ同じ長さとなるように形成されていてもよく、また、第１の部材４ｃが配線基板２に対して平行とならないような長さにしてもよい。   The lengths L1 and L2 of the second and third members 4d and 4e are formed so that the first member 4c is substantially parallel to the wiring board 2. In the present embodiment, the second member 4d is formed. The length L1 is longer than the length of the third member 4e. In the present embodiment, the lengths L1 and L2 of the second and third members 4d and 4e are formed to be different lengths, but the present invention is not limited to this. For example, the second and third members The lengths L1 and L2 of the members 4d and 4e may be formed so as to be substantially the same length, or the length of the first member 4c may not be parallel to the wiring board 2. .

また、第２，第３の部材４ｄ，４ｅは、第１，第２の接合部材４ａ，４ｂと第１の部材４ｃとに連続して接続するために、第１，第２の接合部材４ａ，４ｂの幅Ｗ１，Ｗ２から第１の部材４ｃの幅Ｗ３へと向かうに従って広くなるように形成されている。そして、第１，第２の接合部材４ａ，４ｂの厚みＴ２，Ｔ３から第１の部材４ｃの厚みＴ１へと向かうに従って薄くなるように形成されている。   Further, the second and third members 4d and 4e are connected to the first and second joining members 4a and 4b and the first member 4c in order to be connected to the first and second joining members 4a. , 4b is formed so as to increase from the width W1, W2 to the width W3 of the first member 4c. And it forms so that it may become thin as it goes to thickness T1 of the 1st member 4c from thickness T2, T3 of the 1st, 2nd joining members 4a and 4b.

すなわち、第１，第２の接続部材４ａ，４ｂのＹ方向の断面積と同じ断面積となるように形成されている。なお、本実施形態の第２，第３の部材４ｄ，４ｅのＹ方向の断面積が第１，第２の接合部材４ａ，４ｂと同じとなるように形成されているが、これに限られることはなく、第１，第２の接合材４ａ，４ｂの断面積よりも大きくなるように形成されていてもよい。   That is, the first and second connection members 4a and 4b are formed to have the same cross-sectional area as that in the Y direction. In addition, although it is formed so that the cross-sectional area of the Y direction of the 2nd, 3rd members 4d and 4e of this embodiment may become the same as the 1st, 2nd joining members 4a and 4b, it is restricted to this. In other words, the cross-sectional area of the first and second bonding materials 4a and 4b may be larger.

この様に、第１，第２，第３の部材４ｃ，４ｄ，４ｅを第１，第２の接合部材４ａ，４ｂの厚みＴ２，Ｔ３より薄くなるように形成することにより、配線基板２や接続部材４が熱膨張することで応力を発生させても、第１の部材４ｃへと応力が働きやすくなり、撓む事が可能となるので、応力を分散することができる。そのため、第１，第２の接合部材４ａ，４ｂと第２，第３の接合材１０，１１の破断を抑制することができる。   In this way, by forming the first, second, and third members 4c, 4d, and 4e to be thinner than the thicknesses T2 and T3 of the first and second bonding members 4a and 4b, the wiring board 2 and Even if a stress is generated by thermal expansion of the connecting member 4, the stress easily acts on the first member 4 c and can be bent, so that the stress can be dispersed. Therefore, breakage of the first and second joining members 4a and 4b and the second and third joining materials 10 and 11 can be suppressed.

また、第１の部材４ｃの幅Ｗ３を第１，第２の接続部材４ａ，４ｂの幅Ｗ１，Ｗ２より広くすることで、熱を放熱しやすくなる。そのため、熱による膨張を抑制することができ、熱膨張により発生する応力を小さくすることができる。その結果、第１，第２の接合部材４ａ，４ｂと第２，第３の接合材１０，１１の破断を抑制することができる。   In addition, by making the width W3 of the first member 4c wider than the widths W1 and W2 of the first and second connection members 4a and 4b, it becomes easy to dissipate heat. Therefore, expansion due to heat can be suppressed, and stress generated by thermal expansion can be reduced. As a result, breakage of the first and second joining members 4a and 4b and the second and third joining members 10 and 11 can be suppressed.

以上、第１実施形態の半導体装置の実装構造１によれば、配線基板２の第１のパッド部Ｐ１上に第１の接合材９を介して半導体装置３を設けている。そして、接続部材４の応力分散部である第１の部材４ｃの厚みＴ１を、第１，第２の接合部材４ａ，４ｂの厚みＴ２，Ｔ３よりも薄くなるように形成している。また、第１の部材４ｃの幅Ｗ３を第１，第２の接合部材４ａ，４ｂの幅Ｗ１，Ｗ２よりも広くなるように形成している。   As described above, according to the semiconductor device mounting structure 1 of the first embodiment, the semiconductor device 3 is provided on the first pad portion P <b> 1 of the wiring substrate 2 via the first bonding material 9. Then, the thickness T1 of the first member 4c, which is the stress dispersion portion of the connection member 4, is formed to be thinner than the thicknesses T2 and T3 of the first and second joining members 4a and 4b. Further, the width W3 of the first member 4c is formed to be wider than the widths W1 and W2 of the first and second joining members 4a and 4b.

これにより、小型化して実装することが可能となり、また応力を分散させて破断を抑制することが可能となる。そのため、より省スペースで接続信頼性の確保が可能な半導体装置の実装をすることができる。また、半導体装置３が発生する熱を接続部材４から放熱することが出来るため、熱膨張により発生する応力を小さくすることが可能となる。   This makes it possible to downsize and mount, and to disperse stress and suppress breakage. Therefore, it is possible to mount a semiconductor device that can secure connection reliability in a smaller space. Further, since the heat generated by the semiconductor device 3 can be radiated from the connection member 4, it is possible to reduce the stress generated by the thermal expansion.

更に、第１実施形態の半導体装置の実装構造１によれば、接続部材４の第１，第２，第３の部材４ｃ，４ｄ，４ｅのＹ方向の断面積を第１，第２の接合部材４ａ，４ｂの断面積以上に形成している。これにより、電流が流れることによる接続部材４の断線を防止する。   Furthermore, according to the mounting structure 1 of the semiconductor device of the first embodiment, the cross-sectional areas in the Y direction of the first, second, and third members 4c, 4d, and 4e of the connecting member 4 are the first and second joints. The members 4a and 4b are formed to have a cross-sectional area larger than that. Thereby, disconnection of the connection member 4 due to the flow of current is prevented.

（第２実施形態）
次に、本発明の第２実施形態に係る半導体装置の実装構造について、図４乃至図６を参照して説明する。本実施形態の半導体装置の実装構造２０は、接続部材２１の応力分散部である第１の部材２１ｃがＳ字クランク形状である点で第１実施形態と異なり、その他の構成部分については、同様の構成を有している。従って、図４乃至図６では、接続部材２１を示し、以下の説明においては、第１実施形態と同様の構成部分については、詳細説明を省略して異なる構成部分についてのみ説明する。 (Second Embodiment)
Next, a semiconductor device mounting structure according to a second embodiment of the present invention will be described with reference to FIGS. The mounting structure 20 of the semiconductor device of the present embodiment is different from the first embodiment in that the first member 21c, which is the stress distribution portion of the connection member 21, is an S-shaped crank shape. It has the composition of. Therefore, in FIG. 4 to FIG. 6, the connection member 21 is shown, and in the following description, the same components as those in the first embodiment will be omitted, and only different components will be described.

図４（ａ），（ｂ），（ｃ）に示すように、接続部材２１は、Ｃｕから形成されており、第２の接合材１０と接する第１の接合部材２１ａと、第３の接合材１１と接する第２の接合部材２１ｂと、第１の接合部材２１ａと第２の接合部材２１ｂと一定の間隔を設けて形成され、応力分散部である第１の部材２１ｃと、第１の部材２１ｃを支持し、第１の接合部材２１ａと接続している第２の部材２１ｄと、第１の部材２１ｃを支持し、第２の接合部材２１ｂと接続している第３の部材２１ｅとから構成されている。   As shown in FIGS. 4A, 4 </ b> B, and 4 </ b> C, the connection member 21 is made of Cu, and the first bonding member 21 a that contacts the second bonding material 10 and the third bonding. A first joining member 21b that is in contact with the material 11, a first joining member 21a that is formed at a certain distance from the first joining member 21a and the second joining member 21b, and is a stress distribution part; A second member 21d that supports the member 21c and is connected to the first bonding member 21a; a third member 21e that supports the first member 21c and is connected to the second bonding member 21b; It is composed of

なお、本実施形態では接合部材４はＣｕから形成されているが、これに限られることはなく、導電性金属のもの、望ましくは配線基板２の基材５の材質と同じ材質又はほぼ同じ熱膨張係数のものを用いても良い。   In this embodiment, the bonding member 4 is made of Cu, but is not limited to this, and is made of a conductive metal, preferably the same material as the base material 5 of the wiring board 2 or substantially the same heat. Those having an expansion coefficient may be used.

接合部材２１についてより詳しく説明すると、図５（ａ）に示すように接続部材２１の第１の接合部材２１ａの幅Ｗ４と第２の接合部材４ｂの幅Ｗ５は、ほぼ同じ幅となるように形成されており、半導体装置３の第２の電極３ｂや第２のパッド部Ｐ２に対して同じ幅、もしくは少し狭くなるように形成されている。なお、本実施形態では第１，第２の接合部材２１ａ，２１ｂの幅Ｗ１，Ｗ２がほぼ同じ幅となるように形成されているが、これに限られることはなく、第１実施形態と同様に異なる幅となるように形成されていてもよい。   The joining member 21 will be described in more detail. As shown in FIG. 5A, the width W4 of the first joining member 21a and the width W5 of the second joining member 4b of the connecting member 21 are substantially the same width. The second electrode 3b and the second pad portion P2 of the semiconductor device 3 are formed so as to be the same width or slightly narrower. In the present embodiment, the widths W1 and W2 of the first and second joining members 21a and 21b are formed to be substantially the same, but the present invention is not limited to this and is the same as in the first embodiment. May be formed to have different widths.

また、接続部材２１の応力分散部である第１の部材２１ｃは、Ｓ字クランク形状に形成されており、Ｙ軸方向と−Ｙ軸方向に向かって曲部が形成されている。なお、本実施形態の第１の部材２１ｃがＳ字クランク形状であるが、これに限られることはなく、例えば図６（ａ），（ｂ）に示すように、接合部材２２の第１の部材２２ａがＵ字形状に形成されている等、曲部を有する形状であればどのような形状であってもよい。   In addition, the first member 21c, which is a stress dispersion portion of the connection member 21, is formed in an S-shaped crank shape, and a curved portion is formed in the Y-axis direction and the −Y-axis direction. The first member 21c of the present embodiment has an S-shaped crank shape. However, the first member 21c is not limited to this, and for example, as shown in FIGS. Any shape may be used as long as the member 22a has a curved portion, such as a U-shape.

そして、図５（ｂ）に示すように、第１の部材２１ｃの厚みＴ４は、第１，第２の接合部材４ａ、４ｂの厚みＴ５，Ｔ６と同じ厚みとなるように形成されている。また、第１の部材２１ｃは、第１，第２の接合部材２１ａ，２１ｂのＹ軸方向の断面積と同じ断面積以上となるように形成されている。   As shown in FIG. 5B, the thickness T4 of the first member 21c is formed to be the same as the thicknesses T5 and T6 of the first and second joining members 4a and 4b. The first member 21c is formed to have a cross-sectional area equal to or larger than the cross-sectional area in the Y-axis direction of the first and second joining members 21a and 21b.

このように、曲部を有する形状にすることにより、配線基板２や接続部材２１が熱膨張することで応力を発生させても、第１の部材２１ｃへと応力が働き、変形することで応力を吸収することが可能となる。そのため、第１，第２の接合部材２１ａ，２１ｂと第２，第３の接合材１０，１１の破断を抑制することができる。   Thus, even if the wiring board 2 and the connecting member 21 are caused to thermally expand by forming a curved portion, the stress acts on the first member 21c and the stress is generated by the deformation. Can be absorbed. Therefore, breakage of the first and second bonding members 21a and 21b and the second and third bonding materials 10 and 11 can be suppressed.

また、第１の部材４ｃをＳ字クランク形状にすることにより、放熱する面積を大きくすることが可能となるため、より放熱しやすくなる。そのため、熱による膨張を抑制することができ、熱膨張により発生する応力を小さくすることができる。その結果、第１，第２の接合部材２１ａ，２１ｂと第２，第３の接合材１０，１１の破断を抑制することができる。   Further, by making the first member 4c into an S-shaped crank shape, it is possible to increase the area to dissipate heat, so that it is easier to dissipate heat. Therefore, expansion due to heat can be suppressed, and stress generated by thermal expansion can be reduced. As a result, breakage of the first and second joining members 21a and 21b and the second and third joining members 10 and 11 can be suppressed.

第２，第３の部材２１ｄ，２１ｅの長さＬ３，Ｌ４は、第１の部材２１ｃが配線基板２に対して略平行となるように形成されており、本実施形態では第２の部材２１ｄの長さＬ１の方が第３の部材２１ｅの長さよりも長くなるように形成されている。なお、本実施形態では第２，第３の部材２１ｄ，２１ｅの長さＬ３，Ｌ４が異なる長さとなるように形成されているが、これに限られることはなく、ほぼ同じ長さとなるように形成してもよく、また、第１の部材２１ｃが配線基板２に対して平行とならないような長さにしてもよい。   The lengths L3 and L4 of the second and third members 21d and 21e are formed so that the first member 21c is substantially parallel to the wiring board 2, and in this embodiment, the second member 21d is formed. The length L1 is longer than the length of the third member 21e. In the present embodiment, the lengths L3 and L4 of the second and third members 21d and 21e are different from each other. However, the length is not limited to this, and the lengths are almost the same. The first member 21c may be formed so as not to be parallel to the wiring board 2.

また、第２，第３の部材２１ｄ，２１ｅの幅Ｗ６，Ｗ７は、第１，第２の接合部材２１ａ，２１ｂと第１の部材２１ｃとに連続して接続しており、第１，第２の接合部材２１ａ，２１ｂの幅Ｗ４，Ｗ５と同じとように形成されている。そして、第２，第３の部材２１ｄ，２１ｅの厚みＴ７，Ｔ８は、第１，第２の接合部材４ａ，４ｂの厚みＴ５，Ｔ６と同じ厚みとなるように形成されている。   The widths W6 and W7 of the second and third members 21d and 21e are continuously connected to the first and second joining members 21a and 21b and the first member 21c. It is formed in the same manner as the widths W4 and W5 of the two joining members 21a and 21b. The thicknesses T7 and T8 of the second and third members 21d and 21e are formed to be the same as the thicknesses T5 and T6 of the first and second joining members 4a and 4b.

以上、第２実施形態の半導体装置の実装構造２０によれば、配線基板２の第１のパッド部Ｐ１上に第１の接合材９を介して半導体装置３を設けている。そして、接続部材２１の応力分散部である第１の部材２１ｃがＳ字クランク形状に形成されている。   As described above, according to the semiconductor device mounting structure 20 of the second embodiment, the semiconductor device 3 is provided on the first pad portion P <b> 1 of the wiring substrate 2 via the first bonding material 9. And the 1st member 21c which is a stress distribution part of the connection member 21 is formed in S character crank shape.

これにより、小型化して実装することが可能となり、また応力を吸収させて破断を抑制することが可能となる。そのため、より省スペースで接続信頼性の確保が可能な半導体装置の実装をおこなうことができる。また、半導体装置３が発生する熱を接続部材２１から放熱することが出来るため、熱膨張により発生する応力を小さくすることが可能となる。   This makes it possible to downsize and mount, and to absorb the stress and suppress breakage. Therefore, it is possible to mount a semiconductor device capable of securing connection reliability in a smaller space. Further, since the heat generated by the semiconductor device 3 can be radiated from the connection member 21, it is possible to reduce the stress generated by the thermal expansion.

本発明のいくつかの実施形態を説明したが、これらの実施形態は、例として提示したものであり、発明の範囲を限定することは意図していない。これら新規な実施形態は、その他のさまざまな形態で実施されることが可能であり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことができる。これら実施形態やその変形は、発明の範囲や要旨に含まれるとともに、特許請求の範囲に記載された発明とその均等の範囲に含まれる。   Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

１，２０…半導体装置の実装構造
２…配線基板
３…半導体装置
３ａ…第１の電極
３ｂ…第２の電極
４，２１，２２…接続部材
４ａ，２１ａ…第１の接合部材
４ｂ，２１ｂ…第２の接合部材
４ｃ，２１ｃ，２２ａ…第１の部材
４ｄ，２１ｄ…第２の部材
４ｅ，２１ｅ…第３の部材
５…基材
６…絶縁層
７…配線層
８…レジスト層
９…第１の接合材
１０…第２の接合材
１１…第３の接合材
Ｐ１…第１のパッド部
Ｐ２…第２のパッド部
Ｗ１，Ｗ４…第１の接合部材の幅
Ｗ２，Ｗ５…第２の接合部材の幅
Ｗ３…第１の部材の幅
Ｔ１，Ｔ４…第１の部材の厚み
Ｔ２，Ｔ５…第１の接合部材の厚み
Ｔ３，Ｔ６…第２の接合部材の厚み
Ｔ７…第２の部材の厚み
Ｔ８…第３の部材の厚み
Ｌ１，Ｌ３…第２の部材の長さ
Ｌ２，Ｌ４…第３の部材の長さ DESCRIPTION OF SYMBOLS 1,20 ... Semiconductor device mounting structure 2 ... Wiring substrate 3 ... Semiconductor device 3a ... 1st electrode 3b ... 2nd electrode 4, 21, 22 ... Connection member 4a, 21a ... 1st joining member 4b, 21b ... 2nd joining member 4c, 21c, 22a ... 1st member 4d, 21d ... 2nd member 4e, 21e ... 3rd member 5 ... Base material 6 ... Insulating layer 7 ... Wiring layer 8 ... Resist layer 9 ... First 1st bonding material 10 ... 2nd bonding material 11 ... 3rd bonding material P1 ... 1st pad part P2 ... 2nd pad part W1, W4 ... 1st bonding member width W2, W5 ... 2nd Width W3 of joining member: Width T1, T4 of first member ... Thickness T2, T5 of first member ... Thickness T3, T6 of first joining member ... Thickness T2 of second joining member ... Second member Thickness T8 ... third member thickness L1, L3 ... second member length L2, L4 ... third member length

Claims (6)

基材上の一部に形成されている配線層と、前記配線層の複数のパッド部を囲むように前記絶縁層と前記配線層上に形成されているレジスト層とを有する配線基板と、
前記配線基板の前記複数のパッド部の一方に設けられている第１の接合材と、
第１の電極と前記第１の電極の対向面側に第２の電極を有し、前記第１の接合材と前記第１の電極とが接するように設けられている半導体装置と、
前記複数のパッド部の他方に電気的に接続して設けられている第２の接合材と、前記半導体装置の前記第２の電極上に設けられている第３の接合材とに接するように設けられ、応力分散部が形成されている接続部材と、
を有することを特徴とする半導体装置の実装構造。 A wiring board having a wiring layer formed on a part of the substrate, and a resist layer formed on the wiring layer so as to surround a plurality of pad portions of the wiring layer;
A first bonding material provided on one of the plurality of pad portions of the wiring board;
A semiconductor device having a second electrode on a surface facing the first electrode and the first electrode, wherein the first bonding material and the first electrode are in contact with each other;
The second bonding material provided in electrical connection with the other of the plurality of pad portions and the third bonding material provided on the second electrode of the semiconductor device are in contact with each other. A connection member provided with a stress distribution part;
A mounting structure of a semiconductor device, comprising: 前記接続部材は、前記第２の接合材と接する第１の接合部材と、
前記第３の接合材と接する第２の接合部材と、
前記第１の接合部材と前記第２の接合部材と一定の間隔を設けて形成される第１の部材と、
前記第１の部材を支持し、前記第１の接合部材と接続している第２の部材と、
前記第１の部材を支持し、前記第２の接合部材と接続している第３の部材と、
を有し、
前記応力分散部は前記第１の部材、前記第２の部材、前記第３の部材のうち少なくとも１つ以上であることを特徴とする請求項１記載の半導体装置の実装構造。 The connection member includes a first bonding member that contacts the second bonding material;
A second bonding member in contact with the third bonding material;
A first member formed at a predetermined interval from the first joining member and the second joining member;
A second member supporting the first member and connected to the first joining member;
A third member supporting the first member and connected to the second joining member;
Have
The semiconductor device mounting structure according to claim 1, wherein the stress distribution portion is at least one of the first member, the second member, and the third member. 前記第１の部材、前記第２の部材、前記第３の部材のうち少なくとも１つ以上の厚みは、前記第１の接合部材と前記第２の接合部材の少なくとも一方の厚みより薄く形成されていることを特徴とする請求項２に記載の半導体装置の実装構造。   At least one of the first member, the second member, and the third member has a thickness that is thinner than at least one of the first joining member and the second joining member. 3. The semiconductor device mounting structure according to claim 2, wherein: 前記第１の部材、前記第２の部材、前記第３の部材のうち少なくとも１つ以上の幅は、前記第１の接合部材と前記第２の接合部材の少なくとも一方の幅より広く形成されていることを特徴とする請求項３に記載の半導体装置の実装構造。   At least one of the first member, the second member, and the third member is wider than at least one of the first joining member and the second joining member. The semiconductor device mounting structure according to claim 3, wherein 前記第１の部材には、曲部が形成されていることを特徴とする請求項２に記載の半導体装置の実装構造。   The semiconductor device mounting structure according to claim 2, wherein the first member has a curved portion. 前記基材と前記接合部材は、同じ材質又は熱膨張係数が近似していることを特徴とする請求項１乃至請求項５に記載の半導体装置の実装構造。   The semiconductor device mounting structure according to claim 1, wherein the base material and the bonding member have the same material or thermal expansion coefficients that are similar to each other.
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