JP2012122958A - Soundness confirmation system and soundness confirmation method of safety protection measuring device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To certainly verify soundness of a logic integrated circuit for confirmation in short time by comprehensively performing verification and a soundness confirmation test to all functions of a safety protection measuring device of a plant.SOLUTION: A soundness confirmation system of a safety protection measuring device has: a logic integrated circuit 3 which is used for the safety protection measuring device of the plant, a logic integration unit 2, a simulation signal generation part 4 which is connected to the logical integration unit 2 to output the respective test patterns to the logic integration unit; an operation parameter setting part 5; a trip setting value setting part 6; a timing signal generation part 7; an operation output confirmation part 8; a trip output confirmation part 9; a trip response confirmation part 10; a criterion comparison part 11 which determines soundness of the logic integrated circuit 3; and an input/output control and confirmation device 12 in which all the test patterns for performing the confirmation test of the logic integrated circuit 3 are preliminarily input, and sequentially outputs the test patterns to the simulation signal generation part 4, the operation parameter setting part 5, the trip setting value setting part 6; and a timing signal generation part 7.

Description

  The present invention relates to a soundness confirmation system and a soundness confirmation method for a safety protection measuring device used for a safety protection function of a plant such as a nuclear power plant, and more particularly, a logic integration for processing a digital signal used for a safety protection measuring device. The present invention relates to a circuit soundness confirmation system and a soundness confirmation method.

  In a nuclear power plant or the like, a safety protection system is provided in order to prevent or suppress the occurrence of an abnormality that may impair the safety of the plant, or the occurrence of such an abnormality.

  A safety protection measuring device used in a safety protection system system inputs process signals from sensors for detecting multiple process signals such as temperature, pressure, and furnace output that indicate the state quantity of the plant. It has a function to perform arithmetic processing on the corresponding information.

  As an instrumentation circuit of this safety protection measuring device, there is a case where a conventional hardware device is used or a case where it is constituted by a microprocessor mounted with software. When a dedicated hardware device is used, it is necessary to provide a hardware device for each of a plurality of process signals. On the other hand, when a microprocessor is used, all signal processing can be performed by a single microprocessor for a plurality of process signals.

  Because of the importance of such a plant safety protection system, a highly reliable design is required. For this reason, when the instrumentation circuit is configured by a microprocessor, verification and soundness verification (V & V) is performed in order to prevent common cause failure of software and ensure software reliability.

  V & V is a verification work that verifies that the functions required for a digital-type safety protection system are correctly reflected from the upper process to the lower process in each process of software design and production. It is an activity for quality assurance that consists of soundness confirmation work to confirm that the required function is correctly implemented for the system manufactured through the above. Specifically, as a verification work that the software is produced according to the requirements of the design book, a check work between the book describing the design information and the book of the production is performed. In addition, a simulation signal equivalent to an actual input signal is inputted to an instrumentation circuit constituted by a microprocessor, and the soundness of whether or not an operation output is made according to the design book is confirmed.

  Implementation of such V & V is required to be performed by a third party different from the design and production workers, and requires more labor and time than ordinary software design and production.

  On the other hand, the conventional dedicated hardware device has realized the function of the safety protection measuring device by processing analog signals, but in recent years, due to the progress of high integration technology of logic integrated circuits such as PLD, By incorporating a logic integrated circuit, it is possible to realize a safety measuring device by digital signal processing on a small scale (Patent Document 1).

  This PLD (Programmable Logic Device) is a logic integrated circuit that converts a signal processing function of a digital signal into a configuration of a logic circuit and realizes it by hardware wiring without using software.

  Even when a dedicated hardware device that does not use software is used as the safety protection measuring device, another means such as a visual test is used to confirm that the product is manufactured in accordance with the control logic described in the design document. However, it is extremely difficult to confirm the dense control logic such as a logic integrated circuit constituting the hardware device and its operation state by a visual test.

  For this reason, all combinations of ON or OFF input patterns of each digital input to the control logic of the hardware device are input to the device, and the logic operation result and the design document are confirmed to confirm the logic integrated circuit. The soundness of the logic integrated circuit is confirmed by performing all test pattern input tests for proving that there is no erroneous wiring other than the design in all the logical wirings that are configured (Patent Document 1).

  A specific example of such a logic integrated circuit test apparatus 20 is shown in FIG. A logic integrated circuit 23 composed of a PLD to be tested is mounted on a test board 22. In the application software incorporated in the test pattern input / output control device 24, by inputting all the test patterns 25 of all pattern input tests in advance, the test pattern 25 is input to the logic integrated circuit 23 to be tested, The output is read to the test pattern input / output control device 22 and an output pattern 26 is created.

  A series of these operations is sequentially performed on all test patterns, and all output patterns 26 are accumulated. A comparison circuit 31 compares the output pattern 26 of the logic integrated circuit test apparatus 20 for each test pattern with an output pattern 29 based on a logic simulation result designed to be incorporated into the logic integrated circuit 23 by the design verification tool 30. Verification and soundness confirmation work is carried out by checking whether the soundness evaluation means 32 matches or not.

JP 2004-318254 A

  However, in the above-mentioned conventional logic integrated circuit verification and soundness confirmation work, the calculation functions of the neutron measurement system of the nuclear power plant, for example, the calculation functions such as the count rate calculation, the period calculation, the start-up region neutron monitor (SPRM) calculation, etc. Although a confirmation test was conducted, it did not have a function for conducting a confirmation test related to the trip judgment function or trip response function, which is one of the safety protection functions of nuclear power plants. For this reason, it has been required to construct a comprehensive soundness confirmation system including a trip determination function or a trip response function.

  The present invention has been made to solve the above-mentioned problems, and by performing comprehensive verification and soundness confirmation test for all the functions of the safety protection measuring device of the nuclear power plant, the soundness of the logic integrated circuit to be tested is improved. It aims at providing the soundness confirmation system and soundness confirmation method of the safety protection measuring device which can verify property in a short time reliably.

  In order to solve the above-described problem, the soundness confirmation system for a safety protection measuring apparatus according to the present invention is provided with a logic integrated circuit used for a plant safety protection measuring apparatus and a confirmation test for the logic integrated circuit. A logic integrated unit to which a plurality of test patterns are input, a simulation signal generating unit connected to the logic integrated unit and outputting each test pattern to the logic integrated unit, an operation parameter setting unit, a trip set value setting unit, and a timing signal A generation unit, a calculation output confirmation unit, a trip output confirmation unit, and a trip response confirmation unit, which are connected to the logic integrated unit and are input with calculation output, trip output, and trip output response time from the logic integrated unit, respectively, The values and reference values obtained by the output confirmation unit, trip output confirmation unit and trip response confirmation unit A comparison unit for determining the soundness of the logic integrated circuit by comparing, and all test patterns for performing a verification test of the logic integrated circuit are input in advance, a simulation signal generating unit, a calculation parameter setting unit, a trip And an input / output control confirmation device for sequentially outputting test patterns to the set value setting unit and the timing signal generating unit.

  Further, the soundness confirmation method for the safety protection measuring device according to the present invention is a safety protection for conducting a confirmation test of the logic integrated circuit on a logic integrated unit in which the logic integrated circuit used in the plant safety protection measuring device is mounted. In the soundness confirmation method of the measuring device, the test pattern is sequentially output from the output control confirmation device in which all the test patterns are input in advance to the simulation signal generation unit, calculation parameter setting unit, trip set value setting unit, and timing signal generation unit. Each test pattern is input to the logic integrated unit from the simulation signal generation unit, calculation parameter setting unit, trip set value setting unit, and timing signal generation unit, the calculation output output from the logic integration unit, the trip output, and The integrity of the logic integrated circuit is compared by comparing the reference value with the trip output response time value. And judging.

  According to the present invention, it is possible to reliably verify the soundness of a logic integrated circuit to be tested in a short time by performing comprehensive verification and soundness confirmation tests on all functions of a safety protection measuring device of a nuclear power plant. Can perform verification and sanity confirmation tests for all functions of plant safety protection measuring equipment

The whole block diagram of the soundness confirmation system of the safety protection measuring device which concerns on embodiment of this invention. The block diagram of the conventional soundness confirmation system.

Hereinafter, embodiments of a soundness confirmation system and a soundness confirmation method according to the present invention will be described with reference to the drawings.
(Constitution)
The soundness confirmation system 1 according to the present embodiment includes a logic integrated unit 2, a simulation signal generating unit 4, an operation parameter setting unit 5, a trip set value setting unit 6 on which a logic integrated circuit 3 made of a PLD board to be tested is mounted. , A timing signal generation unit 7, a calculation output confirmation unit 8, a trip output confirmation unit 9, a trip response confirmation unit 10, a judgment reference comparison unit 11, and an input / output control confirmation device 12.

  The simulation signal generator 4 inputs a plant simulation signal to the logic integrated unit 2 according to the control from the input / output control confirmation device 12, and the calculation parameter setting unit 5 responds to the control from the input / output control confirmation device 12. Calculation parameters necessary for calculation processing in the logic integrated unit 2 are set.

The trip set value setting unit 6 sets a trip determination parameter of the logical integrated unit 2 necessary for the trip determination process in accordance with the control from the input / output control confirmation device 12.
The timing signal generator 7 generates a timing signal required for trip response confirmation in response to control from the input / output control confirmation device 12 and generates a time origin signal for trip response of the logic integrated unit 2.

The calculation output confirmation unit 8 acquires the calculation output from the logic integrated unit 2, and the determination reference comparison unit 11 compares the determination reference value with the calculation output value to determine pass / fail.
The trip output confirmation unit 9 acquires the trip output from the logic integrated unit 2, and the determination reference comparison unit 11 compares the determination reference value with the trip output value to determine pass / fail.

The trip response confirmation unit 10 acquires the trip output response time from the logic integrated unit 2, and the determination reference comparison unit 11 compares the determination reference value with the trip output response time to make a pass / fail determination.
The input / output control confirmation device 12 includes application software for evaluating the soundness related to the arithmetic processing of the logic integrated unit 2, the trip output, and the soundness related to the response from the result of the determination reference comparison unit 11.

(Function)
In this embodiment configured as described above, a plant simulation signal, a calculation parameter, a trip determination parameter, and a time origin signal test pattern are input to the logic integrated unit 2, and the calculation output, trip output, and trip response time are respectively calculated. Obtained by the output confirmation unit 8, trip output confirmation unit 9, and trip response confirmation unit 10.

  By comparing each value acquired by the calculation output confirmation unit 8, the trip output confirmation unit 9 and the lip response confirmation unit 10 with the determination reference value in the determination reference comparison unit 11, the arithmetic processing function of the logic integrated circuit 3, the trip The soundness of the judgment function and trip response function is confirmed.

In the application software on the input / output control check device 12, all test patterns of plant simulation signals, calculation parameters, trip determination parameters, and time origin signals are input in advance, and the entire operation is controlled by controlling all parts. The test pattern is sequentially performed, and the test can be automated.
If the input / output control confirmation device 12 confirms soundness for all test patterns, it is verified that there is no problem in the logic wiring and response of the logic integrated circuit 3.

(effect)
As described above, according to the present embodiment, the application software on the input / output control confirmation device 12 is sequentially repeated while controlling the input / output of the logical integrated unit with a predetermined test pattern, thereby enabling the nuclear power plant. The logic integrated circuit verification and soundness check operation can be performed in a short time and with high reliability over the entire functions constituting the safety protection function.

  DESCRIPTION OF SYMBOLS 1 ... Soundness confirmation system, 2 ... Logic integrated unit, 3 ... Logic integrated circuit, 4 ... Simulation signal generation part, 5 ... Operation parameter setting part, 6 ... Trip setting value setting part, 7 ... Timing signal generation part, 8 ... Calculation output confirmation unit, 9 ... trip output confirmation unit, 10 ... trip response confirmation unit, 11 ... determination reference comparison unit, 12 ... input / output control confirmation device.

Claims (2)

  A logic integrated unit used in a plant safety protection measuring device is mounted and a plurality of test patterns for performing a confirmation test of the logic integrated circuit are input, and each test connected to the logic integrated unit A simulation signal generating unit, a calculation parameter setting unit, a trip set value setting unit, and a timing signal generating unit for outputting a pattern to the logical integrated unit; an arithmetic output from the logical integrated unit connected to the logical integrated unit; a trip output; The calculation output confirmation unit, trip output confirmation unit and trip response confirmation unit to which the trip output response time is respectively input are compared with the reference values obtained by the calculation output confirmation unit, trip output confirmation unit and trip response confirmation unit. A criterion comparison unit for determining the soundness of the logic integrated circuit, and the logic integration An input / output control confirmation device that inputs all test patterns for road confirmation test in advance and sequentially outputs test patterns to the simulation signal generation unit, calculation parameter setting unit, trip set value setting unit, and timing signal generation unit A soundness confirmation system for a safety protection measuring device, comprising: In the soundness confirmation method of the safety protection measurement device for performing the confirmation test of the logic integrated circuit on the logic integrated unit in which the logic integrated circuit used in the plant safety protection measurement device is mounted,
A test pattern is sequentially output from the output control confirmation device in which all test patterns are input in advance to the simulation signal generation unit, calculation parameter setting unit, trip set value setting unit, and timing signal generation unit. Each test pattern is input to the logic integrated unit from the parameter setting unit, trip set value setting unit, and timing signal generation unit, and the calculation output, trip output, and trip output response time values output from the logic integrated unit are used as references. A method for confirming the soundness of a safety protection measuring apparatus, wherein the soundness of the logic integrated circuit is determined by comparing values.

Images