JP2012064837A - Semiconductor module - Google Patents

Abstract

The present invention relates to a semiconductor module that accommodates a semiconductor chip in which a photoelectric conversion unit is formed and a semiconductor chip in which a drive circuit that drives the photoelectric conversion unit is formed, and suppresses deterioration in image quality while reducing the size and thickness. To do.
A semiconductor chip 101 in which a photoelectric conversion region 118 is formed, and a driving circuit that is provided in a region excluding the photoelectric conversion region 118 on the semiconductor chip 101 and drives a photoelectric conversion unit that constitutes the photoelectric conversion region 118 are formed. The package substrate 103 in which the semiconductor chip 102 and the semiconductor chips 101 and 102 are accommodated and the opening 112 is formed at least in a region facing the photoelectric conversion region 118, and the opening 112 in a state in which the semiconductor chips 101 and 102 are accommodated. A light-transmitting cover 104 that blocks the light, and a reflection suppression wall 109 that is provided between the photoelectric conversion region 118 and the semiconductor chip 102 and suppresses light incident toward the semiconductor chip 102 from being reflected to the photoelectric conversion region 118; .
[Selection] Figure 1

Description

  The present invention relates to a semiconductor module in which a semiconductor chip is accommodated in a package base, and more particularly to a technology for downsizing a semiconductor module.

Conventionally, as an example of a semiconductor module, there is one in which a semiconductor chip of a solid-state imaging device is accommodated in a package base.
FIG. 8 is a cross-sectional view showing the configuration of the semiconductor module described in Patent Document 1. As shown in FIG.

  A semiconductor module 900 shown in FIG. 8 includes a solid-state imaging device 921, an envelope 920 that is a package base, and a translucent protective plate 928 that closes the opening of the recess 920a of the envelope 920. The solid-state imaging element 921 is accommodated in the recess 920 a of the envelope 920 and bonded to the bottom 927. The solid-state imaging element 921 has a photoelectric conversion unit that converts light into electricity, and a region where the photoelectric conversion unit is formed is a light-transmissive protective plate via a low-pass filter 922 provided on the solid-state imaging element 921. 928 is arranged so as to face 928. Light incident from the translucent protective plate 928 passes through the low-pass filter 922 and is incident on the photoelectric conversion unit of the solid-state image sensor 921.

JP-A-6-252371 JP 2002-354200 A

  By the way, the semiconductor module does not include a drive circuit that drives the photoelectric conversion unit of the solid-state imaging device. For this reason, for example, a manufacturer of a digital still camera needs to separately incorporate a semiconductor chip on which a drive circuit is formed when incorporating a semiconductor module, and a corresponding work load is generated. In order to reduce the workload of the manufacturer, the inventors of the present invention have a solid-state imaging device semiconductor chip (hereinafter referred to as a first semiconductor chip) and a semiconductor chip (hereinafter referred to as a first semiconductor chip) on which a drive circuit is formed. 2 is described in a single package substrate.

  In view of the demand for further miniaturization and thinning of the semiconductor module, it is conceivable to adopt a configuration in which the second semiconductor chip is arranged directly on the first semiconductor chip. At this time, in order to suppress that the optical path between the photoelectric conversion part of the first semiconductor chip and the translucent protective plate is blocked by the second semiconductor chip, the second semiconductor chip is replaced with the first semiconductor chip. It is necessary to arrange in a region where the photoelectric conversion part is not formed on the chip.

  However, when the configuration in which the second semiconductor chip is disposed on the first semiconductor chip is employed, the following problem occurs. Generally, a semiconductor chip is made of silicon, and its side surface is easy to reflect light due to metallic luster. At this time, incident light having a large incident angle out of incident light transmitted through the translucent protective plate enters the second semiconductor chip, not the photoelectric conversion unit. Then, some of the light reflected by the side surface of the second semiconductor chip enters the photoelectric conversion unit of the first semiconductor chip. In this case, light that is not supposed to be incident on the photoelectric conversion unit is incident, leading to deterioration of image quality.

  In view of the above-described problems, the present invention reduces image quality due to light reflected from the side surface of the second semiconductor chip entering the photoelectric conversion portion of the first semiconductor chip while reducing the size and thickness. An object is to provide a semiconductor module that can be suppressed.

  In order to solve the above-described problems, a semiconductor module according to the present invention is provided in a region where a photoelectric conversion unit is formed and a region on the first semiconductor chip where the photoelectric conversion unit is not formed. And a second semiconductor chip on which a driving circuit for driving the photoelectric conversion unit is formed, and the first and second semiconductor chips are accommodated, and an opening is formed at least in a region facing the photoelectric conversion unit. A package base, a translucent cover that closes the opening of the package base in a state in which the first and second semiconductor chips are accommodated, and a photoelectric formed on the first semiconductor chip in the package base. The second semiconductor chip provided between the conversion unit and the second semiconductor chip provided on the first semiconductor chip and passing through the translucent cover The light incident toward the and a reflection suppressing walls restrain the reflected to the photoelectric conversion unit.

  According to the semiconductor module having the above configuration, since the second semiconductor chip is provided in the region where the photoelectric conversion unit is not formed on the first semiconductor chip, the region where the photoelectric conversion unit is formed and the light transmission The optical path between the conductive cover and the region facing the photoelectric conversion unit is not blocked by the second semiconductor chip. Furthermore, since the reflection suppression wall is provided between the photoelectric conversion unit and the second semiconductor chip, the light that has passed through the translucent cover and entered the second semiconductor chip is reflected on the second semiconductor chip. It can suppress that it injects into the photoelectric conversion part of a 1st semiconductor chip after reflecting on the side surface.

Therefore, it is possible to provide a semiconductor module capable of suppressing deterioration in image quality while reducing size and thickness.
Further, the reflection suppression wall may be made of a material having a lower reflectance than a material constituting the second semiconductor chip.

By doing in this way, the light which permeate | transmitted the translucent cover and entered toward the 2nd semiconductor chip can be prevented from reflecting toward a photoelectric conversion part.
Furthermore, the reflection suppression wall may be formed of a black resin.

By setting it as such a structure, the reflectance of a reflection suppression wall can be made low.
The reflection suppression wall may be provided so as to surround a region where the photoelectric conversion unit is formed.

By doing in this way, it can suppress that the light which injected toward the 2nd semiconductor chip reflected more efficiently to a photoelectric conversion part.
Here, the reflection suppression wall may be extended from the end of the package base that defines the opening toward the inside of the package base.

With such a configuration, it is possible to integrally form the package base and the reflection suppressing wall.
The reflection suppression wall may be extended from the lower surface of the translucent cover toward the inside of the package base.

  In this way, the reflection suppression wall can be made of a material different from that of the package base. Therefore, the most suitable material for suppressing reflection to the photoelectric conversion unit should be used for the reflection suppression wall. Is possible.

  Furthermore, the lower end of the reflection suppressing wall may be positioned below the upper end of the second semiconductor chip. The second semiconductor chip is mounted on the first semiconductor chip via bumps, and the lower end of the reflection suppression wall is located below the lower end of the second semiconductor chip. It is good to be.

With such a configuration, it is possible to more reliably suppress the reflection of light incident on the second semiconductor chip to the photoelectric conversion unit.
Here, the reflection suppression wall may be formed on the first semiconductor chip.

  By doing in this way, it is possible to use only the reflection suppression wall as a separate material, so it is possible to use the most suitable material for the reflection suppression wall to suppress reflection to the photoelectric conversion unit. Become.

  The second semiconductor chip is mounted on the first semiconductor chip via bumps, and an upper end of the reflection suppression wall is positioned higher than a lower end of the second semiconductor chip. It is good to be. Furthermore, the upper end of the reflection suppression wall may be located above the upper end of the second semiconductor chip.

With such a configuration, it is possible to more reliably suppress the reflection of light incident on the second semiconductor chip to the photoelectric conversion unit.
The opening may be opened to the side wall of the package base, and the peripheral edge of the translucent cover may be in contact with the side wall of the package base.

With such a configuration, the semiconductor module can be further thinned by an amount corresponding to the thickness of the ceiling portion of the package base.
The first semiconductor chip may further include an output circuit that outputs an electrical signal generated by the photoelectric conversion unit.

  The first semiconductor chip functions as an image sensor, and an analog front for converting the analog electrical signal generated by the photoelectric conversion unit of the first semiconductor chip into a digital signal, in the second semiconductor chip. An end circuit may be formed.

It is sectional drawing which shows the whole structure of the semiconductor module 100 which concerns on 1st Embodiment. It is a block diagram which shows the specific example of the circuit formed in the semiconductor chip. It is sectional drawing which shows the whole structure of 100 A of semiconductor modules which concern on the modification 1 of 1st Embodiment. (A) Sectional drawing which shows the whole structure of semiconductor module 100B which concerns on the modification 2 of 1st Embodiment, (b) It is sectional drawing which shows the whole structure of semiconductor module 100C which concerns on the modification 3. (A) It is sectional drawing which shows the whole structure of the semiconductor module 200 which concerns on 2nd Embodiment, (b) It is sectional drawing which shows the whole structure of 200 A of semiconductor modules concerning the modification of 2nd Embodiment. (A) It is sectional drawing which shows the whole structure of the semiconductor module 300 which concerns on 3rd Embodiment, (b) It is sectional drawing which shows the whole structure of 300 A of semiconductor modules concerning the modification of 3rd Embodiment. It is the figure which expanded partially sectional drawing of the semiconductor module 100 which concerns on 1st Embodiment. It is a schematic cross section which shows the structure of the conventional semiconductor module.

Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.
[First Embodiment]
The overall configuration of the semiconductor module 100 according to the first embodiment will be described with reference to FIGS.

  1A is a perspective view showing the entire structure of the semiconductor module 100, and FIG. 1B is a cross-sectional view taken along the line AA (XZ cross-sectional view) shown in FIG. c) is a cross-sectional view (XY cross-sectional view) taken along line B-B shown in FIG.

  The semiconductor module 100 includes a first semiconductor chip 101, a second semiconductor chip 102, a package base 103, a translucent cover 104, and a reflection suppression wall 109 as main components.

<Package base>
The package base 103 accommodates the first semiconductor chip 101 and the second semiconductor chip 102 therein. As shown in FIGS. 1A and 1B, the package base 103 includes a ceramic substrate portion 105 and a black resin case portion. The substrate unit 105 constitutes the bottom of the package substrate. The case portion 106 constitutes a side wall portion 107, a ceiling portion 108, and a reflection suppressing wall 109 of the package substrate.

  As shown in FIG. 1B, a plurality of electrode pads 110 are provided inside the package base 103. The case portion 106 is provided with a plurality of external lead wires 111. A part of the external lead wire 111 is embedded in the case portion 106 and the other portion protrudes outside the case portion 106. The electrode pad 110 and the external lead wire 111 are connected to wirings embedded in the case portion 106, respectively. The first semiconductor chip 101 is disposed on the upper surface of the substrate unit 105, and the second semiconductor chip 102 is disposed on the upper surface of the first semiconductor chip 101. An opening 112 is formed in a part of the ceiling portion 108 in the package base 103.

<Translucent cover>
The translucent cover 104 has a flat plate shape and is formed of a translucent resin or translucent glass. The translucent cover 104 is bonded to the upper surface of the package base 103 with an adhesive 113 so as to close the opening 112 of the package base 103.

<First semiconductor chip, second semiconductor chip>
(Appearance configuration)
The first semiconductor chip 101 functions as an image sensor. The first semiconductor chip 101 includes a silicon substrate 114, a lens layer 115 provided on the silicon substrate 114, and a plurality of electrode pads 116 and 117. In the region 118 in the silicon substrate 114, a plurality of photoelectric conversion portions that receive incident light and perform photoelectric conversion are formed in a matrix. Hereinafter, this region 118 is referred to as a photoelectric conversion region 118. The lens layer 115 is a layer made of a microlens provided for each photoelectric conversion unit of the photoelectric conversion region 118, and guides light incident in the semiconductor module 100 to the photoelectric conversion region 118. For easy understanding, the size of the photoelectric conversion region 118 and the lens layer 115 is exaggerated in FIG. Note that the first semiconductor chip 101 and the substrate unit 105 are bonded by, for example, a metal paste or the like.

  In addition, as shown in FIG. 1B, the first semiconductor is arranged such that light that has passed through the translucent cover 104 enters the photoelectric conversion region 118 of the first semiconductor chip 101 through the opening 112. The chip 101 is arranged so that the photoelectric conversion region 118 and the translucent cover 104 face each other.

As shown in FIG. 1B, the electrode pad 116 is bonded to the corresponding electrode pad 110 of the package base 103 with a wire 119.
The second semiconductor chip 102 includes a drive circuit that drives a photoelectric conversion unit formed on the first semiconductor chip 101, and an AFE (analog) that converts an analog electrical image signal from the first semiconductor chip 11 into a digital signal. A chip of an integrated circuit including a front end circuit. A plurality of bumps 121 are disposed on the lower end 102 b of the second semiconductor chip 102, and the electrode pads 117 of the corresponding first semiconductor chip 101, the second semiconductor chip 102, and the like via the bumps 121. Are flip-chip bonded so as to be connected. A gap between the second semiconductor chip 102 and the silicon substrate 114 is filled with an underfill material 122 that seals the integrated circuit of the second semiconductor chip 102. The underfill material 122 is used as an adhesive strength enhancer, and as the material, for example, a liquid epoxy resin, a resin sheet, ACF, or the like can be used.

(Circuit configuration)
FIG. 2 is a schematic block diagram showing a specific example of the configuration of a circuit formed in the semiconductor chips 101 and 102. As shown in FIG.

  The first semiconductor chip 101 includes a plurality of photoelectric conversion units 123 arranged in a matrix, a vertical transfer unit 124 provided corresponding to each column of the photoelectric conversion units 123, a horizontal transfer unit 125, and an output circuit Part 126.

  Each photoelectric conversion unit 123 photoelectrically converts incident light to generate a signal charge. The vertical transfer unit 124 reads the signal charge generated by each photoelectric conversion unit 123 and transfers it to the horizontal transfer unit 125 side in the column direction. The horizontal transfer unit 125 transfers the transferred signal charges to the output circuit unit 126 side in the row direction. The output circuit unit 126 converts the transferred signal charge into an electric signal and outputs it to the second semiconductor chip 102.

The integrated circuit of the second semiconductor chip 102 includes a drive circuit 127, an AFE circuit 128, and a TG (timing generator) 129.
The drive circuit 127 generates a drive pulse based on the timing signal generated by the TG 129 in order to drive the photoelectric conversion unit 123 formed in the first semiconductor chip 101, and the generated drive pulse is output to the first semiconductor chip. 101. Here, “driving the photoelectric conversion unit 123 formed on the first semiconductor chip 101” means that the signal charge read out from the signal charge generated by the photoelectric conversion unit 123 is transferred vertically and horizontally. This means that driving is performed so that a series of operations from the transfer to output by the output circuit unit 126 is performed. Accordingly, the drive pulses generated in the drive circuit 127 include drive pulses for driving the vertical transfer unit 124, the horizontal transfer unit 125, and the output circuit unit 126, respectively.

  The AFE circuit 128 performs correlated double sampling (CDS: Correlated Double Sampling) and automatic gain adjustment (AGC: Auto) on the analog image electrical signal output from the output circuit unit 126 based on the timing signal generated by the TG 129. After gain control, it is converted into a digital signal (ADC: Analog Digital Converter).

<Reflection suppression wall>
As shown in FIGS. 1B and 1C, between the photoelectric conversion region 118 and the second semiconductor chip 102, the end portion of the case portion 106 defining the opening 112 is directed toward the inside of the package base 103. The reflection suppression wall 109 is extended. The reflection suppression wall 109 functions to suppress light that has passed through the translucent cover 104 and entered the second semiconductor chip 102 from being reflected to the photoelectric conversion region 118.

  More specifically, the reflection suppressing wall 109 (and the case portion 106 continuous therewith) is formed of a material having a lower reflectance than the side surface of the second semiconductor chip 102. As such a material, And materials that easily absorb light, such as black resin, carbon, epoxy resin, and the like. In addition, a reflection suppression wall 109 is provided on an optical path (hereinafter referred to as a first optical path) from the translucent cover 104 to the second semiconductor chip 102. With such a configuration, the light incident toward the second semiconductor chip 102 can be absorbed by the reflection suppression wall 109, and thus the incident light is prevented from reaching the second semiconductor chip 102. be able to. As a result, it is possible to suppress the light incident toward the second semiconductor chip 102 from being reflected to the photoelectric conversion region 118.

  Further, by making the surface 109c of the reflection suppression wall 109 facing the photoelectric conversion region 118 rough, or by applying a frosting process, the surface 109c of the reflection suppression wall 109 is made more difficult to reflect. It is possible to obtain an effect more reliably.

  Further, the region where the reflection suppression wall 109 is provided (between the photoelectric conversion region 118 and the second semiconductor chip 102) extends not only from the first optical path but also from the second semiconductor chip 102 to the photoelectric conversion region 118. It is also on the optical path (hereinafter referred to as the second optical path). Therefore, when the light incident on the second semiconductor chip 102 is absorbed by the reflection suppression wall 109 located on the first optical path and the light that could not be absorbed is reflected by the second semiconductor chip 102. Even so, it can be further absorbed by the reflection suppression wall 109 located on the first optical path.

  The length of the reflection suppression wall 109 in the Z-axis direction is such that the lower end 109b of the reflection suppression wall 109 is positioned below the upper end 102a of the second semiconductor chip 102, as shown in FIG. It is desirable that More preferably, the length is such that the lower end 109 b is positioned below the lower end 102 b of the second semiconductor chip 102. The desired length of the reflection suppression wall 109 in the Z-axis direction is described above with reference to the second semiconductor chip 102. On the other hand, when described with reference to the optical path, the length in the Z-axis direction needs to be such that the reflection suppression wall 109 exists on the first optical path. More preferably, the length in the Z-axis direction is such that the reflection suppression wall 109 exists on both the first optical path and the second optical path.

  In addition, as shown in FIG. 1C, the reflection suppression wall 109 is provided so as to surround the four sides of the photoelectric conversion region 118. By doing so, it is possible to more reliably suppress the light reflected by the second semiconductor chip 102 from being reflected to the photoelectric conversion region 118. For example, this is effective when the light reflected by the second semiconductor chip 102 is further reflected by the inner wall of the upper (or lower) package base 103 in FIG. 1C and then enters the photoelectric conversion region 118. It is.

  The thickness of the reflection suppression wall 109, that is, the length in the X direction in the reflection suppression wall 109 on the side facing the second semiconductor chip 102, and the reflection on the side not facing the second semiconductor chip 102 In the suppression wall 109, the length in the Y direction can be appropriately adjusted according to the distance between the photoelectric conversion region 118 and the second semiconductor chip 102, and is not particularly limited. In addition, the thickness of the reflection suppression wall 109 can be more reliably suppressed as much as possible to suppress reflection to the photoelectric conversion region 118.

<Summary>
In the semiconductor module 100 configured as described above, the reflection suppression wall 109 is provided between the photoelectric conversion region 118 and the second semiconductor chip 102. With such a configuration, it is possible to suppress deterioration in image quality due to light that is transmitted through the translucent cover 104 and reflected by the side surface of the second semiconductor chip 102 entering the photoelectric conversion region 118.

  Furthermore, since the second semiconductor chip 102 is disposed on the first semiconductor chip 101, the second semiconductor chip 102 and the first semiconductor chip 101 are arranged side by side as much as the two chips overlap. The package base 103 can be reduced in size compared to the case where it is arranged. As a result, the semiconductor module itself can be reduced in size.

  Further, since the first semiconductor chip 101 as the image sensor and the second semiconductor chip 102 on which the drive circuit 127 and the AFE circuit 128 are formed are accommodated in the package base 103, for example, in a digital still camera. When assembling the semiconductor module 100, it is not necessary to separately incorporate a semiconductor chip on which the drive circuit 127 and the AFE circuit 128 are formed, and accordingly, the assembling work load of the digital still camera can be reduced.

  In storing the first semiconductor chip and the second semiconductor chip in one package base, as disclosed in Patent Document 2, above the integrated circuit (corresponding to the second semiconductor chip of the present application), It is also possible to arrange an image sensing chip (corresponding to the first semiconductor chip of the present application) via a spacer. However, in this case, since the spacer cannot be formed with high accuracy, the image sensing chip may be tilted rather than perpendicular to the optical axis of the lens. Then, depending on the position of the photoelectric conversion region formed on the image sensing chip, the distance from the lens does not coincide with the focal length, so that there is a problem that the image is distorted or blurred.

  Further, according to the configuration of Patent Document 2, since the signal output from the image sensing chip is transmitted to the integrated circuit via two metal wires, the output signal cannot be transmitted at high speed. There is also a problem.

  On the other hand, in the present embodiment, since the first semiconductor chip 101 is placed on the substrate unit 105, the first semiconductor chip 101 and the translucent cover 104 can be accurately placed in parallel. Therefore, when incorporating the semiconductor module 100 into the digital still camera, the photoelectric conversion region 118 can be accurately placed perpendicular to the optical axis of the lens, and as a result, image quality deterioration due to image distortion, blurring, and the like is suppressed. can do. Here, “parallel” includes not only completely parallel but also designed so as to be parallel, and includes those deviated from design values due to manufacturing errors or the like.

  Further, in the present embodiment, an output signal from the output circuit unit 126 of the first semiconductor chip 101 can be transmitted directly from the electrode pad 117 to the second semiconductor chip 102 via the bump 121. Therefore, high-speed transmission of the output signal can be realized.

[Modification of First Embodiment]
Next, a modification of the first embodiment will be described. Hereinafter, the description of the same configuration as that of the first embodiment will be omitted, and the description will focus on the differences.

  FIG. 3 is a cross-sectional view showing an overall configuration of a semiconductor module 100A according to Modification 1 of the first embodiment. 3A corresponds to an XZ cross-sectional view of the semiconductor module 100A, and FIG. 3B corresponds to a cross-sectional view taken along line CC (XY cross-sectional view) shown in FIG. 3A.

  1 differs from the semiconductor module 100 shown in FIG. 1 in that the number of the second semiconductor chips 102A arranged on the first semiconductor chip 101 is one, and the reflection suppression wall 109A has a photoelectric conversion region 118. It is a point provided only between the second semiconductor chip 102A.

  In the second semiconductor chip 102A shown in FIG. 3, the structure of two groups of the second semiconductor chip 102 in the semiconductor module 100 shown in FIG. 1 is incorporated. Therefore, the area of the photoelectric conversion region 118 formed in the first semiconductor chip 101 can be expanded by the smaller number of the second semiconductor chips 102A arranged on the first semiconductor chip 101. When the area of the photoelectric conversion region 118 is not expanded, the size of the semiconductor module 100A in the X-axis direction can be reduced.

  In the semiconductor module 100, the reflection suppressing wall 109 parallel to the YZ section and the reflection suppressing wall 109 parallel to the YZ section are provided between the photoelectric conversion region 118 and the second semiconductor chip 102. On the other hand, in the semiconductor module 100A, only the reflection suppression wall 109A parallel to the YZ section is provided. In order to obtain the effect of preventing the reflected light from the second semiconductor chip 102A from being incident on the photoelectric conversion region 118, when viewed in the XY section as in the present modification (FIG. 3B), It is sufficient that the reflection suppressing wall 109 is formed at least between the photoelectric conversion region 118 and the second semiconductor chip 102A.

FIG. 4A is a cross-sectional view showing an overall configuration of a semiconductor module 100B according to Modification 2 of the first embodiment.
In the semiconductor module 100 shown in FIG. 1, the case portion 106 is configured by integrating the side wall portion 107, the ceiling portion 108, and the reflection suppressing wall 109 of the package base 103. On the other hand, in the semiconductor module 100B according to the present modification, the side wall portion 107B, the ceiling portion 108B, and the reflection suppressing wall 109B are configured as separate members. For example, an adhesive or the like can be used for fixing between the side wall portion 107B and the ceiling portion 108B and fixing between the ceiling portion 108B and the reflection suppressing wall 109B.

  In the semiconductor module 100 shown in FIG. 1, the material constituting the reflection suppressing wall 109 needs to be the same as the material constituting the side wall portion 107 and the ceiling portion 108, but it is not necessary to manufacture these portions separately. Therefore, there is an effect that the manufacturing process can be simplified. On the other hand, in the semiconductor module 100B according to the present modification, only the reflection suppression wall 109B can be made of a different material. Therefore, the most suitable material for suppressing reflection to the photoelectric conversion region 118 is used as the reflection suppression wall. 109B can be used. Therefore, the function of the reflection suppressing wall 109B can be further improved.

FIG. 4B is a cross-sectional view showing an overall configuration of a semiconductor module 100C according to Modification 3 of the first embodiment.
Like the semiconductor module 100C, the substrate part 105C and the side wall part 107C may be integrally formed, and the ceiling part 108C and the reflection suppressing wall 109C may be integrally formed.

In addition to the ones shown in FIGS. 4A and 4B, for example, only the side wall and the ceiling can be formed integrally.
[Second Embodiment]
Next, a second embodiment will be described with reference to FIG. Hereinafter, the description of the same configuration as that of the first embodiment will be omitted, and the description will focus on the differences.

  FIG. 5A is a cross-sectional view showing the overall configuration of the semiconductor module 200 according to the present embodiment. The difference from the semiconductor module 100 shown in FIG. 1 is that a reflection suppression wall 209 is provided directly on the first semiconductor chip 201. For fixing the reflection suppressing wall 209 to the first semiconductor chip 201, for example, an epoxy resin, an acrylic resin, or the like can be used.

  A desirable length of the reflection suppressing wall 209 in the Z-axis direction will be described with reference to the second semiconductor chip 202. As shown in FIG. 4A, the length of the reflection suppression wall 209 in the Z-axis direction is such that the upper end 209a of the reflection suppression wall 209 is located above the lower end 202b of the second semiconductor chip 202. It is desirable that More preferably, the length is such that the upper end 209 a is located above the upper end 202 a of the second semiconductor chip 202. On the other hand, when the length of the desired reflection suppression wall 209 in the Z-axis direction is described with reference to the optical path, the relationship between the first optical path and the second path is opposite to that in the first embodiment. Specifically, it is necessary that the length in the Z-axis direction is such that the reflection suppression wall 209 exists on the first optical path. More preferably, the length in the Z-axis direction is such that the reflection suppression wall 209 exists on both the first optical path and the second optical path.

  Similar to the semiconductor module 100B shown in FIG. 4A, the semiconductor module 200 can use only the reflection suppression wall 209 as a different material, and is most suitable for suppressing reflection to the photoelectric conversion region 218. Thus, it becomes possible to use the material for the reflection suppressing wall 209. Therefore, the function of the reflection suppression wall 209 can be further improved.

  Further, in the semiconductor module 100 shown in FIG. 1, it may be difficult to bring the lower end 109 b of the reflection suppression wall 109 into contact with the first semiconductor chip 101 due to a manufacturing error. As a result, a slight gap is formed between the lower end 109b of the reflection suppression wall 109 and the first semiconductor chip 101, and the reflected light from the second semiconductor chip 102 to the photoelectric conversion region 118 is passed through this gap. There is a risk of allowing the invasion. However, in the semiconductor module 200 of the present embodiment, the lower end 209b of the reflection suppression wall 209 is the upper surface of the first semiconductor chip 201, and the upper end 209a of the reflection suppression wall 209 is above the upper end 202a of the second semiconductor chip 202. Since it can be provided so as to be positioned, it is possible to more reliably suppress the light incident toward the second semiconductor chip 202 from being reflected to the photoelectric conversion region 218.

  FIG. 5B is a cross-sectional view showing the overall configuration of a semiconductor module 200A according to a modification of the second embodiment. The difference from the semiconductor module 200 is that the opening 212A is opened to the side wall portion 207A of the package base 203A, and the peripheral portion of the translucent cover 204A is in contact with the side wall portion 207A of the package base 203A. . In such a configuration, the translucent cover 204A is placed directly on the upper surface of the side wall portion 207A of the package base 203A. Therefore, as compared with the semiconductor module 200 shown in FIG. 5A, the semiconductor module 200A can be thinned by an amount corresponding to the thickness of the ceiling portion of the package base 203.

Of course, the modification according to the first embodiment can be applied to the present embodiment and the modification.
[Third Embodiment]
Next, a third embodiment will be described with reference to FIG. Hereinafter, the description of the same configuration as that of the first embodiment will be omitted, and the description will focus on the differences.

  FIG. 6A is a cross-sectional view showing the overall configuration of the semiconductor module 300 according to the present embodiment. The difference from the semiconductor module 100 shown in FIG. 1 is that a reflection suppressing wall 309 is extended from the lower surface 304a of the translucent cover toward the inside of the package base 303.

  Similarly to the semiconductor modules 200 and 200A according to the second embodiment and the modifications thereof, in the case of the semiconductor module 300 according to this embodiment, it is possible to use only the reflection suppression wall 309 as a different material. The most suitable material for suppressing the reflection to the conversion region 318 can be used for the reflection suppressing wall 309. Therefore, the function of the reflection suppression wall 309 can be further improved.

Since the desirable length of the reflection suppression wall in the Z-axis direction can be described based on the same principle as in the first embodiment, description thereof is omitted here.
FIG. 6B is a cross-sectional view showing the overall configuration of a semiconductor module 300A according to a modification of the third embodiment. Similar to the semiconductor module 200A according to the modification of the second embodiment, the difference from the semiconductor module 300 is that the opening 312A is opened to the side wall portion 307A of the package base 303A and the periphery of the translucent cover 304A. This is that the portion is in contact with the side wall portion 307A of the package base 303A. By doing in this way, compared with the semiconductor module 300 shown in FIG. 6A, the semiconductor module 300A can be made thinner by an amount corresponding to the thickness of the ceiling portion of the package base 303A.

Of course, the modification according to the first embodiment can be applied to the present embodiment and the modification.
The first to third embodiments and the modification examples have been described above, but the present invention is not limited to these examples. For example, the following modifications can be considered. Hereinafter, the first embodiment will be described as an example, but it goes without saying that other embodiments and modifications can be similarly applied.

[Other variations]
(1) In FIG. 1B, the entire reflection suppression wall 109 is made of black resin. However, in order to obtain the effect of suppressing the light incident toward the second semiconductor chip 102 from being reflected to the photoelectric conversion region 118, at least the side of the reflection suppression wall 109 facing the photoelectric conversion region 118. It is sufficient that the surface 109c is made of a material that absorbs incident light. For example, a configuration in which the case portion 106 is made of a metal such as aluminum and the surface 109c of the reflection suppressing wall 109 is coated with a black resin is conceivable.

  (2) In FIG. 1C, the reflection suppression wall 109 is provided so as to surround the four sides of the photoelectric conversion region 118. However, in order to obtain an effect of suppressing the light incident on the second semiconductor chip 102 from being reflected to the photoelectric conversion region 118, the reflection suppression wall 109 is formed when the semiconductor module 100 is viewed from its upper surface. At least, it is sufficient if it is formed between the photoelectric conversion region 118 and the second semiconductor chip 102.

  (3) In the semiconductor module 100, the reflection suppression wall 109 is provided so as to surround the four sides of the photoelectric conversion region 118 when viewed from the XY cross section (FIG. 1C). However, the layout of the reflection suppression wall 109 viewed from the XY cross section is not limited to this. Another layout will be described with reference to FIGS. 7 and 1C mainly with respect to the length of the reflection suppression wall 109 in the Y-axis direction.

  FIG. 7 is an enlarged XY cross-sectional view (FIG. 1C) of the semiconductor module 100 according to the first embodiment. The first semiconductor chip 101, the reflection suppression wall 109, and the second semiconductor are shown in FIG. The chip 102 is illustrated in the center.

  In order to obtain the effect of suppressing the light reflected by the second semiconductor chip 102 from being reflected to the photoelectric conversion region 118, the reflection suppressing wall 109 is disposed at least on the first optical path, and incident light having a large incident angle is received. What is necessary is just to suppress reaching the second semiconductor chip 102. Therefore, the minimum necessary length of the reflection suppressing wall 109 in the Y-axis direction is equal to or longer than the length D1 of the second semiconductor chip 102 in the Y-axis direction.

  When the reflection suppression wall 109 is also arranged on the second optical path, the reflection suppression wall in the XY cross section is near the line segment S1 connecting the corner of the photoelectric conversion region 118 and the corner of the second semiconductor chip 102. The length is preferably such that 109 corners are arranged. By doing so, the light reflected by the second semiconductor chip 102 without being completely absorbed by the reflection suppression wall 109 located on the first optical path can be efficiently absorbed. More preferably, the length of the reflection suppression wall 109 in the Y-axis direction is longer than the length D2 of the photoelectric conversion region 118 in the Y-axis direction, and even more preferably, as shown in FIG. 109 is the case where the four sides of the photoelectric conversion region 118 are surrounded.

  In the above description, the case where the length D2 of the photoelectric conversion region 118 in the Y-axis direction is longer than the length D1 of the second semiconductor chip 102 in the Y-axis direction has been described. The case where the length D1 is longer than the length D2 of the photoelectric conversion region 118 in the Y-axis direction can be similarly described. That is, when the reflection suppression wall 109 is disposed only on the first optical path, the minimum necessary length of the reflection suppression wall 109 in the Y-axis direction is equal to or longer than the length D2 of the photoelectric conversion region 118 in the Y-axis direction. is there. When the reflection suppression wall 109 is also disposed on the second optical path, it is desirable that the length is such that the corner of the reflection suppression wall 109 in the XY cross section is disposed near the line segment S1. More preferably, the length of the reflection suppression wall 109 in the Y-axis direction is longer than the length D2 of the second semiconductor chip 102 in the Y-axis direction.

  (4) In the above-described embodiment and modification, the number of second semiconductor chips is two or one. However, the number of second semiconductor chips is not limited to these, and the number of second semiconductor chips may be three or more. Good. When three or more second semiconductor chips are mounted, it is possible to obtain the same effect as the above-described embodiment by providing a reflection suppression wall between each second semiconductor chip and the photoelectric conversion region. It is. Moreover, although the shape of the second semiconductor chip has been described as being rectangular, the shape is not particularly limited. Furthermore, the connection of the second semiconductor chip to the first semiconductor chip is not limited to flip chip bonding, and other bonding methods such as solder bonding can be employed.

  (5) In the above embodiment, the semiconductor module including the image sensor has been described. However, the present invention is not limited to this. For example, the configuration of the present invention can also be applied to a semiconductor module including a light receiving element such as an optical pickup other than an image sensor, and a light emitting element such as an LED element or a semiconductor laser element. A semiconductor module including a light emitting element will be specifically described as an example. A semiconductor chip in which a light emitting element is formed is a first semiconductor chip, and a semiconductor chip in which a driving circuit for driving the light emitting element is formed is a second semiconductor. Each corresponds to a chip. In the case of a semiconductor module including a light emitting element, light emitted from the light emitting element included in the first semiconductor chip may be reflected on the second semiconductor chip, thereby affecting light distribution characteristics. However, when the structure according to the present invention is applied to a semiconductor module including a light emitting element, it is possible to suppress the influence on the light distribution characteristics.

  (6) In the first embodiment, the configuration in which the integrated circuit formed in the second semiconductor chip includes the drive circuit, the AFE circuit, and the TG is shown, but the present invention is not limited to this. For example, only a driving circuit may be formed on a semiconductor chip, or only an AFE circuit may be formed. Conversely, circuits other than those described above can also be included.

(7) In the above-described embodiment and the like, the configuration in which the case portion of the package base is made of resin has been shown.
(8) In the above-described embodiment and the like, the configuration in which the first semiconductor chip is wire bonded to the substrate portion is shown, but the present invention is not limited to this, and for example, a bonding method such as flip chip bonding or solder bonding is adopted. You can also.

  (9) In the above-described embodiments and the like, the example in which the external lead wire is disposed on the side surface of the package base has been described. However, the present invention is not limited to this. . The shape of the external lead wire is not particularly limited.

  (10) The present invention is not limited to the above-described embodiments and modifications, and various modifications may be made within the scope conceived by those skilled in the art without departing from the spirit of the present invention. Configuration can take.

  The present invention can be suitably used, for example, for an optical semiconductor module that is required to be downsized.

100, 100A, 100B, 100C, 200, 200A, 300, 300A Semiconductor module 101, 201 First semiconductor chip 102, 102A, 202 Second semiconductor chip 102a, 202a Upper end of second semiconductor chip 102b, 202b Second Lower end 103, 203A, 303, 303A of package semiconductor substrate 104, 204A, 304, 304A Translucent cover 304a Bottom surface of translucent cover 105, 105C Substrate portion 106 Case portion 107, 107C, 207A, 307A Side wall portion 108 108B, 108C Ceiling 109, 109A, 109B, 109C, 209, 309 Antireflection wall 209a Upper end of antireflection wall 109b, 209b Lower end of antireflection wall 109c Opposite to photoelectric conversion region of antireflection wall Surface 110, 116, 117 Electrode pad 111 External lead wire 112, 212A, 312A Opening 113 Adhesive 114 Silicon substrate 115 Lens layer 118, 218, 318 Photoelectric conversion region 119 Wire 121 Bump 122 Underfill material 123 Photoelectric conversion unit 124 Vertical transfer Unit 125 horizontal transfer unit 126 output circuit unit 127 drive circuit 128 AFE circuit 129 TG
900 Semiconductor Module 920 Envelope 920a Concave 921 Solid-State Image Sensor 922 Low-pass Filter 927 Bottom 928 Translucent Protection Plate

Claims (14)

A first semiconductor chip on which a photoelectric conversion unit is formed;
A second semiconductor chip provided on a region where the photoelectric conversion unit is not formed on the first semiconductor chip, and a drive circuit for driving the photoelectric conversion unit is formed;
A package base that houses the first and second semiconductor chips and has an opening formed at least in a region facing the photoelectric conversion unit;
A translucent cover that closes the opening of the package base in a state in which the first and second semiconductor chips are accommodated;
Provided between the photoelectric conversion part formed on the first semiconductor chip and the second semiconductor chip provided on the first semiconductor chip in the package base, and passes through the translucent cover. And a reflection suppression wall that suppresses the light incident toward the second semiconductor chip from being reflected to the photoelectric conversion unit. The semiconductor module according to claim 1, wherein the reflection suppression wall is made of a material having a reflectance lower than that of the material constituting the second semiconductor chip. The semiconductor module according to claim 1, wherein the reflection suppression wall is formed of a black resin. The semiconductor module according to claim 1, wherein the reflection suppression wall is provided so as to surround a region where the photoelectric conversion unit is formed. The semiconductor module according to claim 1, wherein the reflection suppression wall is extended from an end of the package base that defines the opening toward the inside of the package base. The semiconductor module according to claim 1, wherein the reflection suppressing wall is extended from the lower surface of the translucent cover toward the inside of the package base. 7. The semiconductor module according to claim 5, wherein a lower end of the reflection suppression wall is positioned below an upper end of the second semiconductor chip. The second semiconductor chip is mounted on the first semiconductor chip via bumps,
7. The semiconductor module according to claim 5, wherein a lower end of the reflection suppression wall is positioned below a lower end of the second semiconductor chip. The semiconductor module according to claim 1, wherein the reflection suppression wall is formed on the first semiconductor chip. The second semiconductor chip is mounted on the first semiconductor chip via bumps,
10. The semiconductor module according to claim 9, wherein an upper end of the reflection suppression wall is positioned above a lower end of the second semiconductor chip. 10. The semiconductor module according to claim 9, wherein an upper end of the reflection suppression wall is located above an upper end of the second semiconductor chip. The opening is opened to the side wall of the package base;
The semiconductor module according to claim 6, wherein a peripheral edge portion of the translucent cover is in contact with a side wall portion of the package base. The semiconductor module according to claim 1, wherein an output circuit that outputs an electrical signal generated by the photoelectric conversion unit is further formed in the first semiconductor chip. The first semiconductor chip functions as an image sensor;
The analog front end circuit for converting an analog electric signal generated by the photoelectric conversion unit of the first semiconductor chip into a digital signal is further formed in the second semiconductor chip. 2. The semiconductor module according to 1.

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