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JP2011066116A - Circuit module, and method of manufacturing the same - Google Patents

Circuit module, and method of manufacturing the same Download PDF

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JP2011066116A
JP2011066116A JP2009214263A JP2009214263A JP2011066116A JP 2011066116 A JP2011066116 A JP 2011066116A JP 2009214263 A JP2009214263 A JP 2009214263A JP 2009214263 A JP2009214263 A JP 2009214263A JP 2011066116 A JP2011066116 A JP 2011066116A
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recess
element chip
circuit board
circuit module
conductor layer
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JP2009214263A
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Atsushi Tatsuta
淳 立田
Mitsuru Kobayashi
充 小林
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Panasonic Electric Works Co Ltd
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Panasonic Electric Works Co Ltd
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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Abstract

【課題】素子チップに傾きを生じることなく、確実な接合が可能で、かつ信頼性の高い回路モジュールを提供する。
【解決手段】表面に配線導体層を有するとともに、素子搭載領域に凹部を有する回路基板と、前記凹部をまたぐように、前記回路基板上に搭載される素子チップとを具備し、前記素子チップは、前記凹部の一部を残すように、前記凹部内に充填された接着部材を介して前記回路基板に固着された、回路モジュールを構成する。
【選択図】図１An object of the present invention is to provide a highly reliable circuit module that can be reliably bonded without causing an inclination of an element chip.
A circuit board having a wiring conductor layer on a surface and having a recess in an element mounting region, and an element chip mounted on the circuit board so as to straddle the recess, the element chip comprising: The circuit module is configured to be fixed to the circuit board through an adhesive member filled in the recess so as to leave a part of the recess.
[Selection] Figure 1

Description

本発明は、回路モジュールおよびその製造方法に係り、特に、回路基板上へのチップの実装に関する。   The present invention relates to a circuit module and a method for manufacturing the circuit module, and more particularly to mounting a chip on a circuit board.

例えば、セラミックスあるいは樹脂などの成形基板、セラミックスあるいは樹脂などの絶縁層の間に内部導体層が形成されてなる積層基板などの基板と、この基板の表面に形成され且つ内部導体層と電気的に接続された表面導体層と、を有する回路基板に、キャビティを設けるととともに、このキャビティに半導体チップなどの素子部を形成したものが、広く用いられている。   For example, a substrate such as a molded substrate made of ceramics or resin, a laminated substrate in which an internal conductor layer is formed between insulating layers such as ceramics or resin, and a substrate formed on the surface of the substrate and electrically connected to the internal conductor layer A circuit board having a connected surface conductor layer and having a cavity and an element portion such as a semiconductor chip formed in the cavity are widely used.

例えば、特許文献１では、凹凸が設けられた立体回路基板に半導体チップを搭載し、半導体チップの凸部回路パターンとの間に封止樹脂を塗布して実装したものが提案されている。   For example, Patent Document 1 proposes a method in which a semiconductor chip is mounted on a three-dimensional circuit board provided with unevenness, and a sealing resin is applied between the semiconductor chip and a convex circuit pattern.

また、特許文献２では、回路基板上に搭載される素子チップの基準面が実装基板に対して垂直な方向を向くように、垂直実装される回路モジュールも提案されている（特許文献２）。   Patent Document 2 also proposes a circuit module that is vertically mounted such that a reference surface of an element chip mounted on the circuit board faces a direction perpendicular to the mounting substrate (Patent Document 2).

例えば、図１０（ａ）及び（ｂ）に示すように回路基板１１０に形成された凹部にセンサチップ１２０を搭載しボンディングワイヤ１１２で回路基板１１０上の配線導体層１１１Ｐに接続したものが提案されている。このような回路モジュールでは、一般的にはセンサチップ１２０と回路基板１１０との間に、接着層１２１を介在させ、固定する方法が用いられる。
回路基板１１０上に形成された配線導体層１１１ｄ上に、センサチップ１２０を載置した時には正しく設置できたとしても、熱負荷がかかると、センサチップ１２０と回路基板１１０との間の熱膨張率差の影響で熱応力が発生し、その結果センサチップ側に負荷がかかり、センサチップ誤動作の原因となることがあった。 For example, as shown in FIGS. 10A and 10B, a sensor chip 120 mounted in a recess formed in the circuit board 110 and connected to a wiring conductor layer 111P on the circuit board 110 by a bonding wire 112 is proposed. ing. In such a circuit module, generally, a method is used in which an adhesive layer 121 is interposed between the sensor chip 120 and the circuit board 110 and fixed.
Even if the sensor chip 120 can be correctly placed on the wiring conductor layer 111d formed on the circuit board 110, the thermal expansion coefficient between the sensor chip 120 and the circuit board 110 is applied when a thermal load is applied. Thermal stress is generated due to the difference, and as a result, a load is applied to the sensor chip side, which may cause malfunction of the sensor chip.

そこで、図１１に示すように、接着層１２１を部分的に介在させる方法も提案されているが、センサチップ実装後において、回路基板１１０に対しセンサチップ１２０に傾きが生じることがあった。   Therefore, as shown in FIG. 11, a method in which the adhesive layer 121 is partially interposed has been proposed. However, the sensor chip 120 may be inclined with respect to the circuit board 110 after the sensor chip is mounted.

例えば接着層を半田で構成する場合、半田溶融から凝固過程においてセンサチップ１２０を引き付ける力が発生し、水平度を確保するのが困難であった。   For example, when the adhesive layer is made of solder, a force for attracting the sensor chip 120 is generated in the solidification process from the melting of the solder, and it is difficult to ensure the levelness.

特に、加速度センサあるいはジャイロセンサなど、一般にＸＹＺの３軸方向の特性を得るようなチップ部品を、回路基板に搭載する場合、回路モジュールは、チップ部品が斜めに傾くと、傾き角θの値が大きければ大きいほど本来得ようとする値とのずれが大きくなる。このため傾き角θをできるだけ小さくする必要がある。   In particular, when a chip component such as an acceleration sensor or a gyro sensor, which generally obtains XYZ three-axis characteristics, is mounted on a circuit board, when the chip component is tilted, the inclination angle θ The larger the value, the greater the deviation from the value originally obtained. For this reason, it is necessary to make the inclination angle θ as small as possible.

特開２００４−２０７４０６号公報JP 2004-207406 A 特許３２２４７９８号公報Japanese Patent No. 3224798

このように、従来の素子チップの回路基板への実装に際しては、接着層を接着面全体に形成すると、素子チップと回路基板との熱膨張率の差に起因して、素子チップに負荷がかかり誤動作や破損の原因となっていた。
また、接着層を部分的に形成すると、固着時に素子チップに傾きが生じ易いという問題があった。
特に、このようにして形成した回路モジュールを実装基板に対して垂直実装しようとすると、スナップラインにおける実装面の突出により、回路基板がある角度θで斜めに傾いた状態となり、センサモジュールの場合は、測定誤差が大きくなるという問題があった。 As described above, when the conventional element chip is mounted on the circuit board, if the adhesive layer is formed on the entire bonding surface, a load is applied to the element chip due to the difference in thermal expansion coefficient between the element chip and the circuit board. It was the cause of malfunction and damage.
Further, when the adhesive layer is partially formed, there is a problem that the element chip is likely to be inclined at the time of fixing.
In particular, when the circuit module formed in this way is mounted vertically with respect to the mounting substrate, the mounting of the mounting surface on the snap line causes the circuit substrate to be inclined at an angle θ, and in the case of a sensor module, There was a problem that the measurement error increased.

本発明は、前記実情に鑑みてなされたものであり、素子チップに傾きを生じることなく、確実な接合が可能で、かつ信頼性の高い回路モジュールを提供することを目的とする。   The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a highly reliable circuit module that can be reliably bonded without causing an inclination of an element chip.

そこで本発明は、表面に配線導体層を有するとともに、素子搭載領域に凹部を有する回路基板と、前記凹部をまたぐように、前記回路基板上に搭載される素子チップとを具備し、前記素子チップは、前記凹部の一部を残すように、前記凹部内に充填された接着部材を介して前記回路基板に固着された、回路モジュールを構成する。
この構成により、素子チップと回路基板との間の接着部材が、部分的にしか介在しないため、熱負荷がかかっても素子チップ側に負荷がほとんどかからない。このため、素子チップが傾いたり、損傷を受けたりすることがない。従って、ジャイロセンサなど方向性を維持する必要のあるデバイスの場合においても、誤動作の大幅な低減をはかることができる。 Therefore, the present invention comprises a circuit board having a wiring conductor layer on the surface and having a recess in an element mounting region, and an element chip mounted on the circuit board so as to straddle the recess, and the element chip Constitutes a circuit module fixed to the circuit board via an adhesive member filled in the recess so as to leave a part of the recess.
With this configuration, since the adhesive member between the element chip and the circuit board is only partially interposed, even if a thermal load is applied, the element chip side is hardly loaded. For this reason, the element chip is not tilted or damaged. Therefore, even in the case of a device that needs to maintain the directionality, such as a gyro sensor, the malfunction can be greatly reduced.

また、本発明は、上記回路モジュールにおいて、前記接着部材が導電性接着剤であり、前記配線導体層は前記凹部内から前記回路基板表面にかけて連続して形成されており、前記配線導体層と前記素子チップとが電気的に接続されたものを含む。
この構成により、配線導体層が、凹部内から前記回路基板表面にかけて連続して形成されており、前記配線導体層と前記素子チップとが電気的に接続されているため、電気的接続を行う面の面積は確保されており、凹部を含む面内で確実な接続が達成される。 In the circuit module, the adhesive member is a conductive adhesive, and the wiring conductor layer is continuously formed from the inside of the recess to the surface of the circuit board. Including those in which the element chip is electrically connected.
With this configuration, the wiring conductor layer is continuously formed from the inside of the recess to the surface of the circuit board, and the wiring conductor layer and the element chip are electrically connected. Is ensured, and a reliable connection is achieved within the plane including the recess.

また、本発明は、上記回路モジュールにおいて、前記素子チップが、前記凹部の周縁部全周にわたって前記回路基板表面と当接し、前記凹部を覆うように形成されたものを含む。
この構成により、確実な接合が可能となり、かつ接着部材の存在しない領域もあるため、素子チップと回路基板との熱膨張率の差に起因する応力をこの接着剤の存在しない領域に逃がすことができる。また、たとえば凹部内では素子チップと回路基板とが導電性接着剤などの接着部材を介して接続され、凹部の周縁部では、素子チップと回路基板とが直接接合などにより接触しているため、電気的接続も実現され、確実な接続が実現される。また接着部材のはみ出しがないため、美観を保持することができる。 The present invention includes the circuit module, wherein the element chip is formed so as to contact the surface of the circuit board over the entire periphery of the periphery of the recess and cover the recess.
With this configuration, reliable bonding is possible, and there is a region where the adhesive member does not exist, so stress caused by the difference in thermal expansion coefficient between the element chip and the circuit board can be released to the region where the adhesive does not exist. it can. In addition, for example, in the recess, the element chip and the circuit board are connected via an adhesive member such as a conductive adhesive, and in the periphery of the recess, the element chip and the circuit board are in contact by direct bonding, etc. An electrical connection is also realized, and a reliable connection is realized. Moreover, since there is no protrusion of an adhesive member, aesthetics can be maintained.

また、本発明は、上記回路モジュールにおいて、前記凹部が溝状に形成されており、
前記素子チップは、前記溝状の凹部の平行な２辺に沿って前記回路基板表面と当接し、前記凹部を選択的に塞ぐように形成されたものを含む。
この構成により、たとえば凹部内では素子チップと回路基板とが導電性接着剤などの接着部材を介して接続され、凹部の周縁部では、素子チップと回路基板とが直接接合などにより接触しているため、電気的接続も実現され、確実な接続が実現されるという効果に加え、２方が開放空間となっているため、放熱性も良好である。また、空気の排出口があるため、ガスが残留して接着部材内にボイドができるのを防ぐことができる。 Further, the present invention is the above circuit module, wherein the recess is formed in a groove shape,
The element chip includes a chip formed so as to contact the surface of the circuit board along two parallel sides of the groove-shaped recess and selectively close the recess.
With this configuration, for example, in the recess, the element chip and the circuit board are connected via an adhesive member such as a conductive adhesive, and in the periphery of the recess, the element chip and the circuit board are in contact by direct bonding or the like. Therefore, in addition to the effect that the electrical connection is realized and the reliable connection is realized, since the two sides are open spaces, the heat dissipation is also good. Moreover, since there is an air outlet, it is possible to prevent gas from remaining and voids in the adhesive member.

また、本発明は、上記回路モジュールにおいて、前記素子チップが、裏面側で前記配線導体層に接続され、ワイヤボンディング接続されたものを含む。
この構成により、凹部内に接着部材を充填し、この上に素子チップを搭載し、ワイヤボンディングを行うようにすればよいため、素子チップ搭載時には高精度の位置合わせが不要であり、実装作業性が良好である。 Further, the present invention includes the above circuit module in which the element chip is connected to the wiring conductor layer on the back surface side and connected by wire bonding.
With this configuration, it is only necessary to fill an adhesive member in the recess, mount an element chip thereon, and perform wire bonding. Therefore, high-precision alignment is not required when mounting the element chip, and mounting workability Is good.

また、本発明は、上記回路モジュールにおいて、前記素子チップが、前記凹部内で接着部材を介して配線導体層に接合されており、前記凹部の周縁部では前記配線導体層と前記素子チップ裏面とは接着剤を介することなく直接接合されたものを含む。
この構成により、凹部内では素子チップと回路基板とが導電性接着剤などの接着部材を介して接続され、凹部の周縁部では、素子チップと回路基板とが直接接合などにより接触しているため、電気的接続も実現され、確実な接続が実現される。また接着部材のはみ出しがないため、美観を保持することができる。 Further, the present invention is the circuit module, wherein the element chip is bonded to the wiring conductor layer through an adhesive member in the recess, and the wiring conductor layer and the back surface of the element chip are formed at a peripheral portion of the recess. Includes those directly joined without an adhesive.
With this configuration, the element chip and the circuit board are connected to each other through an adhesive member such as a conductive adhesive in the recess, and the element chip and the circuit board are in contact with each other at the periphery of the recess by direct bonding or the like. In addition, an electrical connection is realized, and a reliable connection is realized. Moreover, since there is no protrusion of an adhesive member, aesthetics can be maintained.

また、本発明は、前記回路モジュールは、ジャイロセンサモジュールを構成するものを含む。
この構成により、素子チップの方位により、測定値が変動する、ジャイロセンサモジュールなどにおいても、信頼性の高い測定値を出力するような実装が実現可能である。 In the present invention, the circuit module includes a gyro sensor module.
With this configuration, even in a gyro sensor module or the like in which the measurement value varies depending on the orientation of the element chip, it is possible to implement mounting that outputs a highly reliable measurement value.

また、本発明は、表面に配線導体層を有するとともに、素子搭載領域に凹部を有する回路基板を用意する工程と、前記凹部に接着剤を充填する工程と、前記凹部をまたぐように、前記回路基板上に素子チップを配する工程と、前記素子チップを押圧しながら、前記回路基板を加熱し前記回路基板に前記素子チップを固着する工程と、を含む回路モジュールの製造方法を提供することを特徴とする。
この構成により、凹部内では素子チップと回路基板とが導電性接着剤などの接着部材を介して接続され、凹部の周縁部では、素子チップと回路基板とが直接接合により接触するように、加圧しながら固着しているため、電気的接続も実現され、確実な接続が実現される。また接着部材のはみ出しがないため、美観を保持することができる。 The present invention also includes a step of preparing a circuit board having a wiring conductor layer on the surface and having a recess in an element mounting region, a step of filling the recess with an adhesive, and the circuit so as to straddle the recess. Providing a method of manufacturing a circuit module, comprising: arranging an element chip on a substrate; and heating the circuit board while pressing the element chip to fix the element chip to the circuit board. Features.
With this configuration, the element chip and the circuit board are connected to each other through an adhesive member such as a conductive adhesive in the recess, and the element chip and the circuit board are in direct contact with each other at the periphery of the recess. Since it adheres while pressing, electrical connection is also realized, and a reliable connection is realized. Moreover, since there is no protrusion of an adhesive member, aesthetics can be maintained.

また、本発明は、上記回路モジュールの製造方法において、前記回路基板を固着する工程後、前記素子チップを押圧しつつ、ワイヤボンディングにより、前記回路基板と前記素子チップとを電気的に接続する工程を含む。
この構成により、素子チップを回路基板上に接続する際には位置決め精度は、それほども大きくなくて済み、効率のよい、接続が実現される。 Further, the present invention provides a method for electrically connecting the circuit board and the element chip by wire bonding while pressing the element chip after the step of fixing the circuit board in the method for manufacturing the circuit module. including.
With this configuration, when the element chip is connected to the circuit board, the positioning accuracy does not have to be so great, and an efficient connection is realized.

また、本発明は、上記回路モジュールの製造方法において、前記固着する工程に先立ち、前記凹部の周縁の配線導体層を鏡面加工する工程を含み、前記固着する工程は、前記凹部内では接着剤を介して前記素子チップ裏面を接続する一方、前記凹部の周縁の配線導体層と前記素子チップ裏面とを直接接合する工程であるものを含む。
この構成により、凹部内では素子チップと回路基板とが導電性接着剤などの接着部材を介して接続され、凹部の周縁部では、素子チップと回路基板とが直接接合などにより接触しているため、電気的接続も実現され、確実な接続が実現される。ここで、接合に先立ち、配線導体層を鏡面加工しているため、良好な直接接合が実現される。また接着部材のはみ出しがないため、美観を保持することができる。 Further, the present invention includes the step of mirror-finishing the wiring conductor layer at the periphery of the recess before the fixing step in the method of manufacturing the circuit module, wherein the fixing step includes an adhesive in the recess. And a step of directly bonding the wiring conductor layer on the periphery of the concave portion and the back surface of the device chip while connecting the back surface of the device chip through.
With this configuration, the element chip and the circuit board are connected to each other through an adhesive member such as a conductive adhesive in the recess, and the element chip and the circuit board are in contact with each other at the periphery of the recess by direct bonding or the like. In addition, an electrical connection is realized, and a reliable connection is realized. Here, since the wiring conductor layer is mirror-finished before joining, good direct joining is realized. Moreover, since there is no protrusion of an adhesive member, aesthetics can be maintained.

本発明によれば、素子チップと回路基板との間の接着部材が、部分的にしか介在しないため、熱負荷がかかっても素子チップ側に負荷がほとんどかからないため、素子チップが傾いたり、損傷を受けたりすることがない。このため、ジャイロセンサなど方向性を維持する必要のあるデバイスの場合においても、誤動作の大幅な低減をはかることができる。   According to the present invention, since the adhesive member between the element chip and the circuit board is only partially interposed, even if a thermal load is applied, the element chip side is hardly loaded, so the element chip is inclined or damaged. I will not receive it. For this reason, even in the case of a device that needs to maintain the directionality, such as a gyro sensor, it is possible to significantly reduce malfunctions.

本発明の実施の形態１の回路モジュールを示す図であり、（ａ）は断面図、（ｂ）は上面図It is a figure which shows the circuit module of Embodiment 1 of this invention, (a) is sectional drawing, (b) is a top view. 本発明の実施の形態１の回路モジュールの製造工程を示す図であり、（ａ）は断面図、（ｂ）は上面図It is a figure which shows the manufacturing process of the circuit module of Embodiment 1 of this invention, (a) is sectional drawing, (b) is a top view. 本発明の実施の形態１の回路モジュールの製造工程を示す図であり、（ａ）は断面図、（ｂ）は上面図It is a figure which shows the manufacturing process of the circuit module of Embodiment 1 of this invention, (a) is sectional drawing, (b) is a top view. 本発明の実施の形態１の回路モジュールの製造工程を示す図であり、（ａ）は断面図、（ｂ）は上面図It is a figure which shows the manufacturing process of the circuit module of Embodiment 1 of this invention, (a) is sectional drawing, (b) is a top view. 本発明の実施の形態１の回路モジュールの製造工程を示す断面図Sectional drawing which shows the manufacturing process of the circuit module of Embodiment 1 of this invention 本発明の実施の形態１の回路モジュールの製造工程を示す断面図Sectional drawing which shows the manufacturing process of the circuit module of Embodiment 1 of this invention 本発明の実施の形態２の回路モジュールを示す図であり、（ａ）は断面図、（ｂ）は上面図It is a figure which shows the circuit module of Embodiment 2 of this invention, (a) is sectional drawing, (b) is a top view. 本発明の実施の形態２の回路モジュールの製造工程を示す図であり、（ａ）は断面図、（ｂ）は上面図It is a figure which shows the manufacturing process of the circuit module of Embodiment 2 of this invention, (a) is sectional drawing, (b) is a top view. 本発明の実施の形態３の回路モジュールを示す図であり、（ａ）は断面図、（ｂ）は上面図It is a figure which shows the circuit module of Embodiment 3 of this invention, (a) is sectional drawing, (b) is a top view. 従来例の回路モジュールを示す図であり、（ａ）は断面図、（ｂ）は上面図It is a figure which shows the circuit module of a prior art example, (a) is sectional drawing, (b) is a top view. 従来例の回路モジュールを示す図The figure which shows the circuit module of the conventional example

以下、本発明の実施の形態について図面を参照しつつ詳細に説明する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

（実施の形態１）
図１（ａ）および（ｂ）は本発明の実施の形態１の回路モジュールを示す説明図であり、図１（ａ）は、図１（ｂ）のＡ−Ａ断面図である。図３乃至図６は同回路モジュールの実装工程を示す図である。
本実施の形態の回路モジュール１は、図１（ａ）及び（ｂ）に示すように、表面に配線導体層１１を有するとともに、素子搭載領域に凹部１３を有する樹脂基板からなる回路基板１０と、この回路基板１０上に搭載される素子チップ２０とを具備している。そしてこの素子チップ２０は、凹部１３の一部を残すように、この凹部１３内に充填された接着部材１４を介してこの回路基板１０に固着される。この凹部１３内ではこの接着部材１４としての半田を介して、素子チップ２０が、配線導体層１１のうちダイパッド１１ｄに接合されており、凹部１３の周縁部ではこのダイパッド１１ｄと素子チップ２０裏面とは接着剤を介することなく直接接合によって接合され、電気的接続がなされている。
この実装構造においては、凹部１３は、ジャイロセンサ用の素子チップ２０よりも所定寸法だけ小さく形成されている。
そして、素子チップ２０表面のパッド２１と、回路基板１０表面の配線導体層で構成されたボンディングパッド１１ｐとが、ボンディングワイヤ１２を介して接続されている。あとは必要に応じて封止樹脂（図示せず）で被覆されている。 (Embodiment 1)
FIGS. 1A and 1B are explanatory views showing a circuit module according to Embodiment 1 of the present invention, and FIG. 1A is a cross-sectional view taken along line AA of FIG. 3 to 6 are diagrams showing a mounting process of the circuit module.
As shown in FIGS. 1A and 1B, the circuit module 1 according to the present embodiment includes a circuit board 10 made of a resin substrate having a wiring conductor layer 11 on the surface and a recess 13 in an element mounting region. And an element chip 20 mounted on the circuit board 10. The element chip 20 is fixed to the circuit board 10 via an adhesive member 14 filled in the recess 13 so as to leave a part of the recess 13. In the recess 13, the element chip 20 is bonded to the die pad 11 d of the wiring conductor layer 11 via the solder as the adhesive member 14, and in the peripheral portion of the recess 13, the die pad 11 d and the back surface of the element chip 20 are connected. Are joined by direct joining without using an adhesive, and are electrically connected.
In this mounting structure, the recess 13 is formed to be smaller than the gyro sensor element chip 20 by a predetermined dimension.
The pads 21 on the surface of the element chip 20 and the bonding pads 11p formed of the wiring conductor layer on the surface of the circuit board 10 are connected through the bonding wires 12. The rest is covered with a sealing resin (not shown) as required.

次に、この回路モジュール１の製造方法について説明する。
まず、図２（ａ）および（ｂ）に示すように、射出成型により素子搭載領域に凹部１３を有する樹脂基板（１０）を形成する。ここで図２（ａ）は図２（ｂ）のＡ−Ａ断面図である。 Next, a method for manufacturing the circuit module 1 will be described.
First, as shown in FIGS. 2A and 2B, a resin substrate (10) having a recess 13 in the element mounting region is formed by injection molding. Here, FIG. 2A is a cross-sectional view taken along the line AA of FIG.

そして、図３（ａ）および（ｂ）に示すように、この樹脂基板の表面に配線導体層１１を形成する。この配線導体層１１のうち、凹部１３内に形成されるパターンは、凹部１３からその周縁部表面にかけて連続して形成されており、前記配線導体層と前記素子チップの裏面とを接続するためのダイパッド１１ｄを構成する。ここで図３（ａ）は図３（ｂ）のＡ−Ａ断面図である。   Then, as shown in FIGS. 3A and 3B, a wiring conductor layer 11 is formed on the surface of the resin substrate. Of the wiring conductor layer 11, the pattern formed in the recess 13 is continuously formed from the recess 13 to the peripheral surface thereof, and connects the wiring conductor layer and the back surface of the element chip. A die pad 11d is formed. Here, FIG. 3A is a cross-sectional view taken along the line AA in FIG.

次いで、図４（ａ）および（ｂ）に示すように、接着部材１４として、このダイパッド１１ｄの凹部の体積よりも少量の半田を凹部１３内に充填する。ここでも図４（ａ）は図４（ｂ）のＡ−Ａ断面図である。   Next, as shown in FIGS. 4A and 4B, the adhesive member 14 is filled with a smaller amount of solder than the volume of the concave portion of the die pad 11d. Again, FIG. 4A is a cross-sectional view taken along the line AA of FIG.

一方、素子チップ２０の裏面側は鏡面研磨により平滑度を高めておく。
この状態で、図５に示すように、素子チップ２０を位置合わせし、凹部１３を覆うように、吸着ノズル３０を用いて回路基板１０上に配置し、吸着ノズル３０で加圧しつつ、加熱し、半田を硬化させる。 On the other hand, the smoothness of the back surface side of the element chip 20 is increased by mirror polishing.
In this state, as shown in FIG. 5, the element chip 20 is aligned and disposed on the circuit board 10 using the suction nozzle 30 so as to cover the recess 13, and heated while being pressurized by the suction nozzle 30. , Cure the solder.

このとき、半田１４を介して回路基板１０および素子チップ２０の、確実な接合が可能となる。そして凹部１３の一部を残して半田が充填されており、かつ接着部材の存在しない領域もあるため、素子チップと回路基板との熱膨張率の差に起因する応力をこの接着剤の存在しない領域に逃がすことができる。
また、凹部内では素子チップと回路基板とが導電性接着剤などの接着部材を介して接続され、凹部の周縁部では、素子チップと回路基板とが直接接合などにより接触しているため、電気的接続も実現され、確実な接続が実現される。また接着部材のはみ出しがないため、美観を保持することができる。 At this time, the circuit board 10 and the element chip 20 can be reliably bonded via the solder 14. In addition, since there is a region where the solder is filled with a part of the recess 13 and the adhesive member does not exist, the stress caused by the difference in thermal expansion coefficient between the element chip and the circuit board does not exist in the adhesive. Can escape to the area.
Also, in the recess, the element chip and the circuit board are connected via an adhesive member such as a conductive adhesive, and in the periphery of the recess, the element chip and the circuit board are in contact by direct bonding or the like. Connection is also realized, and a reliable connection is realized. Moreover, since there is no protrusion of an adhesive member, aesthetics can be maintained.

こののち、図６に示すように、ワイヤボンディングにより、素子チップ２０のパッド２１と回路基板１０上のボンディングパッド１１ｐとをボンディングワイヤ１２を介して電気的接続を行う。そしてワイヤボンディング後、素子チップ２０を加圧しながら保持していた吸着ノズル３０を外し、図１及び図２に示した回路モジュールが完成する。   After that, as shown in FIG. 6, the pads 21 of the element chip 20 and the bonding pads 11p on the circuit board 10 are electrically connected through the bonding wires 12 by wire bonding. After wire bonding, the suction nozzle 30 that holds the element chip 20 while applying pressure is removed, and the circuit module shown in FIGS. 1 and 2 is completed.

以上のように、本発明の回路モジュールによれば、配線導体層が、凹部内から前記回路基板表面にかけて連続して形成されており、前記配線導体層と前記素子チップとが電気的に接続されているため、電気的接続を行う面の面積は確保されており、凹部を含む面内で確実な接続が達成される。かつ接着部材の存在しない領域が存在しているため、素子チップと回路基板との熱膨張率の差に起因する応力をこの接着剤の存在しない領域に逃がすことができる。また、たとえば凹部内では素子チップと回路基板とが導電性接着剤などの接着部材を介して接続され、凹部の周部では、素子チップと回路基板とが直接接合などにより接触しているため、電気的接続も実現され、確実な接続が実現される。また接着部材のはみ出しがないため、美観を保持することができる。   As described above, according to the circuit module of the present invention, the wiring conductor layer is continuously formed from the inside of the recess to the surface of the circuit board, and the wiring conductor layer and the element chip are electrically connected. Therefore, the area of the surface for electrical connection is secured, and reliable connection is achieved within the surface including the recess. And since the area | region where an adhesive member does not exist exists, the stress resulting from the difference of the thermal expansion coefficient of an element chip and a circuit board can be escaped to the area | region where this adhesive agent does not exist. In addition, for example, in the recess, the element chip and the circuit board are connected via an adhesive member such as a conductive adhesive, and in the periphery of the recess, the element chip and the circuit board are in contact by direct bonding, etc. An electrical connection is also realized, and a reliable connection is realized. Moreover, since there is no protrusion of an adhesive member, aesthetics can be maintained.

さらにまたセンサを構成する素子チップ２０と、回路基板との間の接合部材である半田が部分的にしか介在しないため、熱負荷がかかっても素子チップ側に負荷がほとんどかかることがなく、誤動作が大幅に低減される。   Furthermore, since the solder which is a bonding member between the element chip 20 constituting the sensor and the circuit board is only partially interposed, even if a thermal load is applied, the load is hardly applied to the element chip side. Is greatly reduced.

また、半田溶融時にはツールを用いて素子チップを固定し、そのまま硬化させ、硬化した後、ツールを解放するため、センサに傾きを生じることもなく、良好な姿勢角を維持することができる。   Further, when the solder is melted, the element chip is fixed using a tool, cured as it is, and then cured, and then the tool is released, so that a good posture angle can be maintained without causing tilting of the sensor.

なお、このツールはチップ割れの発生を回避するために、１００ｇｆ以下の低荷重とするのが望ましい。   In addition, in order to avoid generation | occurrence | production of a chip | tip crack, it is desirable for this tool to make it a low load of 100 gf or less.

なお、前記実施の形態では、基板に、素子チップ２０よりも小さく、ほぼ四角形をなすように形成された凹部１３を覆うように素子チップ２０を搭載したが、凹部の形状については、実施の形態に限定されるものではない。   In the above-described embodiment, the element chip 20 is mounted on the substrate so as to cover the recess 13 that is smaller than the element chip 20 and is formed in a substantially quadrangular shape. It is not limited to.

ここで樹脂基板上への配線導体層１１の形成に際しては以下の方法がとられる。
まず、この樹脂基板（１０）の表面の全面に、無電解めっきあるいはＣＶＤやスパッタリング等を行うことにより導電性薄膜からなる下地層を形成する。ここでは無電解の銅めっきあるいはスパッタリングによる銅薄膜を形成する。そして、樹脂基板（１０）の表面にレーザビームを照射することで当該照射部分の下地層をパターニングし選択的に除去する。ここでレーザビームは、ガルバノミラー等で走査することにより配線導体層１１の輪郭に沿って樹脂基板の表面を移動しつつ照射され、下地層のうち配線導体層１１のパターンに一致した部分（以下、「下地層」と呼ぶ。）と配線導体層１１のパターンに一致しない部分との境界領域の下地層を除去する。従って、樹脂基板（１０）の表面にはレーザビームが照射された輪郭内側の下地層（配線導体層１１のパターンに一致した下地層）と、下地層の輪郭に沿った部分のみがレーザビーム照射で除去された下地層（図示せず）とが残ることになる。但し、隣接する配線導体層１１の間隔が狭い場合においては、上述のように輪郭部分だけでなく配線導体層１１間の下地層を全てレーザビーム照射で除去することも可能である。 Here, when the wiring conductor layer 11 is formed on the resin substrate, the following method is employed.
First, a base layer made of a conductive thin film is formed on the entire surface of the resin substrate (10) by performing electroless plating, CVD, sputtering, or the like. Here, a copper thin film is formed by electroless copper plating or sputtering. Then, by irradiating the surface of the resin substrate (10) with a laser beam, the underlying layer of the irradiated portion is patterned and selectively removed. Here, the laser beam is irradiated while moving on the surface of the resin substrate along the outline of the wiring conductor layer 11 by scanning with a galvanometer mirror or the like, and a portion (hereinafter referred to as the pattern of the wiring conductor layer 11) of the underlying layer. , Referred to as “underlayer”) and the underlayer in the boundary region between the portion not matching the pattern of the wiring conductor layer 11 is removed. Accordingly, the surface of the resin substrate (10) is irradiated with the laser beam only on the inner layer of the contour (underlayer matching the pattern of the wiring conductor layer 11) irradiated with the laser beam and the portion along the contour of the foundation layer. The underlying layer (not shown) removed in step (1) is left. However, when the interval between the adjacent wiring conductor layers 11 is narrow, it is possible to remove not only the contour portion but also the entire underlying layer between the wiring conductor layers 11 by laser beam irradiation as described above.

続いて、配線導体層１１のパターンに一致した下地層の上に電気めっきにより銅などのめっき層を厚付けすることで配線導体層１１を形成し、下地層１１ｄ以外の不要な下地めっき層をエッチングで除去すれば、内部導体層（図示せず）と配線導体層１１により所望の回路が形成された回路基板１０を得ることができる。ここで、めっき層を形成する電気めっきを行うには、下地層を直流電源の陰極に接続し電気めっき浴に樹脂基板（１０）を浸漬した状態で給電する必要があり、回路基板１０の内部導体層を給電路として用いるようにしてもよい。そのために内部導体層と電気的に接続された給電用のビアホール積層基板の長手方向両端部に設け、積層基板の周縁部に形成した矩形枠状の給電用の表面導体層に直流電源の陰極を接続することで、給電用の表面導体層からビアホール、内部導体層を介して下地層に給電することもできる。   Subsequently, the wiring conductor layer 11 is formed by thickening a plating layer such as copper by electroplating on the base layer that matches the pattern of the wiring conductor layer 11, and an unnecessary base plating layer other than the base layer 11d is formed. If removed by etching, the circuit board 10 on which a desired circuit is formed by the internal conductor layer (not shown) and the wiring conductor layer 11 can be obtained. Here, in order to perform electroplating to form a plating layer, it is necessary to supply power in a state where the base layer is connected to the cathode of the DC power source and the resin substrate (10) is immersed in the electroplating bath. A conductor layer may be used as a feed path. For this purpose, the feed via hole electrically connected to the inner conductor layer is provided at both ends in the longitudinal direction of the laminated substrate, and the DC power supply cathode is provided on the rectangular frame-shaped surface conductor layer for feeding formed on the peripheral edge of the laminated substrate. By connecting, power can be supplied from the surface conductor layer for power supply to the base layer via the via hole and the internal conductor layer.

従って、複数の絶縁層間に内部導体層を有する積層基板を用いた場合には、絶縁層の間に形成されている内部導体層を介して下地層に給電することにより電気めっきを行い、めっき層を厚付けすることにより表面導体層を形成するため、積層基板の表面に形成される表面導体層の形状や配置の自由度が高いという利点がある。なお、下地めっき層をエッチングで除去するいわゆるソフトエッチング後、最後にニッケルめっき層を介して金めっき層（図示せず）を形成し、プリント配線基板上の配線パターンと接続性の良好な表面導体層を形成するようにしてもよい。   Therefore, when a multilayer substrate having an inner conductor layer between a plurality of insulating layers is used, electroplating is performed by supplying power to the base layer via the inner conductor layer formed between the insulating layers. Since the surface conductor layer is formed by thickening, there is an advantage that the degree of freedom of the shape and arrangement of the surface conductor layer formed on the surface of the multilayer substrate is high. After the so-called soft etching that removes the underlying plating layer by etching, a gold plating layer (not shown) is finally formed via the nickel plating layer, and the surface conductor has good connectivity with the wiring pattern on the printed wiring board. A layer may be formed.

（実施の形態２）
次に、本発明の実施の形態２について説明する。
図７（ａ）および（ｂ）は本発明の実施の形態１の回路モジュールを示す説明図であり、図７（ａ）は、図７（ｂ）のＡ−Ａ断面図である。
前記実施の形態１では、凹部１３が、素子チップ２０よりも小さくなるように形成したが、本実施の形態では、図７（ａ）および（ｂ）に示すように、凹部１３に代えて、素子チップ２０よりも小幅の貫通溝１３Ｔとしたことを特徴とするものである。
他の構成については前記実施の形態１と同様に形成されているため、ここでは説明を省略する。 (Embodiment 2)
Next, a second embodiment of the present invention will be described.
FIGS. 7A and 7B are explanatory views showing the circuit module according to the first embodiment of the present invention, and FIG. 7A is a cross-sectional view taken along line AA of FIG. 7B.
In the first embodiment, the recess 13 is formed to be smaller than the element chip 20, but in the present embodiment, as shown in FIGS. 7A and 7B, instead of the recess 13, The through-groove 13T has a width smaller than that of the element chip 20.
Since other configurations are the same as those in the first embodiment, description thereof is omitted here.

本実施の形態の回路モジュール２は、図７（ａ）及び（ｂ）に示すように、表面に配線導体層１１を有するとともに、素子搭載領域を含む領域に貫通溝１３Ｔを有する樹脂基板からなる回路基板１０と、この回路基板１０上に搭載される素子チップ２０とを具備している。そしてこの素子チップ２０は、貫通溝１３Ｔの一部を残すように、この貫通溝１３Ｔ内に充填された接着部材１４を介してこの回路基板１０に固着される。この貫通溝１３Ｔ内ではこの接着部材１４としての半田を介して、素子チップ２０が、配線導体層１１のうちダイパッド１１ｄに接合されており、貫通溝１３Ｔの周縁部ではこのダイパッド１１ｄと素子チップ２０裏面とは接着剤を介することなく直接接合によって接合され、電気的接続がなされている。   As shown in FIGS. 7A and 7B, the circuit module 2 according to the present embodiment is formed of a resin substrate having a wiring conductor layer 11 on the surface and a through groove 13T in a region including an element mounting region. A circuit board 10 and an element chip 20 mounted on the circuit board 10 are provided. The element chip 20 is fixed to the circuit board 10 via the adhesive member 14 filled in the through groove 13T so as to leave a part of the through groove 13T. In the through-groove 13T, the element chip 20 is joined to the die pad 11d in the wiring conductor layer 11 via the solder as the adhesive member 14, and the die pad 11d and the element chip 20 are joined in the peripheral portion of the through-groove 13T. The back surface is joined by direct joining without using an adhesive, and is electrically connected.

図８（ａ）および（ｂ）は本発明の実施の形態１の回路モジュールを形成するための回路基板の配線導体層を形成する前の図であり、図８（ａ）は、図８（ｂ）のＡ−Ａ断面図である。   FIGS. 8A and 8B are views before forming the wiring conductor layer of the circuit board for forming the circuit module according to the first embodiment of the present invention, and FIG. It is AA sectional drawing of b).

このように、本実施の形態では、凹部が溝状に形成されて貫通溝１３Ｔを構成しており、素子チップ２０は、貫通溝１３Ｔの平行な２辺に沿って回路基板１０表面と当接し、貫通溝１３Ｔを選択的に塞ぐように形成される。   As described above, in the present embodiment, the recess is formed in a groove shape to form the through groove 13T, and the element chip 20 contacts the surface of the circuit board 10 along two parallel sides of the through groove 13T. The through groove 13T is formed so as to be selectively closed.

この構成により、貫通溝１３Ｔの２方が開放空間となっているため、放熱性が良好である。また、空気の排出口があるため、ガスが残留して接着部材内にボイドができるのを防ぐことができる。また前記実施の形態１と同様、貫通溝１３Ｔ内では素子チップと回路基板とが導電性接着剤である銀ぺーストなどの接着部材を介して接続され、貫通溝１３Ｔの側壁の周縁部では、素子チップと回路基板とが直接接合により接触している。このため、電気的接続が確実に実現される。   With this configuration, two sides of the through groove 13T are open spaces, and thus heat dissipation is good. Moreover, since there is an air outlet, it is possible to prevent gas from remaining and voids in the adhesive member. Similarly to the first embodiment, in the through groove 13T, the element chip and the circuit board are connected via an adhesive member such as a silver paste which is a conductive adhesive, and at the peripheral portion of the side wall of the through groove 13T, The element chip and the circuit board are in contact by direct bonding. For this reason, electrical connection is realized reliably.

（実施の形態３）
次に、本発明の実施の形態３について説明する。
図９（ａ）および（ｂ）は本発明の実施の形態３の回路モジュールを示す説明図であり、図９（ａ）は、図９（ｂ）のＡ−Ａ断面図である。
前記実施の形態１、２では、ワイヤボンディングによる接続を行ったが、本実施の形態ではフリップチップ接続により接続するものである。
本実施の形態では、図９（ａ）および（ｂ）に示すように、凹部１３を囲むように、ボンディングパッド１１ｐが、配列されており、凹部１３内には絶縁性樹脂からなる接着部材２４を、凹部１３の一部を残すように充填し、電気的接続はボンディングパッド１１ｐに対して、素子チップ２０表面に形成されたバンプ２３を介して実現したことを特徴とするものである。
他の構成については前記実施の形態１、２と同様に形成されているため、ここでは説明を省略する。 (Embodiment 3)
Next, a third embodiment of the present invention will be described.
9 (a) and 9 (b) are explanatory views showing a circuit module according to Embodiment 3 of the present invention, and FIG. 9 (a) is a cross-sectional view taken along line AA of FIG. 9 (b).
In the first and second embodiments, the connection is performed by wire bonding, but in the present embodiment, the connection is performed by flip chip connection.
In the present embodiment, as shown in FIGS. 9A and 9B, bonding pads 11 p are arranged so as to surround the recess 13, and the adhesive member 24 made of an insulating resin is disposed in the recess 13. Is filled so as to leave a part of the recess 13, and electrical connection is realized with respect to the bonding pad 11 p through bumps 23 formed on the surface of the element chip 20.
Since other configurations are the same as those in the first and second embodiments, description thereof is omitted here.

本実施の形態の回路モジュール３は、図９（ａ）及び（ｂ）に示すように、表面に配線導体層１１（ボンディングパッド１１ｐ）を有するとともに、素子搭載領域に凹部１３を有する樹脂基板からなる回路基板１０と、この回路基板１０上に搭載される素子チップ２０とを具備している。そしてこの素子チップ２０は、凹部１３の一部を残すように、この凹部１３内に充填された接着部材２４を介してこの回路基板１０に固着される。この凹部１３内ではこの接着部材２４としての絶縁性樹脂を介して、素子チップ２０が、回路基板１０に固着されており、凹部１３の周縁部ではボンディングパッド１１ｐと素子チップ２０表面に突出するバンプ２３とが接合され、電気的接続がなされている。   As shown in FIGS. 9A and 9B, the circuit module 3 according to the present embodiment includes a wiring conductor layer 11 (bonding pad 11p) on the surface and a resin substrate having a recess 13 in the element mounting region. A circuit board 10 and an element chip 20 mounted on the circuit board 10. The element chip 20 is fixed to the circuit board 10 via an adhesive member 24 filled in the recess 13 so as to leave a part of the recess 13. In the recess 13, the element chip 20 is fixed to the circuit board 10 via an insulating resin as the adhesive member 24, and in the peripheral portion of the recess 13, a bump that protrudes from the bonding pad 11 p and the surface of the element chip 20. 23 is joined and electrical connection is made.

このように、本実施の形態では、凹部に絶縁性樹脂からなる接着部材が充填されているが、空間の一部を残して充填されており、固着に際して、熱膨張が生じても、素子チップが力を受け変位したりすることがない。   As described above, in the present embodiment, the concave portion is filled with the adhesive member made of the insulating resin, but is filled with leaving a part of the space, and even if thermal expansion occurs during fixing, the element chip Will not be displaced by force.

なお、前記実施の形態では、センサチップを搭載した回路モジュール（センサモジュール）について説明したが、センサモジュールに限定されることなく、携帯端末などに搭載されるモジュールや、壁面に取り付けられるＬＥＤ照明用のＬＥＤモジュールなど種々の回路モジュールに適用可能である。   In the above-described embodiment, the circuit module (sensor module) on which the sensor chip is mounted has been described. However, the present invention is not limited to the sensor module, but is not limited to the sensor module. It is applicable to various circuit modules such as LED modules.

なお、前記実施の形態では、樹脂成型によって形成した樹脂基板を用いたが、これに限定されることなく、積層基板、あるいはセラミック基板などにも適用可能であることはいうまでもない。
例えば、１０００℃以下で低温焼結が可能なセラミック誘電体材料ＬＴＣＣ（低温同時焼成セラミック：Low Temperature Co-fired Ceramics）からなり、厚さが１０μｍ〜２００μｍのグリーンシートに、低抵抗率のＡｇやＣｕ等の導電ペーストを印刷して所定のパターンを形成し、複数のグリーンシートを絶縁層として用いて、適宜一体的に積層し、焼結することにより内部導体層を備えた絶縁層（誘電体層）として製造することが出来る。これらの誘電体材料としては、例えばＡｌ、Ｓｉ、Ｓｒを主成分として、Ｔｉ、Ｂｉ、Ｃｕ、Ｍｎ、Ｎａ、Ｋを副成分とする材料や、Ａｌ、Ｓｉ、Ｓｒを主成分としてＣａ、Ｐｂ、Ｎａ、Ｋを複成分とする材料や、Ａｌ、Ｍｇ、Ｓｉ、Ｇｄを含む材料や、Ａｌ、Ｓｉ、Ｚｒ、Ｍｇを含む材料が適用可能である。ここで、誘電率は５〜１５程度の材料を用いる。なお、セラミック誘電体材料の他に、樹脂積層基板や樹脂とセラミック誘電体粉末を混合してなる複合材料を用いてなる積層基板を用いることも可能である。また、前記セラミック基板をＨＴＣＣ（高温同時焼成セラミック：High Temperature Co-fired Ceramics）技術を用いて、誘電体材料をＡｌ２Ｏ３を主体とするものとし、内部導体層として伝送線路等をタングステンやモリブデン等の高温で焼結可能な金属導体として構成しても良い。 In the above-described embodiment, the resin substrate formed by resin molding is used. However, it is needless to say that the present invention is not limited to this and can be applied to a laminated substrate or a ceramic substrate.
For example, it is made of a ceramic dielectric material LTCC (Low Temperature Co-fired Ceramics) that can be sintered at a low temperature of 1000 ° C. or less, and is formed on a green sheet having a thickness of 10 μm to 200 μm with a low resistivity of Ag or A conductive paste such as Cu is printed to form a predetermined pattern, and a plurality of green sheets are used as an insulating layer, and are integrally laminated as appropriate, and sintered to provide an insulating layer (dielectric material) Layer). As these dielectric materials, for example, Al, Si, Sr as main components, Ti, Bi, Cu, Mn, Na, K as subcomponents, Al, Si, Sr as main components, Ca, Pb A material containing Na, K as a multicomponent, a material containing Al, Mg, Si, Gd, or a material containing Al, Si, Zr, Mg is applicable. Here, a material having a dielectric constant of about 5 to 15 is used. In addition to the ceramic dielectric material, it is also possible to use a resin multilayer substrate or a multilayer substrate made of a composite material obtained by mixing a resin and ceramic dielectric powder. Further, the ceramic substrate is made of HTCC (High Temperature Co-fired Ceramics) technology, the dielectric material is mainly Al 2 O 3 , and the transmission line is made of tungsten or the like as the internal conductor layer. You may comprise as a metal conductor which can be sintered at high temperature, such as molybdenum.

また、グリーンシートに限定されることなく、他のセラミックにも適用可能であり、またガラスエポキシ樹脂、ポリイミド樹脂、ポリエステル樹脂、ポリエチレンテレフタレート樹脂などの樹脂基板、プリプレグを用いた積層基板などにも適用可能である。   In addition, it is not limited to green sheets but can be applied to other ceramics, and it can also be applied to resin substrates such as glass epoxy resin, polyimide resin, polyester resin, polyethylene terephthalate resin, laminated substrates using prepreg, etc. Is possible.

１，２，３ 回路モジュール
１０ 回路基板
１１ 配線導体層
１２ ボンディングワイヤ
１３ 凹部
１３Ｔ 貫通溝
１４ 接着部材（半田）
２４ 接着部材（絶縁性樹脂） 1, 2, 3 Circuit module 10 Circuit board 11 Wiring conductor layer 12 Bonding wire 13 Recess 13T Through groove 14 Adhesive member (solder)
24 Adhesive member (insulating resin)

Claims (10)

表面に配線導体層を有するとともに、素子搭載領域に凹部を有する回路基板と、
前記凹部をまたぐように、前記回路基板上に搭載される素子チップとを具備し、
前記素子チップは、前記凹部の一部を残すように、前記凹部内に充填された接着部材を介して前記回路基板に固着された、回路モジュール。 A circuit board having a wiring conductor layer on the surface and a recess in the element mounting region;
An element chip mounted on the circuit board so as to straddle the recess,
The circuit module, wherein the element chip is fixed to the circuit board via an adhesive member filled in the recess so as to leave a part of the recess. 請求項１に記載の回路モジュールであって、
前記接着部材は導電性接着剤であり、
前記配線導体層は前記凹部内から前記回路基板表面にかけて連続して形成されており、前記配線導体層と前記素子チップとが電気的に接続された回路モジュール。 The circuit module according to claim 1,
The adhesive member is a conductive adhesive,
The circuit module in which the wiring conductor layer is continuously formed from the inside of the recess to the surface of the circuit board, and the wiring conductor layer and the element chip are electrically connected. 請求項１に記載の回路モジュールであって、
前記素子チップは、前記凹部の周縁部全周にわたって前記回路基板表面と当接し、前記凹部を覆うように形成された回路モジュール。 The circuit module according to claim 1,
The circuit chip is formed so that the element chip is in contact with the surface of the circuit board over the entire periphery of the periphery of the recess and covers the recess. 請求項１に記載の回路モジュールであって、
前記凹部は溝状に形成されており、
前記素子チップは、前記溝状の凹部の平行な２辺に沿って前記回路基板表面と当接し、前記凹部を選択的に塞ぐように形成された回路モジュール。 The circuit module according to claim 1,
The recess is formed in a groove shape,
The circuit chip is formed so that the element chip is in contact with the surface of the circuit board along two parallel sides of the groove-shaped recess and selectively closes the recess. 請求項１乃至４のいずれかに記載の回路モジュールであって、
前記素子チップは、裏面側で前記配線導体層に接続され、ワイヤボンディング接続された回路モジュール。 The circuit module according to any one of claims 1 to 4,
A circuit module in which the element chip is connected to the wiring conductor layer on the back surface side and connected by wire bonding. 請求項５に記載の回路モジュールであって、
前記素子チップは、前記凹部内で接着部材を介して配線導体層に接合されており、
前記凹部の周縁部では前記配線導体層と前記素子チップ裏面とは接着剤を介することなく直接接合された回路モジュール。 The circuit module according to claim 5, wherein
The element chip is bonded to the wiring conductor layer through an adhesive member in the recess,
The circuit module in which the wiring conductor layer and the back surface of the element chip are directly joined without using an adhesive at the peripheral edge of the recess. 請求項１乃至６のいずれかに記載の回路モジュールであって、
前記回路モジュールは、ジャイロセンサモジュールを構成する回路モジュール。 The circuit module according to any one of claims 1 to 6,
The circuit module is a circuit module constituting a gyro sensor module. 請求項１乃至７に記載の回路モジュールの製造方法であって、
表面に配線導体層を有するとともに、素子搭載領域に凹部を有する回路基板を用意する工程と、
前記凹部に接着剤を充填する工程と、
前記凹部をまたぐように、前記回路基板上に素子チップを配する工程と、
前記素子チップを押圧しながら、前記回路基板を加熱し前記回路基板に前記素子チップを固着する工程と、
を含む回路モジュールの製造方法。 A method for manufacturing a circuit module according to claim 1,
Preparing a circuit board having a wiring conductor layer on the surface and a recess in the element mounting region;
Filling the recess with an adhesive;
Disposing an element chip on the circuit board so as to straddle the recess;
Heating the circuit board while pressing the element chip, and fixing the element chip to the circuit board;
Of manufacturing a circuit module. 請求項８に記載の回路モジュールの製造方法であって、
前記回路基板を固着する工程後、前記素子チップを押圧しつつ、ワイヤボンディングにより、前記回路基板と前記素子チップとを電気的に接続する工程を含む回路モジュールの製造方法。 A method of manufacturing a circuit module according to claim 8,
A method of manufacturing a circuit module, comprising a step of electrically connecting the circuit board and the element chip by wire bonding while pressing the element chip after the step of fixing the circuit board. 請求項８または９に記載の回路モジュールの製造方法であって、
前記固着する工程に先立ち、前記凹部の周縁の配線導体層を鏡面加工する工程を含み、
前記固着する工程は、前記凹部内では接着剤を介して前記素子チップ裏面を接続する一方、前記凹部の周縁の配線導体層と前記素子チップ裏面とを直接接合する工程である
む回路モジュールの製造方法。 A method of manufacturing a circuit module according to claim 8 or 9,
Prior to the step of fixing, including a step of mirror-finishing the wiring conductor layer at the periphery of the recess,
The step of fixing is a step of connecting the back surface of the element chip through an adhesive in the recess, and directly bonding the wiring conductor layer on the periphery of the recess and the back surface of the element chip. Method.
JP2009214263A 2009-09-16 2009-09-16 Circuit module, and method of manufacturing the same Withdrawn JP2011066116A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6021238B1 (en) * 2015-10-11 2016-11-09 マグネデザイン株式会社 Gradio sensor element and gradio sensor
CN109115391A (en) * 2017-06-26 2019-01-01 上海微联传感科技有限公司 A kind of MEMS pressure sensor
CN113257755A (en) * 2021-03-25 2021-08-13 日月光半导体制造股份有限公司 Package structure and method for forming the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6021238B1 (en) * 2015-10-11 2016-11-09 マグネデザイン株式会社 Gradio sensor element and gradio sensor
CN109115391A (en) * 2017-06-26 2019-01-01 上海微联传感科技有限公司 A kind of MEMS pressure sensor
CN109115391B (en) * 2017-06-26 2024-06-04 华景传感科技（无锡）有限公司 MEMS pressure sensor
CN113257755A (en) * 2021-03-25 2021-08-13 日月光半导体制造股份有限公司 Package structure and method for forming the same

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