JP2011024309A - Switching regulator, power supply circuit, and control method - Google Patents

Abstract

A switching regulator capable of increasing efficiency at a low load is provided.
SOLUTION: A heavy load transistor (QP1, QN1) that is controlled to be turned on and off at the time of a heavy load, a normally operating transistor (QP2, QN2) that is always operated at the time of operation, and a heavy load transistor (QP1, QN2). QN1) and the control means (equivalent to the output driver control circuit 5) for controlling the transistors for constant operation (QP2, QN2) and the load current detection means for detecting the load current (equivalent to the load current detection circuit 4) The control means (5) controls on / off of the heavy load transistors (QP1, QN1) according to the load current value detected by the load current detection means (4).
[Selection] Figure 1

Description

  The present invention relates to a switching regulator used in a power supply circuit mounted on a portable device or the like.

  In recent years, energy conservation is also required for environmental measures, and in the case of mobile devices that use batteries such as mobile phones and digital cameras, the importance of reducing the power consumed in mobile devices from the viewpoint of extending the battery life. Has increased.

  As a result, non-insulated step-down switching regulators (hereinafter referred to as switching regulators) using inductors are widely used as power circuits mounted in portable devices and the like, which are highly efficient and can be miniaturized. ing.

  However, although the switching regulator is highly efficient at the rated load, the current consumption of the switching regulator itself is relatively large, so in the case of light load operation where the portable device is in a low power consumption state such as a standby state or a sleep mode. The efficiency is significantly reduced.

  Therefore, in the past, to improve efficiency even during light load operation, series regulators that operate with low current consumption by lowering the switching frequency, switching intermittently, or stopping the switching regulator operation I was switching.

  However, when the switching frequency is lowered, there is a limit because the switching frequency cannot be lowered to an audible frequency of 20 kHz or less.

  In addition, when switching is performed intermittently, ripples are generated in the output voltage, and measures against the ripples are required.

  Also, when switching to the series regulator, there is power loss due to the voltage regulator transistor of the series regulator, so it is effective when the load current during light load operation is extremely small, but the effect is reduced when the load current increases. In addition, adding a series regulator increases the circuit scale.

  In addition, by adopting a transistor with a short switching time during light load operation as a method for improving the efficiency during light load operation, the switching element is in a transition period when it is switched from on to off or from off to on. There is a method for reducing power consumption (see, for example, Patent Document 1).

  However, since the power consumed by the switching element is the product of the current flowing through the switching element and the voltage applied to the switching element, the current flowing through the switching element during light load operation, particularly during standby, is several μA to several Since it is as small as 100 μA, there is very little energy that can be saved by shortening the switching time, and the effect of reducing power is small.

  A large percentage of power consumption during light load operation is to fill the parasitic capacitance between the control electrode of the switching element and the input / output terminals (between the gate and source and between the gate and drain in a MOS transistor) with a drive pulse. It is the electric power consumed for discharging.

  This power is constant regardless of the current flowing through the switching element. In order to reduce the loss due to charging / discharging of such parasitic capacitance, it is effective to reduce the number of times the switching element is driven. Therefore, conventionally, the switching frequency was lowered or switching was performed intermittently, but as described above, the frequency could not be lowered to 20 KHz or less, and if it was intermittent, the output had a ripple. There were problems such as an increase, and a significant effect could not be expected.

  In addition, the method of adding series regulators has become smaller and larger in scale as in recent years, and if the load current during standby is relatively high, such as several hundred μA, improvement in efficiency cannot be expected, and the circuit scale is large. There is a problem of becoming.

  For this reason, there is a document that discloses a switching regulator that can extremely reduce the loss associated with charging / discharging of the parasitic capacitance between the control electrode and the input / output terminal of the switching element (see, for example, Patent Document 2). .

  In Patent Document 2 described above, the first switching transistor M1 that switches the input voltage Vdd and the parasitic capacitance between the control electrode and the input / output terminal are small compared to the first switching transistor M1, and the on-state is on. And a second switching transistor M3 having a large impedance between the input and output, and configured to switch the operation mode to the normal operation mode or the light load operation mode in accordance with the switching signal Sc from the outside. In the mode, both the first and second switching transistors M1 and M3 are switched, and in the light load operation mode, only the second switching transistor M3 is switched.

  Note that a switching regulator used in a power supply circuit mounted on a portable device or the like is required to have high efficiency regardless of load current. For this reason, the circuit operation is controlled in accordance with the load current to improve the efficiency.

  However, in conventional switching regulators, the driver size is determined corresponding to the case where the load current is large, and it is necessary to drive another low load driver at low load. For this reason, since unnecessary charging / discharging is performed, there is a problem that efficiency at low load is low and a circuit area is increased.

  In Patent Document 2, for the purpose of increasing efficiency, the first and second switching transistors M1 and M2 are switched together in the normal operation mode, and only the second switching transistor M2 is switched in the light load operation mode. Have to switch.

  However, Patent Document 2 does not consider the point of increasing the efficiency at low load.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a switching regulator, a power supply circuit, and a control method that can increase the efficiency at low load.

  In order to achieve this object, the present invention has the following features.

<Switching regulator>
The switching regulator according to the present invention is
A heavy load transistor that is controlled to be turned on and off at the time of heavy load;
A transistor for always-on operation that is always in operation,
Control means for controlling the heavy load transistor and the always-on transistor,
The control means includes
The on / off of the heavy load transistor is controlled according to a load current value.

<Power supply circuit>
The power supply circuit according to the present invention is
The switching regulator described above is mounted.

<Control method>
The control method according to the present invention includes:
A heavy load transistor that is controlled to be turned on / off at the time of heavy load; a normally operating transistor that is always operating during operation; and a control unit that controls the heavy load transistor and the always operating transistor. A control method performed by a switching regulator configured as
The control means includes
The method includes a step of controlling on / off of the heavy load transistor according to a load current value.

  According to the present invention, the efficiency at the time of low load can be increased.

1 is a diagram illustrating a configuration example of a switching regulator 100 of the present embodiment. It is the 1st figure for explaining the example of processing operation of switching regulator 100 of this embodiment. It is a 2nd figure for demonstrating the processing operation example of the switching regulator 100 of this embodiment.

<Outline of Switching Regulator 100 of the Present Embodiment>
First, an overview of the switching regulator 100 of the present embodiment will be described with reference to FIGS. 1 and 2.

  As shown in FIG. 1, the switching regulator 100 of the present embodiment includes a heavy load transistor (QP1, QN1) that is controlled to be turned on and off at the time of heavy load, and a normal operation transistor (QP2) that is always operated during operation. , QN2), control means for controlling heavy load transistors (QP1, QN1) and always-on transistors (QP2, QN2) (equivalent to output driver control circuit 5), and load current detection means for detecting load current (Corresponding to the load current detection circuit 4).

  As shown in FIG. 2, the control means (5) of the present embodiment turns on / off the heavy load transistors (QP1, QN1) according to the load current value detected by the load current detection means (4) (QP1 Control on / off of control signal and QN1 control signal.

  As described above, the switching regulator 100 of the present embodiment controls the on / off of the heavy load transistors (QP1, QN1) according to the load current value (QP1 control signal, QN1 control signal on / off). Thus, the efficiency at low load can be increased. Hereinafter, the switching regulator 100 of the present embodiment will be described in detail with reference to the accompanying drawings.

<Configuration example of switching regulator 100>
First, a configuration example of the switching regulator 100 of the present embodiment will be described with reference to FIG. FIG. 1 is a diagram illustrating a configuration example of the switching regulator 100.

  The switching regulator 100 of this embodiment is a synchronous rectification step-down switching regulator using a CMOS integrated circuit. The switching regulator 100 of this embodiment is used for a power supply circuit such as a portable device.

  The switching regulator 100 of the present embodiment includes a DC-DC conversion circuit 10, a reference voltage generation circuit 1, an error amplification circuit 2, a PWM control circuit 3, a load current detection circuit 4, an output driver control circuit 5, It comprises and has.

  The DC-DC conversion circuit 10 includes an upper transistor (QP1, QP2), a lower transistor (QN1, QN2), an inductor (L1), and a capacitor (C1).

  The upper transistors (QP1, QP2) and the lower transistors (QN1, QN2) constitute a transistor for synchronous rectification. The upper transistors (QP1, QP2) are connected to the VDD terminal which is an input terminal. The lower transistors (QN1, QN2) are connected to the GND terminal.

  The upper transistors (QP1, QP2) of the present embodiment are configured to include a heavy load transistor (QP1) and a constantly operating transistor (QP2). Similarly to the upper transistors (QP1, QP2), the lower transistors (QN1, QN2) include a heavy load transistor (QN1) and a constantly operating transistor (QN2). The heavy load transistor is a transistor that is on / off controlled under heavy load. The always-on transistor is a transistor that is always in operation.

  The inductor (L1) and the capacitor (C1) are used for energy conversion.

  The DC-DC conversion circuit 10 alternately turns on and off the transistors constituting the upper transistors (QP1, QP2) and the lower transistors (QN1, QN2), and outputs a DC voltage (Vout).

  The reference voltage generation circuit 1 generates and outputs a predetermined reference voltage.

  The error amplification circuit 2 compares the voltage value of the output voltage output from the DC-DC conversion circuit 10 with the reference voltage output from the reference voltage generation circuit 1, and the difference between the output voltage value and the reference voltage value An error signal corresponding to the voltage value is output.

  The PWM control circuit 3 controls the pulse width of the PWM signal output from the PWM control circuit 3 based on the error signal output from the error amplification circuit 2, and controls the upper transistor (QP1, QP2) and the lower transistor (QN1, QN2). ) And the output voltage value output from the DC-DC conversion circuit 10 is controlled to be constant.

  The load current detection circuit 4 monitors the load current, and outputs a low load detection control signal (High) when a load current value equal to or less than a threshold value is detected.

  Based on the PWM signal output from the PWM control circuit 3, the output driver control circuit 5 supplies a gate to the upper transistors (QP1, QP2) and lower transistors (QN1, QN2) of the DC-DC conversion circuit 10. The output driver control circuit 5 turns on the lower transistors (QN1, QN2) after the upper transistors (QP1, QP2) are turned off based on the PWM signal output from the PWM control circuit 3. Control to do.

  The output driver control circuit 5 is based on the low load detection control signal (High, Low) output from the load current detection circuit 4, and the upper transistor (QP1, QP2), the lower transistor (QN1, QN2), To control the heavy load transistors (QP1, QN1) that are turned on and off.

<Example of processing operation of switching regulator 100>
Next, the processing operation performed by the switching regulator 100 of the present embodiment will be described with reference to FIG. FIG. 2 is a diagram for explaining a case where a transistor to be turned on is controlled according to a load current value.

  The load current detection circuit 4 changes the low load detection control signal output to the output driver control circuit 5 from “Low” to “High” when the load current value becomes equal to or less than the threshold value.

  When the low load detection control signal output from the load current detection circuit 4 becomes “High”, the output driver control circuit 5 fixes the heavy load transistors (QP1, QN1) to the OFF state and is used for normal operation. Control to switch only the transistors (QP2, QN2).

  In this case, the output driver control circuit 5 fixes the QP1 control signal for controlling the heavy load transistor (QP1) constituting the upper transistor to the “High” state. Further, the QN1 control signal for controlling the heavy load transistor (QN1) constituting the lower transistor is fixed to the “Low” state.

  In addition, the output driver control circuit 5 is configured such that when the low load detection control signal output from the load current detection circuit 4 becomes “Low”, the heavy load transistors (QP1, QN1) and the constantly operating transistor (QP2) , QN2) and both are controlled to switch.

  It is the current consumption of the circuit constituting the switching regulator 100 that dominates the efficiency at low load. A large proportion of the consumed current is charge / discharge current for turning on and off the upper transistors (QP1, QP2) and the lower transistors (QN1, QN2).

  The switching regulator 100 of this embodiment controls the transistor size by controlling on / off of the heavy load transistors (QP1, QN1) according to the load current value. As a result, the charge / discharge current is reduced and the current consumption of the circuit constituting the switching regulator 100 is also reduced, so that the efficiency at low load can be improved.

  In addition, the switching regulator 100 of the present embodiment does not need to provide a low load transistor, so that it is not necessary to increase the circuit area. For this reason, a circuit area can be made small.

  The above-described embodiment is a preferred embodiment of the present invention, and the scope of the present invention is not limited to the above-described embodiment alone, and various modifications are made without departing from the gist of the present invention. Implementation is possible.

  For example, FIG. 1 shows a synchronous rectification step-down switching regulator using a CMOS integrated circuit. However, the present invention is not limited to the CMOS integrated circuit, and other integrated circuits may be used.

  In FIG. 2, the output driver control circuit 5 controls the heavy load transistor (QP1) constituting the upper transistor after the low load detection control signal output from the load current detection circuit 4 becomes “High”. When the QP1 control signal to be performed becomes “High”, the QP1 control signal is fixed to the “High” state. However, as shown in FIG. 3, the output driver control circuit 5 immediately sets the QP1 control signal to the “High” state when the low load detection control signal output from the load current detection circuit 4 becomes “High”. It is also possible to construct it so that it is fixed to. The QN1 control signal for controlling the heavy load transistor (QN1) constituting the lower transistor can be similarly constructed.

  Further, the control operation in each device constituting the switching regulator 100 in the present embodiment described above can be executed using hardware, software, or a combined configuration of both.

  In the case of executing processing using software, it is possible to install and execute a program in which a processing sequence is recorded in a memory in a computer incorporated in dedicated hardware. Alternatively, the program can be installed and executed on a general-purpose computer capable of executing various processes.

  For example, the program can be recorded in advance on a hard disk or ROM (Read Only Memory) as a recording medium. Alternatively, the program can be stored (recorded) temporarily or permanently in a removable recording medium. Such a removable recording medium can be provided as so-called package software. Examples of the removable recording medium include a floppy (registered trademark) disk, a CD-ROM (Compact Disc Read Only Memory), an MO (Magneto optical) disk, a DVD (Digital Versatile Disc), a magnetic disk, and a semiconductor memory.

  The program is installed on the computer from the removable recording medium as described above. In addition, it is wirelessly transferred from the download site to the computer. In addition, it is transferred to a computer via a network by wire.

  In addition, the switching regulator 100 in the present embodiment is not only executed in time series according to the processing operation described in the above embodiment, but also the processing capability of the apparatus that performs the processing, or in parallel as necessary or It can also be constructed to run individually.

  The present invention is applicable to mobile devices such as mobile phones and digital cameras.

DESCRIPTION OF SYMBOLS 100 Switching regulator 10 DC-DC conversion circuit 1 Reference voltage generation circuit 2 Error amplification circuit 3 PWM control circuit 4 Load current detection circuit 5 Output driver control circuit
QP1, QP2 upper transistor
QN1, QN2 Lower transistor
L1 inductor
C1 capacitor

JP 2000-217344 A JP 2005-160254 A

Claims (7)

A heavy load transistor that is controlled to be turned on and off at the time of heavy load;
A transistor for always-on operation that is always in operation,
Control means for controlling the heavy load transistor and the always-on transistor,
The control means includes
A switching regulator characterized in that on / off of the heavy load transistor is controlled in accordance with a load current value. A load current detecting means for detecting the load current;
The control means includes
2. The switching regulator according to claim 1, wherein on / off of the heavy load transistor is controlled in accordance with a load current value detected by the load current detecting means. It has an upper transistor and a lower transistor that constitute a transistor for synchronous rectification,
The upper transistor and the lower transistor are each configured to include the heavy load transistor and the always-on transistor,
The control means includes
3. The switching regulator according to claim 2, wherein on / off of the heavy load transistors of the upper transistor and the lower transistor is controlled according to a load current value detected by the load current detecting means. The control means includes
The period when the load current detecting means detects a load current value below a threshold value is controlled so that the heavy load transistor is turned off and the normally operating transistor is switched. Item 4. The switching regulator according to Item 2 or 3. The control means includes
During a period in which the load current detection means does not detect a load current below a threshold value, the heavy load transistor is controlled to be in an ON state, and the heavy load transistor and the constantly operating transistor are controlled to be switched. The switching regulator according to any one of claims 2 to 4, characterized in that:   A power supply circuit on which the switching regulator according to any one of claims 1 to 5 is mounted. A heavy load transistor that is controlled to be turned on / off at the time of heavy load; a normally operating transistor that is always operating during operation; and a control unit that controls the heavy load transistor and the always operating transistor. A control method performed by a switching regulator configured as
The control means includes
A control method comprising a step of controlling on / off of the heavy load transistor according to a load current value.

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