JP2011019047A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device allowing an amplifier circuit to be downsized.SOLUTION: This semiconductor device includes: a first transistor having a first signal input terminal, a first signal output terminal and a first grounding terminal; a first power feed terminal; a first resistor connected between the first power feed terminal and the first signal input terminal; and a first capacitor connected between the first power feed terminal and a grounding point; wherein the first transistor, the first power feed terminal, the first resistor and the first capacitor are formed in the same chip.

Description

  The present invention relates to a semiconductor device applied to an amplifier circuit in which a plurality of transistors are connected in cascade or an amplifier circuit having a negative feedback circuit, and more particularly to a semiconductor device capable of reducing the size of the amplifier circuit.

  Conventionally, in order to obtain a target voltage gain, an amplifier circuit in which a plurality of transistors are cascaded is used. In such an amplifier circuit, a common bias circuit that supplies power to the gate terminals of a plurality of transistors may be applied. When a common bias circuit is applied, the drain terminals of the plurality of cascade-connected transistors and the gate terminals of the same transistor are connected to each other by the common bias circuit.

  For this reason, when the amplifier circuit operates at a low temperature or when the output load of the amplifier circuit fluctuates, the output power of each of the plurality of cascade-connected transistors passes through a common bias circuit, It may be re-input to the gate terminal of the same transistor. In this case, oscillation occurs in a loop including the transistor and a common bias circuit.

  Problems occurring in the amplifier circuit such as oscillation, breakdown voltage degradation, and impedance mismatch are prevented by using resistors and capacitors (for example, Patent Documents 1 and 2). In order to prevent oscillation, it is necessary to use a large number of electronic components such as bypass capacitors.

  Further, even in an amplifier circuit having a negative feedback circuit, it is necessary to use a large number of electronic components such as resistors that constitute the negative feedback circuit.

JP-A-60-229359 JP 2001-250948 A

  As described above, when preventing oscillation in the amplifier circuit or configuring a negative feedback circuit, it is necessary to use a large number of electronic components. As a result, there has been a problem that the amplifier circuit becomes large.

  The present invention has been made to solve this problem, and an object of the present invention is to provide a semiconductor device that can reduce the size of an amplifier circuit.

  A semiconductor device according to a first aspect of the present invention includes a first transistor having a first signal input terminal, a first signal output terminal, and a first ground terminal, a first power supply terminal, and the first power supply terminal. And a first resistor connected between the first signal input terminal and a first capacitor connected between the first power supply terminal and a ground point, the first transistor, The first power supply terminal, the first resistor, and the first capacitor are provided on the same chip.

  A semiconductor device according to a second aspect of the present invention includes a transistor having a signal input terminal, a signal output terminal, and a ground terminal, a resistor connected to the signal output terminal, and a capacitor connected between the resistor and the signal input terminal The transistor, the resistor, and the capacitor are provided on the same chip.

  According to the present invention, the amplifier circuit can be reduced in size.

1 is a diagram illustrating an entire two-stage amplifier circuit according to a first embodiment. FIG. FIG. 3 is a diagram showing a circuit of a first semiconductor chip according to the first embodiment. 4 is a top view of the first semiconductor chip according to the first embodiment. FIG. FIG. 6 is a diagram showing a circuit of a second semiconductor chip according to the first embodiment. It is a figure which shows the whole 2 step | paragraph structure amplifier circuit which concerns on a 1st comparative example. It is a figure which shows the circuit of the semiconductor chip which concerns on a 1st comparative example. It is a top view of the semiconductor chip concerning the 1st comparative example. FIG. 6 is a diagram illustrating an entire amplifier circuit according to a second embodiment. FIG. 10 is a diagram showing a circuit of a fourth semiconductor chip according to the second embodiment. FIG. 10 is a top view of a fourth semiconductor chip according to the second embodiment. It is a figure which shows the whole amplifier circuit which concerns on a 2nd comparative example. FIG. 10 is a diagram showing a circuit of a sixth semiconductor chip according to the third embodiment. FIG. 10 is a top view of a sixth semiconductor chip according to the third embodiment.

Embodiment 1 FIG.
FIG. 1 is a diagram showing the entire two-stage amplifier circuit according to the first embodiment. The amplifier circuit 10 includes a first semiconductor chip 12 and a second semiconductor chip 14. The first semiconductor chip 12 and the second semiconductor chip 14 are connected in cascade. The high frequency signal input to the input terminal 16 of the amplifier circuit is input to the first semiconductor chip 12 and amplified. Thereafter, the high frequency signal is input to the second semiconductor chip 14, further amplified, and then output from the output terminal 18 of the amplifier circuit. The output high frequency signal is transmitted to an antenna (not shown).

When a high-frequency signal is amplified, a gate bias is applied to the first semiconductor chip 12 and the second semiconductor chip 14 from a gate bias terminal (second power supply terminal) 20 via a common gate bias circuit 22. The drain bias is applied from the drain bias terminal 24 through the common drain bias circuit 26.

  FIG. 2 is a diagram showing a circuit of the first semiconductor chip according to the first embodiment. FIG. 3 is a top view of the first semiconductor chip according to the first embodiment. FIG. 4 is a diagram showing a circuit of the second semiconductor chip according to the first embodiment.

  The first semiconductor chip 12 is provided with a MOSFET 28, a signal input terminal 30, a signal output terminal 32, and a ground terminal 34. Further, the first semiconductor chip 12 is provided with a power supply terminal (first power supply terminal) 36, a resistor (first resistor) 38, a capacitor (first capacitor) 40, and a diode 42. The resistor 38 is made of a silicide such as polysilicon or tungsten. The MOSFET 28 includes an FET active part 44, a gate terminal 46, a drain terminal 48, and a grounded source terminal 50.

  A high frequency signal is input to the first semiconductor chip 12 via the signal input terminal 30. A gate bias is applied to the first semiconductor chip 12 through the power supply terminal 36. As a result, a high frequency signal is input to the gate terminal 46 of the MOSFET 28 and a gate bias is applied. A drain bias is applied to the first semiconductor chip 12 via the signal output terminal 32. As a result, a drain bias is applied to the drain terminal 48 of the MOSFET 28. As a result, the high frequency signal is amplified by the FET active unit 44. The amplified high frequency signal is output from the drain terminal 48 of the MOSFET 28 and then output from the signal output terminal 32.

The resistor 38 is connected between the power supply terminal 36 and the gate terminal 46. The capacitor 40 is connected between the power supply terminal 36 and the ground terminal 34. Two diodes 42 are provided. One is connected between the signal input terminal 30 and the ground terminal 34 in order to prevent the breakdown of the MOSFET 28. The other is connected between the power supply terminal 36 and the ground terminal 34 in order to prevent dielectric breakdown of the capacitor 40 such as SiO ₂ .

  The second semiconductor chip 14 is provided with a MOSFET 28, a signal input terminal 30, a signal output terminal 32, a ground terminal 34, and a diode 42. The diode 42 of the second semiconductor chip 14 is connected between the signal input terminal 30 and the ground terminal 34 in order to prevent the breakdown of the MOSFET 28.

  The gate terminal 46 of the MOSFET 28 of the second semiconductor chip 14 is connected to the drain terminal 48 of the MOSFET 28 of the first semiconductor chip 12. The power supply terminal 36 of the first semiconductor chip 12 and the gate terminal 46 of the MOSFET 28 of the second semiconductor chip 14 are connected to the gate bias terminal (second power supply terminal) 20. The power supply terminal 36 of the first semiconductor chip 12 and the gate terminal 46 of the MOSFET 28 of the second semiconductor chip 14 are connected to each other. Further, the drain terminal 48 of the MOSFET 28 of the first semiconductor chip 12 and the drain terminal 48 of the MOSFET 28 of the second semiconductor chip 14 are connected to the common drain bias terminal 24.

  The effects will be described below in comparison with the first comparative example. FIG. 5 is a diagram showing the entire two-stage amplifier circuit according to the first comparative example. FIG. 6 is a diagram illustrating a circuit of a semiconductor chip according to the first comparative example. FIG. 7 is a top view of the semiconductor chip according to the first comparative example.

  The amplifier circuit 54 of the first comparative example includes a third semiconductor chip 56 instead of the first semiconductor chip 12. Unlike the first semiconductor chip 12, the third semiconductor chip 56 is not provided with the power supply terminal 36, the resistor 38, and the capacitor 40. In addition, the amplifier circuit 54 of the first comparative example includes a resistance component 60 for voltage attenuation and a capacitor component 62 for short-circuiting the high-frequency signal outside the third semiconductor chip 56.

  In the amplifier circuit 54 of the first comparative example, the high frequency power amplified by the MOSFET 28 of the third semiconductor chip 56 is normally further amplified by the MOSFET 28 of the second semiconductor chip 14. However, as described in the problem, the high frequency power amplified by the MOSFET 28 of the third semiconductor chip 56 is re-input to the gate terminal 46 of the MOSFET 28 of the third semiconductor chip 56 via the gate bias circuit 22. Oscillation may occur. Therefore, the oscillation is prevented by the resistance component 60 for voltage attenuation and the capacitor component 62 for short-circuiting the high frequency signal. Therefore, the resistance component 60 for voltage attenuation and the capacitor component 62 for short-circuiting the high frequency signal are required separately from the third semiconductor chip 56.

  On the other hand, also in the amplifier circuit 10 according to the first embodiment, the high frequency power amplified by the MOSFET 28 of the first semiconductor chip 12 passes through the gate bias circuit 22 and the gate terminal 46 of the MOSFET 28 of the first semiconductor chip 12. May be re-input to cause oscillation. Therefore, as described above, the power supply terminal 36, the resistor 38, and the capacitor 40 are provided in the first semiconductor chip 12 together with the MOSFET 28.

  Thereby, when the high frequency power amplified by the MOSFET 28 of the first semiconductor chip 12 returns to the first semiconductor chip 12 via the gate bias circuit 22, the high frequency power is supplied to the first semiconductor chip 12 as a power supply terminal. 36 is input. The voltage component of the input high frequency power is attenuated by the resistor 38, and the high frequency component is short-circuited by the capacitor 40. For this reason, it is possible to prevent the high frequency power amplified by the MOSFET 28 of the first semiconductor chip 12 from being re-input to the gate terminal 46 of the MOSFET 28 of the first semiconductor chip 12.

  Further, unlike the first comparative example, the voltage attenuation resistance component 60 and the high frequency signal short circuit capacitor component 62 are not used. For this reason, the number of parts used in the amplifier circuit can be reduced, and the circuit area can be reduced. Therefore, oscillation can be prevented and the amplifier circuit can be downsized.

  Further, the resistor 38 and the capacitor 40 having the same role as those of the voltage attenuation resistor component 60 and the high frequency signal short-circuit capacitor component 62 according to the first comparative example are the same as those of the first semiconductor chip 12. It is provided closer to the gate terminal 46 of the MOSFET 28. Therefore, noise generated at every location of the amplifier circuit 10 as well as a voltage source (not shown) connected to the gate bias terminal 20 is input to the gate terminal 46 of the MOSFET 28 of the first semiconductor chip 12. It can be prevented more effectively.

  In place of the MOSFET 28, a bipolar transistor or a junction transistor may be applied. Similar effects can be obtained.

  The MOSFET 28 uses silicon for the semiconductor substrate, but the bipolar transistor and the junction transistor applied instead may be those using a compound semiconductor substrate of GaAs, InGaP, or AlGaAs. In either case, the same effect can be obtained.

Embodiment 2. FIG.
FIG. 8 is a diagram illustrating the entire amplifier circuit according to the second embodiment. The amplifier circuit 64 includes a fourth semiconductor chip 66. The high frequency signal input to the input terminal 16 of the amplifier circuit is input to the fourth semiconductor chip 66 and amplified.

  FIG. 9 is a diagram illustrating a circuit of a fourth semiconductor chip according to the second embodiment. FIG. 10 is a top view of the fourth semiconductor chip according to the second embodiment. The fourth semiconductor chip 66 is provided with a MOSFET 28, a signal input terminal 30, a signal output terminal 32, and a ground terminal 34. The fourth semiconductor chip 66 is further provided with a resistor 70, a capacitor 72, and a diode 42.

The resistor 70 is connected to the signal output terminal 32. The capacitor 72 is connected between the resistor 70 and the signal input terminal 30. Two diodes 42 are provided. One is connected between the signal input terminal 30 and the ground terminal 34 in order to prevent the breakdown of the MOSFET 28. The other is connected between the signal output terminal 32 and the ground terminal 34 in order to prevent dielectric breakdown of the capacitor 72 such as SiO ₂ .

  The drain terminal 48 is connected to the gate terminal 46 through the resistor 70 and the capacitor 72, thereby forming a negative feedback circuit. As a result, the high frequency power amplified by the MOSFET 28 and output from the drain terminal 48 is input again to the gate terminal 46 via the resistor 70 and the capacitor 72.

  The effects will be described below in comparison with the second comparative example. FIG. 11 is a diagram illustrating an entire amplifier circuit according to a second comparative example. In the amplifier circuit 74 according to the second comparative example, the drain terminal 48 is connected to the gate terminal 46 via the resistor component 78 and the capacitor component 80 outside the fifth semiconductor chip 76, thereby forming a negative feedback circuit. Has been. Therefore, the resistor component 78 and the capacitor component 80 are required separately from the fifth semiconductor chip 76.

  On the other hand, in the second embodiment, unlike the second comparative example, it is not necessary to use the resistance component and the capacitor component outside the fourth semiconductor chip 66 in order to form the negative feedback circuit. For this reason, while forming a negative feedback circuit, the number of parts used for an amplifier circuit can be reduced, a circuit area can be reduced, and an amplifier circuit can be reduced in size.

Embodiment 3 FIG.
FIG. 12 is a diagram illustrating a circuit of a sixth semiconductor chip according to the third embodiment. FIG. 13 is a top view of the sixth semiconductor chip according to the third embodiment. The circuit of the sixth semiconductor chip 82 is a circuit in which the circuit of the fourth semiconductor chip 66 described above is combined with the circuit of the first semiconductor chip 12 described above.

  The sixth semiconductor chip 88 is provided with a MOSFET 28, a signal input terminal 30, a signal output terminal 32, and a ground terminal 34. Similarly to the first semiconductor chip 12, the sixth semiconductor chip 88 includes a power supply terminal (first power supply terminal) 36, a resistor (first resistor) 38, and a capacitor (first capacitor) 40. Is provided. Further, the sixth semiconductor chip 88 is provided with a resistor (second resistor) 70 and a capacitor (second capacitor) 72, similarly to the fourth semiconductor chip 66.

  Therefore, in order to prevent oscillation, it is not necessary to use a resistance component for voltage attenuation outside the semiconductor chip and a capacitor component for short-circuiting the high frequency signal. Therefore, oscillation can be prevented and the amplifier circuit can be miniaturized. Further, it is not necessary to use a resistor component and a capacitor component outside the semiconductor chip in order to form the negative feedback circuit. For this reason, while forming a negative feedback circuit, an amplifier circuit can be reduced in size.

12 First semiconductor chip 14 Second semiconductor chip 20 Gate bias terminal (second power supply terminal)
28 MOSFET
30 Signal input terminal 32 Signal output terminal 34 Ground terminal 36 Power supply terminal (first power supply terminal)
38 Resistance (first resistance)
40 capacitor (first capacitor)
42 Diode 56 Third semiconductor chip 60 Voltage-damping resistor parts 60 and 62 High-frequency signal short-circuit capacitor part 66 Fourth semiconductor chip 70 Resistor (second resistor)
72 capacitor (second capacitor)
78 Resistor parts 80 Capacitor parts

Claims (4)

A first transistor having a first signal input terminal, a first signal output terminal, and a first ground terminal;
A first power supply terminal;
A first resistor connected between the first power supply terminal and the first signal input terminal;
A first capacitor connected between the first power supply terminal and a ground point;
The semiconductor device, wherein the first transistor, the first power supply terminal, the first resistor, and the first capacitor are provided on the same chip. A second transistor having a second signal input terminal connected to the first signal output terminal, a second signal output terminal, and a second ground terminal;
A second power supply terminal connected to the first power supply terminal and the second signal input terminal;
Further comprising
The semiconductor device according to claim 1, wherein the first power supply terminal and the second signal input terminal are connected. A second resistor connected to the first signal output terminal;
A second capacitor connected between the second resistor and the first signal input terminal;
Further comprising
The first transistor, the first power supply terminal, the first resistor, the first capacitor, the second resistor, and the second capacitor are provided on the same chip. The semiconductor device according to claim 1 or 2. A transistor having a signal input terminal, a signal output terminal and a ground terminal;
A resistor connected to the signal output terminal;
A capacitor connected between the resistor and the signal input terminal,
The semiconductor device, wherein the transistor, the resistor, and the capacitor are provided on the same chip.

Images