JP2010062459A - Substrate manufacturing method, and substrate, and electronic component and semiconductor device including substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate manufacturing method in which disconnection of a conductive film on an upper edge of a via-hole can be suppressed. <P>SOLUTION: The substrate manufacturing method is a method of manufacturing a substrate including a silicon substrate 201 as a lower layer, a glass substrate 203a superposed thereon as an insulating layer having a penetrating via-hole 210, and a metal wiring 211 as a conductive film covering an inner surface of the via-hole. The method includes: a via-hole prepared hole forming step for forming a concave portion or a penetrating hole on the upper surface of the insulating layer; a via-hole shape finishing step for applying a blast process to the upper surface of the insulating layer to shape the concave portion or the hole into the via-hole 210 while partially removing the upper edge of the concave portion or the hole; and a via-hole conductive film finishing step for forming the conductive film covering the lower layer exposed as the inner surface of the via-hole and as a bottom surface of the via-hole. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a substrate manufacturing method, a substrate, an electronic component including the substrate, and a semiconductor device.

FIG. 1 of Japanese Patent Laying-Open No. 2006-186376 (Patent Document 1) shows a cross-sectional view of a general MEMS element package. The via hole is formed by sandblasting, and an external electrode pad is formed by forming a metal film so as to cover the inside of the via hole. When only relevant portions are extracted and shown, the structure is as shown in FIG. A via hole 106 is formed so as to penetrate the insulating layer 103 and expose the lower lower layer 105, and an external electrode pad 107 is formed in the via hole 106.
JP 2006-186376 A

  In the MEMS element package as described above, the upper edge of the via hole 106 is square. Therefore, when the metal film 107 as the external electrode pad is formed, the metal film 107 cannot cover the upper edge of the via hole 106 continuously and is disconnected.

  The same applies to the case where the via hole 10 is formed in the structure in which the glass layer 3 is placed on the silicon layer 1 as shown in FIG. 18, and there is a possibility of disconnection at the edge 12 when the via hole 10 is covered with a metal film. .

  SUMMARY OF THE INVENTION An object of the present invention is to provide a substrate manufacturing method, a substrate, an electronic component including the same, and a semiconductor device that can suppress the disconnection of the conductive film at the upper edge of the via hole.

  In order to achieve the above object, a method of manufacturing a substrate according to the present invention includes a lower layer, an insulating layer having an upper surface overlapping with an upper surface of the lower layer and having a via hole penetrating therethrough to expose the lower layer. A method of manufacturing a substrate comprising a conductive film covering an inner surface of the via hole, wherein a recess is formed on the upper surface of the insulating layer or the lower layer is exposed on the upper surface. A via hole prepared hole forming step for forming a hole to be formed and blasting the upper surface of the insulating layer to partially remove the recess or the upper edge of the hole while the recess or the hole is Via hole shape finishing process for processing to become a via hole, and via hole conductive film finishing process for forming a conductive film so as to continuously cover the inner surface of the via hole and the upper surface of the insulating layer. Including the. Therefore, disconnection of the conductive film at the upper edge of the via hole can be suppressed.

  According to the present invention, the upper end of the via hole does not form a sharp edge with the insulating layer, but is processed so as to have a rounded and smooth surface. When forming, it can be reliably and continuously formed without disconnection.

(Embodiment 1)
(Production method)
With reference to FIGS. 1-6, the manufacturing method of the board | substrate in Embodiment 1 based on this invention is demonstrated. The substrate manufacturing method according to the present embodiment includes a lower layer, an insulating layer having an upper surface that overlaps with the upper side of the lower layer, and has a via hole penetrating therethrough so as to expose the lower layer, and an inner surface of the via hole. A method of manufacturing a substrate comprising a conductive film for covering, wherein a via hole is formed in the insulating layer so that a recess is formed on the upper surface or a through-hole is formed on the upper surface so as to expose the lower layer. A pilot hole forming step and blasting the upper surface of the insulating layer to partially remove the upper edge of the recess or the hole and processing the recess or the hole to be the via hole. And a via hole conductive film finishing step for forming a conductive film so as to continuously cover the inner surface of the via hole and the upper surface of the insulating layer.

  More specifically, first, as shown in FIG. 1, a glass layer 3 as an insulating layer is disposed on a silicon layer 1 as a lower layer. In this state, a via hole pilot hole forming step is performed. That is, a film resist 8 is formed on the upper surface of the glass layer 3 as shown in FIG. The film resist 8 is once patterned on the entire surface and then patterned. FIG. 2 shows a state after the film resist 8 is patterned. In this state, blasting is performed on the upper surface of the glass layer 3. By doing so, the state shown in FIG. 3 is reached. This blasting process is also referred to as “half processing”. This is because the via hole is not completely formed, but is processed up to the formation stage. At this time, the glass layer 3 is dug in a region not covered with the film resist 8 to form a recess 9, but the recess 9 does not reach a depth penetrating the glass layer 3. By peeling off the film resist 8, the state shown in FIG. 4 is reached. This is the via hole prepared hole forming step.

  Next, a via hole shape finishing process is performed. That is, blasting is performed on the upper surface of the glass layer 3. This blasting process is performed so that the recess or the hole becomes the via hole while partially removing the upper edge of the recess or the hole. As used herein, the “hole” refers to a hole penetrating the insulating layer. However, in this example, the case formed by the via hole pilot hole forming process is not “the hole” but “the concave portion”, that is, the concave portion that has not yet penetrated the insulating layer, such as the concave portion 9 shown in FIG. Continue to explain.

  By the blast processing performed in the via hole shape finishing process, the concave portion 9 becomes deeper and penetrates the glass layer 3 to the silicon layer 1 as shown in FIG. Since the upper surface of the glass layer 3 is removed by blasting over the entire surface, the glass layer 3 itself is thinned. At the same time, the edge of the recess 9 is partially removed by blasting and rounded. Thus, the recess 9 becomes the via hole 10. This is the via hole shape finishing process.

  Even when the hole formed in the via hole pilot hole forming step is a “hole” penetrating the insulating layer, the shape of the hole is further adjusted by blasting performed in the via hole shape finishing step, and a desired via hole is obtained.

  Next, a via hole conductive film finishing step is performed. In this step, a conductive film is formed so as to continuously cover the inner surface of the via hole and the upper surface of the insulating layer. For example, the conductive film 11 is formed in the via hole 10 as shown in FIG.

(Action / Effect)
In this embodiment, the upper end of the via hole does not form a sharp edge with the insulating layer, but is processed to have a rounded and gentle surface. Therefore, a conductive film as a wiring is formed in the via hole. When forming, it can be reliably and continuously formed without disconnection.

  FIG. 7 shows a comparison of the measurement results of the cross-sectional shapes of the via hole according to the prior art and the via hole when finished in the present embodiment. The unit of the vertical axis and the horizontal axis is μm. Curve 91 represents the cross-sectional shape of the via hole according to the prior art, and curve 93 represents the cross-sectional shape of the via hole obtained by the manufacturing method according to the present embodiment. In FIG. 7, in the prior art, the upper edge of the via hole is sharp and square as shown by a circle A, whereas in this embodiment, the upper edge of the via hole is gentle as shown by an ellipse B. It can be confirmed.

  In the present embodiment, the blasting process is divided into two stages. First, half processing is performed as a via hole pilot hole forming process, and then the film resist 8 is removed. Thereafter, further blasting is performed as a via hole shape finishing process. FIG. 8 shows a cross-sectional shape immediately after each of these two stages of blasting. A curve 92 represents the cross-sectional shape of the via hole immediately after half processing, that is, the cross-sectional shape of the via hole obtained in the via hole prepared hole forming step, and a curve 93 represents the cross-sectional shape of the via hole obtained in the via hole shape finishing step. From FIG. 8, it can be read that the upper surface of the insulating layer is also cut by blasting in portions other than the via holes.

  In addition, it is preferable that what is formed at the said via-hole pilot hole formation process is the said recessed part provided in the said upper surface without penetrating the said insulating layer. The effect of the present invention can be obtained even when the concave portion has already penetrated the insulating layer at the time of completing the via hole pilot hole forming step, that is, “hole”, but the concave portion is insulated in the via hole pilot hole forming step. It is more convenient that the layer does not penetrate the layer because the insulating layer can be penetrated to form a via hole having a small diameter for the first time by blasting performed in the subsequent process.

  7 and 8, for convenience of explanation, the lower end of the curve 93 indicating the cross-sectional shape of the via hole is in a closed state, but actually the lower end of the via hole is opened by reaching the lower surface of the insulating layer. is doing.

Furthermore, the lower layer is preferably a conductive layer or a semiconductor layer.
Furthermore, the via hole is preferably formed in a shape in which the opening area becomes smaller toward the bottom. The side of the via hole has a shape in which the opening area becomes smaller toward the bottom rather than standing vertically, the edge of the via hole can be made gentler, and disconnection can be more reliably prevented. Because.

(Embodiment 2)
(Production method)
With reference to FIGS. 9-15, the manufacturing method of the board | substrate in Embodiment 2 based on this invention is demonstrated. The manufacturing method of the substrate in the present embodiment is the same as that described in the first embodiment, but the substrate obtained by this manufacturing method is used for an angular velocity sensor.

  First, FIG. 9 shows a plan view of an angular velocity sensor obtained by the substrate manufacturing method in the present embodiment. Here, a large number of cavities are arranged in a plane. An enlarged view of a part of the cross section is shown in FIG. The angular velocity sensor 250 has a structure in which a glass substrate 203a, a silicon substrate 201, and a glass substrate 203b are stacked, and a plurality of cavities 205 are provided therein. Inside each cavity 205, the silicon substrate 201 is processed into a predetermined planar shape, floats in a bridge shape, and is supported by other portions. A via hole 210 is formed between the cavities 205 so as to penetrate the glass substrate 203 a and reach the silicon substrate 201, and a metal wiring 211 is provided so as to cover the inner surface and the bottom surface of the via hole 210.

  First, as shown in FIG. 11, a glass substrate 203a as an insulating layer is pasted on a silicon substrate 201 as a lower layer. A glass substrate 203b is also attached to the lower side of the silicon layer 201 as a lower layer. A cavity 205 is formed inside these laminates. Inside the cavity 205, a portion where the silicon layer 201 is processed into a predetermined shape is held in a bridge shape. At this time, the upper surface of the glass substrate 203a is flat.

  In this state, a via hole pilot hole forming step is performed. That is, as shown in FIG. 12, a film resist 208 is formed on the upper surface of the glass substrate 203a. The film resist 208 is once provided on the entire surface and then patterned. In this state, blasting is performed on the upper surface of the glass substrate 203a. Blasting at this stage corresponds to the “half processing” described in the first embodiment. This half process leads to the state shown in FIG. At this point, the glass substrate 203a is dug in a region not covered with the film resist 208 to form a recess 209, but the recess 209 has not reached a depth penetrating the glass substrate 203a. By peeling the film resist 208, the state shown in FIG. 14 is reached. This is the via hole prepared hole forming step.

  Next, a via hole shape finishing process is performed. That is, blasting is performed on the upper surface of the glass substrate 203a. This blasting process is performed so that the recess or the hole becomes the via hole while partially removing the upper edge of the recess or the hole. In the present embodiment, this blasting makes the recess 209 deeper, and penetrates the glass substrate 203a to reach the silicon substrate 201 as shown in FIG. Since the entire upper surface of the glass substrate 203a is removed by blasting, the glass substrate 203a itself is thin. At the same time, the edge of the recess 209 is partially removed by blasting and rounded. Thus, the recess 209 becomes a via hole 210. This is the via hole shape finishing process.

  Next, a via hole conductive film finishing step is performed. In this step, a conductive film is formed so as to cover the inner surface of the via hole and the lower layer exposed as the bottom surface of the via hole. By forming the metal wiring 211 in the via hole 210, the angular velocity shown in FIG. A sensor structure can be obtained.

(Action / Effect)
In this embodiment, the upper end of the via hole provided in the angular velocity sensor is processed to have a rounded and gentle surface instead of a sharp edge with the insulating layer. When forming the wiring, it can be surely continuously formed without disconnection.

(Embodiment 3)
(Constitution)
The configuration of the substrate will be described as a third embodiment based on the present invention. Although there are portions that overlap with the configuration already shown in the description of the manufacturing method in the first and second embodiments, it will be described again to clarify the characteristics of the substrate based on the present invention.

  The substrate in the present embodiment includes a lower layer, an insulating layer having an upper surface that overlaps the upper side of the lower layer, and has a via hole penetrating so as to expose the lower layer, an inner surface of the via hole, and the insulating layer A conductive film that continuously covers the upper surface of the via hole, the upper edge of the via hole is rounded, and the upper surface of the insulating layer has a blasted trace.

  That is, as a first example, the substrate shown in FIG. 6 may be used, and this substrate has a silicon layer 1 as a lower layer and an upper surface, an upper surface, and the silicon layer 1 is exposed. And an electrically conductive film 11 that continuously covers the inner surface of the via hole 10 and the upper surface of the glass layer 3. The upper edge of the via hole 10 is rounded. The upper surface of the glass layer 3 has a blasted trace.

  As a second example, what is shown in FIG. 10 may be used. This substrate is an angular velocity sensor, and includes a silicon substrate 201 as a lower layer, a glass substrate 203a as an insulating layer that has an upper surface and overlaps with the upper surface to expose the silicon substrate 201, and a via hole 210. Metal wiring 211 continuously covering the inner surface and the upper surface of the glass substrate 203a. The upper edge of the via hole 210 is rounded. The upper surface of the glass substrate 203a has a blasted trace.

The lower layer is preferably a conductive layer or a semiconductor layer.
The conductive layer or the semiconductor layer is preferably recessed at the bottom of the via hole. Even if the conductive layer or the semiconductor layer as the lower layer is not recessed at the bottom of the via hole, the electrical connection can be made by the conductive film, but the connection can be more surely made when the recess is formed.

  The via hole preferably has an opening area that decreases toward the bottom. This is because the edge of the via hole can be made smoother and the electrical connection by forming the conductive film can be made more reliable.

  The roundness of the upper edge of the via hole preferably has a radius of curvature as viewed in cross-sectional shape that is 1/10 or more of the diameter at the upper end of the via hole. That is, as shown in FIG. 16, the radius of curvature R of the roundness at the upper edge of the via hole is preferably 1/10 or more of the diameter D at the upper end of the via hole. Since the upper part of the via hole has such a roundness, when forming the metal wiring in the via hole, the metal wiring can be continuously formed more reliably avoiding disconnection.

  In FIG. 16, for convenience of explanation, the lower end of the curve 93 indicating the cross-sectional shape of the via hole is in a closed state, but the lower end of the via hole is actually opened by reaching the lower surface of the insulating layer.

  The electronic component based on this invention is an electronic component provided with one of the above-mentioned board | substrates. With such an electronic component, the probability of occurrence of disconnection can be extremely low, and a highly reliable electronic component can be obtained.

  The semiconductor device according to the present invention includes any one of the above-described substrates in which the insulating layer is a glass substrate and the lower layer is a silicon substrate. With such a semiconductor device, the probability of occurrence of disconnection can be suppressed extremely low, and a highly reliable semiconductor device can be obtained.

  As the “blasting”, sandblasting is typical. The concept of “blasting” includes dry blasting, in which particles of metal, ceramic, glass, plastic, etc. are sprayed on a gas flow, and wet, in which the aforementioned particles are sprayed on a flow of liquid, such as water. Includes both concepts of blasting.

  In the embodiment, the example in which the via hole prepared hole forming step is performed by blasting has been shown, but a processing method other than blasting may be used in this step. For example, laser processing, dry etching, drilling, or the like may be used.

  The present invention is applicable to various electronic components having a substrate on which a via hole is formed. Furthermore, the present invention is not limited to the substrate constituting the electronic component itself, and can be applied to various substrates such as a mounting substrate.

  In addition, the said embodiment disclosed this time is an illustration in all the points, Comprising: It is not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and includes all modifications within the scope and meaning equivalent to the terms of the claims.

It is explanatory drawing of the 1st process of the manufacturing method of the board | substrate in Embodiment 1 based on this invention. It is explanatory drawing of the 2nd process of the manufacturing method of the board | substrate in Embodiment 1 based on this invention. It is explanatory drawing of the 3rd process of the manufacturing method of the board | substrate in Embodiment 1 based on this invention. It is explanatory drawing of the 4th process of the manufacturing method of the board | substrate in Embodiment 1 based on this invention. It is explanatory drawing of the 5th process of the manufacturing method of the board | substrate in Embodiment 1 based on this invention. It is explanatory drawing of the 6th process of the manufacturing method of the board | substrate in Embodiment 1 based on this invention. It is a graph which compares the cross-sectional shape of the via hole by a prior art, and the cross-sectional shape of the via hole at the time of finishing in Embodiment 1 based on this invention. It is a graph which compares the cross-sectional shape immediately after each of the two-stage blasting of the manufacturing method of the board | substrate in Embodiment 1 based on this invention. It is a top view of the angular velocity sensor obtained with the manufacturing method of the board | substrate in Embodiment 2 based on this invention. It is a fragmentary sectional view of the angular velocity sensor obtained with the manufacturing method of the board | substrate in Embodiment 2 based on this invention. It is explanatory drawing of the 1st process of the manufacturing method of the board | substrate in Embodiment 2 based on this invention. It is explanatory drawing of the 2nd process of the manufacturing method of the board | substrate in Embodiment 2 based on this invention. It is explanatory drawing of the 3rd process of the manufacturing method of the board | substrate in Embodiment 2 based on this invention. It is explanatory drawing of the 4th process of the manufacturing method of the board | substrate in Embodiment 2 based on this invention. It is explanatory drawing of the 5th process of the manufacturing method of the board | substrate in Embodiment 2 based on this invention. It is explanatory drawing regarding the roundness of the upper edge of the via hole formed in the board | substrate in Embodiment 3 based on this invention. It is sectional drawing of the via hole vicinity of the 1st example of the board | substrate based on a prior art. It is sectional drawing of the via hole vicinity of the 2nd example of the board | substrate based on a prior art.

Explanation of symbols

  1 Silicon layer, 3 glass layer, 8,208 film resist, 9,209 recess, 10,106,210 via hole, 11 conductive film, 12 edge, 91,92,93 curve, 103 insulating layer, 105 lower layer, 107 metal Membrane, 201 silicon substrate, 203a, 203b glass substrate, 205 cavity, 211 metal wiring, 250 angular velocity sensor.

Claims (11)

The lower layer,
An insulating layer that overlaps the upper side of the lower layer, has an upper surface, and has a via hole that penetrates to expose the lower layer;
A method of manufacturing a substrate comprising a conductive film covering an inner surface of the via hole,
A via hole pilot hole forming step for forming a recess in the upper surface or forming a through hole so as to expose the lower layer on the upper surface with respect to the insulating layer;
A via hole shape finishing step in which the upper surface of the insulating layer is subjected to blasting to partially remove the upper edge of the recess or the hole while processing the recess or the hole to be the via hole; ,
A method of manufacturing a substrate, comprising: a via hole conductive film finishing step of forming a conductive film so as to continuously cover an inner surface of the via hole and an upper surface of the insulating layer.   2. The method of manufacturing a substrate according to claim 1, wherein what is formed in the via hole prepared hole forming step is the concave portion provided on the upper surface without penetrating the insulating layer.   The method for manufacturing a substrate according to claim 1, wherein the lower layer is a conductive layer or a semiconductor layer.   The substrate manufacturing method according to claim 1, wherein the via hole is formed in a shape in which an opening area becomes smaller toward a bottom portion. The lower layer,
An insulating layer that overlaps the upper side of the lower layer, has an upper surface, and has a via hole that penetrates to expose the lower layer;
A conductive film continuously covering the inner surface of the via hole and the upper surface of the insulating layer;
The board | substrate with which the upper edge of the said via hole is rounded, and the upper surface of the said insulating layer has the trace by which the blasting process was carried out.   The substrate according to claim 5, wherein the lower layer is a conductive layer or a semiconductor layer.   The substrate according to claim 6, wherein the conductive layer or the semiconductor layer is recessed at the bottom of the via hole.   The substrate according to claim 5, wherein the via hole has an opening area that decreases toward the bottom.   The substrate according to any one of claims 5 to 8, wherein the roundness of the upper edge of the via hole has a radius of curvature when viewed in a cross-sectional shape that is 1/10 or more of a diameter at an upper end of the via hole.   An electronic component comprising the substrate according to claim 5.   A semiconductor device comprising the substrate according to claim 5, wherein the insulating layer is a glass substrate and the lower layer is a silicon substrate.

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