JP2008283133A - Multilayer wiring board for mounting light-emitting device, and its manufacturing method - Google Patents
Multilayer wiring board for mounting light-emitting device, and its manufacturing method Download PDFInfo
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- JP2008283133A JP2008283133A JP2007128317A JP2007128317A JP2008283133A JP 2008283133 A JP2008283133 A JP 2008283133A JP 2007128317 A JP2007128317 A JP 2007128317A JP 2007128317 A JP2007128317 A JP 2007128317A JP 2008283133 A JP2008283133 A JP 2008283133A
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- 239000010949 copper Substances 0.000 claims abstract description 127
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 126
- 239000000758 substrate Substances 0.000 claims abstract description 61
- 239000000919 ceramic Substances 0.000 claims abstract description 60
- 239000004020 conductor Substances 0.000 claims abstract description 32
- 239000003870 refractory metal Substances 0.000 claims abstract description 22
- 238000007639 printing Methods 0.000 claims abstract description 14
- 238000007747 plating Methods 0.000 claims description 54
- 238000000034 method Methods 0.000 claims description 36
- 238000010304 firing Methods 0.000 claims description 7
- 238000005498 polishing Methods 0.000 claims description 6
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- 238000000151 deposition Methods 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims description 4
- 238000009499 grossing Methods 0.000 claims description 2
- 230000017525 heat dissipation Effects 0.000 abstract description 15
- 239000010410 layer Substances 0.000 description 78
- 239000010408 film Substances 0.000 description 62
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 36
- 229910052759 nickel Inorganic materials 0.000 description 18
- 239000000463 material Substances 0.000 description 15
- 238000010586 diagram Methods 0.000 description 11
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- 239000002344 surface layer Substances 0.000 description 7
- 230000000694 effects Effects 0.000 description 6
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 6
- 229910052721 tungsten Inorganic materials 0.000 description 6
- 239000010937 tungsten Substances 0.000 description 6
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 5
- 238000009713 electroplating Methods 0.000 description 5
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- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 4
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 3
- 229910002480 Cu-O Inorganic materials 0.000 description 3
- 230000005496 eutectics Effects 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 2
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 2
- 239000011230 binding agent Substances 0.000 description 2
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- 230000007797 corrosion Effects 0.000 description 2
- 229960003280 cupric chloride Drugs 0.000 description 2
- 239000002270 dispersing agent Substances 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 2
- 239000007791 liquid phase Substances 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
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- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- ODINCKMPIJJUCX-UHFFFAOYSA-N Calcium oxide Chemical compound [Ca]=O ODINCKMPIJJUCX-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N Magnesium oxide Chemical compound [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000012300 argon atmosphere Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 239000004014 plasticizer Substances 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
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- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000006104 solid solution Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
Landscapes
- Led Device Packages (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
本発明は、発光ダイオード（ＬＥＤ：Light Emitting Diode）などの発光素子を実装するための多層配線基板とその製造方法に関し、特に発光素子を実装する電極部が放熱性と平坦性に優れており、かつ、内層や表層に微細な導体配線パターンを形成することができる発光素子実装用多層配線基板とその製造方法に関する。 The present invention relates to a multilayer wiring board for mounting a light emitting element such as a light emitting diode (LED) and a manufacturing method thereof, and in particular, an electrode portion on which the light emitting element is mounted has excellent heat dissipation and flatness. In addition, the present invention relates to a multilayer wiring board for mounting a light emitting element capable of forming a fine conductor wiring pattern on an inner layer or a surface layer, and a manufacturing method thereof.
一般に、発光ダイオード等の発光素子はセラミックや樹脂などからなるパッケージ（以下、発光素子収納用パッケージという。）に収納されて各種基板上に実装される。そして、これらの基板は、さらに別の装置へと組み込まれる。このような装置は、近年、小型・薄型化及び高性能化の傾向にある。これに伴い、発光素子収納用パッケージには、小型化及び薄型化に加え、高放熱性や耐光性の要求がますます高まっている。そして、発光素子が実装された基板を組み込んだ上述の装置の中でも、一般照明として用いられるものについては、特に、安価であることが必要とされている。そこで、従来、このような要求を満たすべく、発光素子収納用パッケージや発光素子を実装する配線基板について盛んに研究や開発が行われており、既にそれらに関して幾つかの発明や考案が開示されている。 Generally, a light emitting element such as a light emitting diode is housed in a package made of ceramic or resin (hereinafter referred to as a light emitting element housing package) and mounted on various substrates. These substrates are then incorporated into another device. In recent years, such devices tend to be smaller, thinner and higher performance. As a result, in addition to miniaturization and thinning of the light emitting element storage package, there is an increasing demand for high heat dissipation and light resistance. And among the above-mentioned apparatuses incorporating a substrate on which a light emitting element is mounted, those used as general illumination are particularly required to be inexpensive. Therefore, conventionally, in order to satisfy such requirements, active research and development have been conducted on a light emitting element storage package and a wiring board on which the light emitting element is mounted, and some inventions and devices have already been disclosed in connection with them. Yes.
例えば、特許文献１には、「半導体発光装置」という名称で、半導体発光素子を基板にフリップチップ実装することにより、全体の薄型化を可能とする半導体発光装置に関する発明が開示されている。
特許文献１に開示された発明は、発光素子のｎ側電極及びｐ側電極を、セラミック製の基板上に形成された２つの電極に対してマイクロバンプを介してそれぞれ接合した構造となっている。
このような構造の「半導体発光装置」においては、セラミック素材を用いているため、基板が化学的に安定しており、表面にリード電極を精度よく形成することができる。また、耐熱性に優れるため、マイクロバンプの接合時に加えられる熱によっても軟化・変形するおそれがない。さらに、ボンディングワイヤを使用しないため、パッケージの高さを低くすることができる。
For example, Patent Document 1 discloses an invention relating to a semiconductor light-emitting device that can be thinned as a whole by flip-chip mounting a semiconductor light-emitting element on a substrate under the name “semiconductor light-emitting device”.
The invention disclosed in Patent Document 1 has a structure in which an n-side electrode and a p-side electrode of a light emitting element are joined to two electrodes formed on a ceramic substrate through micro bumps. .
In the “semiconductor light emitting device” having such a structure, since the ceramic material is used, the substrate is chemically stable, and the lead electrode can be accurately formed on the surface. Moreover, since it is excellent in heat resistance, there is no possibility of being softened or deformed by heat applied during the bonding of the micro bumps. Further, since no bonding wire is used, the height of the package can be reduced.
しかしながら、上述の従来技術である特許文献１に開示された発明においては、発光素子が実装される電極の平坦性を確保することが難しい。発光素子を実装する電極が平坦でない場合、通常、発光素子と電極との間に介在するＡｕバンプ等からなる接合材を厚く形成することで電極の凹凸を吸収し、発光素子を所望の姿勢に保つことが行われる。しかし、この場合には多くの接合材が必要となり、材料コストがアップする。また、一般に、接合材の熱伝導率は小さいため、接合材を厚くすると、発光素子と電極部との間の熱伝導性が悪化する。一方、接合材を薄くすると、前述の電極の凹凸が十分に吸収されないため、電極と発光素子との密着性が低下し、同様に発光素子と電極部との間の熱伝導性が悪化する。すなわち、電極の平坦性が確保されないと、放熱が不十分となり、発光素子の温度が上昇する。その結果、発光効率が低下する。さらに、特許文献１に開示された発明においては、発光素子を実装する電極が高価な金属等と高価な設備や装置を用いた薄膜法や蒸着法で形成されるため、パッケージのコストが高くなることに加え、電極による十分な放熱効果が期待できないという課題があった。また、例えば、複数の電極を１枚の配線基板に形成して複数のパッケージをまとめて製造する場合やシートアレイタイプのパッケージのように複数の発光素子が同一パッケージ内に収納される場合、電極の平坦性が確保されないと発光素子を正確に搭載することができない。この場合、発光素子から出力される光の指向性が悪くなるため、製品の品質が低下する。 However, in the invention disclosed in Patent Document 1 which is the above-described prior art, it is difficult to ensure the flatness of the electrode on which the light emitting element is mounted. When the electrode on which the light-emitting element is mounted is not flat, normally, the unevenness of the electrode is absorbed by thickly forming a bonding material made of Au bumps or the like interposed between the light-emitting element and the electrode, so that the light-emitting element is in a desired posture It is done to keep. However, in this case, many bonding materials are required, and the material cost increases. In general, since the thermal conductivity of the bonding material is small, if the bonding material is thick, the thermal conductivity between the light emitting element and the electrode portion is deteriorated. On the other hand, if the bonding material is made thin, the unevenness of the electrode described above is not sufficiently absorbed, so that the adhesion between the electrode and the light emitting element is lowered, and similarly, the thermal conductivity between the light emitting element and the electrode portion is deteriorated. That is, if the flatness of the electrode is not ensured, heat dissipation is insufficient and the temperature of the light emitting element rises. As a result, the luminous efficiency decreases. Furthermore, in the invention disclosed in Patent Document 1, since the electrode for mounting the light emitting element is formed by a thin film method or a vapor deposition method using an expensive metal or the like and an expensive facility or apparatus, the cost of the package becomes high. In addition, there is a problem that a sufficient heat dissipation effect by the electrodes cannot be expected. In addition, for example, when a plurality of electrodes are formed on a single wiring board and a plurality of packages are manufactured together, or when a plurality of light emitting elements are housed in the same package as in a sheet array type package, the electrodes If the flatness is not ensured, the light emitting element cannot be mounted accurately. In this case, the directivity of light output from the light emitting element is deteriorated, so that the quality of the product is lowered.
本発明はかかる従来の事情に対処してなされたものであり、発光素子を実装する電極部が放熱性と平坦性に優れており、かつ、表層及び内層に微細な導体配線パターンを形成することが可能な発光素子実装用多層配線基板とその製造方法を提供することを目的とする。 The present invention has been made in view of such a conventional situation, and an electrode portion on which a light emitting element is mounted has excellent heat dissipation and flatness, and a fine conductor wiring pattern is formed on a surface layer and an inner layer. It is an object of the present invention to provide a multilayer wiring board for mounting a light emitting element and a method for manufacturing the same.
上記目的を達成するため、請求項１記載の発明である発光素子実装用多層配線基板は、セラミックを主成分とする複数の絶縁層と、銅を主成分とする電極と、高融点金属を主成分として複数の絶縁層の間に形成される導体層と、絶縁層に穿設される貫通孔に高融点金属が充填されて電極と導体層又は導体層同士を電気的に接続するビアとを備え、電極は銅ペーストの印刷・焼成によって絶縁層の外表面に形成される銅膜と、この銅膜上に被着された銅メッキ層とからなることを特徴とするものである。
上記構造の発光素子実装用多層配線基板においては、表面研磨によって電極の平坦性が容易に確保される。また、銅膜及び銅メッキ層によって形成される電極は熱伝導率が大きく、放熱性に優れるという作用を有する。さらに、上述のように電極の平坦性が確保されることから、熱伝導性の良くない接合材を厚く形成する必要がない。従って、発光素子と電極との間の熱伝導性が低下するおそれがない。そして、絶縁層はセラミックによって形成されるため、合成樹脂製に比べて耐光性及び放熱性に優れるという作用を有する。
In order to achieve the above object, a multilayer wiring board for mounting a light-emitting element according to claim 1 is mainly composed of a plurality of insulating layers mainly composed of ceramic, electrodes mainly composed of copper, and a refractory metal. A conductor layer formed as a component between a plurality of insulating layers, and a via hole formed in the insulating layer and filled with a refractory metal to electrically connect the electrode and the conductor layer or the conductor layers. The electrode includes a copper film formed on the outer surface of the insulating layer by printing and baking of copper paste, and a copper plating layer deposited on the copper film.
In the multilayer wiring board for mounting a light emitting element having the above structure, the flatness of the electrode is easily ensured by surface polishing. In addition, the electrode formed by the copper film and the copper plating layer has an effect that the thermal conductivity is large and the heat dissipation is excellent. Furthermore, since the flatness of the electrode is ensured as described above, it is not necessary to form a thick bonding material with poor thermal conductivity. Therefore, there is no possibility that the thermal conductivity between the light emitting element and the electrode is lowered. And since an insulating layer is formed with a ceramic, it has the effect | action that it is excellent in light resistance and heat dissipation compared with the product made from a synthetic resin.
請求項２記載の発明は、請求項１記載の発光素子実装用多層配線基板において、絶縁層は外表面が研磨されて平滑化されたものであることを特徴とするものである。
上記構成の発光素子実装用多層配線基板においては、電極の平坦性を確保することが請求項１記載の発明よりもさらに容易である。従って、請求項１記載の発明における電極の放熱作用がより一層発揮される。
According to a second aspect of the present invention, in the multilayer wiring substrate for mounting a light emitting element according to the first aspect, the insulating layer is smoothed by polishing the outer surface.
In the multilayer wiring board for mounting a light emitting element having the above-described configuration, it is easier to ensure the flatness of the electrodes than the invention according to claim 1. Therefore, the heat dissipation action of the electrode in the invention of claim 1 is further exhibited.
請求項３記載の発明である発光素子実装用多層配線基板の製造方法は、貫通孔を有する複数枚のセラミックグリーンシートのそれぞれに高融点金属を主成分とする導体ペーストを印刷するとともに、この導体ペーストを貫通孔に充填する工程と、セラミックグリーンシートを積層して積層体を形成する工程と、この積層体を還元性雰囲気中で焼成してセラミックからなる絶縁層と高融点金属からなる導体層と貫通孔内に充填された高融点金属からなるビアを有する積層セラミック基板を形成する工程と、絶縁層の最外表面にビアの露出部を覆って銅ペーストを印刷する工程と、この銅ペーストを焼成して銅膜を形成する工程と、この銅膜の表面にレジスト膜を形成するとともに、その一部を覆って露光し、所望の配線パターンに現像する工程と、レジスト膜に覆われていない銅膜の表面に銅メッキ層を被着して電極を形成する工程と、レジスト膜を除去する工程と、銅メッキ層が被着されていない箇所の銅膜を除去する工程とを備えたことを特徴とするものである。
このような発光素子実装用多層配線基板の製造方法によれば、絶縁層の最外表面に印刷された銅ペーストが焼成されて銅膜を形成する際に、その表面にＣｕ−Ｏ共晶液相が生成され、絶縁層に対する接合強度が高まるという作用を有する。また、メッキ処理により、銅膜上に厚い銅メッキ層が短時間に容易に形成されるという作用を有する。
According to a third aspect of the present invention, there is provided a method of manufacturing a multilayer wiring board for mounting a light emitting element, wherein a conductor paste mainly composed of a refractory metal is printed on each of a plurality of ceramic green sheets having through holes, and the conductor A step of filling the through holes with paste, a step of laminating ceramic green sheets to form a laminate, and firing the laminate in a reducing atmosphere to form an insulating layer made of ceramic and a conductor layer made of a refractory metal Forming a multilayer ceramic substrate having vias made of a refractory metal filled in the through holes, printing a copper paste on the outermost surface of the insulating layer, covering the exposed portions of the vias, and this copper paste Forming a copper film by baking the film, forming a resist film on the surface of the copper film, exposing a portion thereof, and developing to a desired wiring pattern A step of depositing a copper plating layer on the surface of the copper film not covered with the resist film to form an electrode, a step of removing the resist film, and a copper film at a portion where the copper plating layer is not deposited And a removing step.
According to such a method for manufacturing a multilayer wiring substrate for mounting a light emitting element, when a copper paste printed on the outermost surface of an insulating layer is baked to form a copper film, a Cu-O eutectic liquid is formed on the surface. A phase is generated and the bonding strength to the insulating layer is increased. Moreover, it has the effect | action that a thick copper plating layer is easily formed in a short time on a copper film by plating process.
請求項４記載の発明である発光素子実装用多層配線基板の製造方法は、貫通孔を有する複数枚のセラミックグリーンシートのそれぞれに高融点金属を主成分とする導体ペーストを印刷するとともに、この導体ペーストを貫通孔に充填する工程と、セラミックグリーンシートを積層して積層体を形成する工程と、この積層体を還元性雰囲気中で焼成してセラミックからなる絶縁層と高融点金属からなる導体層と貫通孔内に充填された高融点金属からなるビアを有する積層セラミック基板を形成する工程と、絶縁層の最外表面に前記ビアの露出部を覆って銅ペーストを印刷する工程と、この銅ペーストを焼成して銅膜を形成する工程と、この銅膜の表面に銅メッキ層を被着して電極を形成する工程と、この電極の表面にレジスト膜を形成するとともに、その一部を覆って露光し、所望の配線パターンに現像する工程と、レジスト膜に覆われていない銅メッキ層及びその下層の銅膜を除去して電極に導体配線パターンを形成する工程と、レジスト膜を除去する工程とを備えたことを特徴とするものである。
このような発光素子実装用多層配線基板の製造方法によれば、電極のエッジがだれることなく、シャープに形成されるという作用を有する。
According to a fourth aspect of the present invention, there is provided a method for manufacturing a multilayer wiring board for mounting a light emitting element, wherein a conductor paste mainly composed of a refractory metal is printed on each of a plurality of ceramic green sheets having through holes, and the conductor A step of filling the through holes with paste, a step of laminating ceramic green sheets to form a laminate, and firing the laminate in a reducing atmosphere to form an insulating layer made of ceramic and a conductor layer made of a refractory metal Forming a multilayer ceramic substrate having vias made of a refractory metal filled in the through holes, printing a copper paste covering the exposed portions of the vias on the outermost surface of the insulating layer, and the copper A step of baking a paste to form a copper film, a step of depositing a copper plating layer on the surface of the copper film to form an electrode, and a resist film being formed on the surface of the electrode In addition, a process of covering and exposing a part thereof, developing to a desired wiring pattern, and a process of forming a conductor wiring pattern on the electrode by removing the copper plating layer not covered with the resist film and the underlying copper film And a step of removing the resist film.
According to such a method for manufacturing a multilayer wiring board for mounting a light emitting element, there is an effect that the edge of the electrode is sharply formed without sagging.
請求項５記載の発明は、請求項３又は請求項４に記載の発光素子実装用多層配線基板の製造方法において、銅ペーストを印刷する工程の前に、絶縁層の最外表面を研磨して平滑化する工程を備えることを特徴とするものである。
このような発光素子実装用多層配線基板の製造方法によれば、絶縁層の最外表面に形成される電極の平坦性が容易に確保される。
According to a fifth aspect of the present invention, in the method for manufacturing a multilayer wiring board for mounting a light-emitting element according to the third or fourth aspect, the outermost surface of the insulating layer is polished before the step of printing the copper paste. A smoothing step is provided.
According to such a method for manufacturing a multilayer wiring substrate for mounting a light emitting element, the flatness of the electrode formed on the outermost surface of the insulating layer is easily ensured.
本発明の請求項１記載の発光素子実装用多層配線基板においては、表層及び内層に微細な導体配線パターンを形成することができる。また、本発明の発光素子実装用多層配線基板を用いて発光素子収納用パッケージを製造した場合、発光素子が実装される電極の放熱作用により、発光素子の温度上昇に伴う故障や発光効率の低下を防ぐことができる。さらに、接合材の材料コストを削減することが可能である。 In the multilayer wiring board for mounting a light emitting element according to claim 1 of the present invention, a fine conductor wiring pattern can be formed on the surface layer and the inner layer. In addition, when a light emitting element storage package is manufactured using the multilayer wiring substrate for mounting a light emitting element of the present invention, the heat radiation effect of the electrode on which the light emitting element is mounted causes a failure due to a temperature rise of the light emitting element or a decrease in light emission efficiency. Can be prevented. Furthermore, the material cost of the bonding material can be reduced.
また、本発明の請求項２記載の発光素子実装用多層配線基板においては、発光素子と電極の間に形成される接合材を薄くして発光素子を電極の上面に所望の姿勢で正確に接合することができる。従って、本発明の発光素子実装用多層配線基板を用いることによれば、発光効率が高く、個々のバラツキが少ない照明装置を安定した品質で製造することが可能である。 In the multilayer wiring substrate for mounting a light emitting element according to claim 2 of the present invention, the bonding material formed between the light emitting element and the electrode is thinned so that the light emitting element is accurately bonded to the upper surface of the electrode in a desired posture. can do. Therefore, according to the multilayer wiring board for mounting a light emitting element of the present invention, it is possible to manufacture a lighting device having high luminous efficiency and few individual variations with stable quality.
本発明の請求項３記載の発光素子実装用多層配線基板の製造方法によれば、絶縁層の最外表面に銅膜を強固に、かつ、安価に接合することができる。また、放熱性に優れた電極を容易に形成することができる。すなわち、本発明の製造方法によれば、温度上昇等に伴う発光素子の故障等が発生し難い発光素子収納用パッケージを製造するための発光素子実装用多層配線基板を安価に提供することが可能である。 According to the method for manufacturing a multilayer wiring substrate for mounting a light emitting element according to claim 3 of the present invention, the copper film can be bonded to the outermost surface of the insulating layer firmly and inexpensively. Moreover, the electrode excellent in heat dissipation can be formed easily. That is, according to the manufacturing method of the present invention, it is possible to inexpensively provide a multilayer wiring board for mounting a light emitting element for manufacturing a light emitting element storage package that is unlikely to cause a failure of the light emitting element due to a temperature rise or the like. It is.
本発明の請求項４記載の発光素子実装用多層配線基板の製造方法によれば、微細な配線パターンを有する電極を容易に形成することができる。 According to the method for manufacturing a multilayer wiring board for mounting a light emitting element according to claim 4 of the present invention, an electrode having a fine wiring pattern can be easily formed.
本発明の請求項５記載の発光素子実装用多層配線基板の製造方法によれば、請求項２記載の発光素子実装用多層配線基板を安価に、かつ容易に提供することができる。 According to the method for manufacturing a multilayer wiring board for mounting a light emitting element according to claim 5 of the present invention, the multilayer wiring board for mounting a light emitting element according to claim 2 can be provided inexpensively and easily.
以下に、本発明の最良の実施の形態に係る発光素子実装用多層配線基板とその製造方法の実施例について説明する。 Examples of the multilayer wiring board for mounting light emitting elements and the manufacturing method thereof according to the best mode for carrying out the invention will be described below.
本実施例の発光素子実装用多層配線基板の構造について図１及び図２を用いて説明する（特に、請求項１及び請求項２に対応）。
図１は本発明の実施の形態に係る発光素子収納用パッケージの実施例１の構成を説明するための断面模式図である。また、図２（ａ）及び（ｂ）はそれぞれ実施例１の発光素子実装用多層配線基板の平面図及び正面図である。
図１に示すように、発光素子収納用パッケージ１３は、両面に発光素子実装用電極４ａ，４ｂ及び端子部５ａ，５ｂが形成された積層セラミック基板２からなる発光素子実装用多層配線基板１の上面に、発光素子９を気密に封止するための反射リング１４が接合され、その上部に集光レンズ（図示せず）が覆設されたものである。また、積層セラミック基板２はセラミックを主成分とする絶縁層６と、タングステン又はモリブデンなどの高融点金属を主成分とする導体層７が交互に積層された構造となっている。そして、絶縁層６には貫通孔が穿設されており、この貫通孔は内部にタングステン又はモリブデンなどの高融点金属が充填されて、いわゆるビア８を形成している。なお、発光素子実装用電極４ａ，４ｂと導体層７の間、各導体層７の間及び導体層７と端子部５ａ，５ｂの間は、このビア８によって互いに電気的に接続されている。
また、発光素子９はＡｕＳｎ、半田、異方性フィルム又は金バンプなどから形成される接続用バンプ１０などの接合材を介して発光素子実装用電極４ａ，４ｂにフリップチップ実装されている。すなわち、接続用バンプ１０と発光素子実装用電極４ａ，４ｂとビア８と導体層７を介して、発光素子９は端子部５ａ，５ｂと電気的に接続されている。
なお、積層セラミック基板２の表面は、研磨されて平滑化されている。また、積層セラミック基板２の表面に露出したビア８の上部にはニッケルメッキ（図示せず）が施されている。すなわち、ビア８の内部に充填されたタングステン又はモリブデンなどの高融点金属はニッケルメッキを介して発光素子実装用電極４ａ，４ｂに接触している。一般に、ニッケルと銅との接合力は弱いため、発光素子実装用電極４ａ，４ｂとニッケルメッキとの間の接合強度を確保することは容易でない。しかし、後述するように銅はセラミックに対して強固に接合され得る。また、本実施例の場合、発光素子実装用電極４ａ，４ｂは０．４ｍｍ×０．７ｍｍの矩形状であり、ビア８を形成する貫通孔は断面が直径０．１ｍｍの円形である。そして、発光素子実装用電極４ａ，４ｂのニッケルメッキに接触する面積は、上記貫通孔の断面積と略等しい。すなわち、発光素子実装用電極４ａ，４ｂのニッケルメッキに接触する面積は、セラミックを主成分とする絶縁層６に発光素子実装用電極４ａ，４ｂが接触する面積に比べて狭くなっている。従って、発光素子実装用電極４ａ，４ｂは、ニッケルメッキとの接触箇所においては接合強度が弱いものの、全体としてみれば、積層セラミック基板２に対して強固に接合されることになる。なお、通常、ビア８を形成する貫通孔の端縁からニッケルメッキがわずかにはみ出して形成されることが多いが、この場合でも、ビア８の上部を形成するニッケルメッキと発光素子実装用電極４ａ，４ｂが接触する面積は、上述のとおりビア８を形成する貫通孔の断面積と略等しいものと考えて差し支えない。
The structure of the multilayer wiring board for mounting light emitting elements of this embodiment will be described with reference to FIGS. 1 and 2 (particularly, corresponding to claims 1 and 2).
FIG. 1 is a schematic cross-sectional view for explaining the configuration of Example 1 of the light emitting element storage package according to the embodiment of the present invention. FIGS. 2A and 2B are a plan view and a front view, respectively, of the multilayer wiring board for mounting light emitting elements of Example 1. FIG.
As shown in FIG. 1, a light emitting element housing package 13 is a light emitting element mounting multilayer wiring board 1 comprising a laminated ceramic substrate 2 having light emitting element mounting electrodes 4a and 4b and terminal portions 5a and 5b formed on both sides. A reflection ring 14 for hermetically sealing the light emitting element 9 is bonded to the upper surface, and a condensing lens (not shown) is covered on the upper portion. The laminated ceramic substrate 2 has a structure in which insulating layers 6 mainly composed of ceramic and conductor layers 7 mainly composed of a refractory metal such as tungsten or molybdenum are alternately laminated. A through hole is formed in the insulating layer 6, and the through hole is filled with a refractory metal such as tungsten or molybdenum to form a so-called via 8. The light emitting element mounting electrodes 4a and 4b and the conductor layer 7, the conductor layers 7, and the conductor layer 7 and the terminal portions 5a and 5b are electrically connected to each other by the vias 8.
The light emitting element 9 is flip-chip mounted on the light emitting element mounting electrodes 4a and 4b via a bonding material such as a connection bump 10 formed of AuSn, solder, anisotropic film, gold bump or the like. That is, the light emitting element 9 is electrically connected to the terminal portions 5 a and 5 b through the connection bump 10, the light emitting element mounting electrodes 4 a and 4 b, the via 8, and the conductor layer 7.
Note that the surface of the multilayer ceramic substrate 2 is polished and smoothed. Further, nickel plating (not shown) is applied to the upper portion of the via 8 exposed on the surface of the multilayer ceramic substrate 2. That is, the high melting point metal such as tungsten or molybdenum filled in the via 8 is in contact with the light emitting element mounting electrodes 4a and 4b through nickel plating. In general, since the bonding force between nickel and copper is weak, it is not easy to ensure the bonding strength between the light emitting element mounting electrodes 4a and 4b and the nickel plating. However, as will be described later, copper can be firmly bonded to the ceramic. In the case of the present embodiment, the light emitting element mounting electrodes 4a and 4b have a rectangular shape of 0.4 mm × 0.7 mm, and the through hole forming the via 8 has a circular shape with a cross section of 0.1 mm in diameter. The area of the light emitting element mounting electrodes 4a, 4b that contacts the nickel plating is substantially equal to the cross-sectional area of the through hole. That is, the area where the light emitting element mounting electrodes 4a and 4b are in contact with the nickel plating is narrower than the area where the light emitting element mounting electrodes 4a and 4b are in contact with the insulating layer 6 mainly composed of ceramic. Accordingly, the light emitting element mounting electrodes 4a and 4b are firmly bonded to the multilayer ceramic substrate 2 as a whole, although the bonding strength is weak at the contact point with the nickel plating. Usually, nickel plating slightly protrudes from the edge of the through-hole forming the via 8, but even in this case, the nickel plating forming the upper portion of the via 8 and the light emitting element mounting electrode 4a are formed. , 4b may be considered to be substantially equal to the cross-sectional area of the through hole forming the via 8 as described above.
加えて、発光素子実装用電極４ａ，４ｂは、ビア８の上部を形成するニッケルメッキが積層セラミック基板２の表面に露出した部分の外側を全周に亘って取り囲むように形成されている。すなわち、発光素子実装用電極４ａ，４ｂは上述のニッケルメッキが露出した部分を越えて、強い接合強度を確保することができる絶縁層６に対して切れ目なく接合されているため、ニッケルメッキと発光素子実装用電極４ａ，４ｂとの接合強度が弱くとも、発光素子実装用電極４ａ，４ｂは絶縁層６から剥がれ難くなっている。 In addition, the light emitting element mounting electrodes 4 a and 4 b are formed so as to surround the entire outer periphery of the portion where the nickel plating forming the upper portion of the via 8 is exposed on the surface of the multilayer ceramic substrate 2. That is, since the light emitting element mounting electrodes 4a and 4b are joined seamlessly to the insulating layer 6 that can ensure a strong joint strength beyond the exposed portion of the nickel plating, the light emitting element mounting electrodes 4a and 4b emit light. Even if the bonding strength with the element mounting electrodes 4a and 4b is weak, the light emitting element mounting electrodes 4a and 4b are hardly separated from the insulating layer 6.
通常、発光素子収納用パッケージ１３は生産性を高めるために、１枚の発光素子実装用多層配線基板１に複数の発光素子９を実装した後、個片分割する方法によって製造される。このような発光素子実装用多層配線基板１は、例えば、図２（ａ）及び（ｂ）に示すように、積層セラミック基板２の表面に発光素子実装用電極４ａ，４ｂ及び端子部５ａ，５ｂがそれぞれ形成された構造となっている。図２（ａ）には発光素子実装用電極４ａ，４ｂのみが示され、端子部５ａ，５ｂは示されていないが、端子部５ａ，５ｂは発光素子実装用電極４ａ，４ｂが形成された面と反対側の面に、縦横に複数列ずつ区切られて同様に配列されている。また、発光素子実装用電極４ａ，４ｂ及び端子部５ａ，５ｂは銅ペーストの印刷・焼成によって形成される銅膜（図示せず）と、その表面に被着された銅メッキ層（図示せず）とから形成されている。なお、端子部５ａ，５ｂについては、このような方法に限らず、例えば、タングステンやモリブデンなどの高融点金属の導体ペーストを印刷・焼成することにより形成しても良い。 In general, the light emitting element storage package 13 is manufactured by a method of dividing a plurality of light emitting elements 9 on a single light emitting element mounting multilayer wiring substrate 1 and then dividing it into individual pieces in order to increase productivity. Such a multilayer wiring substrate 1 for mounting light-emitting elements includes, for example, light-emitting element mounting electrodes 4a and 4b and terminal portions 5a and 5b on the surface of a multilayer ceramic substrate 2, as shown in FIGS. 2 (a) and 2 (b). Each has a structure formed. In FIG. 2A, only the light emitting element mounting electrodes 4a and 4b are shown, and the terminal portions 5a and 5b are not shown, but the light emitting element mounting electrodes 4a and 4b are formed in the terminal portions 5a and 5b. A plurality of rows are divided in the vertical and horizontal directions on the surface opposite to the surface in the same manner. The light emitting element mounting electrodes 4a and 4b and the terminal portions 5a and 5b are made of a copper film (not shown) formed by printing and baking copper paste, and a copper plating layer (not shown) deposited on the surface thereof. ). The terminal portions 5a and 5b are not limited to such a method, and may be formed by printing and baking a high melting point metal conductor paste such as tungsten or molybdenum.
このような構造の発光素子実装用多層配線基板１においては、熱伝導率の大きい材料である銅を主成分とする発光素子実装用電極４ａ，４ｂが発光素子９によって発生した熱を速やかに外部へと逃がすように作用する。そして、積層セラミック基板２はセラミックが主成分であるため、合成樹脂製の基板に比べて耐光性及び放熱性に優れている。さらに、積層セラミック基板２は表面が研磨され、平滑化されており、また、発光素子実装用電極４ａ，４ｂは表面研磨によって平坦性が容易に確保される。従って、接続用バンプ１０を厚く形成する必要がないことから、発光素子９の発光素子実装用電極４ａ，４ｂに対する密着性が向上する。そのため、発光素子９と発光素子実装用電極４ａ，４ｂとの間の熱伝導性が悪化するおそれがない。また、接続用バンプ１０の熱伝導率が小さい場合でも、発光素子９と発光素子実装用電極４ａ，４ｂとの間の熱伝導性は阻害され難い。 In the multilayer wiring substrate 1 for mounting a light emitting element having such a structure, the light emitting element mounting electrodes 4a and 4b mainly composed of copper, which is a material having a high thermal conductivity, quickly remove the heat generated by the light emitting element 9 from the outside. Acts to escape. Since the multilayer ceramic substrate 2 is mainly composed of ceramic, it is superior in light resistance and heat dissipation compared with a synthetic resin substrate. Furthermore, the surface of the multilayer ceramic substrate 2 is polished and smoothed, and the flatness of the light emitting element mounting electrodes 4a and 4b is easily ensured by surface polishing. Accordingly, since it is not necessary to form the connection bump 10 thickly, the adhesion of the light emitting element 9 to the light emitting element mounting electrodes 4a and 4b is improved. Therefore, there is no possibility that the thermal conductivity between the light emitting element 9 and the light emitting element mounting electrodes 4a and 4b is deteriorated. Further, even when the thermal conductivity of the connection bump 10 is small, the thermal conductivity between the light emitting element 9 and the light emitting element mounting electrodes 4a and 4b is hardly hindered.
以上説明したように、本実施例の発光素子実装用多層配線基板１は、多層構造のため、内層配線が可能であり、配線設計の自由度が高い。さらに、発光素子実装用多層配線基板１を用いて発光素子収納用パッケージを製造する場合、発光素子実装用電極４ａ，４ｂの放熱作用が十分に発揮されるため、温度上昇による発光素子９の故障が発生し難く、また、発光効率も低下し難い。そして、接続用バンプ１０を薄くできるため、発光素子９を電極４ａ，４ｂの上面に所望の姿勢で正確に接合することが可能となる。このような発光素子実装用多層配線基板１を用いることによれば、発光効率が高く、個々のバラツキが少ない照明装置を安定した品質で製造することができる。また、発光素子９が電極４ａ，４ｂの上面に正確に実装されることから、発光素子９から出力される光の指向性が向上する。これにより、例えば、複数の発光素子９を同一のパッケージ内に備えた照明装置を安定した品質で提供することができる。加えて、個々に反射リング１４を備えた複数の発光素子９が実装された発光素子実装用多層配線基板１を個片分割することによれば、品質の高い照明装置を安価に量産することができる。 As described above, since the multilayer wiring board 1 for mounting light emitting elements of this embodiment has a multilayer structure, inner layer wiring is possible, and the degree of freedom in wiring design is high. Further, when a light emitting element housing package is manufactured using the light emitting element mounting multilayer wiring board 1, the heat radiation effect of the light emitting element mounting electrodes 4a and 4b is sufficiently exerted, so that the light emitting element 9 fails due to temperature rise. Is less likely to occur, and the luminous efficiency is less likely to decrease. Since the connection bump 10 can be thinned, the light emitting element 9 can be accurately bonded to the upper surfaces of the electrodes 4a and 4b in a desired posture. By using such a multilayer wiring substrate 1 for mounting light emitting elements, it is possible to manufacture a lighting device with high light emission efficiency and less individual variation with stable quality. Further, since the light emitting element 9 is accurately mounted on the upper surfaces of the electrodes 4a and 4b, the directivity of light output from the light emitting element 9 is improved. Thereby, for example, an illumination device including a plurality of light emitting elements 9 in the same package can be provided with stable quality. In addition, by dividing the light-emitting element mounting multilayer wiring substrate 1 on which a plurality of light-emitting elements 9 each having a reflective ring 14 are mounted, a high-quality lighting device can be mass-produced at low cost. it can.
次に、本実施例の発光素子実装用多層配線基板１の製造方法について図４を適宜参照しながら図３を用いて説明する（特に、請求項３及び請求項５に対応）。
図３は実施例１の発光素子実装用多層配線基板の製造手順を示す工程図であり、図４（ａ）乃至（ｆ）は実施例１の製造方法を説明するための発光素子実装用多層配線基板の縦断面を示す模式図である。なお、図１に示した構成要素については同一の符号を付してその説明を省略する。
まず、ステップＳ１において積層セラミック基板２を成形する。すなわち、アルミナ（Ａｌ２Ｏ３）の粉末に焼結助剤としてシリカ（ＳｉＯ２）、カルシア（ＣａＯ）、マグネシア（ＭｇＯ）などの粉末を添加・調整して原料粉末を作り、この原料粉末にポリビニルブチラール（ＰＶＢ）等の有機バインダとエタノール（Ｃ２Ｈ５ＯＨ）等の分散剤とジオクチフタレート等の可塑剤を加え、ボールミル等によって混合し、スラリー化する。そして、このスラリーをドクターブレード法等によってシート状に成形（以下、グリーンシートという。）し、所定の箇所に打ち抜き金型やＮＣパンチングマシーン等を用いて位置決め孔やビア８用の貫通孔を穿設する。なお、貫通孔は、グリーンシートの表面に開口する部分の面積が後述するステップＳ３において絶縁層６の上面に印刷される銅ペースト１１の面積よりも狭くなるように、内径を設定することが望ましい。さらに、スクリーン印刷によってタングステン等の高融点金属粉末の導体性ペーストをこの貫通孔の内部に充填するとともに、グリーンシートの表面に導体層７を形成する。そして、このようにして導体層７が形成された複数枚のグリーンシートを重ね合わせ、加熱及び加圧を行って一体化する。その後、必要に応じて、カッター刃、金型等の方法によってグリーンシートの表裏に格子状のブレーク溝を加工する。最後に、グリーンシートの積層体を高温焼成炉内に入れて、窒素及び水素の還元性雰囲気中で加熱する。これにより、有機バインダや分散剤が除去されるともに、グリーンシートが焼結する。そして、導体層７は絶縁層６の上面や内層に焼き付けられ、図４（ａ）に示すような積層セラミック基板２が形成される。
Next, a method for manufacturing the multilayer wiring substrate 1 for mounting light emitting elements of this embodiment will be described with reference to FIG. 4 as appropriate (particularly corresponding to claims 3 and 5).
FIG. 3 is a process diagram showing a manufacturing procedure of the multilayer wiring board for mounting a light emitting element according to the first embodiment, and FIGS. 4A to 4F are multilayer diagrams for mounting the light emitting element for explaining the manufacturing method according to the first embodiment. It is a schematic diagram which shows the longitudinal cross-section of a wiring board. In addition, about the component shown in FIG. 1, the same code | symbol is attached | subjected and the description is abbreviate | omitted.
First, in step S1, the multilayer ceramic substrate 2 is formed. That is, a powder of silica (SiO 2 ), calcia (CaO), magnesia (MgO), etc. is added and adjusted as a sintering aid to alumina (Al 2 O 3 ) powder to make a raw material powder. An organic binder such as polyvinyl butyral (PVB), a dispersant such as ethanol (C 2 H 5 OH), and a plasticizer such as dioctiphthalate are added and mixed by a ball mill or the like to form a slurry. Then, this slurry is formed into a sheet shape (hereinafter referred to as a green sheet) by a doctor blade method or the like, and a positioning hole or a through hole for the via 8 is drilled at a predetermined location using a punching die or an NC punching machine. Set up. In addition, it is desirable to set the inner diameter of the through hole so that the area of the portion opened on the surface of the green sheet is smaller than the area of the copper paste 11 printed on the upper surface of the insulating layer 6 in step S3 described later. . Further, a conductive paste of a refractory metal powder such as tungsten is filled into the through hole by screen printing, and the conductor layer 7 is formed on the surface of the green sheet. Then, the plurality of green sheets on which the conductor layers 7 are formed in this manner are stacked and integrated by heating and pressing. Then, if necessary, grid-like break grooves are processed on the front and back of the green sheet by a method such as a cutter blade or a mold. Finally, the green sheet laminate is placed in a high-temperature firing furnace and heated in a reducing atmosphere of nitrogen and hydrogen. Thereby, the organic binder and the dispersant are removed, and the green sheet is sintered. Then, the conductor layer 7 is baked on the upper surface or inner layer of the insulating layer 6 to form the multilayer ceramic substrate 2 as shown in FIG.
次に、ステップＳ２において、積層セラミック基板２の表面を砥粒研磨によって平滑化する。そして、ビア８を形成するタングステン又はモリブデン等の高融点金属粉末の導体性ペーストのうち、積層セラミック基板２の表面に露出した部分にニッケルメッキを被着する。
図４（ｂ）に示すように、ステップＳ３では、積層セラミック基板２の表面に銅ペースト１１を印刷・焼成して、銅膜３ａ，３ｂを形成する。まず、積層セラミック基板２の表面にステンレスメッシュを用いたベタ印刷によって銅ペースト１１を５〜３０μｍの厚さで一回乃至複数回塗布する。そして、積層セラミック基板２を１００℃程度で加熱して、銅ペースト１１の塗布面を乾燥させる。次に、積層セラミック基板２を２００〜２６０℃程度で加熱し、銅ペースト１１を酸化させる。さらに、銅ペースト１１を塗布した積層セラミック基板９を窒素又はアルゴンの雰囲気中、９００℃の温度条件で加熱する。これにより、銅ペースト１１は表面にＣｕ−Ｏ共晶液相が生成されて、積層セラミック基板２に対する接合強度が向上する。
次に、ステップＳ４においてバフ研磨を行う。すなわち、積層セラミック基板２の表面に形成された銅膜３ａ，３ｂの表面をバフ研磨によって平滑化するのである。これにより、銅膜３ａ，３ｂはポアやピンホール等が無くなり、表層部が緻密化される。
Next, in step S2, the surface of the multilayer ceramic substrate 2 is smoothed by abrasive polishing. Then, nickel plating is applied to the exposed portion of the surface of the multilayer ceramic substrate 2 in the conductive paste of refractory metal powder such as tungsten or molybdenum forming the via 8.
As shown in FIG. 4B, in step S3, the copper paste 11 is printed and fired on the surface of the multilayer ceramic substrate 2 to form the copper films 3a and 3b. First, the copper paste 11 is applied to the surface of the multilayer ceramic substrate 2 once or a plurality of times with a thickness of 5 to 30 μm by solid printing using a stainless mesh. And the multilayer ceramic substrate 2 is heated at about 100 degreeC, and the application surface of the copper paste 11 is dried. Next, the multilayer ceramic substrate 2 is heated at about 200 to 260 ° C. to oxidize the copper paste 11. Further, the multilayer ceramic substrate 9 coated with the copper paste 11 is heated in a nitrogen or argon atmosphere at a temperature condition of 900 ° C. Thereby, the Cu—O eutectic liquid phase is generated on the surface of the copper paste 11, and the bonding strength to the multilayer ceramic substrate 2 is improved.
Next, buffing is performed in step S4. That is, the surfaces of the copper films 3a and 3b formed on the surface of the multilayer ceramic substrate 2 are smoothed by buffing. As a result, the copper films 3a and 3b have no pores or pinholes, and the surface layer portion is densified.
さらに、ステップＳ５においてスピンコート法によって銅膜３ａ，３ｂの表面にレジスト膜を１００μｍ程度の厚さで塗布した後、このレジスト膜にフォトマスク（図示せず）を接触させて露光し、所望のパターンに現像する。これにより、図４（ｃ）に示すように、所望のパターンが形成されたレジスト膜（以下、レジスト枠１２ａという。）が銅膜３ａ，３ｂの表面に形成される。なお、レジスト膜を銅膜３ａ，３ｂの表面に塗布する場合、スピンコート法に限らず、ロールコート法などを用いても良い。また、レジスト膜を露光する場合には、コンタクト方式以外に、例えば、プロキシミティ方式などを採用することもできる。
次に、ステップＳ６において銅の電解メッキ処理を行う。すなわち、図４（ｄ）に示すように、銅膜３ａ，３ｂを電解メッキ処理用の電極として用いて、レジスト枠１２ａに覆われていない銅膜３ａ，３ｂの表面に８０μｍ程度の厚さで銅メッキ層１５ａ，１５ｂを形成する。
Further, in step S5, a resist film is applied to the surface of the copper films 3a and 3b by a spin coating method to a thickness of about 100 μm, and then exposed to a contact with a photomask (not shown) on the resist film. Develop into a pattern. Thereby, as shown in FIG. 4C, a resist film (hereinafter referred to as a resist frame 12a) on which a desired pattern is formed is formed on the surfaces of the copper films 3a and 3b. In addition, when apply | coating a resist film to the surface of copper film 3a, 3b, you may use not only a spin coat method but a roll coat method. Moreover, when exposing a resist film, a proximity system etc. can also be employ | adopted besides a contact system, for example.
Next, in step S6, copper electrolytic plating is performed. That is, as shown in FIG. 4D, the copper films 3a and 3b are used as electrodes for electrolytic plating, and the thickness of the copper films 3a and 3b not covered with the resist frame 12a is about 80 μm thick. Copper plating layers 15a and 15b are formed.
図４（ｅ）に示すように、ステップＳ７では、銅膜３ａ，３ｂ上のレジスト枠１２ａを剥離液によって除去する。続いて、ステップＳ８において、塩化第２鉄あるいは塩化第２銅等を主成分とするエッチング液を用いてエッチング処理を行う。これにより、銅メッキ層１５ａ，１５ｂが被着されていない箇所の銅膜３ａ，３ｂが除去される。なお、このとき、銅メッキ層１５ａ，１５ｂの表層の一部も同時にエッチングされるものの、大半はエッチングされずに残り、所望の導体配線パターンが形成される。その結果、図４（ｆ）に示すように、銅膜３ａ及び銅メッキ層１５ａからなる発光素子実装用電極４ａ，４ｂと、銅膜３ｂ及び銅メッキ層１５ｂからなる端子部５ａ，５ｂが積層セラミック基板２の表面にそれぞれ形成されることになる。なお、図示していないが、銅メッキ層１５ａ，１５ｂの表面には腐食を防ぐためにニッケルメッキ及び金メッキが被着されている。 As shown in FIG. 4E, in step S7, the resist frame 12a on the copper films 3a and 3b is removed with a stripping solution. Subsequently, in step S8, an etching process is performed using an etchant mainly composed of ferric chloride or cupric chloride. Thereby, the copper films 3a and 3b where the copper plating layers 15a and 15b are not deposited are removed. At this time, although part of the surface layers of the copper plating layers 15a and 15b are also etched at the same time, most of them remain without being etched, and a desired conductor wiring pattern is formed. As a result, as shown in FIG. 4F, the light emitting element mounting electrodes 4a and 4b made of the copper film 3a and the copper plating layer 15a and the terminal portions 5a and 5b made of the copper film 3b and the copper plating layer 15b are laminated. It is formed on the surface of the ceramic substrate 2 respectively. Although not shown, nickel plating and gold plating are deposited on the surfaces of the copper plating layers 15a and 15b to prevent corrosion.
このような製造方法においては、積層セラミック基板２の材質がアルミナであるため、ビア８用の貫通孔を穿設する際にレーザー加工等の高価なプロセスを必要としない。また、積層セラミック基板２の表面に印刷された銅ペースト１１は所定の条件で加熱されることにより、表面にＣｕ−Ｏ共晶液相が生成されて積層セラミック基板２に対する接合強度が増すとともに、焼結して銅膜３ａ，３ｂとなる。なお、ビア８を形成する高融点金属の上部に形成されたニッケルメッキと銅膜３ａとの接触面積は、絶縁層６と銅膜３ａとの接触面積との接触面積よりも狭いため、銅膜３ａと積層セラミック基板２との接合強度が低下し難い。加えて、銅膜３ａの絶縁層６に接触する箇所が、上記ニッケルメッキが銅膜３ａと接触する箇所の外側を全周に亘って取り囲むように構成されているため、銅膜３ａと銅メッキ層１５ａによって形成される発光素子実装用電極４ａ，４ｂは積層セラミック基板２から剥がれ難くなっている。さらに、銅ペースト１１を印刷する前に積層セラミック基板２の表面が研磨されるため、銅膜３ａ，３ｂの平坦性が容易に確保される。そして、銅膜３ａ，３ｂ上に銅メッキ層１５ａ，１５ｂが電解メッキ処理によって被着されるため、無電解メッキ処理の場合に比べて、短時間に厚い銅メッキ層１５ａ，１５ｂが形成される。 In such a manufacturing method, since the material of the multilayer ceramic substrate 2 is alumina, an expensive process such as laser processing is not required when the through hole for the via 8 is formed. Further, the copper paste 11 printed on the surface of the multilayer ceramic substrate 2 is heated under a predetermined condition, so that a Cu—O eutectic liquid phase is generated on the surface and the bonding strength to the multilayer ceramic substrate 2 is increased. Sintering into copper films 3a and 3b. Since the contact area between the nickel plating formed on the refractory metal forming the via 8 and the copper film 3a is narrower than the contact area between the insulating layer 6 and the copper film 3a, the copper film The bonding strength between 3a and the multilayer ceramic substrate 2 is unlikely to decrease. In addition, the portion of the copper film 3a that contacts the insulating layer 6 is configured so as to surround the entire outer periphery of the portion where the nickel plating contacts the copper film 3a. The light emitting element mounting electrodes 4 a and 4 b formed by the layer 15 a are difficult to peel off from the multilayer ceramic substrate 2. Furthermore, since the surface of the multilayer ceramic substrate 2 is polished before the copper paste 11 is printed, the flatness of the copper films 3a and 3b is easily ensured. Since the copper plating layers 15a and 15b are deposited on the copper films 3a and 3b by the electrolytic plating process, the thick copper plated layers 15a and 15b are formed in a shorter time than in the case of the electroless plating process. .
以上説明したように、本実施例の製造方法によれば、高価な金属や設備等を必要とする薄膜法や蒸着法を用いることなく、積層セラミック基板２の表面に銅膜３ａ，３ｂを強固に接合することができる。従って、製造コストの削減を図ることが可能である。また、銅膜３ａと銅メッキ層１５ａによって平坦性及び放熱性に優れた発光素子実装用電極４ａ，４ｂを形成することができる。この場合、発光素子９を発光素子実装用電極４ａ，４ｂ上に所望の姿勢で正確に実装するとともに、発光素子９で発生した熱を発光素子実装用電極４ａ，４ｂを経由させて効率よく発散させることが可能である。すなわち、本実施例の製造方法によれば、温度上昇等に伴う発光素子９の故障や発光効率のバラツキが発生し難い発光素子収納用パッケージ１３を製造するための発光素子実装用多層配線基板１を安価に提供することが可能である。 As described above, according to the manufacturing method of the present embodiment, the copper films 3a and 3b are firmly formed on the surface of the multilayer ceramic substrate 2 without using a thin film method or a vapor deposition method that requires expensive metals or equipment. Can be joined. Therefore, it is possible to reduce the manufacturing cost. Moreover, the light emitting element mounting electrodes 4a and 4b excellent in flatness and heat dissipation can be formed by the copper film 3a and the copper plating layer 15a. In this case, the light emitting element 9 is accurately mounted in a desired posture on the light emitting element mounting electrodes 4a and 4b, and the heat generated in the light emitting element 9 is efficiently dissipated through the light emitting element mounting electrodes 4a and 4b. It is possible to make it. That is, according to the manufacturing method of the present embodiment, the multilayer wiring board 1 for mounting the light-emitting elements for manufacturing the light-emitting element storage package 13 in which failure of the light-emitting elements 9 due to temperature rise or the like and variation in light emission efficiency hardly occur. Can be provided at low cost.
次に、実施例２の発光素子実装用多層配線基板１の製造方法について図６を適宜参照しながら図５を用いて説明する（特に、請求項４に対応）。
図５は実施例２の発光素子実装用多層配線基板の製造手順を示す工程図であり、図６（ａ）乃至（ｆ）は実施例２の製造方法を説明するための発光素子実装用多層配線基板の縦断面を示す模式図である。なお、図１に示した構成要素については同一の符号を付してその説明を省略する。また、図５中のステップＳ１乃至ステップＳ４及びそれらのステップに対応する図６（ａ）及び（ｂ）は、それぞれ図３中のステップＳ１乃至ステップＳ４及び図４（ａ）及び（ｂ）と同じであるため、説明を省略する。
まず、図５のステップＳ５では、ステップＳ１乃至ステップＳ４において表面に銅膜３ａ，３ｂが形成され、バフ研磨による処理が施された積層セラミック基板２に対して銅の電解メッキ処理を行う。すなわち、図６（ｃ）に示すように、銅膜３ａ，３ｂを電解メッキ処理用の電極として用いて、銅膜３ａ，３ｂの表面に厚さ８０μｍ程度の銅メッキ層１５ａ，１５ｂを形成する。
次に、ステップＳ６において銅メッキ層１５ａ，１５ｂの表面にレジスト膜をスピンコート法等によって塗布し、このレジスト膜にフォトマスク（図示せず）を接触させて露光し、所望のパターンに現像する。これにより、図６（ｄ）に示すように、所望のパターンが形成されたレジスト膜（以下、レジスト枠１２ｂという。）が銅メッキ層１５ａ，１５ｂの表面に形成される。
さらに、ステップＳ７では、塩化第２鉄あるいは塩化第２銅等を主成分とするエッチング液を用いてエッチング処理を行い、レジスト枠１２ｂで覆われていない箇所の銅メッキ層１５ａ，１５ｂ及びその下層の銅膜３ａ，３ｂを除去する。その結果、図６（ｅ）に示すように、銅メッキ層１５ａ，１５ｂ及び銅膜３ａ，３ｂにはレジスト枠１２ｂと同じ配線パターンが形成される。
そして、ステップＳ８において、銅メッキ層１５ａ，１５ｂ上のレジスト枠１２ｂを剥離液によって除去する。その結果、図６（ｆ）に示すように、銅膜３ａ及び銅メッキ層１５ａからなる発光素子実装用電極４ａ，４ｂと、銅膜３ｂ及び銅メッキ層１５ｂからなる端子部５ａ，５ｂが積層セラミック基板２の表面にそれぞれ形成されることになる。なお、図示していないが、発光素子実装用電極４ａ，４ｂ及び端子部５ａ，５ｂの腐食を防ぐため、銅メッキ層１５ａ，１５ｂの表面にはニッケルメッキ及び金メッキが被着されている。
Next, a method for manufacturing the multilayer wiring board 1 for mounting light-emitting elements of Example 2 will be described with reference to FIG. 6 as appropriate (particularly corresponding to claim 4).
FIG. 5 is a process diagram showing a manufacturing procedure of the multilayer wiring board for mounting light emitting elements of Example 2, and FIGS. 6A to 6F are multilayers for mounting light emitting elements for explaining the manufacturing method of Example 2. It is a schematic diagram which shows the longitudinal cross-section of a wiring board. In addition, about the component shown in FIG. 1, the same code | symbol is attached | subjected and the description is abbreviate | omitted. Further, steps S1 to S4 in FIG. 5 and FIGS. 6A and 6B corresponding to those steps are respectively the same as steps S1 to S4 and FIGS. 4A and 4B in FIG. Since it is the same, description is abbreviate | omitted.
First, in step S5 of FIG. 5, copper electroplating is performed on the multilayer ceramic substrate 2 on which the copper films 3a and 3b are formed on the surface in steps S1 to S4 and subjected to the processing by buffing. That is, as shown in FIG. 6C, copper plating layers 15a and 15b having a thickness of about 80 μm are formed on the surfaces of the copper films 3a and 3b using the copper films 3a and 3b as electrodes for electrolytic plating. .
Next, in step S6, a resist film is applied to the surfaces of the copper plating layers 15a and 15b by a spin coat method or the like, and a photomask (not shown) is brought into contact with the resist film to be exposed and developed into a desired pattern. . Thereby, as shown in FIG. 6D, a resist film (hereinafter referred to as a resist frame 12b) on which a desired pattern is formed is formed on the surfaces of the copper plating layers 15a and 15b.
Further, in step S7, etching is performed using an etchant mainly composed of ferric chloride or cupric chloride, and the copper plating layers 15a and 15b and the lower layers thereof are not covered with the resist frame 12b. The copper films 3a and 3b are removed. As a result, as shown in FIG. 6E, the same wiring pattern as the resist frame 12b is formed on the copper plating layers 15a and 15b and the copper films 3a and 3b.
In step S8, the resist frame 12b on the copper plating layers 15a and 15b is removed with a stripping solution. As a result, as shown in FIG. 6 (f), the light emitting element mounting electrodes 4a and 4b composed of the copper film 3a and the copper plating layer 15a and the terminal portions 5a and 5b composed of the copper film 3b and the copper plating layer 15b are laminated. It is formed on the surface of the ceramic substrate 2 respectively. Although not shown, nickel plating and gold plating are applied to the surfaces of the copper plating layers 15a and 15b in order to prevent corrosion of the light emitting element mounting electrodes 4a and 4b and the terminal portions 5a and 5b.
本実施例の製造方法の特徴について、実施例１と比較しながら図７を用いて説明する。
図７（ａ）及び（ｂ）はそれぞれ実施例１及び実施例２の製造方法によって製造した発光素子実装用多層配線基板の縦断面を部分的に拡大して示した模式図である。なお、図６に示した構成要素については同一の符号を付してその説明を省略する。
実施例１の製造方法によれば、図３に示したステップＳ８のエッチング処理の際にレジスト枠１２ａを用いないため、不要な箇所の銅膜３ａ，３ｂと同時に銅メッキ層１５ａ，１５ｂの表層の一部がエッチングされてしまう。その結果、図７（ａ）に示すように、発光素子実装用電極４ａ，４ｂや端子部５ａ，５ｂの表面の端縁を構成することになるエッジ部１６がだれて曲面状に形成される。一方、本実施例の製造方法によれば、図５に示したステップＳ７のエッチング処理がレジスト枠１２ｂの配線パターンに従って行われるため、銅メッキ層１５ａ，１５ｂの表層の一部がエッチングされてしまい、エッジ部１６がだれて曲面状に形成されるという現象は発生しない。すなわち、本実施例の製造法においては、図７（ｂ）に示すように、エッジ部１６がだれることなく、シャープに形成されるという作用を有する。これにより、発光素子実装用電極４ａ，４ｂに対して微細な配線パターンを容易に形成することが可能となる。
The features of the manufacturing method of this embodiment will be described with reference to FIG.
FIGS. 7A and 7B are schematic views showing partially enlarged longitudinal sections of a multilayer wiring board for mounting a light emitting element manufactured by the manufacturing method of Example 1 and Example 2, respectively. Note that the components shown in FIG. 6 are denoted by the same reference numerals and description thereof is omitted.
According to the manufacturing method of the first embodiment, since the resist frame 12a is not used in the etching process of step S8 shown in FIG. 3, the surface layers of the copper plating layers 15a and 15b at the same time as the unnecessary copper films 3a and 3b. A part of is etched. As a result, as shown in FIG. 7A, the edge portion 16 that constitutes the edge of the surface of the light emitting element mounting electrodes 4a and 4b and the terminal portions 5a and 5b is bent and formed into a curved surface. . On the other hand, according to the manufacturing method of the present embodiment, since the etching process of step S7 shown in FIG. 5 is performed according to the wiring pattern of the resist frame 12b, a part of the surface layer of the copper plating layers 15a and 15b is etched. The phenomenon that the edge portion 16 is bent and formed into a curved surface does not occur. That is, the manufacturing method of the present embodiment has an effect that the edge portion 16 is formed sharply without sagging, as shown in FIG. 7B. Thereby, a fine wiring pattern can be easily formed on the light emitting element mounting electrodes 4a and 4b.
なお、本発明の発光素子実装用多層配線基板１は上記実施例に示すものに限定されるものではない。例えば、積層セラミック基板２の表面に露出したビア８の上部に対してニッケルメッキの代わりに銅メッキ若しくはニッケルと銅の固溶体を形成しても良い。また、発光素子実装用電極４ａ，４ｂ及び端子部５ａ，５ｂの個数や配置及び導体層７の形成パターンについては、図２、図４又は図６に示す場合に限定されるものではなく、適宜変更可能である。さらに、銅膜３ａについて所望の平坦性が確保できる場合には、図３又は図５のステップＳ２における積層セラミック基板２の研磨工程を省略することもできる。なお、絶縁層６の素材はアルミナに限定されるものではない。例えば、発光素子実装用多層配線基板１に高い放熱性が要求される場合には、アルミナよりも放熱性に優れる窒化アルミニウム（ＡｌＮ）を絶縁層６の素材として使用することが望ましい。また、発光素子収納用パッケージ１３は反射リング１４を備えない構造であっても良い。 The multilayer wiring board 1 for mounting a light emitting element of the present invention is not limited to the one shown in the above embodiment. For example, copper plating or a solid solution of nickel and copper may be formed on the upper portion of the via 8 exposed on the surface of the multilayer ceramic substrate 2 instead of nickel plating. Further, the number and arrangement of the light emitting element mounting electrodes 4a and 4b and the terminal portions 5a and 5b and the formation pattern of the conductor layer 7 are not limited to the case shown in FIG. 2, FIG. 4, or FIG. It can be changed. Furthermore, when desired flatness can be ensured for the copper film 3a, the polishing step of the multilayer ceramic substrate 2 in step S2 of FIG. 3 or FIG. 5 can be omitted. The material of the insulating layer 6 is not limited to alumina. For example, when high heat dissipation is required for the multilayer wiring substrate 1 for mounting the light emitting element, it is desirable to use aluminum nitride (AlN), which has better heat dissipation than alumina, as the material of the insulating layer 6. Further, the light emitting element storage package 13 may have a structure without the reflection ring 14.
本発明の請求項１乃至請求項５に記載された発明は、発光素子等の電子部品が実装される電極部について平坦性及び放熱性が要求されるとともに、微細で複雑な配線構造が要求される基板に対して適用可能である。 According to the first to fifth aspects of the present invention, flatness and heat dissipation are required for electrode portions on which electronic components such as light emitting elements are mounted, and a fine and complicated wiring structure is required. It can be applied to a substrate.
１…発光素子実装用多層配線基板 ２…積層セラミック基板 ３ａ，３ｂ…銅膜 ４ａ，４ｂ…発光素子実装用電極 ５ａ，５ｂ…端子部 ６…絶縁層 ７…導体層 ８…ビア ９…発光素子 １０…接続用バンプ １１…銅ペースト １２ａ、１２ｂ…レジスト枠 １３…発光素子収納用パッケージ １４…反射リング １５ａ，１５ｂ…銅メッキ層 １６…エッジ部
DESCRIPTION OF SYMBOLS 1 ... Multilayer wiring board for light emitting element mounting 2 ... Multilayer ceramic substrate 3a, 3b ... Copper film 4a, 4b ... Light emitting element mounting electrode 5a, 5b ... Terminal part 6 ... Insulating layer 7 ... Conductive layer 8 ... Via 9 ... Light emitting element DESCRIPTION OF SYMBOLS 10 ... Connection bump 11 ... Copper paste 12a, 12b ... Resist frame 13 ... Light emitting element storage package 14 ... Reflection ring 15a, 15b ... Copper plating layer 16 ... Edge part
Claims (5)
The multilayer wiring for mounting a light emitting element according to claim 3, further comprising a step of polishing and smoothing an outermost surface of the insulating layer before the step of printing the copper paste. A method for manufacturing a substrate.
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