JP2008164479A - Pulse specification detector - Google Patents

Abstract

When detecting pulse specifications by fast Fourier transform (FFT) processing, if the number of FFT processing sampling is increased, the frequency resolution is increased, but conversely, the time resolution is deteriorated by increasing the sampling number. There was a problem.
A receiving unit 3 that converts an RF signal output from an antenna that has received an incoming radio wave into an IF signal, an A / D conversion circuit 4 that converts the IF signal into a digital sample signal, and a digital sample signal On the other hand, the FFT processing circuit 10 that performs FFT analysis processing by overlapping the processing points of the fast Fourier transform, and the specification detection circuit 6 that detects the specification of the incoming radio wave from the FFT processing result, ensure time resolution. However, the pulse specifications are detected while maintaining the frequency resolution.
[Selection] Figure 4

Description

  The present invention relates to a pulse specification detection device for detecting specifications of a pulsed incoming radio wave, and in particular, a pulse specification for detecting a specification by performing fast Fourier transform (FFT) processing on a received signal. The present invention relates to a detection device.

Receives incoming radio waves of a radio frequency (RF = RadioFrequency) signal input from an antenna in time series, and receives the pulse specifications of the received signal, for example, pulse arrival time (TOA = Time of Arrival), pulse width (PW = Pulse Wide) ), Pulse amplitude (PA = Pulse Amplitude), frequency (F = Frequency), and the like are known to perform target identification and the like.
As one of means for detecting such a pulse specification, there is one in which fast Fourier transform (FFT) processing and maximum entropy (MEM) processing are used in combination with frequency analysis means. In the case of fast Fourier transform (FFT) processing, since the frequency resolution depends on the number of samplings for the beat signal, the frequency resolution increases as the sampling number increases, but the frequency resolution decreases as the sampling number decreases. On the other hand, in the case of maximum entropy (MEM) processing, the frequency resolution does not depend on the number of samplings and high resolution is obtained, but the intensity of the spectrum is not faithfully reproduced. Therefore, the frequency analysis is performed by combining the advantage that the FFT processing spectrum has high fidelity and the advantage that the high frequency resolution of the MEM processing can be obtained.

In particular, in the case of Fast Fourier Transform (FFT) processing, although there is a slight problem in frequency resolution, it is possible to separate / identify an input wave on which a plurality of pulses are superimposed, and the presence / absence and intensity of a target are faithful. Therefore, it is often used for frequency analysis such as target identification. (See Patent Document 1)
JP 2001-349941 A

  In the case of detecting pulse specifications by fast Fourier transform (FFT) processing, since processing can be performed on the frequency, it is possible to separate and identify an input wave on which a plurality of pulses are superimposed, but fast Fourier transform (FFT) For processing, it is necessary to collect data of the number of samplings (number of points). Therefore, if the number of FFT processing samplings is increased for the same sampling rate, the frequency resolution increases, but conversely there is a problem that the time resolution deteriorates as the number of samplings increases.

  An object of the present invention is to obtain a highly accurate pulse specification detection device by maintaining a frequency resolution while ensuring a time resolution when detecting a pulse specification by fast Fourier transform (FFT) processing. It is.

  The pulse specification detection device of the present invention includes a receiving unit that converts a high-frequency signal output from an antenna that has received an incoming radio wave into an intermediate frequency signal, and the intermediate frequency signal converted by the receiving unit is converted into a digital sample signal. An analog / digital conversion circuit for conversion, an FFT processing circuit for performing FFT analysis processing by overlapping fast Fourier transform (FFT) processing points on the digital sample signal from the analog / digital conversion circuit, and the FFT It is provided with a specification detection circuit for detecting the specification of the incoming radio wave from the output from the processing circuit.

  In addition, the pulse specification detecting device of the present invention includes a receiving unit that converts a high-frequency signal output from an antenna that has received an incoming radio wave into an intermediate frequency signal, and a digital sample signal from the intermediate frequency signal converted by the receiving unit. An analog / digital conversion circuit that converts the signal into a digital signal, and an FFT processing circuit that performs parallel processing on two types of FFT analysis with different number of processing points of fast Fourier transform (FFT) on the digital sample signal from the analog / digital conversion circuit And a specification detection circuit for detecting the specification of the incoming radio wave from the output from the FFT processing circuit.

According to the present invention, by performing FFT analysis by overlapping the points at which fast Fourier transform (FFT) processing is performed, it is possible to cope with detection of a signal with a short pulse width, and the amount of overlap is large. This means that the FFT processing result is output in a short time, and the time resolution of the detected pulse specifications is improved.
In addition, by performing parallel processing in two systems for each M points and N points (M <N) of the FFT processing, the best specifications for frequency resolution and time resolution can be extracted.

Basic form of the invention First, the basic form of the pulse specification detecting apparatus of the present invention will be described. FIG. 1 is a basic configuration diagram to which the present invention is applied, FIG. 2 is a characteristic diagram obtained by performing a fast Fourier transform (FFT) process, and FIG. 3 is a characteristic diagram of a time-frequency component resulting from the FFT process. .
In the configuration diagram of FIG. 2, the receiving antenna 1 receives a radio frequency (RF) signal of an incoming radio wave. An RF signal output from the antenna 1 is input to a receiving unit 3 having a mixer 2 that converts the frequency into an intermediate frequency (IF) signal. The intermediate frequency signal converted by the receiving unit 3 includes an analog / digital (A / D) conversion circuit 4 that converts an analog signal into a digital signal, an FFT processing circuit 5 that performs fast Fourier transform (FFT) processing, and an FFT processing result. The data is input to a signal processing circuit 7 having a specification detection circuit 6 for detecting a pulse specification, and the pulse specification data is analyzed. The processor 8 performs target identification based on the pulse specification data analyzed by the signal processing circuit 7.

1 will be described with reference to FIGS. 2 and 3. FIG. First, the intermediate frequency (IF) signal output from the receiving unit 3 is sampled at high speed by the A / D conversion circuit 4 to obtain a digital sample signal. The FFT processing circuit 5 performs FFT processing of a preset number of points (samples) on the digital sample signal, and extracts frequency components.
FIG. 2 is a characteristic diagram showing frequency components at each time of FFT processing. FIG. 2 (a) is an Xth processing characteristic diagram, FIG. 2 (b) is an X + 1th processing characteristic diagram, and FIG. 2 (c) is X + 2. FIG. 2 (d) shows an X + 3th processing characteristic diagram, and FIG. 2 (e) shows an X + 4th processing characteristic diagram, where there is an amplitude value exceeding a preset threshold level. For example, it is determined that pulse data has been received, and the specification data is detected.
In FIG. 2, the amplitude value of the signal of frequency F1 exceeds the threshold level from the Xth time to the X + 4th time of the FFT processing, and the amplitude value of the signal of frequency F2 reaches the threshold level from the X + 3th time to the X + 4th time of the FFT processing. It shows that it has exceeded.

FIG. 3 is a plot of frequency data of amplitude values exceeding the threshold level with time on the horizontal axis on the basis of the FFT processing result according to FIG. By performing the FFT processing, the frequencies F1 and F2 are discriminated and detected, and the arrival time TOA can be detected at the time when the frequencies F1 and F2 are equal to or higher than the threshold level, and the pulse width PW is the frequency. Can be detected from the number of times that is equal to or higher than the threshold level.
In FIG. 3, a signal having a frequency F (Frequency) 1 and a pulse width PW (Pulse Wide) 1 is detected at an arrival time TOA (Time of Arrival) 1, and a signal having a frequency F2 and a pulse width PW2 is detected at a pulse arrival time TOA2. Is detected, indicating that the incoming radio wave on which two signals are superimposed can be separated and detected.

  By performing FFT processing on digital data obtained by A / D-converting intermediate frequency (IF) signals in this way, multiple simultaneous input signals with different frequencies can be separated and identified, and arrive at each frequency. The time TOA, the pulse width PW, and the pulse amplitude PA can be detected.

Embodiment 1
Next, a pulse specification detection apparatus according to Embodiment 1 of the present invention will be described with reference to FIGS. FIG. 4 is a block diagram showing the FFT processing circuit used in Embodiment 1 of the present invention, FIG. 5 is a conceptual diagram of the FFT processing, and FIG. 6 is a diagram showing the FFT processing result in comparison with the conventional one.
In the first embodiment of the present invention, the FFT processing circuit 5 of the basic configuration diagram shown in FIG. 1 is replaced with an FFT processing circuit 10 of the configuration shown in FIG. 4, and other configurations are the basic configuration of FIG. It is the same as the figure and will not be described.

  4, the FFT processing circuit 10 includes a plurality of FFT processing units 101 to 104, and slides the processing point number N in one cycle by a plurality of point numbers M (where M is N / n, n is an integer). In this way, the FFT processing is performed in an overlapping manner. That is, each of the FFT processing units 101 to 104 performs the FFT processing with the same processing point number N, but the processing start time is shifted by the point number M.

The operation of the configuration in FIG. 4 will be described with reference to FIGS. 4 and 5, an example will be described in which the number N of FFT processing points in one cycle is 128, and one cycle of 128 points is slid by, for example, 32 points each time. Therefore, four FFT processing units 101 to 104 are required at N / M = 128/32.
The pulse modulation signal converted into the intermediate frequency (IF) signal by the receiving unit 3 is converted into a digital sample signal by the A / D conversion circuit 4 and input in parallel to the FFT processing units 101 to 104 of the FFT processing circuit 10. . As a result of the FFT processing by each of the FFT processing units 101 to 104, as shown in FIG. 5, the output of the FFT processing unit 101 (FFT1) corresponds to outputs A and B output every 128 processing points. . The output of the FFT processing unit 102 (FFT2) corresponds to an output a that is 32 points away from the output A. Similarly, the output of the FFT processing unit 103 (FFT3) corresponds to the output b, and the output of the FFT processing unit 104 (FFT4) corresponds to the output c.
In this way, by sliding 128 points in one cycle, for example, by 32 points each, one corresponding to four FFT processing outputs (a, b, c, B) in one cycle can be obtained.

  Fig. 6 compares the analysis results of detected pulses when FFT processing is performed with overlapping processing points on the incoming radio wave input (IF) signal and when FFT processing is performed without overlap. Show. As is apparent from FIG. 6, the pulse width of the detection pulse when the 128-point FFT processing is executed in series without overlapping the processing points is PW1. When the processing points are overlapped and 128 points are shifted by 32 points and FFT processing is performed in four divisions, the pulse width of the detection pulse is PW2.

That is, by detecting the pulse specifications based on the outputs a, b, and c for each point number M (32 points), the pulse width PW and the pulse arrival time TOA are taken, and the output A for each point number N (128 points). By detecting the specifications of the frequency F and the pulse amplitude PA in the pulse specification detection by B, the frequency resolution can be maintained while ensuring the time resolution.
In this way, by performing the FFT analysis by overlapping the number of points for performing the FFT processing, the accuracy (time resolution) of the pulse width PW of the pulse specifications and the pulse arrival time TOA can be improved, and the frequency resolution is also improved. It is possible to obtain a highly accurate pulse specification detection device while maintaining.

Embodiment 2
Next, a pulse specification detection apparatus according to Embodiment 2 of the present invention will be described with reference to FIGS. FIG. 7 is a block diagram showing an FFT processing circuit used in the second embodiment of the present invention, and FIG. 8 is a conceptual diagram of the FFT processing.
In the second embodiment of the present invention, the FFT processing circuit 5 of the basic configuration diagram shown in FIG. 1 is replaced with an FFT processing circuit 11 of the configuration shown in FIG. 7, and the other configuration is the basic configuration of FIG. It is the same as the figure and will not be described.

  In FIG. 7, the FFT processing circuit 11 has two types of processing, that is, an FFT processing unit 111 that performs FFT processing on the number of processing points N in one cycle, and an FFT processing unit 112 that performs FFT processing on the number of processing points M (M <N). It consists of an FFT processing unit. That is, the FFT processing unit 112 performs the FFT processing by the processing point number M smaller than the processing point number N of one cycle processed by the FFT processing unit 111, and performs the FFT processing by overlapping the processing points of one cycle. I have to.

The operation of the configuration in FIG. 7 will be described with reference to FIG. 7 and 8, an example in which the number N of FFT processing points in one cycle processed by the FFT processing unit 111 is 128 and the number M of FFT processing points processed by the FFT processing unit 112 is 32 points will be described.
The pulse modulation signal converted into the intermediate frequency (IF) signal by the receiving unit 3 is converted into a digital sample signal by the A / D conversion circuit 4, and two types of FFT processing units 111 having different numbers of processing points of the FFT processing circuit 11, 112 are input in parallel. As a result of the FFT processing by the FFT processing units 111 and 112, the output of the FFT processing unit 111 (FFT1) corresponds to the outputs A and B output every 128 processing points, as shown in the FFT processing cycle of FIG. Will do. The output of the FFT processing unit 112 (FFT2) corresponds to the outputs a, b, c, and d output for every 32 points.

In this way, the FFT processing unit 111 performs FFT processing of 128 points per cycle in a series to maintain the frequency data resolution, while the FFT processing unit 112 divides the number of points in one cycle 128 points into 4 points by 32 points. By performing the FFT processing, it is possible to ensure the accuracy (time resolution) of the pulse width PW of the pulse specifications and the pulse arrival time TOA.
As described above, the invention according to the second embodiment has two types of FFT processing units having the number of data points N and the number of data points M (where N> M) configured in parallel. Time resolution is ensured by M FFT processing.

Embodiment 3
Next, FIG. 9 which shows the pulse specification detection apparatus in Embodiment 3 of this invention is demonstrated. FIG. 9 is a diagram showing the configuration of the pulse specification detection apparatus according to Embodiment 3 of the present invention.
As shown in FIG. 9, in the third embodiment of the present invention, a reprogrammable device FPGA (Field Programmable Gate Array) circuit 9 is provided in the processor 8 of the basic configuration shown in FIG. The number of processing points of the FFT processing circuit 12 is variable. Other configurations are the same as those of the basic configuration diagram of FIG.
Note that the FFT processing circuit 12 uses the FFT processing circuit 10 or the FFT processing circuit 11 described in the first and second embodiments.

In FIG. 9, the FPGA circuit 9 performs FFT processing in a plurality of FTT processing units 101 to 104 or 111 and 112 of the FFT processing circuit 12 according to the characteristics of the incoming radio wave recognized by the processor 8, that is, the characteristics of the pulse specifications. The number N or M is made variable.
In this way, by changing the number of FTT processing points in accordance with the characteristics of the incoming radio wave, it is possible to flexibly cope with pulse specification detection with optimal frequency resolution and time resolution.

1 is an overall configuration diagram of a pulse specification detection device according to a basic form of the present invention. It is a characteristic view which shows the FFT processing condition in the basic form of this invention. It is a characteristic figure of the time-frequency component by the FFT processing result in the basic form of this invention. It is a block diagram of the FFT processing circuit used for the pulse specification detection apparatus in Embodiment 1 of this invention. It is a conceptual diagram of the FFT process in Embodiment 1 of this invention. It is a figure which shows the FFT processing result in Embodiment 1 of this invention compared with the past. It is a block diagram of the FFT processing circuit used for the pulse specification detection apparatus in Embodiment 2 of this invention. It is a conceptual diagram of the FFT process in Embodiment 2 of this invention. . It is a whole block diagram of the pulse specification detection apparatus in Embodiment 3 of this invention.

Explanation of symbols

1: Antenna 2: Mixer unit 3: Receiver unit 4: A / D conversion circuit 5: FFT processing circuit 6: Specification detection circuit 7: Signal processing circuit 8: Processor 9: FPGA circuit 10: FFT processing circuit 11: FFT processing Circuits 101-104, 111, 112: FFT processing unit

Claims (5)

  A receiving unit that converts a high-frequency signal output from an antenna that receives an incoming radio wave into an intermediate frequency signal, an analog / digital conversion circuit that converts the intermediate frequency signal converted by the receiving unit into a digital sample signal, An FFT processing circuit that performs FFT analysis processing by overlapping processing points of Fast Fourier Transform (FFT) with respect to a digital sample signal from the digital conversion circuit, and specifications of the incoming radio wave by output from the FFT processing circuit A pulse specification detection device provided with a specification detection circuit for detecting noise.   The FFT processing circuit has a plurality of FFT processing units, and performs FFT processing by sliding the processing point number N in one cycle by a plurality of point numbers M (where M is N / n, n is an integer). The pulse specification detection apparatus according to claim 1.   A receiving unit that converts a high-frequency signal output from an antenna that receives an incoming radio wave into an intermediate frequency signal, an analog / digital conversion circuit that converts the intermediate frequency signal converted by the receiving unit into a digital sample signal, An FFT processing circuit that performs parallel processing on two types of FFT analysis with different number of processing points of Fast Fourier Transform (FFT) on the digital sample signal from the digital conversion circuit, and an output from the FFT processing circuit, A pulse specification detection device having a specification detection circuit for detecting specifications.   4. The pulse processing circuit according to claim 3, comprising: an FFT processing unit that performs FFT processing on the number N of processing points in one cycle; and an FFT processing unit that performs FFT processing on the number of processing points M (M <N). Former detection device.   The pulse specification detection device according to claim 2 or 4, wherein the number of processing points N and M is varied according to the specification of the incoming radio wave.

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