JP2008058571A - Electrooptical device and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electrooptical device which has a wide color gamut of four or more colors, the electrooptical device capable of achieving suitable driving during partial display, and electronic equipment. <P>SOLUTION: Disclosed is the electrooptical device which has pixels with color filters of at least four or more colors and in which switching between a full-screen display mode and a partial display mode is made possible, the electrooptical device being characterized in that when pixels of, for example, four colors R, G, B, and C are arranged on adjacent first and second scanning line groups in a shape of a two by two matrix and demultiplex driving is performed, pixel data of the four colors are supplied onto the first and second scanning line groups by two colors each in the full-screen display mode, and in the partial display mode, the amplitude of a horizontal scanning signal is made different from the amplitude in the full-screen display mode for the first or second scanning line group in the display area of the partial display mode without supplying data to pixels of C by stopping an image processing circuit performing color conversion from R, G, and B to R, G, B, and C. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an electro-optical device and an electronic apparatus having a pixel corresponding to a color filter having a colored region of at least four colors.

  Conventionally, a liquid crystal device and other various electro-optical devices are provided with a color filter in order to enable color display. This color filter is configured by arranging any one of a plurality of different colors, for example, red, green, and blue, for each pixel, and arranging these colored areas in a predetermined pattern. . Such a colored region is formed by, for example, a photolithography method using a photosensitive resin containing a coloring material such as a pigment or a dye.

  2. Description of the Related Art In recent years, electronic devices including a display device that is an electro-optical device such as a liquid crystal device have been required to have a high-definition display device with the addition of a moving image display function or an increase in the amount of display information. . On the other hand, in portable electronic devices such as media players and mobile phones, there is a demand for lower power consumption of display devices.

As a means for achieving the conflicting objectives of high definition and low power consumption of the display device, for example, in a standby state other than when the mobile phone is used, an image is displayed only in a part of the display area of the display device. A driving method for performing partial display (partial driving) is known. Such a display device using partial display is disclosed in Patent Document 1, for example.
JP 2003-248468 A

  By the way, conventionally, color filters of three colors R (red), G (green), and B (blue) corresponding to the three primary colors have been widely used. In recent years, color reproduction of electro-optical devices has been performed. In order to improve the performance, multicolor (4 or more colors) color filters tend to be employed.

  On the other hand, the above prior art document 1 discloses the writing of data in the non-display area in the partial display mode, but the partial display in a display panel having a large number of colors such as a four-color display panel realizing a wide color gamut. Is not disclosed. In addition, there is no disclosure about a driving method for reducing power consumption in an electro-optical device that employs a multicolor filter to achieve a wide color gamut.

  In view of the above problems, the present invention provides an electro-optical device and an electronic apparatus capable of realizing optimum driving at the time of partial display in an electro-optical device having a wide color gamut of four or more colors. Objective.

  An electro-optical device according to an aspect of the invention includes a pixel corresponding to a color filter provided corresponding to an intersection of a plurality of data lines and a plurality of scanning lines and having a colored region of at least four colors. A display unit that has a display unit that performs display based on image data supplied to the data line, drives all the pixels of the display unit and performs display, and a display that includes some pixels of the display unit In the electro-optical device capable of switching between a partial display mode for performing display in a region, the first and second scans are provided in the display unit, and pixels of each color constituting the colored region of at least four colors are adjacent to each other. First image data arranged in a line group and having pixel data of a smaller number of colors than the color of the color region of the color filter is input and based on the first image data. An image that generates pixel data of the four or more colors by color conversion, converts the first image data into second image data having pixel data of a number of colors corresponding to the color filter, and outputs the second image data A processing circuit; a scanning line driving circuit for supplying a horizontal scanning signal to each of the scanning lines; and the second image data for one data line selected from a predetermined number of data lines based on a selection signal. A selection circuit for supplying a time-division signal, and a data line driving circuit for outputting the second image data to the selection circuit. In the full-screen display mode, the scanning line The driving circuit supplies a horizontal scanning signal to the first and second scanning line groups, and the data line driving circuit supplies pixel data of each color of the second image data to the selection circuit. In the partial display mode, the data line driving circuit stops the image processing circuit and supplies only the pixel data of each color constituting the first image data to the selection circuit, and the scanning line driving circuit Is characterized in that the amplitude of the horizontal scanning signal is made different from the amplitude in the full-screen display mode for the first or second scanning line group.

  According to such a configuration of the present invention, when the image data is divided into a predetermined number (for example, divided into two) in one horizontal scanning period (1H) and selectively driven (demulti-driving) to be supplied to the data lines. In the full screen display mode, the second image data converted by the image processing circuit is supplied to the data line. As a result, color display by pixels of at least four colors or more is possible. In addition, since pixels representing one hue can be displayed in a pixel array arranged on the first and second scanning line groups, pixels representing one hue are collectively gathered by upper, lower, left and right sub-pixels. Has the advantage of being configurable. It is possible to improve color reproducibility and image quality.

  Further, in the partial display mode, since display by wide color gamut is not necessary (clock display or the like), color conversion by the image processing circuit is stopped, and only the first image data having a small number of input colors is input. Since it is displayed with, it is possible to save power consumption. Further, in the partial display mode, the horizontal scanning signal amplitude supplied to the first or second scanning line group is changed to be lower than that in the full screen display mode, thereby reducing power consumption. be able to.

  Therefore, in an electro-optical device that has a wider color gamut of four or more colors, it is possible to realize optimum driving that saves power and improves image quality during partial display.

In the present invention, the display unit is configured by interposing an electro-optical material between a pixel electrode connected to the data line and a counter electrode, and in the partial display mode, the display The data line and the counter electrode are short-circuited in a selection period of pixels other than the region.
According to such a configuration, the data line in the non-display area can be made equipotential with the counter electrode, and power consumption can be further reduced.

In the present invention, in the partial display mode, the counter electrode potential is applied as black level data to the data lines corresponding to all pixels in the first frame, and the data is displayed in the non-display area selection period from the second frame. The counter electrode potential is applied to the line.
According to such a configuration, in the partial display mode, the black level potential is written in the first frame, so that the potential of the entire screen is constant and a stable screen can be formed.

  In the present invention, in the partial display mode, the amplitude of the horizontal scanning signal is lowered for the second scanning line group to which the pixel data of the new color generated by the color conversion of the image processing circuit is supplied. It is characterized by doing.

  According to such a configuration, since the image processing circuit is stopped in the partial display mode, there is no pixel data of a new color generated by color conversion, so the amplitude of the horizontal scanning signal of the second scanning line group is reduced. Of course, the voltage (amplitude) necessary to turn on the TFT as the pixel switching element connected to the scanning line group is provided even if it is lowered. For example, in a mobile device such as a mobile phone, the partial display mode is executed by displaying time in standby mode. Therefore, even if the power consumption is reduced as described above, a practically necessary image quality can be obtained. It is possible.

In the present invention, the data line driving circuit is driven by lowering the frequency of the driving clock in the partial display mode as compared with the full screen display mode.
In such a configuration, driving is performed with the frequency of the drive clock lowered, so that there is a margin in the writing time and the writing time can be easily secured.

  In the present invention, the first image data is a red, green, and blue three-color image signal, and the second image data is a multicolor image signal of at least four colors. And

  According to such a configuration, it is possible to perform display with excellent color reproducibility.

  In the present invention, four color pixels are arranged in a square shape on the first and second scanning line groups adjacent to each other, and two color pixels of RGB are arranged on the first scanning line group, On the second scanning line group, the remaining one color pixel of RGB and the newly generated fourth color pixel different from these are arranged, and the image processing circuit receives the input RGB three-color image. A function of converting data into four-color image data obtained by adding the pixel data of the fourth color, and the data line driving circuit stops the image processing circuit in the partial display mode, Only the image data is supplied to the selection circuit, only two colors of the RGB image data are supplied to the first scanning line group, and the second scanning line on which the pixels of the fourth color are arranged. The remaining one color is supplied corresponding to the group.

  According to such a configuration, in an electro-optical device that achieves a wide color gamut using four colors, the pixels of the four colors can be configured in a collective manner in a square shape in the full screen display mode, and a partial display In the mode, it is possible to realize optimum driving that saves power and maintains an image quality by displaying a substantially square shape (however, one pixel is stopped).

An electronic apparatus according to the present invention is characterized in that a display device is configured by the electro-optical device.
According to such a configuration of the present invention, it is possible to provide an electronic device capable of realizing optimum driving in the partial display mode and having a wide color gamut of four or more colors.

Embodiments of the invention will be described with reference to the drawings.
[First Embodiment]
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a circuit diagram showing an electro-optical device according to a first embodiment of the invention. The present embodiment is applied to a liquid crystal device provided with a TFT active matrix driving type liquid crystal panel as an electro-optical device.

FIG. 2 is a diagram illustrating a configuration of a pixel of the electro-optical device. FIG. 3 is an explanatory diagram showing an overview of the electro-optical device of FIG. FIG. 4 is a cross-sectional view showing a schematic cross section of the liquid crystal panel after the assembly process in which the TFT substrate, which is an active matrix substrate, and a counter substrate are bonded together to enclose liquid crystal is completed.
In the following description, the electro-optical device 100 according to the present embodiment includes, for example, pixels arranged in a matrix of 240 pixels in the vertical direction (Y direction in the drawing) and 180 pixels in the horizontal direction (X direction in the drawing). Although described as a matrix display device having the display unit 10, the present invention is not limited to this.

The electro-optical device 100 according to the present embodiment includes a liquid crystal panel 30 and an LCD controller 11 as shown in FIG.
The liquid crystal panel 30 includes a display unit 10 that uses liquid crystal that is an electro-optical material, a drive circuit 351 that supplies display data and various control signals to the display unit 10, a scanning line drive circuit 352, and a data line drive circuit 353. Consists of. A driver unit 35 is configured by the drive circuit 351, the scanning line drive circuit 352, and the data line drive circuit 353. The driver unit 35 and the display unit 10 are configured on the liquid crystal panel 30 as shown in FIG. The LCD controller 11 is mounted on the external connection substrate 31, and the TFT substrate 32 constituting the liquid crystal panel 30 and the external connection substrate 31 are connected to each other by a flexible substrate (hereinafter referred to as an FPC substrate) 36. Various signals such as data signals and commands from the LCD controller 11 are supplied to the driver unit 35 by the FPC board 36.

  In the display portion 10 of the TFT substrate, a plurality of scanning lines 2 and a plurality of data lines 1 are wired so as to intersect with each other, and corresponding to each intersection of the scanning lines 2 and the data lines 1. Pixel electrodes 4 are formed in a matrix. In addition, a thin film transistor (hereinafter referred to as TFT) 3 which is a pixel switching element is formed corresponding to each intersection of the scanning line 2 and the data line 1. A counter electrode 5 is formed in the display unit 10 so as to face the pixel electrode 4. The counter electrode 5 is a so-called solid electrode formed in all regions in the display unit 10, and the counter electrode 5 is connected to a common voltage supply source 7 that supplies a counter electrode potential (common voltage) VCOM.

  As shown in FIG. 2, the TFT as a switching element has a source connected to one of the data lines 1, a gate connected to one of the scanning lines 2, and a drain connected to the pixel electrode 4. The pixel electrode 4 is disposed to face the counter electrode 5, and a liquid crystal 6 that is an electro-optical material is interposed between the electrodes 4 and 5. A pixel is configured corresponding to each intersection of the scanning line 2 and the data line 1. Each pixel includes a TFT 3, a pixel electrode 4, a counter electrode 5, and a liquid crystal 6 (see FIG. 4).

  The TFT 3 is turned on by a scanning signal supplied via the scanning line 2, whereby image data that is a voltage signal supplied to the data line 1 is supplied to the pixel electrode 4. The counter electrode 5 is supplied with a counter electrode potential VCOM whose polarity is inverted every predetermined period. A voltage between the pixel electrode 4 formed on the TFT substrate and the counter electrode 5 is applied to the liquid crystal 6. The liquid crystal 6 changes its orientation in accordance with the applied voltage, whereby the light transmitted through the liquid crystal is modulated. That is, an image is displayed by supplying a potential corresponding to the gradation to the pixel electrode 4 with the electrode potential VCOM as a reference.

The electro-optical device 100 of the present embodiment is a liquid crystal device capable of color display, and the display unit 10 is provided with a color filter (not shown). These color filters have a colored region colored with RGBC4 colors corresponding to each pixel.
Here, when one pixel 110 is composed of at least four or more colored regions, the adjacent first and second pixels 110G, 110B, 110R, and 110C that form the colored regions of four or more colors are sub-pixels. A pixel array structure is formed by dividing the second scanning line group and using the colored regions of four or more colors as one main pixel. Here, the first and second scanning line groups mean each group of scanning lines grouped every other line.

  In the present embodiment, the color filter provided in the display unit 10 has four color areas corresponding to each pixel, and four sub-pixels 110G corresponding to each color in the four color areas. , 110B, 110R, and 110C constitute one pixel 110.

  For example, the electro-optical device 100 employs a color filter having four colored regions of R (red), G (green), B (blue), and C (cyan), which will be described later.

Accordingly, in the display unit 10 of FIG. 1, four color pixels are arranged in a square shape in the adjacent first and second scan line groups, and two color pixels of RGB are arranged in the first scan line group. In the second scanning line group, the remaining one color pixel of RGB and a C (cyan) pixel which is a fourth color different from these newly provided pixels are arranged, and the four color fields are arranged. The pixel 110 having a single hue is realized by the pixel arrangement of “<”. A driving method for performing 2-demultiplex (serial-parallel conversion) driving for every two pixels of the first and second scanning line groups with respect to the four-color paddy pixel array is referred to as paddy-array 2-demultiplex driving. I will call it. The 2-demulti drive will be described later with reference to FIGS.
In addition, the scanning line driving circuit 352 and the data line driving circuit 353 arranged outside the substantially rectangular display unit 10 of the electro-optical device 100 are configured by semiconductor chips and mounted on the TFT substrate 32. ing.

  The scanning line driving circuit 352 supplies scanning signals G1, G2, G3,... To the scanning lines 2 of the first row, the second row, the third row,. Specifically, the scanning line driving circuit 352 sequentially selects 240 scanning lines 2 one by one by supplying a scanning signal every horizontal scanning period. The operation of supplying a selection voltage as a scanning signal to the selected scanning line 2 and a non-selection voltage to the other scanning lines 2 is repeated every vertical scanning period (one frame period). The data line driving circuit 353 outputs data signals S1, S2, S3,... Corresponding to the display contents (gradation) to the pixels of each color connected to the scanning line 2 selected by the scanning line driving circuit 352. The data lines 1 are supplied via the first, second, third,... Data lines 1 respectively.

  The scanning line driving circuit 352 and the data line driving circuit 353 are electrically connected to the driving circuit 351 through signal lines 76 and 72, respectively. Note that the scanning line driving circuit 352 and the data line driving circuit 353 may be formed on the TFT substrate 32 by a semiconductor manufacturing process.

  An equalize circuit 40 is formed on the TFT substrate 32 on the side facing the scanning line driving circuit 352 with the image display unit 10 interposed therebetween. The equalize circuit 40 is a circuit that supplies the counter electrode potential VCOM to the data line 1 via the equalize switch 41. The equalize switch 41 is a switch circuit that is opened and closed by an equalize signal CP, and the counter electrode potential VCOM is supplied to the data line 1 only during the period when the equalize signal CP is supplied. In other words, during the period in which the equalize signal CP is supplied, the data line 1 is short-circuited with the counter electrode 5 and the potentials of both are equal. The equalize signal CP is output at a predetermined timing from a drive circuit 351 described later.

Next, the overall configuration of the liquid crystal panel 30 will be described with reference to FIG. The display unit 10, the scanning line driving circuit 352, and the data line driving circuit 353 in FIG. 1 are configured on the TFT substrate 32 in FIG.
As shown in FIG. 4, the liquid crystal panel 30 includes a TFT substrate 32 made of, for example, a quartz substrate, a glass substrate, or a silicon substrate, and a counter substrate 33 made of, for example, a glass substrate or a quartz substrate. And the liquid crystal 6 is sealed. The TFT substrate 32 and the counter substrate 33 that are arranged to face each other are bonded together by a sealing material 52.

  On the TFT substrate 32, the scanning line 2 and the data line 1 described above are provided, and the TFT 3 is provided corresponding to the intersection thereof. On the TFT substrate 32, pixel electrodes (ITO) 4 constituting pixels are arranged in a matrix. On the pixel electrode 4 of the TFT substrate 32, an alignment film 37 subjected to an alignment process is provided.

  On the other hand, the counter substrate 33 is provided with a first light-shielding film 23 in a region facing the data line 1, the scanning line 2 and the TFT formation region of the TFT substrate 32, that is, a non-display region of each pixel. The first light shielding film 23 prevents incident light from the counter substrate 33 side from entering the TFT channel region, source region, and drain region.

The counter substrate 33 is provided with a light shielding film 53 as a frame for partitioning the display unit 10. On the counter substrate 33 and the first light shielding film 23, a color filter layer (hereinafter referred to as a CF layer) 51 is formed over substantially the entire surface. A protective film layer (not shown) is formed on the CF layer 51. Reference numeral 105 is a light shielding film as a frame.
The CF layer 51 is an organic coloring film colored red, green, blue, and cyan at positions and sizes corresponding to the pixel electrodes 4, and each colored portion constitutes a pixel. The protective film layer is an organic film provided for protecting the CF layer 51 and for absorbing and flattening the difference in thickness of each colored portion.

A counter electrode (common electrode) 5 is formed over the entire surface of the counter substrate 33 on the protective film layer. An alignment film 22 made of a polyimide-based polymer resin is laminated on the counter electrode 5 and rubbed in a predetermined direction.
The TFT substrate 32 and the counter substrate 33 on which the respective layers are formed, for example, form the sealing material 52 along the four sides of the counter substrate 33, and form vertical conduction materials (not shown) at the four corners of the sealing material 52, The alignment films 37 and 22 are bonded together by a sealing material 52 so as to face each other.

  The liquid crystal 6 is sealed between the TFT substrate 32 and the counter substrate 33. In this configuration, the TFT is turned on in response to the scanning signal, and the image signal supplied from the data line 114 is written to the pixel electrode 4. Depending on the written potential difference between the pixel electrode 4 and the counter electrode 5, the orientation and order of the molecular assembly of the liquid crystal 6 change to modulate the light and enable gradation display.

  On one surface of the TFT substrate 32 of the liquid crystal panel 30, an illumination device (not shown) that functions as a backlight is disposed. The illuminating device emits light from below the TFT substrate 32 so that the backlight light is incident on the liquid crystal panel 30 disposed above the illuminating device.

  An external connection terminal 102 and a driver unit 35 for connection with an external circuit are provided in a region outside the sealing material 52. An FPC board 36 is pressure-bonded to the external connection terminal 102, and a signal is supplied from the LCD controller 11 through the FPC board 36. The LCD controller 11 supplies display image data (display data), a horizontal synchronization signal Hsync, a vertical synchronization signal Vsync, a dot clock signal DLCK, and the like to the drive circuit 351 of the driver unit 35.

  The drive circuit 351 generates various timing signals based on the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the dot clock DCLK supplied from the outside. For example, the drive circuit 351 generates a data supply timing signal such as a data transfer clock or a data enable signal and outputs the data supply timing signal to the data line drive circuit 353. In addition, the drive circuit 351 generates a scan start pulse DY, a scan side transfer clock CLY, and the like and outputs them to the scan line drive circuit 352.

  The scanning line driving circuit 352 sequentially outputs the scanning signals G1, G2, G3,... To each scanning line 2 when the scanning start pulse DY is input. The scanning-side transfer clock CLY is a signal that defines the scanning-side scanning speed, and scanning signals G1, G2, G3,... Are sequentially sent to the scanning lines 2 in synchronization with the transfer clock.

  In this embodiment, the driver circuit 351 can output display data to the data line driver circuit 353. The data line driving circuit 353 supplies display data to each data line 1 at a timing based on the data supply timing signal. For example, the data line driving circuit 353 determines the timing for outputting display data held in a shift register (not shown) in parallel for the number of horizontal pixels based on the data enable signal. Further, the data line driving circuit 353 determines the sampling timing of a data latch circuit (not shown) corresponding to each data line based on the transfer clock. In the present embodiment, the data line driving circuit 353 inputs parallel data for the number of horizontal pixels, and image data that is time-divided for each pixel data of the number of colors corresponding to four or more color filters (that is, serial format). A parallel-to-serial converter circuit that generates the data), a source amplifier that amplifies and outputs the image data, and a single data line selected from a predetermined number (for example, two) of data lines based on the selection signal A selection circuit for supplying the time-divided image data is provided.

Next, the four colored areas will be described in detail below.
The colored area is composed of four colored areas to form one pixel.
The four colored areas are the blue hue colored area, the red hue colored area, and the hue from blue to yellow in the visible light area (380 to 780 nm) whose hue changes according to the wavelength. It consists of colored areas of two types of hues selected from among them. Although it is used here as a system, for example, if it is a blue system, it is not limited to a pure blue hue, but includes a bluish purple or a bluish green. If it is a red hue, it is not limited to red but includes orange. These colored regions may be composed of a single colored layer, or may be composed of a plurality of colored layers having different hues. In addition, although these colored regions are described in terms of hue, the hue can be set by changing the saturation and lightness as appropriate.

The specific hue range is
The colored region of the blue hue is from bluish purple to blue-green, and more preferably from indigo to blue.
The colored region of the red hue is orange to red.
One colored region selected with a hue from blue to yellow is blue to green, more preferably blue-green to green.
The other colored region selected with a hue from blue to yellow is from green to orange, more preferably from green to yellow. Or it is green to yellowish green.

Here, the same hue is not used for each colored region. For example, when a green hue is used in two colored regions selected from hues of blue to yellow, the other uses a blue or yellowish green hue for one green.
Thereby, a wider range of color reproducibility than the conventional RGB colored region can be realized.

As another specific example, it represents with the wavelength which permeate | transmits a colored region.
The blue colored region is a colored region having a wavelength peak of light transmitted through the region of 415 to 500 nm, preferably a colored region of 435 to 485 nm.
The red colored region is a colored region having a wavelength peak of light transmitted through the region of 600 nm or more, and preferably a colored region of 605 nm or more.
One colored region selected with a hue from blue to yellow is a colored region having a wavelength peak of light of 485-535 nm, preferably 495-520 nm.
The other colored region selected with a hue from blue to yellow is a colored region having a wavelength peak of light transmitted through the region of 500-590 nm, preferably a colored region of 510-585 nm, or 530-565 nm. It is a certain colored area.

  In the case of transmissive display, this wavelength is a numerical value obtained by illuminating light from the illumination device through the color filter. In the case of reflective display, the value is obtained by reflecting external light.

  As another specific example, it is expressed by an x, y chromaticity diagram.

  The blue colored region is a colored region in which x ≦ 0.151 and y ≦ 0.200, and preferably in a color in which 0.134 ≦ x ≦ 0.151 and 0.034 ≦ y ≦ 0.200 It is an area.

  The red coloring region is a coloring region in which 0.520 ≦ x and y ≦ 0.360, and preferably, coloring in which 0.550 ≦ x ≦ 0.690 and 0.210 ≦ y ≦ 0.360 It is an area.

One colored region selected with a hue from blue to yellow is a colored region in which x ≦ 0.200 and 0.210 ≦ y, and preferably 0.080 ≦ x ≦ 0.200 and 0.210. It is a colored region in ≦ y ≦ 0.759.
The other colored region selected with a hue from blue to yellow is a colored region in 0.257 ≦ x, 0.450 ≦ y, preferably 0.257 ≦ x ≦ 0.520, 0.450. It is a colored region in which ≦ y ≦ 0.720.
In the case of transmissive display, the x, y chromaticity diagram is a numerical value obtained by illuminating light from the illumination device through the color filter. In the case of reflective display, the value is obtained by reflecting external light.
These four colored areas can be applied within the above-described range when the sub-pixel includes a transmission area and a reflection area.

  As a backlight, an LED, a fluorescent tube, or an organic EL may be used as an RGB light source. Alternatively, a white light source may be used. The white light source may be a white light source generated by a blue light emitter and a YAG phosphor.

As the RGB light source, the following are preferable.
B is a peak of the wavelength of emitted light at 435 nm to 485 nm
G is a peak of the wavelength of emitted light at 520 nm to 545 nm
R has a peak wavelength of emitted light at 610 nm-650 nm
If the color filter is appropriately selected according to the wavelength of the RGB light source, a wider range of color reproducibility can be obtained.
Moreover, you may use the light source with a some peak so that a wavelength may come to a peak at 450 nm and 565 nm, for example.

Examples of the configuration of the four colored regions include the following.
Colored areas with hues of red, blue, green, and cyan (blue green)
Colored areas with hues of red, blue, green, and yellow
Colored areas with hues of red, blue, dark green, and yellow
Colored areas of red, blue, emerald, yellow
Colored areas of red, blue, dark green, and yellowish green
For example, the electro-optical device 100 according to the present embodiment includes a color filter having four colored areas, and is electro-optic. The apparatus 100 has a color reproduction range that is wider than the color reproduction range of an electro-optical device provided with a color filter having three color regions of conventional RGB.

  The electro-optical device 100 according to the present embodiment can perform so-called partial display in which an image is displayed only on a part of the display unit 10. Partial display is, for example, when the display unit 10 is composed of pixels arranged on a matrix of 240 pixels in the vertical direction (Y direction in the figure) and 180 pixels in the horizontal direction (X direction in the figure), as shown in FIG. This is a display method in which an image is displayed with the pixel area from the 80th line to the 240th line from the upper end in the vertical direction (Y direction) as the display area. In this partial display, no image is displayed in the non-display area, which is another area. Hereinafter, the partial display state of the electro-optical device 100 is referred to as a partial display mode, and the state in which an image is displayed in the entire area of the display unit 10 is referred to as a full screen display mode. The partial display (partial display) in the electro-optical device of the present invention is not limited to the display shown in FIG.

FIG. 6 is a block diagram showing a schematic configuration of the drive circuit 351 of the present embodiment.
The drive circuit 351 receives image signals and various command signals from the LCD controller 11 which is an external device. The drive circuit 351 includes an interface control circuit (hereinafter referred to as I / F control circuit) 12, a command control circuit 13, an image processing circuit 14, a selector circuit 15, a latch circuit 16, and a gamma (γ) correction circuit (hereinafter referred to as “a control circuit”). , A gamma (γ) circuit) 17, an amplifier 18, a select timing control circuit 19, and a signal selection circuit 20.

  An image signal or the like from the LCD controller 11 is input to the I / F control circuit 12. The I / F control circuit 12 outputs the input image signal or the like to the command control circuit 13 in a predetermined unit, for example, every 8 bits.

  The command control circuit 13 outputs an image signal and a control signal to the image processing circuit 14 and the selector circuit 15 depending on whether the input signal is a command signal or an image signal. The image signal is output to the image processing circuit 14 at a predetermined timing in a predetermined unit. For example, the command control circuit 13 outputs an image signal in units of 24 bits to the image processing circuit 14 every clock (CLK).

  The command control circuit 13 supplies the clock signal (CLK) to the image processing circuit 14 or the clock signal (CLK) to the image processing circuit 14 according to the display mode, that is, the partial display mode or the full screen display mode. Stop supplying. Specifically, the command control circuit 13 supplies the clock signal (CLK) to the image processing circuit 14 when the display mode is the full screen display mode, and the clock signal (to the image processing circuit 14 when the display mode is the partial display mode. (CLK) is stopped. The signal MODE indicating the display mode is input to the command control circuit 13.

  The image processing circuit 14 includes a color conversion circuit that converts three image signals of three colors, that is, RGB (red, green, and blue) into the four-color image signals described above. The color conversion circuit inputs first image data having pixel data of a smaller number of colors (for example, three colors) than the color of the color region of the color filter (CF), and the first image data and the first image data A pixel having pixel data of a number of colors (for example, four colors) corresponding to the color filter, including pixel data of a color (for example, cyan) newly generated by performing color conversion based on one image data. 2 is converted into image data. As will be described later, in the partial display mode, since the clock signal CLK is not input to the image processing circuit 14, the image processing circuit 14 stops the driving operation. Accordingly, the conversion operation of the color conversion circuit is also stopped. In the present embodiment, in the partial display mode as shown in FIG. 5, the operation of the color conversion circuit is stopped to stop the supply of data to the C pixels, thereby reducing the power consumption.

  The selector circuit 15 receives the image signal output from the command control circuit 13 and the image signal output from the image processing circuit 14. The selector circuit 15 selects and outputs either the image signal output from the command control circuit 13 or the image signal output from the image processing circuit 14 based on the selection signal (SEL) from the command control circuit 13. .

  The selector circuit 15 outputs an image signal selected in a predetermined unit to a latch circuit 16 such as a RAM. The image signal stored in the latch circuit 16 is output to the gamma circuit 17.

In the partial display mode, the selector circuit 15 writes dummy data to the cyan (C) image signal that is one of the color signals in the latch circuit 16. In the full screen display mode, the command control circuit 13 and the selector circuit 15 output the full screen display image signal converted into the RGBC four-color image signal by the image processing circuit 14, and in the partial display mode. The control circuit is configured to control to stop driving the image processing circuit 14 and output partial display image signals that are RGB three-color image signals.

The gamma circuit 17 is a circuit for gamma correction, performs gamma correction on the input image signal, and supplies the gamma-corrected image signal to the amplifier 18.
The amplifier 18 is an amplifying circuit for amplifying the image signal with a predetermined amplification factor, amplifies the image signal from the gamma circuit 17 with a predetermined amplification factor, and supplies the amplified signal to the signal selection circuit 20. The amplification factor of the amplifier 18 is determined by an amplification factor control signal (ADJ), which will be described later, supplied from the command control circuit 13.

The select timing control circuit 19 controls the signal selection circuit 20 to select and output an image signal input to the signal selection circuit 20 based on a selection control signal (SELL) from the command control circuit 13. This is a circuit for outputting a selection signal of each image signal to the signal selection circuit 20.
The signal selection circuit 20 is a circuit including a switch circuit that selects a plurality of input image signals. Based on the selection signal from the select timing control circuit 19, the signal selection circuit 20 receives the full screen display image signal and the partial display image signal input at a predetermined timing at a predetermined timing according to the display mode. A predetermined time is selected and output to the corresponding R (red), G (green), B (blue), and C (cyan) data lines 72, respectively.

  For this purpose, the signal selection circuit 20 is used for R (red), G (the other colored region selected by the hue from blue to yellow: green to yellow), B (blue) and C (from blue). It includes four switch circuits SWR, SWG, SWB, SWC corresponding to four data lines 72 for one colored region (blue green to green) selected with a hue up to yellow. The select timing control circuit 19 outputs selection signals R_SEL, G_SEL, B_SEL, and C_SEL for controlling on / off of the four switch circuits SWR, SWG, SWB, and SWC.

  As described above, the command control circuit 13 outputs the image data and the like to the image processing circuit 14, the selector circuit 15, and the latch circuit 16, as well as the amplification factor control signal (ADJ) to the amplifier 18 and the select timing. A selection control signal (SELL) is output to the control circuit 19.

  The command control circuit 13 supplies an amplification factor control signal (ADJ) to the amplifier 18, and the amplifier 18 has different amplification factors in the full screen display mode and the partial display mode based on the amplification factor control signal (ADJ). The input image data is amplified. More specifically, when the display mode is the reflection mode, the command control circuit 13 supplies an amplification factor control signal (ADJ) to the amplifier 18 so as to amplify the image data at a lower amplification factor than in the transmission mode. . In the partial display mode, the command control circuit 13 constitutes a control circuit that lowers the amplification factor of the amplifier 18 that amplifies the partial display image signal than in the full screen display mode. Thereby, power consumption by the amplifier in the partial display mode can be suppressed.

The operation of the electro-optical device 100 of the present embodiment having the above configuration will be described below.
First, the operation in the full screen display mode will be described.
The scanning line driving circuit 352 sequentially supplies scanning signals G1, G2, G3,... To the first, second, third,. This operation is repeated every frame period (1F).

  In the full screen display mode, the drive circuit 351 outputs the RGB three-color image signals, which are the first color image signals input from the LCD controller 11, as second color image signals in the image processing circuit 14. Conversion to RGBC four-color image signals. The drive circuit 351 outputs RGBC four-color image signals over the entire one frame period. The four-color image signals output from the drive circuit 351 are input to the data line drive circuit 353, pass through the 2-demultiswitch circuit 351-2 (see FIG. 7), and are output to the subpixels 110R, 110C, and 110G as data signals. And 110B.

  In the full-screen display mode, the data line driving circuit 353 inputs RGBC four-color image signals corresponding to one coloring area output in parallel from the driving circuit 351, and outputs the image signals to one coloring area. In the partial display mode, RGB image signals corresponding to one colored region output in parallel from the drive circuit 351 are input in the partial display mode. A parallel-serial conversion circuit (not shown) having a plurality of parallel-serial conversion units that output the data by rearranging the data in the order of RGB in serial order for each of the colored regions, and RCGB from the parallel-serial conversion circuit. Alternatively, a source amplifier 353-1 (see FIG. 7) that inputs and amplifies and outputs an RGB serial signal, and an RCGB or RGB serial signal is input from this source amplifier, and the entire screen is displayed. In the display mode, image signals of two colors G and B are supplied to two pixels G and B adjacent in the horizontal direction of the first scanning line group of the display unit 10, and the horizontal direction of the second scanning line group The two pixels R and C adjacent to each other are supplied with two color image signals R and C, and in the partial display mode, the two pixels G and G adjacent to the first scanning line group of the display unit 10 in the horizontal direction are supplied. An image signal of two colors G and B is supplied to B, and an image signal of one color R is applied to one pixel R in the horizontal direction of the second scanning line group (color conversion processing of the image processing circuit 14 in the partial display mode) 2 is a selection circuit for supplying a 2 de-multi switch circuit 353-2 (see FIG. 7). .

  In the full-screen display mode, the data signal is continuously supplied to the data line 1 during one frame period. As a result, the data signal is supplied to all the pixels of the display unit 10, and the full-screen display mode is set. Display is performed.

Next, the operation in the partial display mode will be described.
As in the full screen display mode, the scanning line drive circuit 352 sequentially supplies scanning signals G1, G2, G3,... To the first, second, third,. This operation is repeated every frame period (1F).

  In the partial display mode, the image processing circuit 14 of the drive circuit 351 is not driven. Therefore, the drive circuit 351 performs only γ correction and amplification on the RGB three-color image signals input from the LCD controller 11 and outputs RGB three-color image signals. The driving circuit 351 outputs the RGB three-color image signals only for a predetermined period in one frame period.

  More specifically, in the present embodiment, the scanning line driving circuit 352 outputs RGB three-color image signals in a period during which the scanning signal is supplied to the 80th to 240th scanning lines 2 shown in FIG. . The RGB three-color image signals output from the drive circuit 351 are input to the data line drive circuit 353 during the period when the scanning lines 2 from the 80th row to the 240th row are selected, and the 2-demultiswitch circuit 351. -2 (see FIG. 7), the data signal is supplied to each of the sub-pixels 110R, 110G, and 110B. No data signal is supplied to the data line 2 to which the sub-pixel 110C is connected.

As a result, the data signal is supplied only to the pixels in the 80th to 240th rows, which are a part of the display unit 10, and partial display (partial display) is performed.
In the partial display mode, no image signal is supplied during a period in which the scanning line 2 other than the 80th to 240th lines, which is the display area, is selected by the scanning line driving circuit 352. That is, the counter electrode potential VCOM is supplied to the data line 1 during the period when the scanning line 2 in the first to 79th rows is selected.

  The electro-optical device 100 according to the present embodiment uses four color filters of RGBC. However, the color and the number of colors used in the coloring region of the color filter of the electro-optical device according to the present invention are the same. It is not limited to combinations. The color region of the color filter used in the liquid crystal panel may be five or more colors. For example, a configuration using a white (colorless) color region in addition to the four colors RGBC is conceivable. In this case, the luminance in white display can be improved.

Next, with reference to FIGS. 7 to 9, the 2-demulti drive for the square-shaped array pixel in the present embodiment will be described.
FIG. 7 is a diagram for explaining the principle of the U-shaped array 2-demulti drive, and FIG. 8 is a diagram showing RCGB serial signals S1, S2,... Supplied to FIG.
In FIG. 7, (a) shows a square-shaped array 2 demulti-drive circuit, and (b) shows a pixel R1, on the scanning line Gate1 (corresponding to the second scanning line in FIG. 1) in the circuit (a). The timing of writing R and C signals to C1, and the timing of writing G and B signals to the pixels G1 and B1 on the scanning line Gate2 (corresponding to the first scanning line in FIG. 1) are shown. Hsync is a horizontal synchronization signal. In the actual liquid crystal panel, a predetermined number of sets of the scanning lines Gate2 and the scanning lines Gate1 constituting the first and second scanning line groups are arranged in the vertical direction. Here, the scanning lines Gate2 and the scanning lines Gate1 are arranged. Only one set is shown as a representative.

  As shown in FIG. 7 (a), for the set of pixels R1, C1, G1, B1 in a square array, the pixels R1, C1 are arranged on the scanning line Gate1, and the pixels G1, B1 are arranged on the scanning line Gate2. Has been placed. A data line SEL1 is connected to the vertical pixels R1, G1, and a data line SEL2 is connected to the pixels C1, B1.

  In the data line driving circuit 353, RGBC four-color image signals are input and rearranged serially in RCGB order for each colored region (in other words, time division multiplexed in RCGB order). A parallel-serial converter circuit (not shown) that outputs an RCGB serial signal, a source amplifier 353-1 that receives the RCGB serial signal from the parallel-serial converter circuit, amplifies and outputs the serial signal, and an RCGB serial signal from the source amplifier. A signal is input, image signals of two colors R and C are supplied to two adjacent pixels R1 and C1 on the scanning line Gate1, and two adjacent pixels G1 and B1 on the scanning line Gate2 are supplied. And a 2-demulti switch circuit 353-2 which is a selection circuit for supplying image signals of two colors G and B.

  The 2-demultiplex switch circuit 353-2 includes a plurality of switch circuits each having an input terminal a for inputting a serial signal and output terminals b and c for outputting the serial signal by serial-parallel conversion (demultiplexing). .., And a plurality of RCGB serial signals S1, S2, S3,... As shown in FIG. 8 are simultaneously input in parallel, and the serial signals RC and GB are parallel signals (R) every 1H period. , C) and (G, B). In the first 1H period, two color image signals of R and C are supplied to two adjacent pixels R1 and C1 on the scanning line Gate1, During the 1H period, image signals of two colors G and B are supplied to two adjacent pixels G1 and B1 on the next scanning line Gate2.

  As a result, as shown in FIG. 7B, the R and C signals are written to the pixels R1 and C1 of the first scanning line Gate1 in the first 1H period, and the pixels G1 and B1 of the next scanning line Gate2 are written. The G and B signals are written in the next 1H period.

  As described above, in the data line driving circuit, the demulti drive (data is supplied by dividing one horizontal scanning period into two) as shown in FIG. This has the advantage that the number of drive amplifiers and DACs can be reduced and the cost can be reduced.

  9A and 9B are diagrams for explaining the principle of conventional line-sequential driving. FIG. 9A shows a circuit for line-sequential driving, and FIG. 9B shows write timing for line-sequential driving. In this conventional line sequential driving, the arrangement of the pixels R1, G1, B1, R2, G2, B2,... On the scanning line is the same for the other scanning lines, so that only one scanning line is represented. It is shown.

  For pixels R1, G1, B1, R2, G2, B2,... On the scanning line, pixel signals R, G, B, R, G, B,... Are converted to pixels R1, G1, B1, R2, G2, B2,. Are simultaneously written through a plurality of source amplifiers 353-1 ′ provided corresponding to. At this time, the pixel signals R, G, B, R, G, B,... Are simultaneously written to one scanning line, and are sequentially written to a plurality of scanning lines every 1H in terms of time. The conventional line-sequential driving circuit shown in FIG. 9A needs to supply pixel signals from the data line driving circuit corresponding to the number of pixels on the scanning line of the display unit. Compared with a 2-demulti drive circuit having a character arrangement, the number of drive amplifiers and DACs is large, the area is large, and the power consumption is large.

Next, operations in the full screen display mode and the partial display mode will be described with reference to FIGS.
FIG. 10 is a diagram showing the timing of the horizontal scanning signal and the image data written in each pixel of RCGB in the full screen display mode.
11 and 12 are diagrams showing the timing of the horizontal scanning signal and image data written in each pixel of RCGB in the partial display mode. FIG. 11 is a diagram showing the horizontal scanning signal of the first frame in the partial display mode and the timing of black data written to each pixel of RCGB. FIG. 12 is the horizontal scanning signal of the second frame in the partial display mode. FIG. 5 is a diagram illustrating the presence and timing of image data written in each pixel of RCGB.

  In these figures, GATE is a scanning line, and in the full-screen display mode shown in FIG. 10, horizontal scanning supplied to each scanning line of 240 scanning lines GATE1 to GATE240 every one horizontal scanning period (1H). The timing of the signal and the image data R, C, G, B written in each pixel of RCGB is shown. For example, the image data R and C are respectively written into the pixels R and C on the first scanning line GATE1 at regular intervals of about ½ or less of 1H, and the image data G and B are respectively subjected to the second scanning. Data is written into the pixels G and B on the line GATE2 at regular intervals of about ½ or less of 1H. Similarly, in the third and fourth scanning lines GATE3 and GATE4, the image data R and C are written to the pixels R and C on the third scanning line GATE3 at regular intervals of about ½ or less of 1H, respectively. Thus, the image data G and B are written into the pixels G and B on the fourth scanning line GATE4 at regular intervals of about ½ or less of 1H, respectively. The same applies to the set of scan lines after the third and fourth scan lines. Vsync is a vertical synchronization signal, and 1F represents a period of one frame.

In the first frame in the partial display mode shown in FIG. 11, black level data (hereinafter abbreviated as black data, BL) is once written in all pixels of the entire screen. This is because in the partial display mode, the potential of the entire screen is not constant and stable unless any potential is written even in the first frame. In order to write black data, the equalization signal CP may be set to the high level in the first frame to turn on the equalization switch 41 and apply the counter electrode potential VCOM to all the data lines.
In the second and subsequent frames in the partial display mode shown in FIG. 12, a non-display area from the scanning lines GATE1 to GATE79 and a display area from the scanning lines GATE80 to GATE240 are generated. NO-Data indicates that no data is supplied.
For the non-display area in the second and subsequent frames, the data lines are short-circuited with the counter electrode potential VCOM without supplying RGBC image data (that is, the equalize switch 41 is turned on). In the non-display area from the second frame onward, since the scanning signal is not applied to the scanning lines GATE1 to GATE79, the TFT3 as the pixel switching element is turned off.

  For the display area in the second and subsequent frames, the color conversion circuit in the image processing circuit 14 is stopped and only the RGB data is supplied without supplying the C data. The R data is continuously supplied to another R pixel on the scanning line (for example, the 80th and 82nd lines) where the first pixel is arranged for a period of 1H. The period during which the R image data R-Data can be written into the pixel R is approximately 2 of the period during which the G and B image data G-Data and B-Data are written into the pixels G and B ((1/2) H period or less). This is possible up to a period twice as long (maximum 1H period).

  For the second and subsequent frames in the partial display mode, data R is supplied to the R image, but data C is not supplied to the C pixel. The amplitude Vg2 of the scanning signal voltage (in other words, the gate voltage of the TFT) on the scanning line where the C pixel is arranged is lower than the amplitude Vg1 of the scanning signal voltage of the scanning line where the G and B pixels are arranged. It may be set. In this way, even when the amplitude of the scanning signal voltage supplied to a certain scanning line in the partial display mode is lowered, the voltage necessary for turning on the TFT as the pixel switching element connected to the scanning line ( Of course, it has (amplitude).

  As a result, power consumption due to the scanning signal voltage supplied to the TFT can be reduced in the display area in the partial display mode.

  As described above, the electro-optical device 100 according to the present embodiment can display an image with high color reproducibility using the color filter having four colored regions in the full screen display mode. A wide color gamut is also achieved by supplying data to C pixels additionally provided for RGB pixels. On the other hand, in the partial display mode, as shown in the clock display or the like, there is no need to display with wide color gamut data as in the case of full screen display, so the four pixels R, G, B, and C By supplying data signals only to the three sub-pixels R, G, and B, low power consumption is achieved.

For example, in the partial display mode, the operation of the image processing circuit 14 of the drive circuit 351 is stopped and the supply of data to the C pixel is stopped, so that power consumption by the drive circuit 351 is reduced.
In the data line driving circuit, the demulti drive is applied to the RGBC character array. Demulti drive (dividing one horizontal scanning period into two to supply data) reduces the number of DACs and reduces costs.
Also, in the partial display mode, when driving with a reduced clock frequency compared to the full screen display mode, the scan signal voltage supplied to the scan line is reduced by a margin for the writing time, resulting in lower power consumption. Can be achieved. Further, in the partial display mode, the power consumption can be further reduced by setting the amplitude of the scanning signal of the line where the C pixel is arranged to be lower than the amplitude of the scanning signal of the line where the C pixel is not arranged. be able to.

The electro-optical device according to the above-described embodiment is applied to an electronic device such as a mobile phone.
Next, an electronic apparatus having the electro-optical device according to the above-described embodiment as a display device will be described.
FIG. 13 is a perspective view illustrating an appearance of a mobile phone as an electronic apparatus.

  As shown in FIG. 13, the mobile phone 1200 has a display unit 150 that constitutes the above-described display device as an electro-optical device, in addition to the plurality of operation buttons 1201, together with the earpiece 1202 and the mouthpiece 1203. In the display unit 150, for example, if the mobile phone 1200 is in a standby state, the electro-optical device is set to the partial display mode, and only the time display is performed on the display unit 150, for example. Thereby, power consumption of the mobile phone 1200 in the standby state can be suppressed, and the mobile phone 1200 can be used for a long time. Further, when the mobile phone 1200 is operated, the electro-optical device is set to the full screen display mode. In the full screen display mode, still images and videos with high color reproducibility can be displayed.

  The electro-optical device of the present invention is not limited to a liquid crystal device, but an electroluminescent device, an organic electroluminescent device, a plasma display device, an electrophoretic device that displays images by supplying video signals such as R, G, and B to an electro-optical material. The present invention can be similarly applied to various electro-optical devices such as a display device and a device using an electron-emitting device (Field Emission Display, Surface-Conduction Electron-Emitter Display, etc.).

The present invention can also be applied to a display device for forming an element on a semiconductor substrate, for example, LCOS (Liquid Crystal 1 On Silicon).
In LCOS, a single crystal silicon substrate is used as an element substrate, and a transistor is formed on a single crystal silicon substrate as a switching element used for a pixel or a peripheral circuit. In addition, a reflective pixel electrode is used for the pixel, and each element of the pixel is formed under the pixel electrode.

  Electronic devices to which the electro-optical device of the present invention is applied include, in addition to mobile phones, televisions, viewfinder type / monitor direct view type video tape recorders, car navigation devices, pagers, electronic notebooks, calculators. , Word processors, workstations, videophones, POS terminals, digital still cameras, devices equipped with touch panels, and the like.

1 is a circuit diagram showing an electro-optical device according to a first embodiment of the invention. FIG. FIG. 3 is a diagram illustrating a configuration of a pixel of an electro-optical device. FIG. 2 is an explanatory diagram showing an overview of the electro-optical device in FIG. 1. Sectional drawing which shows the typical cross section of the liquid crystal panel after completion | finish of the assembly process which bonds the TFT substrate which is an active matrix substrate, and a counter substrate, and encloses a liquid crystal. Explanatory drawing of a partial display. 1 is a block diagram showing a schematic configuration of a drive circuit according to an embodiment. The figure explaining the principle of the rice field arrangement | sequence 2 de multi drive. The figure which shows the serial signal of RCGB supplied to FIG. FIG. 9 is a diagram for explaining the principle of conventional line sequential driving. The figure which shows the timing of the image data written in each pixel of a horizontal scanning signal and RCGB at the time of full screen display mode. The figure which shows the timing of the black data written in the horizontal scanning signal of the 1st frame, and each pixel of RCGB in the partial display mode. The figure which shows the presence and timing of the horizontal scanning signal of the 2nd frame, and the image data written in each pixel of RCGB in the partial display mode. The perspective view which shows the external appearance of the mobile telephone as an electronic device.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 14 ... Image processing circuit (a color conversion circuit is included), 100 ... Electro-optical device, 351 ... Drive circuit, 352 ... Scan line drive circuit, 353-2 ... 2 demultiswitch circuit (selection circuit), 353 ... Data line drive circuit

Claims (8)

Image data that is provided corresponding to a crossing of a plurality of data lines and a plurality of scanning lines and that corresponds to a color filter having a colored region of at least four colors or more and is supplied to the data line A full-screen display mode for performing display by driving all the pixels of the display unit, and a partial display mode for performing display in a display area composed of some pixels of the display unit In an electro-optical device that can be switched between
Provided in the display unit, pixels of each color constituting the colored region of at least four colors or more are arranged separately on adjacent first and second scanning line groups,
First image data having pixel data of a smaller number of colors than the color of the color area of the color filter is input, and color conversion is performed on the basis of the first image data and the color of four or more colors. An image processing circuit that generates pixel data, converts the first image data into second image data having pixel data of a number of colors corresponding to the color filter, and outputs the second image data;
A scanning line driving circuit for supplying a horizontal scanning signal to each of the scanning lines;
A selection circuit for supplying a signal obtained by time-division of the second image data to one data line selected from a predetermined number of data lines based on the selection signal; A data line driving circuit for outputting to the selection circuit,
In the full screen display mode, the scanning line driving circuit supplies a horizontal scanning signal to the first and second scanning line groups, and the data line driving circuit outputs each color of the second image data. Supplying pixel data to the selection circuit;
In the partial display mode, the data line driving circuit stops the image processing circuit, supplies only the pixel data of each color constituting the first image data to the selection circuit, and drives the scanning line. The circuit makes the amplitude of the horizontal scanning signal different from the amplitude in the full-screen display mode with respect to the first or second scanning line group. The display unit is configured by interposing an electro-optical material between a pixel electrode connected to the data line and a counter electrode,
2. The electro-optical device according to claim 1, wherein, in the partial display mode, the data line and the counter electrode are short-circuited during a selection period of pixels other than the display region.   In the partial display mode, the counter electrode potential is applied as black level data to the data lines corresponding to all pixels in the first frame, and the data lines are opposed to the data lines in the selection period of the non-display area in the second and subsequent frames. The electro-optical device according to claim 2, wherein an electrode potential is applied.   In the partial display mode, the amplitude of the horizontal scanning signal is lowered for the second scanning line group to which the pixel data of a new color generated by color conversion of the image processing circuit is supplied. The electro-optical device according to claim 1.   5. The data line driving circuit according to claim 1, wherein the data line driving circuit is driven by reducing a frequency of a driving clock in the partial display mode as compared with that in the full screen display mode. 6. Electro-optic device. The first image data is a three-color image signal of red, green and blue.
6. The electro-optical device according to claim 1, wherein the second image data is a multicolor image signal of at least four colors. Four color pixels are arranged in a square shape on the adjacent first and second scan line groups, two color pixels of RGB are arranged on the first scan line group, and a second scan is performed. On the line group, arrange the remaining one color pixel of RGB and the newly generated fourth color pixel different from these,
The image processing circuit has a function of converting input RGB three-color image data into four-color image data obtained by adding the pixel data of the fourth color,
In the partial display mode, the data line driving circuit stops the image processing circuit and supplies only the RGB image data to the selection circuit, and only two colors of the RGB image data are the first color. The remaining one color is supplied corresponding to the second scanning line group in which the pixels of the fourth color are arranged and supplied to the scanning line group. The electro-optical device according to claim 1. An electronic apparatus comprising a display device configured by the electro-optical device according to claim 1.

Images