JP2006286990A - Integrated circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an integrated circuit wherein its capacitor element is formed out of its transistors, and further, these transistors are so disposed that they also function as dummy transistors and that the increase of its area is suppressed thereby. <P>SOLUTION: The integrated circuit has second and third transistors for forming a differential amplifying circuit, a fourth transistor for forming a current source whose drain is connected with the virtual grounded point of the second and third transistors and whose source is connected with the grounded point of the integrated circuit, and first transistors whose gates are connected with the virtual grounded point of the second and third transistors and whose sources and drains are connected with the grounded point of the integrated circuit. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an integrated circuit having a capacitor.

Conventionally, differential amplifiers are used in various applications.
FIG. 3 is a diagram illustrating a configuration of an example of a known differential amplifier.
In FIG. 3, each of the pair of transistors Tr1 and Tr2 operates as an input transistor. That is, a differential signal is input to the gates of the transistors Tr1 and Tr2. The power supply voltage Vcc is applied to the drains of the transistors Tr1 and Tr2 via resistors R _A and R _B as loads, respectively. The sources of the transistors Tr1 and Tr2 are connected and grounded through the transistor Tr3. That is, the connection point between the sources of the transistors Tr1 and Tr2 serves as a virtual ground point.

In the transistor Tr3, a voltage is input to the gate, the drain is connected to the virtual ground point, and the source is grounded. That is, the transistor Tr3 operates as a current source.
Here, in the differential amplifier, if the potential at the virtual grounding point fluctuates, a phenomenon such as deterioration of the common mode signal removal capability (CMRR) occurs. By doing so, the distortion characteristics of the differential amplifier circuit are improved. In FIG. 3, a metal capacitor M is connected between the virtual ground point of the transistors Tr1 and Tr2 and the ground.

  On the other hand, in order to reduce the occurrence of variations in circuit elements due to the influence of the manufacturing process of the integrated circuit, dummy transistors are provided on both outer sides of the circuit elements constituting the integrated circuit. That is, it is desirable that the circuit element is formed in the central portion as much as possible.

  In FIG. 3, the dummy transistors TrD1 and TrD2 are connected between the source grounds of the transistor Tr3 and are grounded. The dummy transistors TrD1 and TrD2 are meaningless in terms of circuit because the gate, drain and source are all connected in common.

  FIG. 4 is a top view of the integrated circuit from which the transistor Tr3, the dummy transistors TrD1, TrD2, and the metal capacitor M are extracted from the circuit diagram shown in FIG. The hatched portion indicates the transistor Tr3, and the broken line portion indicates the dummy transistors TrD1 and TrD2.

  In the transistor Tr 3, the first gate electrode 2 and the second gate electrode 4 are formed outside the drain region 3, and the first source region 1 and the second gate electrode 4 are formed outside the first gate electrode 2. The second source region 5 is formed on the outer side, respectively. The first gate electrode 2 and the second gate electrode 4 are connected by wiring, and the first source region 1 and the second source region 5 are connected by wiring and are grounded. Note that an oxide film is provided on the lower surface of the gate electrode, and the first source region 1, the second source region 5, and the drain region 3 are diffusion regions. In FIG. 4, dummy transistors TrD1 and TrD2 are disposed on both outer sides (outside the source region 1 and outside the source region 5) where the transistor Tr3 is formed.

  The dummy transistor TrD1 is configured by forming a gate electrode 6 outside the first source region 1 and forming a drain region 7 outside the gate electrode 6. The source region of the dummy transistor TrD1 is the first source region 1 of the transistor Tr3 and is shared with the transistor Tr3.

  The dummy transistor TrD2 is configured by forming a gate electrode 9 outside the second source region 5 and forming a drain region 8 outside the gate electrode 9. The source region of the dummy transistor TrD2 is the second source region 5, which is shared with the transistor Tr3.

  Further, a metal capacitor M is disposed outside the transistor Tr3 and the dummy transistor TrD2. The metal capacitor M is formed of a capacitor metal formed under the uppermost wiring metal of the multilayer substrate and a second-layer wiring metal from above the multilayer substrate. The drain of the transistor Tr3 is connected to the uppermost wiring metal of the metal capacitor M, and the second wiring metal of the metal capacitor M is connected to the source of the transistor Tr3 and grounded. The area of the metal capacitor M is, for example, about 25 μm × 25 μm to 30 μm × 30 μm.

Note that Patent Document 1 discloses that a capacitor is formed using a transistor.
JP-A-5-315915

  In the above conventional example, since the capacitor element for stabilizing the potential of the virtual ground point in the integrated circuit is formed by the metal capacitor M, it must be made not only in terms of area but also by a process different from the transistor formation process. . Further, since the metal capacitor M and the dummy transistors TrD1 and TrD2 are formed separately, there is a disadvantage that the area of the integrated circuit is increased.

Patent Document 1 does not disclose the use of a capacitor made of a transistor in order to stabilize the potential of the virtual ground point of the analog amplifier.
It is an object of the present invention to provide an integrated circuit in which an increase in area is suppressed by forming a capacitor element with a transistor and further disposing the transistor so as to function as a dummy transistor.

In order to solve the above problems, the present invention adopts the following configuration.
An integrated circuit according to the present invention includes a first transistor that operates as a capacitive element for stabilizing a potential of a virtual ground point by connecting a source and a drain to ground and connecting a gate to a virtual installation point. Provide a circuit.

  As a result, the capacitive element for stabilizing the potential at the virtual grounding point is constituted by a transistor, so that the area of the integrated circuit can be reduced and the capacitive element can be produced by the same process as other transistors.

  Further, the integrated circuit includes a differential amplifier circuit, the differential amplifier circuit is connected to the second and third transistors for inputting differential signals, and one end is connected to the virtual ground point of the second and third transistors. The other end is grounded, and the fourth transistor operates as a current source. The gate of the first transistor is connected to the virtual ground point of the second and third transistors.

  As a result, the capacitive element for stabilizing the potential at the virtual ground point of the differential amplifier is composed of transistors, so that the area of the integrated circuit can be reduced, and the capacitive element can be made in the same process as other transistors. .

Furthermore, the source, drain, and gate regions of the fourth transistor are arranged in the center, and the first transistor is arranged on both outer sides of the fourth transistor.
Thus, an integrated circuit can be formed with an area that is smaller by one transistor than in the case where the first transistor and the dummy transistor that operate as the capacitor are formed separately.

Further, the diffusion region of the first transistor is shared with the diffusion region of the fourth transistor.
Thereby, the area of the integrated circuit can be further suppressed.

  In addition, a transistor which operates as a capacitor element by connecting a source and a drain to ground and connecting a gate to a circuit element is provided, and the transistor is disposed on both outer sides of the circuit element.

  Thus, an integrated circuit can be formed with an area that is smaller by one transistor than in the case where a transistor that operates as a capacitor and a dummy transistor are formed separately.

  According to the present invention, an integrated circuit in which an increase in area can be suppressed can be provided by forming a capacitor element using a transistor and arranging the transistor so as to function as a dummy transistor.

FIG. 1 is a diagram showing a differential amplifier according to one embodiment of the present invention.
In FIG. 1, a pair of transistors 11 (second transistor) and transistor 12 (third transistor) each operate as an input transistor. That is, a differential signal is input to the gates of the transistors 11 and 12. A power supply voltage Vcc is applied to the drains of the transistors 11 and 12 through resistors 14 and 15 as loads, respectively. The sources of the transistors 11 and 12 are connected in common and are grounded via the transistor 13. That is, the common connection point of the sources of the transistors 11 and 12 serves as a virtual ground point.

  In the transistor 13 (fourth transistor), a voltage is input to the gate, the drain is connected to the virtual ground point, and the source is grounded. Therefore, the transistor 13 operates as a current source.

  The gates of the transistors 30 and 31 (first transistors) are connected to the virtual ground point, and the sources and drains are connected between the source grounds of the transistor 13 and grounded. Therefore, the transistors 30 and 31 operate as capacitive elements, and operate as capacitive elements that stabilize the potential at the common connection point (hereinafter, virtual ground point) of the sources of the transistors 11 and 12.

FIG. 2 is a top view of the integrated circuit from which the transistor 13 and the transistor 14 are extracted in FIG.
The transistor 13 is indicated by a hatched portion, and a first gate electrode 22 and a second gate electrode 24 are formed outside the drain region 23, and the first source region 21 is outside the first gate electrode 22. The second source region 25 is formed outside the second gate electrode 24, respectively. The first gate electrode 22 and the second gate electrode 24 are connected by wiring, and the first source region 21 and the second source region 25 are connected by wiring and are grounded. Note that an oxide film is provided on the lower surfaces of the first gate electrode 22 and the second gate electrode 24, and the first source region 21, the second source region 25, and the drain region 23 are diffusion regions. .

  In FIG. 2, transistors 30 and 31 for stabilizing the potential of the virtual ground point are provided on both outer sides of the transistor 13 in order to prevent variation in characteristics due to the influence of the manufacturing process of the transistor 13.

  In the transistor 30, the gate electrode 27 is formed outside the first source region 21, and the drain region 26 is formed outside the gate electrode 27. The source region of the transistor 30 is the first source region 21 and is shared with the transistor 13.

  In the transistor 31, a gate electrode 28 is formed outside the first source region 21, and a drain region 29 is formed outside the gate electrode 28. The source region of the transistor 31 is the second source region 25 and is shared with the transistor 13. The gate electrodes 27 and 28 of the transistors 30 and 31 are connected to the drain region 23 of the transistor 13 by wiring, and the drain regions 26 and 29 of the transistors 30 and 31, the first source region 21, and the second source. Region 25 is connected and grounded. Thus, by providing the transistors 30 and 31 for stabilizing the virtual ground point on both outer sides of the transistor 13, the transistors 30 and 31 for stabilizing the virtual ground point have the function of a dummy transistor. Can do. Therefore, an integrated circuit can be formed with an area smaller by one transistor than in the case where a transistor operating as a capacitor and a dummy transistor are formed separately.

  Further, according to the differential amplifier circuit of the above-described embodiment, the source regions of the transistors 30 and 31 for stabilizing the potential of the virtual ground point and the source region of the transistor 13 operating as a current source can be shared. Therefore, an integrated circuit can be formed with an area that is two source regions smaller than when the source regions of the transistors 30 and 31 and the source region of the transistor 13 are formed separately.

  In addition, since the capacitor for stabilizing the potential of the virtual ground point is configured by a transistor, the area of the integrated circuit can be reduced, and the capacitor can be formed by the same process as other transistors.

  Note that in this embodiment, the capacitor for stabilizing the potential of the virtual ground point is configured by a transistor, and the transistor is also arranged to function as a dummy transistor. The transistor is not limited to stabilization. For example, a capacitor element for removing high-frequency components may be formed of a transistor, and the transistor may be arranged to function as a dummy transistor.

  In this embodiment, an n-channel transistor is used, but a p-channel MOS transistor may be used instead of the n-channel MOS transistor. In this case, the power supply voltage Vcc in FIG. 1 is grounded, and the ground in FIG. 1 is power supply voltage Vcc.

It is a figure which shows the Example which concerns on this invention. It is a figure showing the formation layout of the capacitive element in the Example which concerns on this invention. It is a conventional circuit diagram. It is a figure showing the layout of the conventional circuit.

Explanation of symbols

1, 5, 21, 25 Transistor source regions 2, 4, 7, 8, 22, 24, 27, 28 Transistor gate electrodes 3, 6, 9, 23, 26, 29 Transistor drain regions 11, 12, 13 Transistors 14 and 15 Resistances 30 and 31 as loads Dummy transistors

Claims (5)

  An integrated circuit including an amplifier circuit including a first transistor that operates as a capacitive element for stabilizing a potential of a virtual ground by connecting a source and a drain to ground and connecting a gate to a virtual ground point. The integrated circuit includes a differential amplifier circuit, and the differential amplifier circuit includes second and third transistors for inputting a differential signal;
A first transistor having one end connected to the virtual grounding point of the second and third transistors and the other end grounded to operate as a current source;
2. The integrated circuit according to claim 1, wherein a gate of the first transistor is connected to the virtual ground point of the second and third transistors.   3. The integrated circuit according to claim 2, wherein the source, drain, and gate regions of the fourth transistor are disposed in the center, and the first transistor is disposed on both outer sides of the fourth transistor.   4. The integrated circuit according to claim 3, wherein the diffusion region of the first transistor is shared with the diffusion region of the fourth transistor. A transistor that operates as a capacitor element by connecting a source and a drain to ground and connecting a gate to a circuit element;
The integrated circuit according to claim 1, wherein the transistor is disposed on both outer sides of the circuit element.

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