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JP2006180603A - Circuit for correcting voltage drop by line drop - Google Patents

Circuit for correcting voltage drop by line drop Download PDF

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JP2006180603A
JP2006180603A JP2004370297A JP2004370297A JP2006180603A JP 2006180603 A JP2006180603 A JP 2006180603A JP 2004370297 A JP2004370297 A JP 2004370297A JP 2004370297 A JP2004370297 A JP 2004370297A JP 2006180603 A JP2006180603 A JP 2006180603A
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voltage
output
drop
line
circuit
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Katsuya Ikeda
克弥 池田
Itaru Yugawa
格 湯川
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Shindengen Electric Manufacturing Co Ltd
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Shindengen Electric Manufacturing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit and a method for correcting the voltage drop by line drop, which prevent the voltage drop at the end of a load due to the occurrence of the voltage drop by the impedance of load wiring, etc. <P>SOLUTION: In these circuit and method for correcting the line drop, a correction signal by the change of impedance based on the change of a load current is generated by a current detecting resistor provided in one output line on either a positive side or a negative side, and external input voltage is switched, based on the comparative difference from the reference voltage set with a reference voltage setter, and the parameter of current change is added to voltage correction. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

この発明は、出力電圧のラインドロップによる電圧変動を補正する、ラインドロップの電圧降下補正回路に関する。   The present invention relates to a line drop voltage drop correction circuit that corrects voltage fluctuation caused by line drop of an output voltage.

一般に直流電源回路は、電圧検出回路と制御回路とにより出力電圧を一定に制御している。通常、電源回路の出力端においては、図2に示すように分圧抵抗R1,R2を用いて電圧検出を行うが、出力端から先の負荷配線等のインピーダンスL1,L2により電圧降下が発生し、負荷端では電圧が下がってしまう。   In general, in a DC power supply circuit, an output voltage is controlled to be constant by a voltage detection circuit and a control circuit. Normally, voltage detection is performed at the output terminal of the power supply circuit using voltage dividing resistors R1 and R2 as shown in FIG. 2, but a voltage drop occurs due to impedances L1 and L2 of the load wiring and the like from the output terminal. The voltage drops at the load end.

ここで、負荷インピーダンスL1,L2は、主に主基板の配線パターンの抵抗分、コネクタの接触抵抗分などである。この現象は、図3に例示したように、出力電圧が低いほど、また出力電流が大きいほど、ラインドロップの影響が顕著になる。   Here, the load impedances L1 and L2 are mainly the resistance component of the wiring pattern of the main board, the contact resistance component of the connector, and the like. As illustrated in FIG. 3, this phenomenon becomes more conspicuous as the output voltage is lower and the output current is larger.

そこで、この発明は負荷電圧の変動を検知するとともに、負荷電流の値に応じて、負荷電圧の変動補正を行うことで、負荷電流の変動に伴う負荷電圧の変動を可能な限り小さな直流安定化電源を構成するものである。こうしたラインドロップ補生回路の先行技術文献としては、特許文献1があり、基準電圧を変化させるものとしては図4に示した特許文献2がある。
特開昭2001−119938号公報 実開平5−23214号公報
Therefore, the present invention detects fluctuations in the load voltage and corrects the fluctuations in the load voltage according to the value of the load current, thereby stabilizing the DC voltage as small as possible with the fluctuations in the load current. It constitutes a power source. As a prior art document of such a line drop supplementary circuit, there is Patent Document 1, and as a technique for changing the reference voltage, there is Patent Document 2 shown in FIG.
Japanese Patent Laid-Open No. 2001-119938 Japanese Utility Model Publication No. 5-23214

ここで、特許文献2も本願も、分割抵抗に発生した電位差を増幅して出力電圧検出回路にフィードバックするという点では類似の技術分野に属するが、詳細に比較検討すると、以下の点で異なっている。   Here, both Patent Document 2 and the present application belong to a similar technical field in that the potential difference generated in the dividing resistor is amplified and fed back to the output voltage detection circuit. Yes.

抵抗分割した電圧を制御に用いる方法は、これらの抵抗に安定した電流が流れていることが前提となる。その理由は、一般に基準電圧を発生する回路は内部インピーダンスが高く、大きな電流を流すことが出来ないためである。したがって、これら分割抵抗が接続される2点間には常に安定した電位差があり、この電位差はラインドロップに対して充分に大きな値であることが望ましい。   The method of using the resistance-divided voltage for control is based on the premise that a stable current flows through these resistors. The reason is that a circuit that generates a reference voltage generally has a high internal impedance and cannot pass a large current. Therefore, there is always a stable potential difference between the two points to which these divided resistors are connected, and it is desirable that this potential difference is sufficiently large with respect to the line drop.

ここで、図4に示した特許文献2における出力電圧Vと基準電圧Vref,GNDの関係を見ると図5のようになっており、基準電圧Vrefと出力のマイナスライン(GND)間に分割抵抗を挿入している。 Here, the relationship between the output voltage V 0 and the reference voltages V ref and GND in Patent Document 2 shown in FIG. 4 is as shown in FIG. 5, and is between the reference voltage V ref and the output negative line (GND). A split resistor is inserted in

ラインドロップが問題視される電源回路は、一般に1.8V,1.2Vなどの低電圧回路である。このため、図5のようにVrefとVとの電位差が小さく、場合によっては等しいこともある。この方式においてもVのラインに検出抵抗Rの挿入も可能ではあるが、上記のように電位差の小さな2点間すなわちV−Vref間に分割抵抗を挿入することになり、分圧による的確な検出が難しい場合もありうる。 A power supply circuit in which line drop is regarded as a problem is generally a low voltage circuit such as 1.8V or 1.2V. Therefore, as shown in FIG. 5, the potential difference between V ref and V 0 is small and may be equal in some cases. Even in this method, the detection resistor R can be inserted into the V 0 line. However, as described above, a dividing resistor is inserted between two points having a small potential difference, that is, between V 0 and V ref. It may be difficult to detect accurately.

また、一般に2次側回路においては出力電圧が最も高電位となり、Vよりも高い電位のVrefを作るために別巻線などで電源を作る必要がある。このような理由から、特許文献2の方式ではV側のライン検出抵抗Rを挿入する場合、VとVrefの上記関係により、実用の検出には適さない場合もあった。 In general, in the secondary side circuit, the output voltage is the highest potential, and it is necessary to create a power source with another winding or the like in order to create V ref having a potential higher than V 0 . For this reason, in the method of Patent Document 2, when the line detection resistor R on the V 0 side is inserted, it may not be suitable for practical detection due to the above relationship between V 0 and V ref .

さらに、特許文献2の構成では、非絶縁型電源などの入出力のマイナスラインを同電位として使用する場合は、マイナス側に検出抵抗を入れることが出来ない。それでは、検出抵抗をプラス側に入れれば良いかというと、上記のようにVとVrefの差が小さい場合には、部品の誤差等により、検出が困難になる。 Furthermore, in the configuration of Patent Document 2, when an input / output minus line such as a non-insulated power source is used as the same potential, a detection resistor cannot be inserted on the minus side. Then, if it is sufficient to put the detection resistor on the plus side, when the difference between V 0 and V ref is small as described above, detection becomes difficult due to component errors and the like.

この発明による、ラインドロップによる電圧降下補正回路によれば、正側又は負側の何れか一方の出力ラインの負荷電流値の変化に基づいて、インピーダンスが変化する回路により、供給電流を補正して、供給端での電圧を一定に保つ構成としたものである。   According to the voltage drop correction circuit by the line drop according to the present invention, the supply current is corrected by the circuit in which the impedance changes based on the change in the load current value of either the positive side or the negative side output line. In this configuration, the voltage at the supply end is kept constant.

以下、この発明の実施例を図面に基づいて説明する。図1にこの発明の一実施例を示した。入力端子1には、適切な外部電源からの直流電圧が印加され、MOSFET等のスイッチング素子2に入力される。この入力端子1とスイッチング素子2との間には、平滑コンデンサC1が接地電位との間に接続されている。チョークコイル3と後述する電流検出抵抗R13との間を結ぶ出力ラインには、さらに平滑コンデンサC2が設けられている。スイッチング素子2は、ドライバ4でオン・オフ制御されて、入力した直流電流をパルス幅制御して出力し、ON時にスイッチング素子2より流入した電流およびOFF時に転流ダイオード20により流入した電流はチョークコイル3と平滑コンデンサC1の作用とあいまって、整流・平滑されて出力端子7側に出力される。チョークコイル3と出力端子7との間には電流検出抵抗R13が直列に挿入されている。正側の出力端子7と、負側の出力端子8との間には負荷19が接続されており、正側の出力端子7および負側の出力端子8から負荷19までのライン抵抗をそれぞれVRL,VRL’で表す。   Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows an embodiment of the present invention. A DC voltage from an appropriate external power supply is applied to the input terminal 1 and input to the switching element 2 such as a MOSFET. A smoothing capacitor C1 is connected between the input terminal 1 and the switching element 2 between the ground potential. A smoothing capacitor C2 is further provided on an output line connecting the choke coil 3 and a current detection resistor R13 described later. The switching element 2 is ON / OFF controlled by the driver 4 and outputs the input DC current by controlling the pulse width. The current flowing from the switching element 2 when ON and the current flowing by the commutation diode 20 when OFF are choked. Combined with the action of the coil 3 and the smoothing capacitor C1, it is rectified and smoothed and output to the output terminal 7 side. Between the choke coil 3 and the output terminal 7, a current detection resistor R13 is inserted in series. A load 19 is connected between the positive output terminal 7 and the negative output terminal 8, and the line resistance from the positive output terminal 7 and the negative output terminal 8 to the load 19 is set to VRL. , VRL ′.

また、電流検出抵抗R13と正側の出力端子7との間のラインには、直列に接続された分圧抵抗R11,R12が、当該ライン間と接地との間に接続されている。この分圧抵抗R11,R12の中間接続点から、分圧点電圧を出力する抵抗R8が設けられている。   Further, voltage dividing resistors R11 and R12 connected in series are connected between the current detection resistor R13 and the positive output terminal 7 between the line and the ground. A resistor R8 for outputting a voltage dividing point voltage is provided from an intermediate connection point between the voltage dividing resistors R11 and R12.

さらに、前記電流検出抵抗R13の平滑コンデンサC2側にも、直列に接続された分圧抵抗R9,R10が前記出力ラインと接地との間に接続されている。そして、これらの分圧抵抗R9,R10の中間接続点からも分圧点電圧を取り出す抵抗R6が設けられている。ここで、抵抗R10は可変抵抗で構成されている。   Further, voltage dividing resistors R9 and R10 connected in series are also connected between the output line and the ground on the smoothing capacitor C2 side of the current detection resistor R13. A resistor R6 is also provided to extract a voltage dividing point voltage from an intermediate connection point between these voltage dividing resistors R9 and R10. Here, the resistor R10 is composed of a variable resistor.

こられの抵抗R6,R8で取り出された分圧点電圧は補正用アンプ6のそれぞれ減算入力、及び加算入力に入力される。補正用アンプ6の減算入力出力との間には増幅率を設定するフィードバック用の抵抗R5が接続され、加算入力からは分圧抵抗R7が接地されている。   The voltage dividing point voltages extracted by the resistors R6 and R8 are input to the subtraction input and the addition input of the correction amplifier 6, respectively. A feedback resistor R5 for setting an amplification factor is connected between the subtraction input output of the correction amplifier 6 and a voltage dividing resistor R7 is grounded from the addition input.

補正用アンプ6の出力は抵抗R4を介してさらにもう一つの補正用アンプ5の減算入力に入力され、この補正用アンプ5の加算入力には所定の基準電圧Vrefが印加される。さらに、チョークコイル3の出力側と補正用アンプ5の減算入力は抵抗R3で接続されている。 The output of the correction amplifier 6 is input to the subtraction input of another correction amplifier 5 via the resistor R4, and a predetermined reference voltage V ref is applied to the addition input of the correction amplifier 5. Furthermore, the output side of the choke coil 3 and the subtraction input of the correction amplifier 5 are connected by a resistor R3.

補正用アンプ5の出力はスイッチング素子2を駆動するドライバ4に入力されてスイッチング素子2の導通率を制御する。こうした構成において、電流検出抵抗R13の両端に設けられた分圧抵抗R11,R12、およびR9,R10、さらにこれらの分圧点電圧を取り出す抵抗R6,R8、および補正用アンプ6とその分圧抵抗R7、フィードバック抵抗R5、および出力抵抗R4が、出力端7,8から先の負荷電流の変化に応じてインピーダンスの変化する回路となり(R’)、補正用アンプ5の正負入力値が一致して出力が0となるようにフィードバックし、スイッチング素子2を駆動するドライバ4への制御出力5を出力する補正用アンプ5の一方の入力である基準電圧Vrefに対するインピーダンス変化分に相応する補正入力Vref’となる。 The output of the correction amplifier 5 is input to the driver 4 that drives the switching element 2 to control the conductivity of the switching element 2. In such a configuration, the voltage dividing resistors R11, R12 and R9, R10 provided at both ends of the current detection resistor R13, the resistors R6, R8 for extracting these voltage dividing point voltages, and the correction amplifier 6 and the voltage dividing resistors thereof R7, feedback resistor R5, and output resistor R4 become a circuit in which the impedance changes in accordance with the change in the load current from the output terminals 7 and 8 (R '), and the positive and negative input values of the correction amplifier 5 match. The correction input V corresponding to the change in impedance with respect to the reference voltage V ref which is one input of the correction amplifier 5 that feeds back the output to 0 and outputs the control output 5 to the driver 4 that drives the switching element 2. ref '.

またR10は可変抵抗であって、R’で示された負荷電流によって変化するインピーダンスの電圧ドロップ調整範囲を調整することができる。   R10 is a variable resistor, which can adjust the voltage drop adjustment range of the impedance that changes depending on the load current indicated by R '.

したがって、最終製品により異なる負荷インピーダンスによるラインドロップVRL、出力電流に対する電圧補正の係数を調整用抵抗R10により調整することができる。   Therefore, the line drop VRL with different load impedances depending on the final product and the voltage correction coefficient for the output current can be adjusted by the adjustment resistor R10.

またR13の設置位置については、図6に関連して説明したようにV−GND間の分圧を図れば良く、負側の出力ラインであるR10,R12の接地端間に設けることもでき、回路設計の自由度がある。 As for the installation position of R13, it is sufficient to divide the voltage between V 0 and GND as described with reference to FIG. 6, and it can be provided between the ground terminals of R10 and R12 which are the negative output lines. There is a degree of freedom in circuit design.

さらにこの実施例では、図6のように、V−GND間に抵抗を挿入し、電流検出には基準電圧を用いないため、分割抵抗には常にラインドロップに対して充分大きな電圧差を確保できる。また、検出抵抗Rは、出力ラインのプラス、マイナスのどちら側にも挿入することができる Further, in this embodiment, as shown in FIG. 6, since a resistor is inserted between V 0 and GND and a reference voltage is not used for current detection, a sufficiently large voltage difference with respect to the line drop is always secured in the dividing resistor. it can. The detection resistor R can be inserted on either the positive or negative side of the output line.

この実施例では、非絶縁型チョッパ方式を用いるものとしたが、トランスを用いた絶縁型の回路であっても同じ原理で補正することが可能であり、また電流検出は抵抗を用いる以外にもMOSFETのオン抵抗による電圧降下を検出する構成を用いることができる。   In this embodiment, the non-insulated chopper method is used. However, even an insulated circuit using a transformer can be corrected by the same principle, and the current detection is not limited to using a resistor. A configuration for detecting a voltage drop due to the on-resistance of the MOSFET can be used.

さらに、この実施例では、帰還抵抗のみで差分増幅器の増幅率を決めることができるため、特許文献2の構成と比べても負荷急変に対する応答性も優れている。   Furthermore, in this embodiment, since the amplification factor of the differential amplifier can be determined only by the feedback resistor, the response to a sudden load change is excellent as compared with the configuration of Patent Document 2.

この発明の実施例である、ラインドロップによる電圧降下補正回路の実施例は以上の通りであり、負荷に印加される出力電流を検出し、その電流値によって出力電圧を補正することで負荷端の電圧を一定に保つことができ、絶縁型、非絶縁型の電源を問わず、検出抵抗を出力ラインの正側、負側の何れにも接地可能で回路設計の自由度も高く、電圧変動時の応答性も高く、製品により異なる負荷インピーダンスに応じて、出力電流に対する電圧補正を行うことができる。   The embodiment of the voltage drop correction circuit by line drop, which is an embodiment of the present invention, is as described above. The output current applied to the load is detected, and the output voltage is corrected by the current value to correct the load end. The voltage can be kept constant, and the detection resistor can be grounded on either the positive side or the negative side of the output line, regardless of whether it is an isolated or non-isolated power supply. The voltage response to the output current can be corrected according to the load impedance that varies depending on the product.

また、負帰還抵抗のみで増幅器の増幅率を規定しているので、図7に示した負荷電流の変動に対しても、出力電圧の変動は実線で示したように応答性が高く、破線で例示した図4の従来例の構成に比べ、負荷電流変動の影響を受けにくい。   Further, since the amplification factor of the amplifier is defined only by the negative feedback resistor, the fluctuation of the output voltage is high in response to the fluctuation of the load current shown in FIG. Compared to the configuration of the conventional example shown in FIG. 4, it is less affected by load current fluctuations.

この発明の実施例の、ラインドロップによる電圧降下補正回路の実施例を示す図。The figure which shows the Example of the voltage drop correction circuit by a line drop of the Example of this invention. 出力端に分圧抵抗を用いた従来例のブロック図。The block diagram of the prior art example which used the voltage dividing resistor for the output terminal. 出力電流と負荷端電圧、およびラインドロップの関係を示すグラフ。The graph which shows the relationship between output current, load end voltage, and line drop. 従来技術のラインドロップ補正回路の構成図。The block diagram of the line drop correction circuit of a prior art. 図4の従来例における分割抵抗の挿入位置と電位差の関係を示す図。The figure which shows the relationship between the insertion position of the division resistance in the prior art example of FIG. この発明の実施例の分圧抵抗挿入位置と電位差との関係を示す図。The figure which shows the relationship between the voltage dividing resistor insertion position and potential difference of the Example of this invention. 負荷電流変動に対する電圧応答の波形図。The wave form diagram of the voltage response with respect to load current fluctuation.

符号の説明Explanation of symbols

1 入力端子
2 スイッチング素子
3 チョークコイル
4 ドライバ
5 補正用アンプ
6 補正用アンプ
7,8 出力端子
9,10 ラインドロップ抵抗
11 負荷
12 平滑コンデンサ
R3,R4,R5,R6,R7,R8 抵抗
R9,R10,R11,R12 分圧抵抗
ref 基準電圧
DESCRIPTION OF SYMBOLS 1 Input terminal 2 Switching element 3 Choke coil 4 Driver 5 Correction amplifier 6 Correction amplifier 7, 8 Output terminal 9, 10 Line drop resistance 11 Load 12 Smoothing capacitor R3, R4, R5, R6, R7, R8 Resistance R9, R10 , R11, R12 Voltage dividing resistor V ref reference voltage

Claims (4)

直流出力電圧の変動を検出し、電圧制御回路に帰還して出力電圧を安定化するようにしたラインドロップによる電圧降下補正回路において、
正側又は負側の何れか一方の出力ライン中に直列に挿入されて、当該出力ライン中の出力電流を検出する電流検出抵抗と、
当該電流検出抵抗の両端から、負側又は正側の何れか一方の出力ラインとの間に設けられ、かつ各々直列接続された2つの抵抗からなる2組の分圧抵抗と、
負帰還抵抗を有する差分増幅器であって、前記2つの分圧抵抗の分圧点からの分圧電圧を各々入力して差分演算し、補正信号を生成する差分増幅回路と、
当該差分増幅回路から出力される補正信号を用い、前記電圧制御回路に供給される所定の基準電圧との差分演算を行い、当該電圧制御回路を制御することを特徴とする電圧降下補正回路。
In the voltage drop correction circuit by line drop that detects the fluctuation of DC output voltage and feeds back to the voltage control circuit to stabilize the output voltage,
A current detection resistor inserted in series in either the positive side or negative side output line to detect the output current in the output line;
Two sets of voltage dividing resistors each including two resistors provided between both ends of the current detection resistor and either the negative side or the positive side output line, and connected in series,
A differential amplifier having a negative feedback resistor, wherein each of the divided voltages from the voltage dividing points of the two voltage dividing resistors is inputted to perform a difference calculation and generate a correction signal;
A voltage drop correction circuit for controlling the voltage control circuit by performing a difference operation with a predetermined reference voltage supplied to the voltage control circuit using a correction signal output from the difference amplifier circuit.
直流出力電圧の変動を分圧抵抗で検出し、この検出値と基準値との誤差信号を誤差増幅器を介して制御回路に帰還して出力電圧を安定化するようにしたラインドロップによる電圧降下補正回路において、
正側又は負側の何れか一方の出力ライン中に直列に挿入されて、当該出力ライン中の出力電流を検出する電流検出抵抗を備え、当該出力電流検出値でインピーダンスが変化する補正電流生成部で補正電流を生成し、制御回路に帰還して出力電圧を安定化するラインドロップによる電圧降下補正回路。
Voltage drop correction by line drop that detects fluctuation of DC output voltage with voltage dividing resistor and feeds back error signal of this detected value and reference value to control circuit via error amplifier to stabilize output voltage In the circuit
A correction current generator that is inserted in series in either the positive or negative output line and includes a current detection resistor that detects the output current in the output line, and the impedance changes according to the output current detection value. A voltage drop correction circuit using a line drop that generates a correction current and feeds back to the control circuit to stabilize the output voltage.
所定の外部直流電圧が印加される入力端子と、当該入力端子に接続されたスイッチング素子と、当該スイッチング素子に接続されたチョークコイルと、当該チョークコイルより下流の正側又は負側の何れか一方の出力ラインに接続された電流検出抵抗と、当該電流検出抵抗に接続された正側又は負側の何れか一方の出力端子と、前記入力端子とスイッチング素子との間から接地との間に接続された平滑コンデンサと、前記電流検出抵抗の両端から負側又は正側の何れか一方の出力ラインとの間に設けられた2組の分圧抵抗と、負帰還抵抗を有する差分増幅器であって、当該2組の分圧抵抗の分圧点からの2つの電圧検出値を入力して差分比較値を出力する差分増幅器と、当該差分増幅器の差分比較値を入力して、基準設定器からの基準電圧とを入力して差分比較し、電源ドライバを制御するラインドロップ電圧降下補正回路。   An input terminal to which a predetermined external DC voltage is applied, a switching element connected to the input terminal, a choke coil connected to the switching element, and either the positive side or the negative side downstream from the choke coil A current detection resistor connected to the output line, a positive or negative output terminal connected to the current detection resistor, and a connection between the input terminal and the switching element and the ground. A differential amplifier having two sets of voltage dividing resistors and a negative feedback resistor provided between the smoothing capacitor and the negative or positive output line from both ends of the current detection resistor. The difference amplifier that inputs two voltage detection values from the voltage dividing points of the two sets of voltage dividing resistors and outputs a difference comparison value, and the difference comparison value of the difference amplifier are input from the reference setter. Reference voltage and Input and difference comparison, line drop voltage drop correction circuit for controlling the power driver. 入力端子に供給された直流電圧をスイッチング素子でチョッピングし、平滑コンデンサで平滑化して、出力端子から負荷に供給し、正側又は負側の何れか一方の出力端子に接続された分圧抵抗で検出された電圧変動値と、平滑コンデンサと出力端子との間に挿入された電流検出用抵抗で検出された出力電流値とを比較して補正信号を生成し、スイッチング素子のドライバを制御して、出力電圧を補正するラインドロップによる電圧降下補正回路の制御方法において、
上記出力ラインの正側又は負側の何れか一方の出力電流を検出し、当該検出電流による分圧回路のインピーダンス変動に基づく補整値を負帰還抵抗で増幅率を規定する差分増幅器で生成し、当該生成された補整値で所定の基準電圧と差分演算してドライバの制御を行うことを特徴とするラインドロップによる電圧降下補正回路の制御方法。
The DC voltage supplied to the input terminal is chopped by the switching element, smoothed by the smoothing capacitor, supplied from the output terminal to the load, and the voltage dividing resistor connected to either the positive or negative output terminal The detected voltage fluctuation value is compared with the output current value detected by the current detection resistor inserted between the smoothing capacitor and the output terminal to generate a correction signal and control the driver of the switching element. In the control method of the voltage drop correction circuit by the line drop for correcting the output voltage,
The output current of either the positive side or the negative side of the output line is detected, and a compensation value based on the impedance fluctuation of the voltage dividing circuit due to the detected current is generated by a differential amplifier that defines an amplification factor with a negative feedback resistor, A control method of a voltage drop correction circuit by line drop, wherein the driver is controlled by calculating a difference with a predetermined reference voltage with the generated compensation value.
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