JP2006154781A - Video data correction circuit, display device and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a temporal margin when the light-emission time of a light emitting element is accumulated and to make a display device small-sized. <P>SOLUTION: A video correction circuit has a plurality of storage means and also has a cumulative data holding portion which holds cumulative use frequency data of each pixel, an addition portion which adds cumulative use frequency data of each pixel and cumulative use frequency data of each pixel held in the cumulative data holding means and writes the addition result as new cumulative use frequency data to the cumulative data holding means, and a correction portion which corrects video data based upon the cumulative use frequency data stored in the cumulative data holding means and outputs the corrected video data to a display device. Pixels are provided with light-emitting elements of a plurality of colors. The cumulative use frequency data are divided into a plurality of data segments, each of which is stored in each of the plurality of memories according to each color of the light-emitting elements. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a display device using a light-emitting element in a pixel portion, and particularly uses a light-emitting element such as an organic electroluminescence (EL) element in the pixel portion and corrects video data corresponding to deterioration of the light-emitting element. The present invention relates to a display device including a video data correction circuit. The present invention also relates to a display device including a display panel in which light-emitting elements such as EL elements are arranged for each pixel, and a video data correction circuit that corrects deterioration of the light-emitting elements. The present invention also relates to an electronic device including a display device.

  In recent years, a display device using a light-emitting element in which a semiconductor thin film is formed over an insulator such as a glass substrate, in particular, an active matrix light-emitting device using a TFT (Thin Film Transistor) has become widespread. An active matrix light emitting device using TFTs has hundreds of thousands to millions of TFTs in a pixel portion where pixels are arranged in a matrix, and controls the charge of each pixel to display an image. ing.

  Furthermore, in addition to the pixel TFTs that make up the pixels, a driver circuit is simultaneously formed around the pixel portion using TFTs, greatly contributing to the downsizing and low power consumption of the device. A display device using a light emitting element is becoming an indispensable device for a display portion of a mobile device in which the expansion of the display is remarkable. In addition, low-temperature crystallization technology for crystallizing a semiconductor film such as amorphous silicon on a glass substrate increases the added value of so-called SOG (System On Glass) with a CPU and other modules mounted on the glass substrate. Is progressing.

  In addition, as a display device that replaces a liquid crystal display (LCD), a display panel in which light emitting elements are arranged for each pixel and a peripheral circuit that inputs signals to the panel are used to control light emission of the light emitting elements. There is a display device that displays an image.

  Such a display device has a control circuit that outputs the received video signal to the panel together with the panel control signal as video data obtained by converting the received video signal so as to enable gradation expression in the pixels of the display panel. In a display panel, typically two or three TFTs (thin film transistors) are arranged for each pixel, and are supplied to the light emitting elements of each pixel by controlling on / off of those TFTs. The current, that is, the luminance and light emission / non-light emission of the light emitting element of each pixel is controlled. Further, a drive circuit for controlling on / off of the TFT of each pixel is provided in the peripheral portion of the pixel portion of the panel. This drive circuit is composed of TFTs formed simultaneously with the TFTs of the pixel portion. These TFTs may be either n-channel type or p-channel type.

  At this time, when an EL element or the like is used as the light emitting element, a current is always supplied and a current flows in the EL element during a period in which the EL element is lit. When the EL element emits light by supplying a current, the light emission efficiency with respect to the driving currents of R (Red: red), G (Green: green), and B (Blue: blue) depends on the material of the organic EL element used. It depends on. In addition, the luminous efficiency changes with time, and becomes worse as the cumulative period of light emission time (total operation time of light emission) becomes longer. In addition, the deterioration characteristics with time vary depending on each light emitting material. Yes. As a result, the properties of the EL element itself deteriorate due to long-time lighting, and the luminance characteristics change due to this deterioration. That is, even if the EL element is deteriorated and the EL element that is not deteriorated, even if current is supplied from the same current supply source at the same voltage, a difference in luminance occurs. In a display device using an EL element or the like, white is expressed in a state in which all three primary colors of R, G, and B are emitted, so that white is biased to red due to a change in color development due to deterioration of each color over time. Or biased to blue. As a result, the problem that the white balance is lost occurs.

  Therefore, in display devices using light-emitting elements such as EL elements, even if the EL elements in some pixels deteriorate, the uniformity of the screen is maintained without causing luminance unevenness. The lighting time or the lighting time and the lighting intensity are detected by periodically sampling the video data signal, and the accumulated value of the detected value and the data of the luminance characteristics of the EL element stored in advance are stored in advance. With reference to the above, there is one using a video data correction circuit for correcting a video data signal for driving a pixel in which an EL element has deteriorated.

  In this specification, sampling means that a lighting time or a lighting time and a lighting intensity are periodically detected from a video data signal for each color (R, G, B in this specification) of each pixel, and the detection is performed. Indicates an operation that accumulates values.

  As such a video data correction circuit, for example, there is a self-luminous display device having a deterioration correction function described in Patent Document 1 made by the present applicant, and a block diagram of the video data correction circuit is shown in FIG. The video data correction circuit of FIG. 13 includes I: a counter unit, II: a storage circuit unit, and III: a signal correction unit. I has a counter 1302, II has a volatile memory 1303 and a non-volatile memory 1304, and III has a correction circuit 1305 and a correction data storage 1306. In this video data correction circuit, a first video signal 1301A (video data for driving a pixel in which an EL element has deteriorated) that is a video data signal before correction is corrected by the signal correction unit III, and the corrected video data signal Is supplied to the display device 1307 as a second video signal 1301B.

  The video data correction circuit samples the second video signal 1301B, which is a corrected video data signal supplied to the display device 1307 periodically (for example, every second), and uses the signal to sample each pixel. The counter 1302 counts lighting and non-lighting at. The number of times of lighting in each pixel, that is, the accumulated lighting time, is sequentially stored in the storage circuit unit (hereinafter referred to as accumulated time data). Since the number of times of lighting is cumulative, it is desirable that the memory circuit be configured using a non-volatile memory. However, since the non-volatile memory generally has a limited number of times of writing, the device of FIG. During operation of the self-luminous device, data is stored using the volatile memory 1303 and written into the nonvolatile memory 1304 at regular intervals (for example, every hour or when the power is shut down). That is, after the next power-on, the EL element lighting time or the cumulative counting of the lighting time and lighting intensity is performed.

JP 2002-175041 A

  Here, the accumulated time data from the counter 1302 is written to the volatile memory 1303 in one cycle of a reception clock (in this specification, a clock for receiving video data in the video data correction circuit). The access timing to the memory includes the write operation of the accumulated time data to the volatile memory, the read operation by outputting the accumulated time data from the volatile memory to the signal correction unit, and the volatility of G The read operation by outputting the accumulated time data from the memory to the signal correction unit and the read operation by outputting the accumulated time data from the volatile memory to the signal correction unit in four times. is there. At this time, the timing of writing the accumulated time data to the volatile memory and the output of the accumulated time data from the volatile memory to the signal correction unit are narrow, but the timing of writing and output is not overlapped. In addition, it is necessary to take a time margin (blank period) to avoid mixing of data.

  As described above, when the light emission times of the light emitting elements are accumulated, added, and multiplied, it is difficult to take the timing of each operation in one cycle of the reception clock in which the write operation and the output of the accumulated time data are performed. Therefore, it is desirable to provide a time margin in order to avoid mixing data. In addition, with the recent increase in the screen size of the panel, the amount of information of the video data signal is increased, and a storage medium capable of higher speed operation is required, so that it is necessary to provide a time margin.

  In order to obtain this margin, it is required that the volatile memory and the non-volatile memory mounted on the circuit have a larger capacity and operate at high speed. However, as the number of connection pins increases in the circuit to be mounted, the area occupied by the circuit increases as the number of bits increases, which becomes an obstacle to downsizing the product and reducing the manufacturing cost. There is also a problem that it is difficult to reduce power consumption as the number of large-capacity RAMs increases.

  The present invention has been devised to solve such problems of the prior art, and its main purpose is to provide a memory access timing margin without requiring a large capacity and high speed memory. Even if the amount of information of the video data signal increases, a video data correction circuit that can operate at high speed and realizes downsizing, low manufacturing cost, and low power consumption of the product, and a display device incorporating the same • To provide electronic equipment.

  In the present invention, the cumulative use data (lighting time or cumulative data such as lighting time and lighting intensity) of each pixel input to the video data correction circuit is divided into a plurality of data portions, and the plurality of data The portion is stored in a plurality of storage means according to each color of the light emitting element, so that a memory access timing margin can be obtained without requiring a large capacity and high speed memory. A video data correction circuit is provided.

  More specifically, the video data correction circuit according to the present invention includes a detection unit that samples video data supplied to a display device having a plurality of pixels and detects cumulative usage data of each pixel, The storage means stores a cumulative data holding section that stores the cumulative usage data of each pixel; the cumulative usage data of each pixel detected by the detection section; and the cumulative of each pixel held in the cumulative data holding means An addition unit that adds the usage data and writes the addition result as new cumulative usage data to the cumulative data holding unit; and the video data based on the cumulative usage data stored in the cumulative data holding unit. A correction unit that corrects and outputs corrected video data to the display device, the cumulative usage data is divided into a plurality of data, and the plurality of data is stored in the plurality of storage units. In either it was configured to be stored for each color of the pixel.

  Still another video data correction circuit according to the present invention includes a detection unit that samples video data supplied to a display device having a plurality of pixels and detects cumulative usage data of each pixel, and first storage means The second storage means stores the cumulative usage data for each pixel, the cumulative usage data for each pixel detected by the detection section, and the cumulative data holding means. Based on the cumulative usage data stored in the cumulative data holding means, and an addition unit that adds the cumulative usage data of each pixel and writes the addition result to the cumulative data holding means as new cumulative usage data A correction unit that corrects the video data and outputs the corrected video data to the display device, and the cumulative usage data is converted into first cumulative usage data and second cumulative usage data. And the first cumulative usage data and the second cumulative usage data are stored for each color of the pixel in either the first storage means or the second storage means. It was.

  Still another video data correction circuit of the present invention includes a detection unit that samples video data supplied to a display device having a plurality of pixels and detects accumulated usage data of each pixel, and a first volatile property A storage unit that stores, in a second volatile storage unit, a cumulative data holding unit that stores the cumulative usage data of each pixel; a cumulative usage data of each pixel detected by the detection unit; and the cumulative data holding unit And adding the accumulated usage data of each pixel held in the memory and writing the addition result to the cumulative data holding means as new cumulative usage data, and the cumulative usage stored in the cumulative data holding means A correction unit that corrects the video data based on the data and outputs the corrected video data to the display device, and the cumulative usage data includes the first cumulative usage data and the second cumulative usage data. The first cumulative usage data and the second cumulative usage data are stored in one of the first volatile storage means and the second volatile storage means for each color of the pixel. It was set as the structure stored in.

  Still another video data correction circuit of the present invention includes a detection unit that samples video data supplied to a display device having a plurality of pixels and detects accumulated usage data of each pixel, and a first volatile property A storage unit that stores, in a second volatile storage unit, a cumulative data holding unit that stores the cumulative usage data of each pixel; a cumulative usage data of each pixel detected by the detection unit; and the cumulative data holding unit And adding the accumulated usage data of each pixel held in the memory and writing the addition result to the cumulative data holding means as new cumulative usage data, and the cumulative usage stored in the cumulative data holding means A correction unit that corrects the video data based on the data and outputs the corrected video data to the display device, and the accumulated usage data includes lower bits and lower bits of the accumulated usage data. It is divided into bits, the upper bits and the lower bits, either the first volatile memory means and the second volatile storage unit, and configured to be stored for each color of the pixel.

  Still another video data correction circuit of the present invention includes a detection unit that samples video data supplied to a display device having a plurality of pixels and detects accumulated usage data of each pixel, and a first volatile property A storage unit that stores, in a second volatile storage unit, a cumulative data holding unit that stores the cumulative usage data of each pixel; a cumulative usage data of each pixel detected by the detection unit; and the cumulative data holding unit And adding the accumulated usage data of each pixel held in the memory and writing the addition result to the cumulative data holding means as new cumulative usage data, and the cumulative usage stored in the cumulative data holding means A correction unit that corrects the video data based on the data and outputs the corrected video data to the display device, and the accumulated usage data includes lower bits and lower bits of the accumulated usage data. The upper bits and the lower bits are divided for each color of the pixel in one of the first volatile storage unit and the second volatile storage unit, and the video data is stored in the correction unit. The deterioration correction coefficient for correcting the error is multiplied by only the upper bits of the cumulative usage data.

  The cumulative usage data of each pixel may be cumulative usage data based on the lighting time of each pixel or the cumulative lighting time and lighting intensity of each pixel.

  Further, the pixel may have a structure in which a light emitting element of any one of red, blue, and green is provided for each pixel.

  Of the three light emitting elements of red, blue, and green, two colors of cumulative usage data are stored in the first volatile storage means, and one color of cumulative usage data is stored in the second volatile memory. The configuration may be stored in the sex storage means.

  Further, the present invention is applied to a display device having a pixel portion and a video data correction circuit, thereby providing a display device capable of taking a margin of memory access timing without requiring a large capacity and high speed memory. can do.

  More specifically, the display device according to the present invention is connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit, and performs display. And a video data correction circuit that corrects video data to be input to the gate signal line driver circuit and the source signal line driver circuit, wherein the video data correction circuit includes the plurality of video data correction circuits. A sampling unit that samples the video data supplied to each pixel and detects cumulative usage data of each pixel; and a cumulative data holding unit that holds the cumulative usage data of each pixel in a plurality of storage means And the cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding means are added, and the addition result is newly accumulated. An addition unit that writes the usage data as the cumulative data holding unit, and a correction unit that corrects the video data based on the cumulative usage data stored in the cumulative data holding unit and outputs the corrected video data to the pixel unit. And correcting the video data by dividing the cumulative usage data into a plurality of data, and storing the plurality of data in each of the plurality of storage means for each color of the pixels It was.

  Still another display device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. And a video data correction circuit that corrects video data to be input to the gate signal line driver circuit and the source signal line driver circuit. The video data correction circuit includes a plurality of pixels. The video data to be supplied is sampled, and the cumulative usage data of each pixel is held in the detection unit that detects the cumulative usage data of each pixel, and the first storage unit and the second storage unit. The cumulative data holding unit, the cumulative usage data of each pixel detected by the detection unit, and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is obtained. An adder for writing the accumulated usage data into the accumulated data holding means; and correcting the video data based on the accumulated usage data stored in the accumulated data holding means and outputting the corrected video data to the pixel section. A correction unit that divides the cumulative usage data into first cumulative usage data and second cumulative usage data, and the first cumulative usage data and the second cumulative usage data. The video data is corrected by storing the data for each color of the pixel in either the first storage unit or the second storage unit.

  Still another display device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. And a video data correction circuit that corrects video data to be input to the gate signal line driver circuit and the source signal line driver circuit. The video data correction circuit includes a plurality of pixels. The video data to be supplied is sampled to detect the accumulated usage data of each pixel, and the first volatile storage means and the second volatile storage means include the cumulative usage data of each pixel. Is added to the accumulated data holding unit, the accumulated usage data of each pixel detected by the detecting unit, and the accumulated usage data of each pixel held in the accumulated data holding unit. An adder for writing the result as new accumulated usage data into the accumulated data holding means, and correcting the video data based on the accumulated usage data stored in the accumulated data holding means to obtain corrected video data in the pixel section The cumulative usage data is divided into first cumulative usage data and second cumulative usage data, and the first cumulative usage data and the second cumulative data are divided. The video data is corrected by storing the usage data in either the first volatile storage means or the second volatile storage means for each color of the pixel.

  Still another display device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. And a video data correction circuit that corrects video data to be input to the gate signal line driver circuit and the source signal line driver circuit. The video data correction circuit includes a plurality of pixels. The video data to be supplied is sampled to detect the accumulated usage data of each pixel, and the first volatile storage means and the second volatile storage means include the cumulative usage data of each pixel. Is added to the accumulated data holding unit, the accumulated usage data of each pixel detected by the detecting unit, and the accumulated usage data of each pixel held in the accumulated data holding unit. An adder for writing the result as new accumulated usage data into the accumulated data holding means, and correcting the video data based on the accumulated usage data stored in the accumulated data holding means to obtain corrected video data in the pixel section And a correction unit that outputs the accumulated usage data to upper bits and lower bits of the cumulative usage data, and the upper bits and the lower bits are divided into a first volatile storage unit and a first volatile storage unit. The video data is corrected by storing it for each color of the pixel in any one of the two volatile storage means.

  Still another display device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. And a video data correction circuit that corrects video data to be input to the gate signal line driver circuit and the source signal line driver circuit. The video data correction circuit includes a plurality of pixels. The video data to be supplied is sampled to detect the accumulated usage data of each pixel, and the first volatile storage means and the second volatile storage means include the cumulative usage data of each pixel. Is added to the accumulated data holding unit, the accumulated usage data of each pixel detected by the detecting unit, and the accumulated usage data of each pixel held in the accumulated data holding unit. An adder that writes the result as new accumulated usage data into the accumulated data holding means, and the video data is corrected based on the accumulated usage data stored in the accumulated data holding means, and the corrected video data is converted into the pixel portion. And a correction unit that outputs the cumulative usage data to the upper and lower bits of the cumulative usage data, and the upper and lower bits are divided into a first volatile storage unit and a first volatile storage unit. 2 is stored for each color of the pixel in any one of the volatile storage means, and the correction unit for correcting the video data by the correction unit is multiplied based only on the upper bits of the cumulative usage data Thus, the video data is corrected.

  The cumulative usage data of each pixel may be cumulative usage data based on the lighting time of each pixel or the cumulative lighting time and lighting intensity of each pixel.

  Further, the pixel may have a configuration in which a light emitting element of any one color of red, blue, and green is provided.

  Of the three light emitting elements of red, blue, and green, two colors of cumulative usage data are stored in the first volatile storage means, and one color of cumulative usage data is stored in the second volatile memory. The configuration may be stored in the sex storage means.

  Further, the present invention is applied to an electronic apparatus having a display panel and a video data correction circuit, thereby providing an electronic apparatus capable of taking a memory access timing margin without requiring a large capacity and high speed memory. can do.

  More specifically, the electronic device according to the present invention includes a plurality of display devices connected to the gate signal line driving circuit, the source signal line driving circuit, the gate signal line driving circuit, and the source signal line driving circuit. A display panel having a pixel portion having a plurality of pixels, and a video data correction circuit for correcting video data to be input to the gate signal line driver circuit and the source signal line driver circuit, and the video data correction The circuit samples the video data supplied to the plurality of pixels and detects the cumulative usage data of each pixel, and holds the cumulative usage data of each pixel in a plurality of storage means The cumulative data holding unit, the cumulative usage data of each pixel detected by the detection unit, and the cumulative usage data of each pixel held in the cumulative data holding unit are added and added. An adder for writing the result as new accumulated usage data into the accumulated data holding means, and correcting the video data based on the accumulated usage data stored in the accumulated data holding means to display the corrected video data on the display panel The cumulative usage data is divided into a plurality of data, and the plurality of data is stored in one of the plurality of storage means for each color of the pixel. It was set as the structure which correct | amends data.

  Still another electronic device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. A display panel including a pixel portion, and a video data correction circuit that corrects video data to be input to the gate signal line driver circuit and the source signal line driver circuit, and the video data correction circuit includes: The video data supplied to the plurality of pixels is sampled to detect the cumulative usage data of each pixel, and the first storage means and the second storage means are used for the cumulative use of each pixel. A cumulative data holding unit that holds the degree data, a cumulative usage data of each pixel detected by the detection unit, and a cumulative usage data of each pixel held in the cumulative data holding unit. An addition unit for writing the addition result as new accumulated usage data in the accumulated data holding unit, and correcting the video data on the basis of the accumulated usage data stored in the accumulated data holding unit and correcting video data And a correction unit that outputs to the display panel, the cumulative usage data is divided into a first cumulative usage data portion and a second cumulative usage data portion, and the first cumulative usage data The video data is corrected by storing the second cumulative usage data in each of the colors of the pixels in either the first storage unit or the second storage unit.

  Still another electronic device of the present invention includes a plurality of pixels which are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. A display panel including a pixel portion, and a video data correction circuit that corrects video data to be input to the gate signal line driver circuit and the source signal line driver circuit, and the video data correction circuit includes: The video data supplied to the plurality of pixels is sampled to detect the accumulated usage data of each pixel, and the first volatile storage unit and the second volatile storage unit include each pixel. An accumulated data holding unit for holding the accumulated usage data, accumulated usage data for each pixel detected by the detection unit, and accumulated usage data for each pixel held in the accumulated data holding unit. And an addition unit for writing the addition result as new accumulated usage data to the accumulated data holding unit, and correcting the video data based on the accumulated usage data stored in the accumulated data holding unit. A correction unit that outputs corrected video data to the display panel, wherein the cumulative usage data is divided into first cumulative usage data and second cumulative usage data, and the first cumulative usage data The video data is corrected by storing the data and the second cumulative usage data for each color of the pixel in either the first volatile storage unit or the second volatile storage unit. .

  Still another electronic device of the present invention includes a plurality of pixels which are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. A display panel including a pixel portion, and a video data correction circuit that corrects video data to be input to the gate signal line driver circuit and the source signal line driver circuit, and the video data correction circuit includes: The video data supplied to the plurality of pixels is sampled to detect the accumulated usage data of each pixel, and the first volatile storage unit and the second volatile storage unit include each pixel. An accumulated data holding unit for holding the accumulated usage data, accumulated usage data for each pixel detected by the detection unit, and accumulated usage data for each pixel held in the accumulated data holding unit. And an addition unit for writing the addition result as new accumulated usage data to the accumulated data holding unit, and correcting the video data based on the accumulated usage data stored in the accumulated data holding unit. A correction unit that outputs corrected video data to the display panel, and divides the cumulative usage data into upper bits and lower bits of the cumulative usage data, and the upper bits and the lower bits are first The video data is corrected by storing each color of the pixel in any one of the volatile storage means and the second volatile storage means.

  Still another electronic device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. A display panel including a pixel portion, and a video data correction circuit that corrects video data to be input to the gate signal line driver circuit and the source signal line driver circuit, wherein the video data correction circuit includes: The video data supplied to the plurality of pixels is sampled to detect the accumulated usage data of each pixel, and each of the first volatile storage unit and the second volatile storage unit includes A cumulative data holding unit that holds the cumulative usage data of the pixels; a cumulative usage data of each pixel detected by the detection unit; and a cumulative usage data of each pixel held in the cumulative data holding unit. And adding the result to the accumulated data holding means as new accumulated usage data, and correcting the video data based on the accumulated usage data stored in the accumulated data holding means. A correction unit that outputs corrected video data to the display panel, and divides the accumulated usage data into upper bits and lower bits of the accumulated usage data, and the upper bits and the lower bits are One of the volatile storage means and the second volatile storage means is stored for each color of the pixel, and a deterioration correction coefficient for correcting the video data by the correction unit is used as the cumulative usage data. The video data is corrected by multiplying based on only the higher-order bits.

  The cumulative usage data of each pixel may be cumulative usage data based on the lighting time of each pixel or the lighting time and lighting intensity of each pixel.

  Further, the pixel may have a configuration in which a light emitting element of any one color of red, blue, and green is provided.

  Of the three light emitting elements of red, blue, and green, two colors of cumulative usage data are stored in the first volatile storage means, and one color of cumulative usage data is stored in the second volatile memory. The configuration may be stored in the sex storage means.

  The electronic device of the present invention includes a television receiver, a computer, a mobile phone, a digital still camera, a desktop or floor-mounted or wall-mounted display, a viewfinder type and / or a monitor direct view type video recorder, a navigation system, and a video phone. A goggle type display, a sound reproducing device, a game machine, a portable information terminal, or an image reproducing device provided with a recording medium.

  In another embodiment of the present invention, the cumulative usage data (lighting time or cumulative data such as lighting time and lighting intensity) of each pixel input to the video data correction circuit is divided into a plurality of data portions. The plurality of data portions are stored in the plurality of storage means according to the pixels of the display area, so that the memory access timing can be reduced without requiring a large capacity and high speed memory. A margin can be taken, and sampling can be performed with a smaller number of frame clocks.

  More specifically, the video data correction circuit of the present invention samples video data supplied to a display device that includes a plurality of pixels and has a plurality of display areas, and detects cumulative usage data of each pixel. A plurality of storage means, a cumulative data holding section for holding cumulative usage data for each pixel, a cumulative usage data for each pixel detected by the detection section, and a cumulative data holding means. An addition unit that adds the accumulated usage data of each pixel held and writes the addition result to the cumulative data holding unit as new cumulative usage data; and cumulative usage data stored in the cumulative data holding unit A correction unit that corrects the video data based on the output data and outputs the corrected video data to the display device. The accumulated usage data is divided into a plurality of data, and the plurality of data Data is any one of said plurality of storage means, and configured to be stored for each pixel of the display area.

  Still another video data correction circuit according to the present invention includes a plurality of pixels, samples video data supplied to a display device having a first display area and a second display area, and cumulatively uses the pixels. A detection unit for detecting degree data, a first storage unit, a second storage unit, a cumulative data holding unit for holding cumulative usage data of each pixel, and a cumulative of each pixel detected by the detection unit An addition unit that adds the usage data and the cumulative usage data of each pixel held in the cumulative data holding unit and writes the addition result to the cumulative data holding unit as new cumulative usage data; A correction unit that corrects the video data based on the accumulated usage data stored in the data holding means and outputs the corrected video data to the display device, the accumulated usage data being a first cumulative The usage data section is divided into a second cumulative usage data section, and the first cumulative usage data and the second cumulative usage data are stored in the first storage means and the second storage means. One of the pixels is stored in each pixel in the first display area and each pixel in the second display area.

  Still another video data correction circuit according to the present invention includes a plurality of pixels, samples video data supplied to a display device having a first display area and a second display area, and cumulatively uses the pixels. A detection unit for detecting degree data, a first volatile storage unit, a second volatile storage unit, a cumulative data holding unit for holding cumulative usage data of each pixel, and a detection unit An adder that adds the cumulative usage data of each pixel and the cumulative usage data of each pixel held in the cumulative data holding means, and writes the addition result to the cumulative data holding means as new cumulative usage data And a correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding means and outputs the corrected video data to the display device, the accumulated usage data The first cumulative usage data and the second cumulative usage data are divided into the first cumulative usage data and the second cumulative usage data. It is configured such that the data is stored for each pixel in the first display area and each pixel in the second display area in any of the sex storage means.

  Still another video data correction circuit according to the present invention includes a plurality of pixels, samples video data supplied to a display device having a first display area and a second display area, and cumulatively uses the pixels. A detection unit for detecting degree data, a first volatile storage unit, a second volatile storage unit, a cumulative data holding unit for holding cumulative usage data of each pixel, and a detection unit An adder that adds the cumulative usage data of each pixel and the cumulative usage data of each pixel held in the cumulative data holding means, and writes the addition result to the cumulative data holding means as new cumulative usage data And a correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding means and outputs the corrected video data to the display device, the accumulated usage data The accumulated usage data is divided into upper bits and lower bits, and the upper bits and the lower bits are stored in the first display area in one of the first volatile storage means and the second volatile storage means. The pixel is stored for each pixel in the second display area.

  Still another video data correction circuit according to the present invention includes a plurality of pixels, samples video data supplied to a display device having a first display area and a second display area, and cumulatively uses the pixels. A detection unit for detecting degree data, a first volatile storage unit, a second volatile storage unit, a cumulative data holding unit for holding cumulative usage data of each pixel, and a detection unit An adder that adds the cumulative usage data of each pixel and the cumulative usage data of each pixel held in the cumulative data holding means, and writes the addition result to the cumulative data holding means as new cumulative usage data And a correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding means and outputs the corrected video data to the display device, the accumulated usage data The accumulated usage data is divided into upper bits and lower bits, and the upper bits and the lower bits are stored in the first display area in one of the first volatile storage means and the second volatile storage means. Stored in each pixel of the second display area and the deterioration correction coefficient for correcting the video data by the correction unit is multiplied based only on the upper bits of the cumulative usage data It was.

  The cumulative usage data of each pixel may be cumulative usage data based on the lighting time of each pixel or the lighting time and lighting intensity of each pixel.

  The first display area is an area for displaying odd-numbered video data input to the display device, and the second display area is an even-numbered video data input to the display device. May be a structure including a display area.

  Further, the present invention is applied to a display device having a pixel portion and a video data correction circuit, thereby providing a display device capable of taking a margin of memory access timing without requiring a large capacity and high speed memory. can do.

  More specifically, the display device according to the present invention is connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit, and performs display. And a video data correction circuit that corrects video data to be input to the gate signal line driver circuit and the source signal line driver circuit. The data correction circuit samples the video data supplied to the plurality of pixels and detects a cumulative usage data of each pixel, and a plurality of storage means stores the cumulative usage data of each pixel. The accumulated data holding unit to be held, the accumulated usage data of each pixel detected by the detection unit, and the accumulated usage data of each pixel held in the accumulated data holding unit are added and added. An adder for writing the result as new accumulated usage data into the accumulated data holding means, and correcting the video data based on the accumulated usage data stored in the accumulated data holding means to obtain corrected video data in the pixel section The cumulative usage data is divided into a plurality of data, and the plurality of data is stored for each pixel of the display area in any of the plurality of storage means. Thus, the video data is corrected.

  Still another display device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. A pixel portion having a first display area and a second display area, and a video data correction circuit for correcting video data to be input to the gate signal line driver circuit and the source signal line driver circuit. The video data correction circuit samples the video data supplied to the plurality of pixels and detects a cumulative usage data of each pixel, a first storage unit, and a second storage unit Further, a cumulative data holding unit that holds cumulative usage data of each pixel, a cumulative usage data of each pixel detected by the detection unit, and a cumulative usage of each pixel held in the cumulative data holding unit. The video data based on the accumulated usage data stored in the accumulated data holding means, and an adding section that adds the result to the accumulated data holding means as new accumulated usage data A correction unit that outputs corrected video data to the pixel unit, the cumulative usage data is divided into first cumulative usage data and second cumulative usage data, and the first cumulative The usage data and the second cumulative usage data are stored in one of the first storage means and the second storage means in the pixels of the first display area and the pixels of the second display area. The video data is corrected by storing it every time.

  Still another display device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. A pixel portion having a first display area and a second display area, and a video data correction circuit for correcting video data to be input to the gate signal line driver circuit and the source signal line driver circuit. The video data correction circuit samples the video data supplied to the plurality of pixels and detects a cumulative usage data of each pixel, a first volatile storage unit, a second volatile storage unit, In the volatile storage means, a cumulative data holding unit that holds the cumulative usage data of each pixel, a cumulative usage data of each pixel detected by the detection unit, and each of the cumulative data holding means held in the cumulative data holding means The addition unit that adds the accumulated cumulative usage data and writes the addition result to the cumulative data holding unit as new cumulative usage data, and based on the cumulative usage data stored in the cumulative data holding unit A correction unit that corrects video data and outputs corrected video data to the pixel unit, and divides the cumulative usage data into first cumulative usage data and second cumulative usage data, The first cumulative usage data and the second cumulative usage data are stored in one of the first volatile storage means and the second volatile storage means, and the pixels of the first display area, and the first The video data is corrected by storing each pixel in the two display areas.

  Still another display device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. A pixel portion having a first display area and a second display area, and a video data correction circuit for correcting video data to be input to the gate signal line driver circuit and the source signal line driver circuit. The video data correction circuit samples video data supplied to a plurality of pixels and detects a cumulative usage data of each pixel, a first volatile storage means, and a second volatile memory. A cumulative data holding unit that holds cumulative usage data of each pixel, a cumulative usage data of each pixel detected by the detection unit, and each pixel held in the cumulative data holding unit. An addition unit that adds the accumulated usage data and writes the addition result as new accumulated usage data to the accumulated data holding unit; and the video data based on the accumulated usage data stored in the accumulated data holding unit A correction unit that corrects and outputs corrected video data to the pixel unit, and divides the accumulated usage data into upper and lower bits of the accumulated usage data, and the upper and lower bits. Is stored in either the first volatile storage means or the second volatile storage means for each pixel of the first display area and each pixel of the second display area. The configuration is as follows.

  Still another display device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. A pixel portion having a first display area and a second display area, and a video data correction circuit for correcting video data to be input to the gate signal line driver circuit and the source signal line driver circuit. The video data correction circuit samples video data supplied to a plurality of pixels and detects a cumulative usage data of each pixel, a first volatile storage means, and a second volatile memory. A cumulative data holding unit that holds cumulative usage data of each pixel, a cumulative usage data of each pixel detected by the detection unit, and each pixel held in the cumulative data holding unit. An addition unit that adds the accumulated usage data and writes the addition result as new accumulated usage data to the accumulated data holding unit; and the video data based on the accumulated usage data stored in the accumulated data holding unit A correction unit that corrects and outputs corrected video data to the pixel unit, and divides the accumulated usage data into upper and lower bits of the accumulated usage data, and the upper and lower bits. Is stored in either the first volatile storage means or the second volatile storage means for each pixel of the first display area and each pixel of the second display area, and the correction unit The video data is corrected by multiplying a deterioration correction coefficient for correcting the video data based only on the upper bits of the cumulative usage data.

  The cumulative usage data of each pixel may be cumulative usage data based on the lighting time of each pixel or the lighting time and lighting intensity of each pixel.

  The first display area is an area where odd-numbered input video data is displayed on the pixel portion, and the second display area is an even-numbered input video data on the pixel portion. The structure which is an area | region to display may be sufficient.

  The present invention also provides an electronic device capable of taking a margin of memory access timing without requiring a large capacity and high speed memory by applying the present invention to an electronic device having a display panel and a video data correction circuit. can do.

  More specifically, the electronic device according to the present invention includes a plurality of display devices connected to the gate signal line driving circuit, the source signal line driving circuit, the gate signal line driving circuit, and the source signal line driving circuit. A display panel including a pixel portion having a plurality of display areas, and a video data correction circuit for correcting video data to be input to the gate signal line driver circuit and the source signal line driver circuit. The video data correction circuit includes: a display panel including a detection unit that samples video data supplied to the plurality of pixels and detects accumulated usage data of each pixel; and a plurality of storage units. A cumulative data holding unit that holds cumulative usage data of each pixel; a cumulative usage data of each pixel detected by the detection unit; and each image held in the cumulative data holding unit And adding the result of the addition to the accumulated data holding means as new accumulated usage data, and the video based on the accumulated usage data stored in the accumulated data holding means. A correction unit that corrects data and outputs corrected video data to the display panel, and divides the cumulative usage data into a plurality of data, and the plurality of data is one of the plurality of storage means. In addition, the video data is corrected by storing each pixel in the display area.

  Still another electronic device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. A display panel including a pixel portion having a first display area and a second display area, and video data correction for correcting video data to be input to the gate signal line driver circuit and the source signal line driver circuit A video signal correction circuit, wherein the video data correction circuit samples video data supplied to the plurality of pixels and detects accumulated usage data of each pixel; and a first storage unit; In a second storage means, a cumulative data holding section that holds cumulative usage data of each pixel, a cumulative usage data of each pixel detected by the detection section, and a cumulative data holding means that is held in the cumulative data holding means. Based on the accumulated usage data stored in the accumulated data holding unit A correction unit that corrects the video data and outputs the corrected video data to the display panel, and divides the cumulative usage data into first cumulative usage data and second cumulative usage data. The first cumulative usage data and the second cumulative usage data are stored in one of the first storage means and the second storage means in the pixels of the first display area, and the second storage usage data. The video data is corrected by storing each pixel in the two display areas.

  Still another electronic device of the present invention includes a plurality of pixels which are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. A display panel including a pixel portion having a first display area and a second display area, and video data correction for correcting video data to be input to the gate signal line driver circuit and the source signal line driver circuit And a video data correction circuit, wherein the video data correction circuit samples video data supplied to the plurality of pixels and detects accumulated usage data of each pixel, and a first volatile memory Means, a second volatile storage means, a cumulative data holding unit for holding the cumulative usage data of each pixel, a cumulative usage data of each pixel detected by the detection unit, and the cumulative data holding An addition unit that adds the accumulated usage data of each pixel held in the stage and writes the addition result to the accumulated data holding unit as new accumulated usage data; and the accumulated usage stored in the accumulated data holding unit A correction unit that corrects the video data based on the degree data and outputs the corrected video data to the display panel, the cumulative usage data being the first cumulative usage data and the second cumulative usage degree. The first display area is divided into data, and the first cumulative usage data and the second cumulative usage data are stored in one of the first volatile storage means and the second volatile storage means. The video data is corrected by storing each pixel and each pixel in the second display area.

  Still another electronic device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. A display panel including a pixel portion having a first display area and a second display area, and video data correction for correcting video data to be input to the gate signal line driver circuit and the source signal line driver circuit And a video data correction circuit, wherein the video data correction circuit samples video data supplied to a plurality of pixels and detects cumulative usage data of each pixel, and first volatile storage means A cumulative data holding unit for holding cumulative usage data for each pixel in the second volatile storage unit; a cumulative usage data for each pixel detected by the detection unit; and the cumulative data holding unit. An addition unit that adds the accumulated usage data of each pixel held and writes the addition result to the cumulative data holding unit as new cumulative usage data; and cumulative usage data stored in the cumulative data holding unit A correction unit that corrects the video data based on the output and outputs the corrected video data to the display panel, and divides the accumulated usage data into upper and lower bits of the accumulated usage data, The upper bit and the lower bit are stored in either the first volatile storage unit or the second volatile storage unit for each pixel of the first display region and each pixel of the second display region. Thus, the video data is corrected.

  Still another electronic device of the present invention includes a plurality of pixels that are connected to the gate signal line driver circuit, the source signal line driver circuit, the gate signal line driver circuit, and the source signal line driver circuit and perform display. A display panel including a pixel portion having a first display area and a second display area, and video data correction for correcting video data to be input to the gate signal line driver circuit and the source signal line driver circuit And a video data correction circuit, wherein the video data correction circuit samples video data supplied to a plurality of pixels and detects cumulative usage data of each pixel, and first volatile storage means A cumulative data holding unit for holding cumulative usage data for each pixel in the second volatile storage unit; a cumulative usage data for each pixel detected by the detection unit; and the cumulative data holding unit. An addition unit that adds the accumulated usage data of each pixel held and writes the addition result to the cumulative data holding unit as new cumulative usage data; and cumulative usage data stored in the cumulative data holding unit A correction unit that corrects the video data based on the output and outputs the corrected video data to the display panel, and divides the accumulated usage data into upper bits and lower bits of the accumulated usage data, The upper bits and the lower bits are stored in either the first volatile storage means or the second volatile storage means for each pixel of the first display area and each pixel of the second display area. The correction unit corrects the video data by multiplying a deterioration correction coefficient for correcting the video data based only on the upper bits of the cumulative usage data. And the.

  The cumulative usage data of each pixel may be cumulative usage data based on the lighting time of each pixel or the lighting time and lighting intensity of each pixel.

  The first display area is an area where odd-numbered input video data is displayed on the display panel, and the second display area is an even-numbered input video data on the display panel. May be a region that displays.

  The electronic device of the present invention includes a television receiver, a computer, a mobile phone, a digital still camera, a desktop or floor-mounted or wall-mounted display, a viewfinder type and / or a monitor direct view type video recorder, a navigation system, and a video phone. A goggle type display, a sound reproducing device, a game machine, a portable information terminal, or an image reproducing device provided with a recording medium.

  In the present invention, when the light emission time of the light emitting element is counted and the light emission accumulated time data is stored in the volatile memory, the upper bits of the light emission accumulated time data are read from the volatile memory for each frame of the reception clock. In FIG. 4, two of the three RGB colors are divided into one color and read out simultaneously from two volatile memories. For this reason, it is possible to reduce the memory read access during one frame of the reception clock and take a margin of the access timing. Thereby, the reliability of the circuit can be greatly improved. Further, the present invention can cope with a shortened reception cycle, and it is not necessary to increase the size and speed of the memory. Therefore, according to the present invention, it is possible to contribute to downsizing, low power consumption, and low cost of products.

  In the present invention, when the light emission time of the light emitting element is counted and the light emission accumulated time data is stored in the volatile memory, the upper several bits of the light emission accumulated time data are read from the volatile memory for each frame of the reception clock. In the operation, the cumulative time data of the pixels to which the odd-numbered video data is input and the cumulative time data of the pixels to which the even-numbered video data are input are simultaneously read from the two volatile memories. Therefore, it is not necessary to increase the size and speed of the memory. Further, since the emission time of the pixels to which the odd-numbered video data is input during one frame of the frame clock and the emission time of the pixels to which the even-numbered video data are input can be counted in parallel, the memory The number of accesses to can also be greatly reduced. Therefore, according to the present invention, it is possible to contribute to downsizing, low power consumption, and low cost of products.

  Since the present invention is particularly effective for increasing the volume of video data input to the display unit, it can greatly contribute to an increase in the size of panels.

(Embodiment 1)
FIG. 1 shows an outline of a configuration example of a light emission time accumulating unit of a video data correction circuit according to the present invention. The light emission time accumulating unit adds a latch circuit 101 that latches video data to be sampled, and adds a lighting time expected from the sampled video data and accumulated time data so far to generate new accumulated time data. And an RG volatile storage unit 103A that is a first volatile storage unit that stores accumulated time data, and a B volatile storage unit 103B that is a second volatile storage unit. In addition, although the example using a volatile memory is shown for the 1st volatile memory | storage part and 2nd volatile memory | storage part which are memory | storage parts, the memory | storage part using a non-volatile memory is shown in both or one memory. It may be used. Moreover, the structure which provides more memory of a memory | storage part may be sufficient. Note that the video data input to the latch circuit 101 refers to corrected video data that is actually output to the display unit.

  Further, a volatile storage unit address generation circuit 105 and a volatile storage unit control circuit 106 are provided as control means for both the RG volatile storage unit 103A and the B volatile storage unit 103B. Further, in the adder 102, the accumulated time data to be added to the sampled video data is read from the RG volatile storage unit 103A and the B volatile storage unit 103B and temporarily stored therein, and the upper bit holding register 104A. Similarly, there is provided a lower bit holding register 104B for reading the accumulated time data from the RG volatile storage unit and the B volatile storage unit 103B and temporarily storing them. Note that in this embodiment, a display device that supplies video data includes a plurality of pixels, and each pixel includes R (Red: red), G (Green: green), and B (Blue: blue) light emitting elements. The image is displayed by light emission of each RGB light emitting element in each pixel.

  In the video data correction circuit of the present invention, the RG volatile storage unit 103A and the B volatile storage unit 103B, which are volatile storage units used for accumulating the lighting times of pixels, B video data is allocated and accumulated time data is stored. In this embodiment, the accumulated time data is divided into upper bits and lower bits, and the upper and lower bits of the R and G accumulated time data are stored in the RG volatile storage unit 103A, and the volatile for B is stored. The storage unit 103B stores the upper and lower bits of the B accumulated time data. However, how to divide the accumulated time data into RGB and assign it to each volatile storage unit is not limited to the form of dividing into RG video data and B video data, for example, accumulated time data May be divided into GB video data and R video data of pixels, and assigned to the GB volatile storage unit and the R volatile storage unit, respectively. Note that the present invention is not limited to RGB data of three colors, and the present invention is effective even when an image is displayed in four or more colors by adding light emitting elements of other colors to each pixel of the display device. This can be handled by storing the accumulated time data in the volatile storage means.

  FIG. 2 shows an outline of a configuration example of the video data correction unit of the video data correction circuit according to the present invention. The video data correction unit stores a deterioration correction coefficient and a nonvolatile storage unit 107 which is a nonvolatile storage unit that backs up the contents of the RG volatile storage unit 103A and the B volatile storage unit 103B when the power is turned off. And a multiplier 110 for generating corrected video data by multiplying each pixel by a deterioration correction coefficient corresponding to the cumulative lighting time and the video data. In addition, a nonvolatile memory unit address generation circuit 108 and a nonvolatile memory unit control circuit 109 are provided as control means of the nonvolatile memory unit 107, and the nonvolatile memory unit is controlled by an address bus and a memory control signal, respectively. . Note that the delay circuit 111 may be provided when the multiplier 110 multiplies the deterioration correction coefficient by the video data before correction. By providing the delay circuit, video data input and degradation correction coefficient output can be synchronized.

  The operation of the video data correction circuit will be described. First, non-volatile memory is used as a deterioration correction coefficient for correcting the video data so as to eliminate the influence of deterioration according to the degree of deterioration of the data of the luminance characteristics of the light emitting elements of the display device including the EL element over time. The information is stored in the unit 107 in advance. Further, as another configuration, a circuit unit for storing a deterioration correction coefficient in advance may be provided, such as a deterioration correction coefficient holding register for storing data of change over time in luminance characteristics of the light emitting elements of the display device.

In the present embodiment, it is assumed that the degradation correction coefficient for correcting the luminance of the light emitting element is calculated using Equation 1. In Equation 1, t is the accumulated light emission time, K0 is the ideal luminance, K (t) is the luminance at the accumulated light emission time t, and α (t) is the deterioration correction coefficient at the accumulated light emission time t.
(Equation 1)
K0 = α (t) × K (t)

  Video data (VD) input to the video data correction circuit is periodically sampled in the latch circuit 101, and the number of times of lighting / non-lighting in each pixel counted based on the video data is sequentially divided. The data is stored in the RG volatile storage unit 103A and the B volatile storage unit 103B in the form of data. In the present embodiment, the above periodic sampling is performed once per second.

  Here, FIG. 3 shows a reception clock (hereinafter referred to as reception CK), a video data signal before correction (hereinafter referred to as VD before correction: Vb1, Vb2,...), And a video data signal after correction in the light emission time accumulating unit of the present invention. (Hereinafter corrected VD: Va1, Va2,...), RG read control signal (hereinafter RG_OEB), B read control signal (hereinafter B_OEB), RG write control signal (hereinafter RG_WEB), B Write control signal (hereinafter B_WEB), RG volatile memory address (hereinafter RG address: AR, AG), B volatile memory address (B address: AB), RG emission time accumulation A timing chart for data output (hereinafter, RG data output: DR, DG) and B light emission time accumulated data output (hereinafter, B data output: DB) is shown.

  The write / read operation to the RG volatile storage unit 103A or the B volatile storage unit 103B will be briefly described. When RG_OEB is High or Low (Low in this specification), the RG volatile storage unit 103A is used. Video data can be read from the B volatile storage unit 103B when B_OEB is High or Low (Low in this specification), and RG_WEB is High or Low (this specification). The RG volatile storage unit 103A can be written at Low), and the B_WEB can be written to the B volatile storage unit 103B at High or Low (Low in this specification). As shown in FIG. 3, the upper bit time accumulated data for R is read from the RG volatile storage unit 103A during the period when the RG address is specified and RG_OEB is Low.

  In the present embodiment, the case where the sampling order of pixel colors is performed in the order of R → G → B is shown. Of course, the sampling is not limited to this order, and the sampling may be performed by appropriately changing the order. good. For example, it may be G → R → B, or may be set appropriately.

  1 to 3 with respect to sampling of the pre-correction VD over time, first, in the first period of the reception CK, a predetermined pixel of a predetermined color (R in the present embodiment) of the pre-correction VD. In this embodiment, RG_OEB is set to Low in order to read the upper bit time accumulated data for the pre-correction video data Vb1 from the RG volatile storage unit 103A. In synchronization with this, the upper bit time accumulated read address 301 is designated by the RG address, and the upper bit time accumulated read data 302 of R is held in the upper bit holding register 104A.

  Next, in the second period of the reception CK, in order to read the lower bit time accumulated data for the predetermined pixel of the predetermined color (R in this embodiment) of the VD before correction from the RG volatile storage unit 103A, RG_OEB is set to Set to Low. In synchronization with this, the lower bit time accumulated read address 303 is designated by the RB address, and the lower bit time accumulated read data 304 of R is held in the lower bit holding register 104B.

  Next, in the third period of the reception CK, the upper bit time accumulated read data 302 for R held in the upper bit holding register 104A is output to the adder 102, and the video data before correction by a latch or the like (not shown). The upper bit time accumulated data is added in synchronization with the light emission time data for R of Vb1. Further, in order to write the upper bit time accumulated write data 306 for the added R to the RG volatile storage unit 103A, the upper bit time accumulated write address 305 is designated by the RG address, and RG_WEB is set to Low in synchronization therewith. .

  Next, in the fourth period of the reception CK, the lower bit time cumulative read data 304 for R held in the lower bit holding register 104B is input to the adder 102, and the video data before correction by a latch or the like (not shown). The lower bit time accumulated data is added in synchronization with the accumulated time data for R of Vb1. Further, in order to write the lower bit time cumulative write data 308 for the added R to the RG volatile storage unit 103A, the lower bit time cumulative write address 307 is specified by the RG address, and RG_WEB is set to Low in synchronization therewith. .

  As described above, using the first to fourth periods of the reception clock, the time accumulation data for the R color of VD1 is accumulated in the RG volatile storage unit 103A. When sampling for G, the same operation as that for sampling R may be performed. When B is sampled, B_OEB and B_WEB may be used to read from the B volatile storage unit and divide the writing into upper bits and lower bits, respectively, and perform sampling appropriately.

  The pre-correction video data is sampled for all colors of all pixels, and the sampled time accumulated data is multiplied by the deterioration correction coefficient to obtain video data input to the display unit. The data is output from the volatile storage unit to the nonvolatile storage unit address generation circuit of the video data correction unit via the node 112 in FIG.

  Here, when the upper bit time accumulated data for R is written into the RG volatile storage unit, the node 112 stores the upper bit time accumulated data for R in the RG nonvolatile storage unit or the G nonvolatile storage unit. Write and output of the upper bit time accumulated data from the RG volatile storage unit and the B volatile storage unit to the video data correction unit will be described.

  The access timing to the memory when the upper bit time accumulated data for R is written into the volatile volatile storage unit is the write operation of the upper bit accumulated time data for R to the RG volatile storage unit. A read operation by performing output of the upper bit time accumulated data from the volatile storage unit for RG to the multiplier and output of the upper bit time accumulated data for B from the volatile storage unit for B to the multiplier; And the read operation by outputting the higher bit time accumulated data from the RG volatile storage unit to the multiplication unit for G and G, and the access timing may be less than that in the conventional example. At this time, by providing the RG volatile storage unit and the B volatile storage unit separately, the higher-order bit emission time accumulation data for R from the RG volatile storage unit, the B accumulation volatile storage The upper bit time accumulated data for B from the unit can be simultaneously output to the video data correction unit. Further, as shown in FIG. 3, the remaining G data may be output as appropriate after outputting the R emission time accumulated data. Therefore, compared to the conventional access timing, a blank time is generated as shown in FIG.

  Further, the sampling of the light emission time accumulated data will be described for each frame clock cycle with reference to FIGS. 14, 15, and 16. A11, B21, C31, D41, A51... A (m−3) n, B (m−2) n, C (m−1) n, and Dmn in order from the upper left to each pixel of the display unit shown in FIG. This will be explained using the one with the address.

  FIG. 15 shows an enlarged frame clock and reception clock cycle. Here, the frame clock is 60 frames per second as described above. In one cycle of this frame clock, that is, one frame period Tf, the number of times of reception of the received CK video data signal is m × n.

  Here, one frame period means a period during which a video data signal is received from A11 to Dmn of the pixel shown in FIG. A reception clock (also referred to as reception CK) refers to a signal having a period Tf / (m × n) obtained by dividing Tf by the number of receptions of video data signals m × n. A frame clock (also referred to as a frame CK) refers to a signal having one frame period as one cycle.

  Here, FIG. 16 shows pixel data sampled in each frame of the frame clock, and will be seen together with FIGS. If sampling of the pixel A11 is first started in the first frame of the frame clock, as shown in FIG. 15, the upper bit read operation, the lower bit read operation, the upper bit write operation, and the lower bit write operation are performed. Since 1 to 4 cycles of the reception clock are required, the next pixel data to be sampled is A51. Similarly, in the second frame of the next frame clock, sampling is performed in order from B21. Hereinafter, sampling is performed from C31 in the third frame of the frame clock in the order shown, and sampling is sequentially performed from D41 in the fourth frame of the frame clock. Since sampling is performed separately because each color has a different element, for example, in the first to fourth frames, sampling is performed for all pixels for R. Here, an example in which an image is displayed with three primary colors of RGB is shown. To sample each color of R, G, and B separately and to perform sampling for RGB of all pixels, 12 frames of the frame clock are consumed. It becomes.

  By providing the video data correction circuit having the configuration of the present embodiment, it is possible to reduce the memory read access during one frame of the reception clock and take the margin of the access timing, thereby increasing the size and speed of the memory. The product can be reduced in size, reduced in power consumption, and reduced in cost without any effort.

  Furthermore, the lighting time of the light emitting element is periodically sampled, the accumulated time data is stored, and the video data is corrected each time by referring to the data of the temporal change of the light emitting element stored in advance. Further, it is possible to supply correction video data that can achieve the same luminance as that of the light-emitting element that has not deteriorated, and to maintain the uniformity of the screen without causing luminance unevenness in the display device.

  When gradation expression using EL elements is also performed by brightness control, the lighting intensity is detected together with the lighting time of the EL elements, and the deterioration state of the light emitting element is determined from both the lighting time and the lighting intensity. It is desirable to do. In this case, correction data is also generated accordingly, and the accumulated lighting time and lighting intensity data are stored in the RG volatile storage unit 103A and the B volatile storage unit 103B, and the cumulative lighting time and lighting intensity are stored. The deterioration correction coefficient based on the cumulative usage taking into account the above is stored in advance in the nonvolatile storage unit.

  In addition, the video data is not limited to RGB three-color data, and a configuration in which light emitting elements of other colors are added to the pixels of the display device is used, and sampling is appropriately performed even when an image is displayed with four or more colors. Should be done. For example, when displaying in four colors with RGB added with W (white), an RG volatile storage unit or a BW volatile storage unit is provided, and sampling is performed in the order of R → G → B → W. The accumulated usage data for each color may be output from the volatile storage unit for RG or the volatile storage unit for BW to the multiplication unit.

  In addition, as an element used for the storage means of the RG volatile storage unit 103A and the B volatile storage unit 103B, a static memory (SRAM) or a dynamic memory (DRAM) can be used. In addition, examples of the element used for the storage unit of the nonvolatile storage unit 107 include a ferroelectric memory (FeRAM), an EEPROM, and a flash memory. However, the memory element is not limited thereto, and a commonly used memory element can be used. However, when a DRAM is used for the volatile storage unit, it is necessary to add a periodic refresh function.

Note that this embodiment mode can be implemented freely combining with any description in the embodiments or embodiment modes in this specification.
(Embodiment 2)

  FIG. 4 shows an outline of a configuration example of the light emission time accumulating unit of the video data correction circuit according to the present embodiment. The light emission time accumulating unit adds a latch circuit 401 that holds video data to be sampled, and adds a lighting time expected from the sampled video data and accumulated time data so far to generate new accumulated time data. And a first display area volatile storage unit 403A and a second display area volatile storage unit 403B for storing accumulated time data. In addition, although the example which uses a volatile memory is shown for the 1st display area volatile memory | storage part and 2nd display area volatile memory | storage part which are memory | storage parts, both the memory | storage parts using a non-volatile memory are shown. Alternatively, it may be used for one of the memories. Moreover, the structure which provides more memory of a memory | storage part may be sufficient. Note that the video data input to the latch circuit 401 refers to corrected video data that is actually output to the display unit.

  The light emission time accumulating unit includes a volatile storage unit address generation circuit 405 and a volatile storage unit as control means for both the first display region volatile storage unit 403A and the second display region volatile storage unit 403B. A control circuit 406 is provided. Further, in the adder 402, the first display area upper bit holding register that reads out the accumulated time data to be added to the sampled video data from the first display area volatile storage unit 403A and temporarily stores it. 404A, the first display area lower bit holding register 404B, and the accumulated time data to be added to the sampled video data are read from the second display area volatile storage unit 403B and temporarily stored. Two display area upper bit holding registers 404C and a second display area lower bit holding register 404D are provided. Further, a selector 413 for sequentially switching the accumulated time data of the first display area or the second display area input to the adder 402 is provided. In addition, a register 414 for controlling the timing of writing the accumulated time data added by the adder to the first display area volatile storage unit 403A and the second display area volatile storage unit 403B, a tristate buffer 415 is provided. The storage unit for holding the accumulated time data is provided with a register. However, the present invention is not limited to this, and other storage means may be provided as long as the accumulated time data can be held once.

  In the present embodiment, a display device that supplies video data includes a plurality of pixels, and each pixel includes R (Red: red), G (Green: green), and B (Blue: blue) light emitting elements. It is assumed that an image is displayed by light emission of each RGB light emitting element in each pixel. In the present embodiment, the display device to which video data is supplied has a first display region and a second display region, and the first display region receives video data that is input oddly to the display device. An area to be displayed (Odd Video Data Area: OVDA) is used, and the second display area is an area (Even Video Data Area: EVDA) in which even-numbered video data input to the display device is displayed.

  In the video data correction circuit of the present embodiment, the first display area volatile storage unit 403A and the second display area volatile storage unit 403B, which are volatile storage means used for accumulating pixel lighting times, The video data for the light emitting elements of the pixels in the display area and the video data for the light emitting elements of the pixels in the second display area are allocated, and accumulated time data is stored. In the present embodiment, the accumulated time data is divided into upper bits and lower bits, and the first display area volatile storage unit 403A stores the upper bits of video data for the light emitting elements of the pixels in the first display area. The lower bits are stored, and the second display area volatile storage unit 403B stores the upper bits and lower bits of the video data for the light emitting elements of the pixels in the second display area. The display device to which the video data is supplied is not limited to the first display area and the second display area, and even if it has a third display area, it is stored in any volatile storage means. Or by adding a corresponding memory.

  FIG. 5 shows an outline of a configuration example of the video data correction unit of the video data correction circuit according to the present invention. The video data correction unit is a non-volatile storage unit that stores the deterioration correction coefficient and backs up the contents of the first display area volatile storage unit and the second display area volatile storage unit when the power is turned off. A non-volatile storage unit 407 and a multiplier 410 that generates corrected video data by multiplying each pixel by a deterioration correction coefficient corresponding to the cumulative lighting time and the pre-correction video data are provided. In addition, a nonvolatile storage unit address generation circuit 408 and a nonvolatile storage unit control circuit 409 are provided as control means of the nonvolatile storage unit 407, and the nonvolatile storage unit 407 is controlled by an address bus and a memory control signal, respectively. To do. Note that a delay circuit 411 may be provided when multiplying the video data before correction by the deterioration correction coefficient by the multiplier 410 so that the input of the video data and the output of the deterioration correction coefficient are synchronized.

  The operation of the video data correction circuit will be described. First, a nonvolatile memory unit is used as a deterioration correction coefficient for correcting data of luminance characteristics of a light emitting element of a display device such as an EL element over time in accordance with the degree of the deterioration so as to eliminate the influence of the deterioration of the video data. 407 is stored in advance. Further, as another configuration, a circuit unit for storing a deterioration correction coefficient in advance may be provided, such as a deterioration correction coefficient holding register for storing data of change over time in luminance characteristics of the light emitting elements of the display device.

In the present embodiment, it is assumed that the degradation correction coefficient for correcting the luminance of the light emitting element is calculated using Equation 2. In Equation 2, t is the accumulated light emission time, K0 is the ideal luminance, K (t) is the luminance at the accumulated light emission time t, and α (t) is the deterioration correction coefficient at the accumulated light emission time t.
(Equation 2)
K0 = α (t) × K (t)

  Video data (VD) input to the video data correction circuit is periodically sampled in the latch circuit 401, and the number of times of lighting / non-lighting in each pixel counted based on the video data is sequentially divided. The data is stored in the first display area volatile storage unit 403A and the second display area volatile storage unit 403B in the form of data. In the present embodiment, the above periodic sampling is performed once per second.

  Here, FIG. 6 shows a reception clock (reception CK), a video data signal before correction (VD before correction: Vb1, Vb2,...), A video data signal after correction (VD after correction) in the light emission time accumulating unit of the present invention. : Va1, Va2,...), A read control signal (OVDA_OEB) for an area where odd-numbered video data is displayed, and a read control signal (EVDA_OEB) for an area where even-numbered video data is displayed , Odd-numbered video data write control signal (OVDA_WEB), even-numbered video data write control signal (EVDA_WEB), odd-numbered video data volatile memory address (OVDA address: AR, AG, AB), volatile storage unit memo for even-numbered input video data Address (EVDA address: AR, AG, AB), output of emission time accumulated data for odd-numbered input video data (OVDA data output: DR, DG, DB), for even-numbered input video data The timing chart about the output of the light emission time accumulation data (EVDA data output: DR, DG, DB) is shown.

  To briefly describe the writing / reading operation to the first display area volatile storage unit 403A or the second display area volatile storage unit 403B, OVDA_OEB is High or Low (Low in this specification). Thus, the video data can be read from the first display area volatile storage unit 403A, and the video from the second display area volatile storage unit 403B when EVDA_OEB is High or Low (Low in this specification). Data can be read, and writing to the first display area volatile storage unit 403A is enabled when OVDA_WEB is High or Low (Low in this specification), and EVDA_WEB is High or Low (in this specification). In this case, writing to the second display area volatile storage unit 403B becomes possible. As shown in FIG. 6, the upper bit time accumulated data for R in the first display area from the first display area volatile storage unit 403A in the period in which the OVDA address is specified and OVDA_OEB is Low. Read it out.

  In the present embodiment, a timing chart in the case where the pixel color sampling order is performed in the order of R → G → B is shown. May be performed. For example, it may be G → R → B, or may be set as appropriate.

  4 to 6 with respect to sampling of the VD before correction, the predetermined color of the VD1 before correction (R in the present embodiment) first in the first period and the second period of the reception clock. ) Is read out from the first display area volatile storage unit and the second display area volatile storage unit, so that the OVDA_OEB and EVDA_OEB are set to Low. To. In synchronization with this, the upper bit time accumulated read address 601A and the upper bit time accumulated read address 601B are designated by the OVDA address and EVDA address, and the upper bit time accumulated read data 602A for the video data R of the odd-numbered input pixel. , And upper bit time cumulative read data 602B for R of video data of even-numbered input pixels are a first display area upper bit holding register 404A and a second display area upper bit holding register. Held in 404C.

  Subsequently, the lower bit time accumulated data for the odd-numbered pixels and the even-numbered pixels of the predetermined color (R in the present embodiment) of the pre-correction VD1 are stored in the first display area volatile storage unit and In order to read from the volatile storage unit for the second display area, OVDA_OEB and EVDA_OEB are set to Low again. In synchronization with this, the lower bit time cumulative read address 603A and the lower bit time cumulative read address 603B are designated by the OVDA address and EVDA address, and the lower bit time cumulative read data 604A for R of the video data of the odd-numbered input pixels. , And lower bit time cumulative read data 604B for video data R of even-numbered input pixels are a first display area lower bit holding register 404B and a second display area lower bit holding register. Held in 404D.

  Next, in the third period and the fourth period of the reception clock, the predetermined VD1 before correction held in the first display area upper bit holding register 404A and the second display area upper bit holding register 404C is determined. The upper bit time cumulative read data 602A and 602B for the odd-numbered and even-numbered pixels of the color (R in this embodiment) are output to the adder, and Vb1 is output by a latch or the like (not shown). The upper bit time accumulated data for R input to the adder is added in synchronization with the upper bit time accumulated data for R. Further, the upper bit time cumulative write data 606A and 606B for the added odd-numbered and even-numbered pixels of R are temporarily held in the register 414, respectively, and the first display area volatile storage unit 403A and the second In order to write to the display area volatile storage unit 403B, the upper bit time cumulative read address 605A and the upper bit time cumulative read address 605B are designated by the OVDA address and the EVDA address, and OVDA_WEB and EVDA_WEB are set to Low in synchronization therewith.

  Subsequently, a predetermined color (R in the present embodiment) of VD1 before correction held in the first display area lower bit holding register 404B and the second display area lower bit holding register 404D. The lower bit time accumulated read data 604A and 604B for the odd-numbered pixels and the even-numbered pixels are output to the adder 402 and synchronized with the lower bit time accumulated data for R of Vb1 by a latch or the like (not shown). The lower bit time accumulated data for R input to the adder is added. Further, the upper bit time cumulative write data 608A and 608B for the odd-numbered and even-numbered pixels of R that have been added are temporarily held in the register 414, and the first display area volatile storage unit 403A and the second In order to write to the display area volatile storage unit 403B, the lower bit time cumulative write address 607A and the lower bit time cumulative write address 607B are designated by the OVDA address and EVDA address, and OVDA_WEB and EVDA_WEB are set to Low in synchronization therewith.

  In addition, in the present embodiment, the above read and write operations are performed in the order of the upper bit and the lower bit, but either operation may be performed.

  As described above, using the first to fourth periods of the reception clock, the accumulated emission time data for the R light emitting elements of the pixels displayed by the odd-numbered input video data and the pixels displayed by the even-numbered input video data. Are accumulated in parallel in the volatile storage unit. When sampling the light emitting elements B and G of the pixels displayed by the odd-numbered input video data and the pixels displayed by the even-numbered input video data, the same operation as when R is sampled is performed. Can be done.

  In order to obtain the video data input to the display unit by sampling the pre-correction video data for all the colors of all the pixels and multiplying the sampled time accumulated data by the deterioration correction coefficient, From the volatile storage unit 403A and the second display area volatile storage unit 403B, the time-bit accumulated data of the upper bits for each pixel is received via the node 416 and the node 417 for each frame of the received clock. Output to the non-volatile storage section address generation circuit.

  Here, in the node 416, when the upper bit time accumulated data and the lower bit time accumulated data for R are written into the first display area volatile storage unit, the upper bit time accumulated data and the lower bit time accumulated for R. The writing of data into the first display area volatile storage unit and the output of the upper bit time accumulated data from the first display area volatile storage unit to the multiplication unit will be described. At the node 417, when the upper bit time accumulated data and the lower bit time accumulated data for R are written into the volatile storage unit for the second display area, the upper bit time accumulated data for R for the second display area The writing to the volatile storage unit and the output of the higher bit time accumulated data from the second display area volatile storage unit to the multiplication unit will be described.

  By providing the first display area volatile storage section and the second display area volatile storage section separately, the first display area volatile storage section is provided with a higher rank for R of the first display area. The bit emission time accumulated data and the upper bit time accumulated data for R in the second display area from the second display area volatile storage unit can be simultaneously output to the video data correction unit. Further, as shown in FIG. 6, the remaining G data may be output as appropriate after outputting the R emission time accumulated data, and compared with the conventional access timing, the blank time as shown in FIG. Can do.

  Further detailed description will be given with reference to FIG. 7, FIG. 8, and FIG. A11, B21, A31, B41, A51... A (m−3) n, B (m−2) n, A (m−1) n, and Bmn in order from the upper left to each pixel of the display unit shown in FIG. I will explain using the thing with the address.

  FIG. 8 shows an expanded period of the frame clock (hereinafter referred to as frame CK) and the reception clock (hereinafter referred to as reception CK). Here, as described above, the frame CK is performed 60 frames per second. In one cycle of this frame CK, that is, one frame period Tf, the number of times of reception of the received CK video signal is m × n.

  Here, one frame period means a period during which a video data signal is received from A11 to Dmn of the pixel shown in FIG. A reception clock (also referred to as reception CK) refers to a signal having a period Tf / (m × n) obtained by dividing Tf by the number of receptions of video data signals m × n. A frame clock (also referred to as a frame CK) refers to a signal having one frame period as one cycle.

  Here, FIG. 9 shows pixel data sampled in each frame of the frame CK, and will be seen together with FIGS. In the first frame of the frame CK, if sampling is first started from the pixels A11 and B21, a read operation from the first display area volatile storage unit and the second display area volatile storage unit (for example, A11) Read operation for the pixel at the address and the pixel at the address B21), and the write operation (for example, the pixel at the address A11 and the address B21 at the address volatile memory for the second display area) 1 to 4 cycles of the reception clock are required for the pixel writing operation), and pixel data to be sampled next are A51 and B61. Similarly, in the second frame of the frame clock, sampling is performed in order from the pixel at address A31 and the pixel at address B41. Note that sampling is performed separately because each color has a different element. Here, an example is shown in which an image is displayed with three primary colors of RGB, and each color of R, G, and B is sampled separately, and in the first to second frames, sampling is performed for all pixels for R. It is. Therefore, to perform sampling for RGB of all the pixels, six frames CK are consumed. In the first embodiment, sampling can be performed more efficiently as compared with the case where twelve frames CK are spent.

  As described above, the lighting time of the light emitting element is periodically sampled, the accumulated time data is stored, and the video data is corrected each time by referring to the data of the temporal change of the light emitting element stored in advance. Thus, it is possible to supply correction video data that can achieve the same luminance as that of the light-emitting element that has not deteriorated, and to maintain the uniformity of the screen without causing luminance unevenness in the display device.

  When gradation expression using EL elements is also performed by luminance control, the lighting intensity is detected together with the lighting time of the EL element, and the deterioration state of the EL element is determined from both the lighting time and the lighting intensity. It is desirable to do. In this case, correction data is also created accordingly, and the accumulated lighting time and lighting intensity data are stored in the first display area volatile storage unit 403A and the second display area volatile storage unit 403B. At the same time, a deterioration correction coefficient based on cumulative usage taking into account the cumulative lighting time and lighting intensity is stored in advance in the nonvolatile storage unit.

  In addition, the video data is not limited to RGB three-color data, and a configuration in which light emitting elements of other colors are added to the pixels of the display device is used, and sampling is appropriately performed even when an image is displayed with four or more colors. Should be done. For example, when displaying in 4 colors with RGB (W) plus W (white), an RG volatile storage unit or a BW volatile storage unit is provided, and sampling is performed in the order of R → G → B → W. The accumulated usage data for each color may be output from the first display area volatile storage unit and the second display area volatile storage unit to the multiplication unit.

  Further, as an element used for the storage means of the first display area volatile storage unit 403A and the second display area volatile storage unit 403B, a static memory (SRAM), a dynamic memory (DRAM), or the like is used. be able to. Further, examples of the element used for the storage unit of the nonvolatile storage unit 407 include a ferroelectric memory (FeRAM), an EEPROM, a flash memory, and the like. However, the memory element is not limited thereto, and a commonly used memory element can be used. However, when a DRAM is used for the volatile storage unit, it is necessary to add a periodic refresh function.

  As described above, the volatile storage means is provided by dividing the accumulated time data into portions such as upper bits and lower bits, and by providing storage means for storing the accumulated time data for each data portion to perform time accumulation. As a result, there is no need to increase the capacity of the memory used, and the number of connection pins is reduced, so that the area occupied by the circuit is reduced, and the advantages of lower manufacturing costs and downsizing can be obtained.

Note that this embodiment mode can be implemented freely combining with any description in the embodiments or embodiment modes in this specification.

  The video data correction circuit of the present invention is provided outside the display unit separately from the display unit, and can correct a video data signal input to the display unit. Alternatively, as shown in FIG. 10, the video data correction circuit of the present invention can be formed on the same substrate as the display portion.

  In the display device illustrated in FIG. 10, a format conversion unit 201, a source signal line driver circuit 202, a gate signal line driver circuit 203, a pixel unit 205, a video data correction circuit 206, and a connector 208 are formed on the same substrate 200. Video data is input via a flexible printed circuit (FPC) 207 connected to the connector 208. The flexible printed circuit board 207 described above may be an anisotropic conductive film (ACF: Anisotropic Conductive Film). As the video data correction circuit 206, the addition unit 209 including the adder 212, the storage unit 210 including the first volatile storage unit 213 and the second volatile storage unit 214, and the nonvolatile storage unit 215 and multiplication of the present invention. A video data correction circuit having a correction unit 211 including a device 216 can be used. A glass substrate can be preferably used as the substrate 200, but another substrate such as a heat-resistant plastic substrate can be used in addition to the glass substrate. Known source signal line driver circuits 202 and gate signal line driver circuits 203 can be used, and a plurality of gate signal line driver circuits may be provided depending on the circuit structure.

  In the present invention, when the light emission time of the light emitting element is counted and the light emission accumulated time data is stored in the volatile storage unit, the higher order bits of the light emission accumulated time data are read from the volatile storage unit for each frame of the reception clock. In the read operation, it is not necessary to increase the size and speed of the memory because the access timing margin can be secured by reducing the read access of the memory during one frame of the reception clock. Therefore, according to the present invention, the product can be reduced in size, power consumption, and cost. When the video data correction circuit is formed on the same substrate as the display unit, the area occupied by the video data correction circuit itself is reduced. Therefore, narrowing of the frame can be achieved.

  In the present invention, when counting the light emission time of the light emitting element and storing the light emission accumulated time in the volatile memory, in the operation of reading the upper few bits of the light emission accumulated time from the volatile memory for each frame of the reception clock. In this operation, since the cumulative time data of the pixels to which the odd-numbered video data is input and the cumulative time data of the pixels to which the even-numbered video data are input are simultaneously read from the two volatile memories, Since read access to the memory can be reduced between frames and a margin of access timing can be secured, there is no need to increase the size and speed of the memory. Furthermore, since the emission time of the pixels to which the odd-numbered video data is input during one frame of the frame clock and the emission time of the pixels to which the even-numbered video data are input can be counted in parallel, The number of accesses to the memory can also be greatly reduced. Therefore, according to the present invention, it is possible to contribute to downsizing, low power consumption, and low cost of products.

Note that this embodiment can be implemented freely combining with any description in the embodiments or embodiments in this specification.

  In this embodiment, an electronic apparatus including a display device to which the present invention described in Embodiment 1 is applied will be described. TV receiver, computer, mobile phone, digital still camera, desktop or floor-mounted or wall-mounted display, viewfinder type and / or monitor direct-view video recorder, navigation system, video phone, goggles type display, sound reproduction device ( Car audio, audio components, etc.), gaming machines equipped with display devices, portable information terminals (mobile computers, quick casts, portable game machines, electronic books, etc.), and image playback devices equipped with recording media (specifically Digital) For example, a device equipped with a display capable of reproducing and displaying video and still images recorded on a recording medium such as Versatile Disc (DVD). Specific examples of these electronic devices are shown in FIGS.

  A case will be described in which the display device to which the present invention is applied is applied to an information terminal such as a foldable portable phone or a PDA. A perspective view of the folding cellular phone is shown in FIG. A cellular phone shown in FIG. 11A includes a main body 1101, a first display portion 1102, a voice input portion 1103, a voice output portion 1104, a hinge portion 1105, operation keys 1106, and the like. The cellular phone shown in the figure can be folded in half using the hinge portion 1105, but FIG. 11A shows a state where the cellular phone is opened without being folded.

  The present invention can be used for a video data correction circuit which is a peripheral circuit of the first display portion 1102. As a result, even when the elements in the screen of the self-luminous device are deteriorated, it is possible to display a normal image without luminance unevenness, and to reduce the size of the display unit and the entire device or reduce the frame size. Manufacturing costs can be easily reduced.

  Further, the mobile phone shown in this embodiment may be a digital camera built-in type.

  In addition, the cellular phone illustrated in FIG. 11A can be folded using the hinge portion 1105. FIG. 11B illustrates a folded cellular phone. The folded cellular phone 1107 includes a second display portion 1108, a speaker portion 1109, operation keys 1110, and the like. In the case of this shape, the user can recognize information by visually recognizing the second display portion 1108.

  It is also very effective to apply the display device to which the present invention is applied to the second display portion. In the case where a plurality of display units are received, the effects of downsizing the display unit, downsizing the entire apparatus, reducing the frame size, and reducing the manufacturing cost according to the present invention are further increased.

  Further, the present invention is useful even when a display unit is provided at a place other than the above.

  FIG. 11C illustrates a digital still camera, which includes a main body 1121, a display portion 1122, an image receiving portion 1123, operation keys 1124, a shutter 1125, and the like. The digital still camera of this embodiment generates an imaging signal by photoelectrically converting a light image of a subject by an image sensor of a CCD (Charge Coupled Device). The display unit 1122 is configured to perform display based on an imaging signal from the CCD, and the display device functions as a finder for displaying a subject. Of course, the present invention is useful even with other imaging devices such as CMOS. The present invention can be used for a peripheral circuit (video data correction circuit or control circuit) of the display portion 1122. As a result, even when the elements in the screen of the self-luminous device are deteriorated, it is possible to display a normal image without luminance unevenness, and to reduce the size of the display unit or the frame size and the size and the size of the entire device. Manufacturing costs can be easily reduced.

  FIG. 12A illustrates a desktop, floor-standing, or wall-mounted display, which includes a housing 1201, a display portion 1202, a speaker portion 1203, and the like. The present invention can be applied to a video data correction circuit that is a peripheral circuit of the display unit 1202. By applying the present invention, luminance unevenness can be reduced even when an element in the screen of the self-luminous device is deteriorated. Normal display can be achieved, and the display unit can be downsized or framed, the entire apparatus can be downsized, and the manufacturing cost can be reduced.

  FIG. 12B illustrates a portable information terminal device, which includes a main body 1211, a display portion 1212, a switch 1213, operation keys 1214, an infrared port 1215, and the like. Although the display portion 1212 mainly displays image information and character information, the present invention can be used for a peripheral circuit (video data correction circuit or control circuit) of the display portion 1212. As a result, even when the elements in the screen of the self-luminous device are deteriorated, it is possible to display a normal image without unevenness of brightness, and to reduce the size of the display unit, the size of the entire device, and the lower manufacturing cost. It becomes easy.

  FIG. 12C illustrates a goggle type display, which includes a main body 1221, a display portion 1222, earphones 1223, a support 1224, and the like. The present invention can be used for a peripheral circuit (video data correction circuit or control circuit) of the display portion 1222. As a result, even when the elements in the screen of the self-luminous device are deteriorated, it is possible to display a normal image without unevenness of brightness, and to reduce the size of the display unit, the size of the entire device, and the lower manufacturing cost. It becomes easy.

  FIG. 12D illustrates a computer, which includes a main body 1231, a housing 1232, a display portion 1233, a keyboard 1234, an external connection port 1235, a pointing mouse 1236, and the like. The present invention can be applied to a peripheral circuit (video data correction circuit or control circuit) of the display unit 1233, and as a result, even when deterioration occurs in elements in the screen of the self-light-emitting device, normality without luminance unevenness is obtained. As a result, it is possible to easily display an image, and to easily reduce the size of the display unit, the entire device, and the manufacturing cost. Note that the computer includes a so-called notebook computer in which a central processing unit (CPU), a recording medium, and the like are incorporated in a main body and a housing, and a so-called desktop computer in which the computer is separated.

  Note that examples of electronic devices to which the display device including the video data correction circuit of the present invention is applied include the mobile phone shown in FIGS. 11A and 11B, the digital still camera shown in FIG. In addition to the display of A), the portable information terminal device of FIG. 12B, the goggle type display of FIG. 12C, and the computer of FIG. 12D, a viewfinder type and monitor direct view type video recorder , Navigation systems, quick casts, electronic notebooks, calculators, videophones, POS terminals, devices with touch panels, electronic books, and the like. Needless to say, a display device including the video data correction circuit described above can be applied as a display unit of these various electronic devices.

  Note that a display device used in these electronic devices can use not only a glass substrate but also a heat-resistant plastic substrate. Thereby, further weight reduction can be achieved.

  These examples to which the present invention can be applied are for illustrative purposes, and the present invention is not limited thereto. It goes without saying that those skilled in the art can make various modifications or changes without departing from the technical idea of the present invention defined by the claims. For example, the above embodiments can be implemented by freely combining the embodiments and the examples.

  That is, in this embodiment, when the light emission time of the light emitting element is counted and the accumulated light emission time is stored in the volatile memory, the upper few bits of the accumulated light emission time are read from the volatile memory for each frame of the reception clock. In the operation, the cumulative time data of the pixels to which the odd-numbered video data is input and the cumulative time data of the pixels to which the even-numbered video data are input are simultaneously read out from the two volatile memories. Since it is possible to reduce the read access of the memory during one frame and to obtain a margin of access timing, it is not necessary to increase the size and speed of the memory. Furthermore, since the emission time of the pixels to which the odd-numbered video data is input during one frame of the frame clock and the emission time of the pixels to which the even-numbered video data are input can be counted in parallel, The number of accesses to the memory can also be greatly reduced. Therefore, according to the present invention, it is possible to contribute to downsizing, low power consumption, and low cost of products.

FIG. 3 is a block diagram illustrating a configuration example of a light emission time accumulation unit according to the first embodiment. FIG. 3 is a block diagram illustrating a configuration example of a video data correction unit according to the first embodiment. FIG. 3 is a timing chart of the first embodiment. FIG. 6 is a block diagram illustrating a configuration example of a light emission time accumulation unit according to the second embodiment. FIG. 6 is a block diagram illustrating a configuration example of a video data correction unit according to a second embodiment. FIG. 6 is a timing chart of the second embodiment. FIG. 6 is a schematic diagram illustrating a pixel address of a display unit according to a second embodiment. FIG. 6 is a timing chart of the second embodiment. FIG. 10 is a diagram illustrating sampling in each frame clock according to the second embodiment. 1 is a schematic diagram showing a display device incorporating a video data correction circuit of the present invention in Embodiment 1. FIG. 7 is an electronic apparatus including the video data correction circuit according to the second embodiment of the present invention. 7 is an electronic apparatus including the video data correction circuit according to the second embodiment of the present invention. The block diagram which shows the structural example of the video data correction circuit of a prior art example. FIG. 3 is a schematic diagram illustrating a pixel address of a display unit according to the first embodiment. Timing chart of Embodiment 1 FIG. 3 is a diagram illustrating sampling in each frame clock according to the first embodiment.

Explanation of symbols

Reference Signs List 101 latch circuit 102 adder 103A RG volatile storage unit 103B B volatile storage unit 104A upper bit holding register 104B lower bit holding register 105 volatile storage unit address generation circuit 106 volatile storage unit control circuit 107 non-volatile Storage unit 108 Non-volatile storage unit address generation circuit 109 Non-volatile storage unit control circuit 110 Multiplier 111 Delay circuit 112 Node 200 Substrate 201 Format conversion unit 202 Source signal line drive circuit 203 Gate signal line drive circuit 205 Pixel unit 206 Video data correction Circuit 207 Flexible printed circuit board 208 Connector 209 Adder 210 Storage unit 211 Correction unit 212 Adder 213 Volatile storage unit 214 Volatile storage unit 215 Nonvolatile storage unit 216 Multiplier 301 Upper bit time cumulative read address 302 Upper bit time accumulated read data 303 Lower bit time accumulated read address 304 Lower bit time accumulated read data 305 Upper bit time accumulated write address 306 Upper bit time accumulated write data 307 Lower bit time accumulated write address 308 Lower bit time accumulated write data 308 401 Latch circuit 402 Adder 403A Display area volatile storage section 403B Display area volatile storage section 404A Display area upper bit holding register 404B Display area lower bit holding register 404C Display area upper bit holding register 404D Display area lower bit holding register 405 Volatile storage unit address generation circuit 406 Volatile storage unit control circuit 407 Nonvolatile storage unit 408 Nonvolatile storage unit address generation circuit 409 Volatile memory unit control circuit 410 Multiplier 411 Delay circuit 413 Selector 414 Register 415 Tristate buffer 416 Node 417 Node 601A Upper bit time accumulated read address 601B Upper bit time accumulated read address 602A Upper bit time accumulated read data 602B Upper bit time accumulated Read data 603A Lower bit time accumulated read address 603B Lower bit time accumulated read address 604A Lower bit time accumulated read data 604B Lower bit time accumulated read data 605A Upper bit time accumulated read address 605B Upper bit time accumulated read address 606A Upper bit time accumulated write Data 606B Upper bit time accumulated write data 607A Lower bit time accumulated write Address 607B Lower bit time accumulated write address 608A Upper bit time accumulated write data 608B Upper bit time accumulated write data 1101 Main body 1102 Display unit 1103 Audio input unit 1104 Audio output unit 1104 Hinge unit 1106 Operation key 1107 Mobile phone 1108 Display unit 1109 Speaker unit 1110 Operation key 1121 Main body 1122 Display unit 1123 Image receiving unit 1124 Operation key 1125 Shutter 1201 Case 1202 Display unit 1203 Speaker unit 1211 Main unit 1212 Display unit 1213 Switch 1214 Operation key 1215 Infrared port 1221 Main unit 1222 Display unit 1223 Earphone 1224 Support body 1231 Main unit 1232 Case 1233 Display 1234 Keyboard 1235 External connection port 1236 Pointy Gumausu 1301A first video signal 1301B second video signal 1302 counter 1303 volatile memory 1304 nonvolatile memory 1305 the correction circuit 1306 corrects the data storage unit 1307 display

Claims (40)

A detection unit that samples video data supplied to a display device having a plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in a plurality of storage means;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display device;
The cumulative usage data is divided into a plurality of data,
The video data correction circuit, wherein the plurality of data is stored for each color of the pixel in any of the plurality of storage means. A detection unit that samples video data supplied to a display device having a plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first storage means and the second storage means;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display device;
The cumulative usage data is divided into first cumulative usage data and second cumulative usage data,
The first cumulative usage data and the second cumulative usage data are stored for each color of the pixel in either the first storage unit or the second storage unit. Video data correction circuit. A detection unit that samples video data supplied to a display device having a plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first volatile storage unit and the second volatile storage unit;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display device;
The cumulative usage data is divided into first cumulative usage data and second cumulative usage data,
The first cumulative usage data and the second cumulative usage data are stored for each color of the pixel in either the first volatile storage means or the second volatile storage means. A video data correction circuit. A detection unit that samples video data supplied to a display device having a plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first volatile storage unit and the second volatile storage unit;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display device;
The cumulative usage data is divided into upper and lower bits of the cumulative usage data,
The video data correction circuit according to claim 1, wherein the upper bit and the lower bit are stored for each color of the pixel in either the first volatile storage unit or the second volatile storage unit. In any one of Claims 1 thru | or 4,
The video data correction circuit according to claim 1, wherein the cumulative usage data of each pixel is cumulative usage data based on a lighting time of each pixel or a lighting time and a lighting intensity of each pixel.   6. The video data correction circuit according to claim 1, wherein the pixel is provided with a light emitting element of any one color of red, blue, and green.   7. The accumulated usage data of two colors among the light emitting elements of three colors of red, blue, and green are stored in the first volatile storage means, and the accumulated usage data of one color is the first. A video data correction circuit stored in two volatile storage means. A detection unit that samples video data supplied to a display device that includes a plurality of pixels and has a plurality of display areas, and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in a plurality of storage means;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display device;
The cumulative usage data is divided into a plurality of data,
The video data correction circuit according to claim 1, wherein the plurality of data are stored for each pixel of the display area in any of the plurality of storage units. A detector that includes a plurality of pixels, samples video data supplied to a display device having a first display area and a second display area, and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first storage means and the second storage means;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display device;
The cumulative usage data is divided into first cumulative usage data and second cumulative usage data,
The first cumulative usage data and the second cumulative usage data are stored in one of the first storage unit and the second storage unit in the pixels of the first display area and the second storage unit. A video data correction circuit stored for each pixel in the display area. A detector that includes a plurality of pixels, samples video data supplied to a display device having a first display area and a second display area, and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first volatile storage unit and the second volatile storage unit;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display device;
The cumulative usage data is divided into first cumulative usage data and second cumulative usage data,
The first cumulative usage data and the second cumulative usage data are stored in one of the first volatile storage means and the second volatile storage means in the pixels of the first display area, and A video data correction circuit which is stored for each pixel of the second display area. A detector that includes a plurality of pixels, samples video data supplied to a display device having a first display area and a second display area, and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first volatile storage unit and the second volatile storage unit;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display device;
The cumulative usage data is divided into upper and lower bits of the cumulative usage data,
The upper bit and the lower bit are stored for each pixel in the first display area and each pixel in the second display area in either the first volatile storage means or the second volatile storage means. And a video data correction circuit.   The cumulative usage data of each pixel according to any one of claims 8 to 11 is cumulative usage data based on a lighting time of each pixel or a lighting time and a lighting intensity of each pixel. A video data correction circuit characterized by the above.   13. The display device according to claim 8, wherein the first display area is an area where odd-numbered input video data is displayed on the display device, and the second display area is The video data correction circuit according to claim 1, wherein the video data correction circuit is an area where even-numbered input video data is displayed on the display device. A gate signal line driving circuit;
A source signal line driving circuit;
A pixel portion connected to the gate signal line driver circuit and the source signal line driver circuit and having a plurality of pixels for display;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples the video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in a plurality of storage means;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correcting unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs corrected video data to the pixel unit;
Including
Dividing the cumulative usage data into a plurality of data;
A display device, wherein video data is corrected by storing the plurality of data in any of the plurality of storage means for each color of the pixel. A gate signal line driving circuit;
A source signal line driving circuit;
A pixel portion connected to the gate signal line driver circuit and the source signal line driver circuit and having a plurality of pixels for display;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples the video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first storage means and the second storage means;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correcting unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs corrected video data to the pixel unit;
Including
Dividing the cumulative usage data into first cumulative usage data and second cumulative usage data;
Video data is corrected by storing the first cumulative usage data and the second cumulative usage data for each color of the pixel in either the first storage means or the second storage means A display device characterized by: A gate signal line driving circuit;
A source signal line driving circuit;
A pixel portion connected to the gate signal line driver circuit and the source signal line driver circuit and having a plurality of pixels for display;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first volatile storage unit and the second volatile storage unit;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correcting unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs corrected video data to the pixel unit;
Including
Dividing the cumulative usage data into first cumulative usage data and second cumulative usage data;
The first cumulative usage data and the second cumulative usage data are stored in one of the first volatile storage means and the second volatile storage means for each color of the pixel, thereby producing a video. A display device that corrects data. A gate signal line driving circuit;
A source signal line driving circuit;
A pixel portion connected to the gate signal line driver circuit and the source signal line driver circuit and having a plurality of pixels for display;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first volatile storage unit and the second volatile storage unit;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correcting unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs corrected video data to the pixel unit;
Including
Dividing the cumulative usage data into upper and lower bits of the cumulative usage data;
The display is characterized in that video data is corrected by storing the upper bit and the lower bit in each of the colors of the pixel in either the first volatile storage unit or the second volatile storage unit. apparatus. In any one of Claims 14 thru / or Claim 17,
The display device according to claim 1, wherein the cumulative usage data of each pixel is cumulative usage data based on a lighting time of each pixel or a lighting time and lighting intensity of each pixel.   The display device according to claim 14, wherein the pixel is provided with a light emitting element of any one color of red, blue, and green.   20. The accumulated usage data of two colors among the light emitting elements of three colors of red, blue, and green are stored in the first volatile storage means, and the accumulated usage data of one color is the first. A display device characterized in that it is stored in two volatile storage means. A gate signal line driving circuit;
A source signal line driving circuit;
A pixel portion including a plurality of display regions connected to the gate signal line driver circuit and the source signal line driver circuit and having a plurality of pixels for display;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
In a plurality of storage means, a cumulative data holding unit that holds cumulative usage data of each pixel;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs corrected video data to the pixel unit;
Including
Dividing the cumulative usage data into a plurality of data;
A display device, wherein video data is corrected by storing the plurality of data in any of the plurality of storage means for each pixel of the display area. A gate signal line driving circuit;
A source signal line driving circuit;
A pixel portion including a first display region and a second display region, each of which is connected to the gate signal line driver circuit and the source signal line driver circuit and includes a plurality of pixels for display;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
A first data storage unit, a second data storage unit, a cumulative data holding unit for holding cumulative usage data of each pixel;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correcting unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs corrected video data to the pixel unit;
Including
Dividing the cumulative usage data into first cumulative usage data and second cumulative usage data;
The first cumulative usage data and the second cumulative usage data are stored in one of the first storage means and the second storage means in the pixels of the first display area, and the second storage data. A display device that corrects video data by storing each pixel in a display area. A gate signal line driving circuit;
A source signal line driving circuit;
A pixel portion including a first display region and a second display region, each of which is connected to the gate signal line driver circuit and the source signal line driver circuit and includes a plurality of pixels for display;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first volatile storage unit and the second volatile storage unit;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correcting unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs corrected video data to the pixel unit;
Including
Dividing the cumulative usage data into first cumulative usage data and second cumulative usage data;
The first cumulative usage data and the second cumulative usage data are stored in one of the first volatile storage means and the second volatile storage means in the pixels of the first display area, and A display device that corrects video data by storing each pixel in a second display area. A gate signal line driving circuit;
A source signal line driving circuit;
A first display region connected to the gate signal line driver circuit and the source signal line driver circuit and having a plurality of pixels for display, and a pixel portion including a second display region;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples video data supplied to a plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first volatile storage unit and the second volatile storage unit;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correcting unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs corrected video data to the pixel unit;
Including
Dividing the cumulative usage data into upper and lower bits of the cumulative usage data;
The upper bit and the lower bit are stored for each pixel in the first display area and each pixel in the second display area in either the first volatile storage means or the second volatile storage means. A display device characterized in that the video data is corrected.   25. The cumulative usage data of each pixel according to claim 21, wherein the cumulative usage data of each pixel is cumulative usage data based on a lighting time of each pixel or a lighting time and a lighting intensity of each pixel. Characteristic display device.   26. In any one of claims 21 to 25, the first display area is an area where odd-numbered input video data is displayed in the pixel portion, and the second display area is The display device is an area where even-numbered input video data is displayed in the pixel portion. A gate signal line driving circuit;
A source signal line driving circuit;
A display panel including a pixel portion having a plurality of pixels connected to a gate signal line driver circuit and a source signal line driver circuit;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples the video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
In a plurality of storage means, a cumulative data holding unit that holds cumulative usage data of each pixel;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display panel;
Including
Dividing the cumulative usage data into a plurality of data;
An electronic apparatus that corrects video data by storing the plurality of data in any of the plurality of storage units for each color of the pixels. A gate signal line driving circuit;
A source signal line driving circuit;
A display panel including a pixel portion having a plurality of pixels connected to a gate signal line driver circuit and a source signal line driver circuit;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples the video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
A first data storage unit, a second data storage unit, a cumulative data holding unit for holding cumulative usage data of each pixel;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display panel;
Including
Dividing the cumulative usage data into first cumulative usage data and second cumulative usage data;
Video data is stored by storing the first cumulative usage data and the second cumulative usage data for each color of the pixel in either the first storage means or the second storage means. An electronic device characterized by correction. A gate signal line driving circuit;
A source signal line driving circuit;
A display panel including a pixel portion having a plurality of pixels connected to a gate signal line driver circuit and a source signal line driver circuit;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first volatile storage unit and the second volatile storage unit;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display panel;
Including
Dividing the cumulative usage data into first cumulative usage data and second cumulative usage data;
The first cumulative usage data and the second cumulative usage data are stored in one of the first volatile storage means and the second volatile storage means for each color of the pixel, thereby producing a video. An electronic device characterized by correcting data. A gate signal line driving circuit;
A source signal line driving circuit;
A display panel including a pixel portion having a plurality of pixels connected to a gate signal line driver circuit and a source signal line driver circuit;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first volatile storage unit and the second volatile storage unit;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display panel;
Including
Dividing the cumulative usage data into upper and lower bits of the cumulative usage data;
An electronic apparatus comprising: correcting the video data by storing the upper bit and the lower bit in each of the colors of the pixel in either the first volatile storage unit or the second volatile storage unit. machine. In any one of claims 27 to 30,
The electronic device is characterized in that the cumulative usage data of each pixel is cumulative usage data based on a lighting time of each pixel or a lighting time and lighting intensity of each pixel.   32. The electronic device according to claim 27, wherein the pixel includes a light emitting element of any one color of red, blue, and green.   33. The cumulative usage data of two colors among the light emitting elements of the three colors red, blue, and green are stored in the first volatile storage means, and the cumulative usage data of one color is the first. An electronic device stored in two volatile storage means. A gate signal line driving circuit;
A source signal line driving circuit;
A display panel provided with a pixel portion including a plurality of display regions connected to a gate signal line driver circuit and a source signal line driver circuit and having a plurality of pixels for display;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A display panel including a detection unit that samples video data supplied to the plurality of pixels and detects accumulated usage data of each pixel;
In a plurality of storage means, a cumulative data holding unit that holds cumulative usage data of each pixel;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display panel;
Including
Dividing the cumulative usage data into a plurality of data;
An electronic apparatus comprising: correcting the video data by storing the plurality of data in any of the plurality of storage units for each pixel of the display area. A gate signal line driving circuit;
A source signal line driving circuit;
A display panel including a first display region having a plurality of pixels for display and a pixel portion including a second display region, connected to the gate signal line driver circuit and the source signal line driver circuit;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
A first data storage unit, a second data storage unit, a cumulative data holding unit for holding cumulative usage data of each pixel;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display panel;
Including
Dividing the cumulative usage data into first cumulative usage data and second cumulative usage data;
The first cumulative usage data and the second cumulative usage data are stored in one of the first storage means and the second storage means in the pixels of the first display area, and the second storage data. An electronic apparatus that corrects video data by storing each pixel in a display area of the display. A gate signal line driving circuit;
A source signal line driving circuit;
A display panel including a first display region having a plurality of pixels for display and a pixel portion including a second display region, connected to the gate signal line driver circuit and the source signal line driver circuit;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples video data supplied to the plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit that holds cumulative usage data of each pixel in the first volatile storage unit and the second volatile storage unit;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display panel;
Including
Dividing the cumulative usage data into first cumulative usage data and second cumulative usage data;
The first cumulative usage data and the second cumulative usage data are stored in one of the first volatile storage means and the second volatile storage means in the pixels of the first display area, and An electronic apparatus that corrects video data by storing each pixel in a second display area. A gate signal line driving circuit;
A source signal line driving circuit;
A display panel including a first display region having a plurality of pixels for display and a pixel portion including a second display region, connected to the gate signal line driver circuit and the source signal line driver circuit;
A video data correction circuit for correcting video data to be input to the gate signal line driving circuit and the source signal line driving circuit;
Have
The video data correction circuit includes:
A detection unit that samples video data supplied to a plurality of pixels and detects cumulative usage data of each pixel;
A cumulative data holding unit having a first volatile storage unit and a second volatile storage unit, and holding cumulative usage data of each pixel;
The cumulative usage data of each pixel detected by the detection unit and the cumulative usage data of each pixel held in the cumulative data holding unit are added, and the addition result is used as new cumulative usage data. An adder for writing to the data holding means;
A correction unit that corrects the video data based on the accumulated usage data stored in the accumulated data holding unit and outputs the corrected video data to the display panel;
Including
Dividing the cumulative usage data into upper and lower bits of the cumulative usage data;
The upper bit and the lower bit are stored for each pixel in the first display area and each pixel in the second display area in either the first volatile storage means or the second volatile storage means. An electronic device characterized by correcting video data by   38. The cumulative usage data of each pixel according to claim 34, wherein the cumulative usage data of each pixel is cumulative usage data based on a lighting time of each pixel or a cumulative lighting time and lighting intensity of each pixel. Features electronic equipment.   39.In any one of claims 34 to 38, the first display area is an area for displaying odd-numbered input video data on the display panel, and the second display area is An electronic apparatus, wherein the display panel is an area where even-numbered input video data is displayed.   The electronic device according to any one of claims 27 to 39 is a television receiver, a computer, a mobile phone, a digital still camera, a desktop or floor-mounted or wall-mounted display, a viewfinder type and / or a monitor direct view Type video recorder, navigation system, video phone, goggle type display, sound playback device, game machine, portable information terminal, or image playback device comprising a recording medium

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