JP2006154665A - Flat display device, driving circuit for display and driving method for display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a luminance gradient due to wiring resistance by amplifying the voltage of a drive signal with an amplification factor made different to cancel a voltage drop due to wiring resistance of each scanning line. <P>SOLUTION: The flat display device has a plurality of scanning lines Y, a plurality of signal lines X crossing the plurality of scanning lines Y, a plurality of display pixels PX which are arranged at intersections of the plurality of scanning lines Y and the plurality of signal lines X and each driven corresponding to the pixel voltage between a pair of a scanning line Y and a signal line Y, a scanning line driver 3 which drives the plurality of scanning lines Y one after another, and a signal line driver 2 which drives a plurality of signal lines X with a drive signal having a pulse width corresponding to the gradation level of a video signal while the plurality of signal lines Y are driven by the scanning line driver 3. Specially, the flat display device includes a signal output portion 23 which amplifies the voltage of the drive signal with an amplification factor made different to cancel a voltage drop due to wiring resistance of each scanning line Y. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a flat display device such as a field emission display (FED) in which a plurality of display pixels are configured by using, for example, surface conduction electron-emitting devices, a display driving circuit applied to the flat display device, and The present invention relates to a display driving method.

  The FED generally includes a display panel and a drive circuit that drives the display panel. The display panel includes a plurality of scanning lines extending in the horizontal (horizontal) direction, a plurality of signal lines extending in the vertical (vertical) direction intersecting with the scanning lines, and a plurality of positions arranged at intersections of the scanning lines and the signal lines. Display pixels (see, for example, Patent Document 1). In a display panel for color display, for example, three display pixels adjacent in the horizontal direction are used as color display pixels. Each display pixel includes a surface conduction electron-emitting device and a red (R), green (G), or blue (B) phosphor that emits light by an electron beam emitted from the electron-emitting device.

  The drive circuit includes a Y driver connected to one end of the plurality of scanning lines and an X driver connected to one end of the plurality of signal lines. The Y driver sequentially drives a plurality of scanning lines using the scanning signal, and the X driver drives the plurality of signal lines by a driving signal having a pulse width corresponding to the gradation level of the video signal while each scanning line is driven. To do. Each display pixel emits light with a luminance corresponding to the pixel voltage between the corresponding signal line and the corresponding scanning line.

By the way, each scanning line has a wiring resistance (that is, a distribution constant z), and generates a voltage drop that varies depending on the distance from the Y driver. For this reason, for example, even if the display pixels of one horizontal line are driven corresponding to video signals of the same gradation level, these display pixels cannot emit light with a uniform luminance distribution. The effective value of the pixel voltage is higher as the display pixel is closer to the Y driver and lower as the display pixel is farther from the Y driver. For this reason, luminance variations as shown in FIG. 9 occur.
JP 2002-221933 A

  In recent years, the wiring resistance of the scanning line tends to increase with the increase in the size of the display panel, and the influence of the voltage drop due to this wiring resistance cannot be ignored. In particular, when a white image is displayed on the entire screen, a luminance difference between pixels generated along the scanning line, that is, a luminance gradient becomes conspicuous. Since this luminance gradient significantly reduces the display quality, conventionally, the video signal for other pixels is corrected so as not to exceed the maximum luminance of the darkest pixel, and the luminance is made uniform. As a result, the overall luminance has decreased.

  An object of the present invention is to provide a flat display device, a display drive circuit, and a display drive method that can reduce a luminance gradient caused by wiring resistance.

  According to the present invention, a plurality of scanning lines, a plurality of signal lines intersecting with the plurality of scanning lines, a plurality of scanning lines and a plurality of signal lines are arranged at the intersecting positions, and between each pair of scanning lines and signal lines. A plurality of display pixels driven corresponding to the pixel voltage, a scanning line driver that sequentially drives the plurality of scanning lines, and a gradation of the video signal while each of the plurality of scanning lines is driven by the scanning line driver. A signal line driver that drives a plurality of signal lines with a drive signal having a pulse width corresponding to the level, and the signal line driver drives the drive signal with a different amplification factor so as to cancel the voltage drop due to the wiring resistance of each scanning line. A flat panel display device including a signal output unit that amplifies the voltage of the display is provided.

Furthermore, according to the present invention, a plurality of scanning lines, a plurality of signal lines intersecting with the plurality of scanning lines, a plurality of scanning lines and a plurality of signal lines are arranged at the intersection positions, and a pair of scanning lines and signal lines are respectively provided. A display driving circuit of a flat panel display device including a plurality of display pixels driven corresponding to a pixel voltage between the scanning line driver for sequentially driving a plurality of scanning lines, and a plurality of scans by the scanning line driver A signal line driver that drives a plurality of signal lines with a drive signal having a pulse width corresponding to the gradation level of the video signal while each line is driven, and the signal line driver is a voltage generated by a wiring resistance of each scanning line. A display drive circuit is provided that includes a signal output unit that amplifies the voltage of the drive signal with a different amplification factor so as to cancel the drop.

  Furthermore, according to the present invention, a plurality of scanning lines, a plurality of signal lines intersecting with the plurality of scanning lines, a plurality of scanning lines and a plurality of signal lines are arranged at the intersection positions, and a pair of scanning lines and signal lines are respectively provided. A display driving method for a flat panel display device including a plurality of display pixels driven according to a pixel voltage therebetween, wherein a plurality of scanning lines are sequentially driven and each of the plurality of scanning lines is driven. In addition, a plurality of signal lines are driven by a drive signal having a pulse width corresponding to the gradation level of the video signal, and the drive signal voltage is amplified at a different amplification factor so as to cancel the voltage drop due to the wiring resistance of each scanning line. A display driving method is provided.

  In these flat display devices, the display drive circuit, and the display drive method, the voltage of the drive signal is amplified with different amplification factors so as to cancel the voltage drop due to the wiring resistance of each scanning line. For this reason, even if there is a voltage drop due to the wiring resistance of each scanning line, the pixel voltage of the display pixels along this scanning line is maintained uniformly. Accordingly, it is possible to reduce the luminance gradient due to the wiring resistance. Furthermore, in this method, it is not necessary to correct the gradation level of the video signal for other display pixels so as to match the darkest display pixel due to the voltage drop, so that it is possible to prevent the overall luminance from being lowered.

  Hereinafter, a flat display device according to an embodiment of the present invention will be described with reference to the drawings. This flat display device is a field emission display (FED) device having a resolution of n × m dots.

  FIG. 1 schematically shows a circuit configuration of the flat display device. The flat display device includes a display panel 1, an X driver 2, a Y driver 3, and a video processing circuit 4. The display panel has m scanning lines Y (Y1 to Ym) extending in the horizontal (horizontal) direction, and n signal lines X (X1 to Xn) extending in the vertical (vertical) direction intersecting the scanning lines Y1 to Ym. , And m × n display pixels PX arranged at intersections of the scanning lines Y1 to Ym and the signal lines X1 to Xn. Each color display pixel is constituted by three display pixels PX adjacent in the horizontal direction. In this color display pixel, the three display pixels PX emit red light (R), green (G), and blue (B) emitted by the surface conduction electron-emitting devices 11 and the electron beams emitted from the electron-emitting devices 11, respectively. Of the phosphor 12. Each scanning line Y is used as a scanning electrode connected to the electron emitting element 11 of the display pixel PX on the corresponding horizontal line, and each signal line X is used as a signal electrode connected to the electron emitting element 11 of the display pixel PX on the corresponding column. Used.

  The X driver 2, the Y driver 3, and the video processing circuit are arranged around the display panel 1 as a display driving circuit. The X driver 2 is a signal line driver connected to one end of the signal lines X1 to Xn, and the Y driver 3 is a scanning line driver connected to one end of the scanning lines Y1 to Ym. The video processing circuit 4 processes an RGB video signal supplied from an external signal source in a digital format. The Y driver 3 sequentially drives the scanning lines Y1 to Ym using the scanning signal, and the X driver 2 drives the signal lines X1 to Xn while each of the scanning lines Y1 to Ym is driven by the Y driver 3.

  The video processing circuit 4 includes, for example, an APL detection circuit 40 that detects the average level by summing up the levels of RGB video signals for one frame, and APL detection to uniformly reduce the luminance of an image pattern having a large area of high luminance. An ABL circuit 41 that adjusts the RGB video signal based on the average level detected by the circuit 40 is included. The APL detection circuit 40 may be configured to detect at least one of the average gradation level of the RGB video signal for one or a plurality of frames and the average gradation level of the RGB video signal for one or a plurality of horizontal lines. . The APL detection circuit 40 detects the average gradation level of the video signal for one or a plurality of frames or the video signal for one or a plurality of horizontal lines from the light emission current or the discharge current that actually flows through the plurality of display pixels PX. It may be configured.

  The X driver 2 samples and holds a video signal for one horizontal line supplied from the video processing circuit 4 in synchronization with the horizontal synchronization signal HD, and one horizontal line output from the line memory 20 in parallel. A drive signal generation unit 21 that generates n PWM drive signals respectively corresponding to video signals for lines is included. The drive signal generator 21 generates n pulse width modulation circuits 22 that generate pulse signals having a pulse width proportional to the gradation level of the video signal of the corresponding pixel, and the pulse width of the pulse signal from the corresponding pulse width modulation circuit 22. 2 for outputting the reference voltage Vref from the drive reference voltage terminal to the signal lines X1 to Xn as PWM drive signals shown in FIG. 2 and the horizontal synchronization signal HD reset by the vertical synchronization signal VD. Is included. The output buffer 23 and the counter 24 constitute a signal output unit for each signal line X.

  In FIG. 1, z is a wiring resistance distributed in each of the scanning lines Y1 to Yn, i11 to imn are light-emitting currents that flow when mxn surface conduction electron-emitting devices 11 are discharged, and Vy is Y The output terminal voltages of the driver 3, ΔV 1 to ΔVm are total values of voltage drops caused by the emission current flowing through the wiring resistances of the scanning lines Y 1 to Yn when the n surface conduction electron-emitting devices 11 are discharged. It is.

These ΔV1, ΔV2, ΔV3,... ΔVm have the following values.

ΔV1 = z × i11 + 2 × z × i12 + − − − − + n × z × i1n
ΔV2 = z × i21 + 2 × z × i22 + − − − − + n × z × i2n
ΔV3 = z × i31 + 2 × z × i32 + − − − − + n × z × i3n
ΔVm = z × im1 + 2 × z × im2 ++ − − − − + n × z × imn
When the display pixels PX of each horizontal line are driven via the signal lines X1 to Xn, light emission currents flow through the electron-emitting devices 11 of the display pixels PX except for those that display black among the display pixels PX, Further, all of these light emission currents flow to the Y driver 3 through one scanning line Y.

  A display pixel PX farther from the Y driver 3 is affected by voltage drops ΔV1 to ΔVm depending on the wiring resistance and the light emission current. Actually, each display pixel PX is affected not only by the wiring resistance of the scanning line Y but also by the voltage drop due to the wiring resistance of the signal line X. If there is such a voltage drop, the pixel voltage applied to the surface conduction electron-emitting device 11 is lowered, and the original light emission ability cannot be exhibited. For this reason, the n output buffers 23 amplify the voltage Vref from the drive reference voltage terminal with different amplification factors so as to cancel the voltage drop due to the wiring resistance of each scanning line Y and each signal line X. (= Vref + ΔV) is generated, and this output voltage Vx is output as the PWM drive signal shown in FIG. 2 to the signal lines X1 to Xn only during a period equal to the pulse width of the pulse signal output from the corresponding pulse width modulation circuit 22. To do.

  When the pulse width modulation circuit 22 sets a pulse width for 1024 gradations from the 0th gradation corresponding to the minimum level of the video signal to the 1023rd gradation corresponding to the maximum level of the video signal, FIG. As shown, the pulse width of the drive signal is set to 0 at the 0th gradation, set to T at the 1st gradation, and set to j times T at the jth gradation. Here, T is, for example, an effective video period in one horizontal scanning period so that the pulse width of the PWM drive signal does not exceed one horizontal scanning period even at the 1023th gray level when the gray level of the video signal is maximum. Is set in advance to a period equal to 1/1023.

  The Y driver 3 shifts the vertical synchronizing signal VD every one horizontal scanning period and outputs it from one of the m output terminals, and a pulse output as a scanning signal from these m output terminals, respectively. In response, m output buffers 32 are provided for outputting scanning signals to the scanning lines Y1 to Ym for each horizontal scanning period. This scanning signal is the voltage Vyon supplied from the scanning voltage terminal, and is output only for one horizontal scanning period shown in FIG. In each electron-emitting device 11, discharge occurs when the sum of the voltage Vx (= Vref + ΔV) of the signal electrode and the voltage Vy of the scanning electrode exceeds the threshold, and the electron beam emitted thereby causes the phosphor 12 to be discharged. Excited.

  Next, the compensation operation for the luminance gradient of one horizontal line will be further described. Here, consider a case where the video signal has, for example, the maximum gradation level shown in FIG. 3 for all the display pixels PX on one horizontal line connected to the scanning line Y1, for example. If the amplification factors of the n output buffers 23 are all 1 as shown by broken lines in FIG. 4, the X driver output voltages, specifically, the output voltages Vx of these output buffers 23 are all shown in FIG. Is set equal to the voltage Vref indicated by a broken line and is output to the signal lines X1 to Xn as PWM drive signals. In this case, the luminance of the display pixel PX on one horizontal line is inclined as indicated by a broken line in FIG.

  In order to eliminate such a luminance gradient, the n output buffers 23 amplify the voltage Vref with an amplification factor as shown in FIG. 4 corresponding to at least the distance (scanning line length) from the Y driver 3 to these display pixels PX. In either case, the output voltage Vx indicated by the solid line in FIG. 5 is output to the signal lines X1 to Xn as a PWM drive signal. As indicated by a solid line in FIG. 4, the amplification factor of each output buffer 23 is set to be lower as the distance from the Y driver 3 to the corresponding display pixel PX is shorter, and is set to be larger as the distance is longer. As a result, the difference in pixel voltage caused by the wiring resistance z of the scanning line Y1 is eliminated in the display pixel PX of one horizontal line, and these display pixels PX are caused to emit light at a uniform maximum luminance level as shown in FIG.

  Incidentally, the amplification factors of the n output buffers 23 actually correspond to the distance (signal line length) between the display pixel PX of one horizontal line connected to the scanning line Y1 and the X driver 2, respectively. This distance increases at a constant rate when the scanning lines Y1, Y2, Y3,..., Ym are driven in sequence, so that the amplification factor of the n output buffers 23 changes every time the output value of the counter 24 changes. The amplification factor is adapted to the drive scanning line Y obtained by this output value. For example, the amplification factor of the output buffer 23 for the signal line X1 is changed as shown in FIG. 7 with respect to the drive scanning line Y which changes in order of the scanning lines Y1, Y2, Y3,. The amplification factor of the buffer 23 is changed as shown in FIG. 8 with respect to the drive scanning line Y that changes in the order of the scanning lines Y1, Y2, Y3,. The other output buffers 23 change in the same manner as these. The amplification factor of the output buffer 23 for the signal lines X1 to Xn is set to a constant inclination with respect to the distance from the X driver 2, and these initial values reflect the distance between the Y driver 3 and each display pixel PX. As you can see, they are different in certain increments. Thereby, both the luminance gradient in the direction along the scanning line Y and the luminance gradient in the direction along the signal line X can be reduced.

  In the flat display device of the above-described embodiment, the voltage of the drive signal is amplified with different amplification factors so as to cancel the voltage drop due to the wiring resistance of each scanning line Y and the wiring resistance of each signal line. For this reason, even if there is a voltage drop due to the wiring resistance of each scanning line Y and the wiring resistance of each signal line X, the pixel voltage of the display pixel PX along the scanning line Y and the pixel of the display pixel PX along the signal line X The voltage is kept uniform. Accordingly, it is possible to reduce the luminance gradient due to the wiring resistance. Further, in this method, since it is not necessary to correct the gradation level of the video signal for the other display pixels PX so as to match the display pixel PX that becomes the darkest due to the voltage drop, it is possible to prevent the overall luminance from being lowered. it can.

In addition, this invention is not limited to the above-mentioned embodiment, It can deform | transform variously in the range which does not deviate from the summary.

  The present invention can be applied not only to a method in which the Y driver 3 is disposed only on one side of the scanning lines Y1 to Ym, but also to a method in which two Y drivers are disposed on both sides of the scanning lines Y1 to Ym. In this case, the voltage drop is greatest at the center of the scanning lines Y1 to Ym. Accordingly, the amplification factor of the n output buffers 23 is also set to be the largest at the center.

  In the above-described embodiment, the drive scanning line Y is specified from the output value of the counter 24, and the signal line length is reflected in the amplification factors of the n output buffers 23 as shown in FIGS. However, for example, when the wiring resistance of the signal line X is smaller than the wiring resistance of the scanning line Y, reflecting the signal line length may be omitted.

It is a figure which shows roughly the circuit structure of the flat display apparatus which concerns on one Embodiment of this invention. 2 is a time chart for explaining a pulse width of a PWM drive signal generated in the flat display device shown in FIG. 1. 3 is a graph showing a state in which the video signal for one horizontal line shown in FIG. 1 is set to a maximum gradation level. It is a graph which shows the amplification factor set in n output buffers shown in FIG. 6 is a graph showing output voltages output from n output buffers according to the amplification factor shown in FIG. 4. 6 is a graph showing luminance obtained for display pixels on one horizontal line by the output voltage shown in FIG. 5. 3 is a graph showing that the amplification factor of a first signal line output buffer among n output buffers shown in FIG. 1 increases by changing a drive scanning line. 6 is a graph showing that the amplification factor of the second signal line output buffer among the n output buffers shown in FIG. 1 is increased by changing the drive scanning line. 2 is a graph showing that a variation in luminance of the surface conduction electron-emitting device shown in FIG. 1 is caused by a difference in pixel voltage.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Display panel, 2 ... X driver, 3 ... Y driver, 4 ... Image processing circuit, 11 ... Surface conduction type electron emission element, 12 ... Phosphor, 23 ... Output buffer, 24 ... Counter, 40 ... APL detection circuit, 41: ABL circuit, X: signal line, Y: scanning line, PX: display pixel.

Claims (9)

A plurality of scanning lines, a plurality of signal lines intersecting with the plurality of scanning lines, and pixel voltages between a pair of scanning lines and the signal lines respectively disposed at intersections of the plurality of scanning lines and the plurality of signal lines A plurality of display pixels driven in response to the scanning line, a scanning line driver that sequentially drives the plurality of scanning lines, and a gradation of the video signal while each of the plurality of scanning lines is driven by the scanning line driver. A signal line driver that drives the plurality of signal lines by a drive signal having a pulse width corresponding to the level, and the signal line driver has a different amplification factor so as to cancel a voltage drop due to a wiring resistance of each scanning line. A flat display device comprising a signal output unit for amplifying the voltage of the drive signal. 2. The plane according to claim 1, wherein the signal output unit is further configured to cancel the voltage drop due to the wiring resistance of each signal line by changing the amplification factor in accordance with the change of the drive scanning line. Display device. The flat display device according to claim 1, wherein the display pixel includes a surface conduction electron-emitting device that emits an electron beam. A plurality of scanning lines, a plurality of signal lines intersecting with the plurality of scanning lines, and pixel voltages between a pair of scanning lines and the signal lines respectively disposed at intersections of the plurality of scanning lines and the plurality of signal lines A display drive circuit for a flat panel display device, the display line driving circuit corresponding to the scanning line driver, the scanning line driver sequentially driving the plurality of scanning lines, and the plurality of scanning lines by the scanning line driver. A signal line driver that drives the plurality of signal lines with a drive signal having a pulse width corresponding to the gradation level of the video signal while each of the signal lines is driven, and the signal line driver depends on a wiring resistance of each scanning line. A display drive circuit, comprising: a signal output unit for amplifying the voltage of the drive signal at a different amplification factor so as to cancel a voltage drop. The display according to claim 4, wherein the signal output unit is further configured to cancel the voltage drop due to the wiring resistance of each signal line by changing the amplification factor in accordance with the change of the drive scanning line. Drive circuit. The display driving circuit according to claim 4, wherein the display pixel includes a surface conduction electron-emitting device that emits an electron beam. A plurality of scanning lines, a plurality of signal lines intersecting with the plurality of scanning lines, and pixel voltages between a pair of scanning lines and the signal lines respectively disposed at intersections of the plurality of scanning lines and the plurality of signal lines A display driving method for a flat panel display device including a plurality of display pixels driven corresponding to the display pixels, wherein the plurality of scanning lines are sequentially driven, and an image is displayed while each of the plurality of scanning lines is driven. The plurality of signal lines are driven by a drive signal having a pulse width corresponding to the gradation level of the signal, and the voltage of the drive signal is amplified at a different amplification factor so as to cancel the voltage drop due to the wiring resistance of each scanning line. A display driving method characterized by that. 8. The display driving method according to claim 7, wherein the amplification factor further changes with a change of the drive scanning line so as to cancel a voltage drop due to a wiring resistance of each signal line. The display driving method according to claim 7, wherein the display pixel includes a surface conduction electron-emitting device that emits an electron beam.

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