JP2006085137A - Electro-optical device and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To display a high quality image in an electro-optical device.
An image display area on an element substrate includes at least a part of a pixel electrode formed for each pixel and a driving element or wiring for driving the pixel, and at least a part of an opening area for each pixel. A first upper light-shielding film that is formed so as to be defined and separated from the opening region when viewed in plan on the element substrate, and the same layer as the first upper light-shielding film, A second upper side that is electrically separated from the first upper light-shielding film and is formed in an island shape in the opening as viewed in plan on the element substrate and relays the electrical connection between the pixel electrode and the driving element. The light shielding film and at least a part of the driving element or wiring are configured, and the first upper light shielding film is formed on the lower layer side of the first upper light shielding film so as to cover the opening when viewed in plan on the element substrate. And a lower light-shielding film formed to have a width smaller than the width.
[Selection] Figure 7

Description

  The present invention relates to a technical field of an electro-optical device such as a liquid crystal device and an electronic apparatus such as a liquid crystal projector including the electro-optical device.

  In this type of electro-optical device, for example, as disclosed in Patent Document 1 or 2, an electro-optical material such as liquid crystal is sandwiched between an element substrate and a counter substrate facing the element substrate. . On the element substrate, a pixel electrode is formed for each pixel, and a driving element for driving the pixel and a functional film constituting at least a part of the wiring define an opening region for each pixel, for example. The built-in light shielding film is formed in a lattice shape. A light shielding film that defines an opening region is also formed on the counter substrate side together with the built-in light shielding film on the element substrate.

  Here, in order to maintain a high aperture ratio when the electro-optical device has a high definition, the size of the built-in light shielding film on the element substrate side is reduced, and further, the size of the light shielding film on the counter substrate side is also reduced. There is a need. When aligning the built-in light-shielding film thus reduced in size and the light-shielding film on the counter substrate side, misalignment may occur and the aperture ratio may vary from pixel to pixel.

  Therefore, if the built-in light-shielding film is formed only on the element substrate side without providing the light-shielding film on the counter substrate side, the problem of misalignment as described above can be solved, the electro-optical device can be made high definition and a high aperture ratio. Can be maintained.

  Patent Document 1 or 2 discloses a configuration in which an island-shaped relay layer is provided which is disposed in the same layer as the above-described built-in light shielding film and is electrically separated from the built-in light shielding film. Yes. According to this configuration, the electrical connection between the pixel electrode and the drive element is relayed by the relay layer. For example, the relay layer is arranged in an island shape in the cutout portion provided in the built-in light shielding film by cutting out a part of the outline defining the opening region in the internal light shielding film.

  Further, in order to prevent light incident from the element substrate side from entering a pixel switching thin film transistor (hereinafter referred to as TFT) as a driving element, the built-in light shielding film is formed on the element substrate. A lower light-shielding film may be formed on the lower side.

JP 2001-249625 A JP 2004-170909 A

  As described above, when the light shielding film is not formed on the counter substrate side, the lower light shielding film is formed so as to overlap the built-in light shielding film and wider than the built-in light shielding film when viewed in plan on the substrate surface of the element substrate. Then, in the portion of the lower light shielding film that does not overlap with the built-in light shielding film, the light incident from the counter substrate side may be reflected and enter the pixel switching TFT. As a result, a light leakage current occurs in the TFT. In order to prevent such a situation, the lower light-shielding film is formed so as to overlap with the built-in light-shielding film and to be smaller in width than the built-in light-shielding film when viewed in plan on the substrate surface of the element substrate. That's fine.

  However, as described above, when the relay layer is arranged in an island shape in the cutout portion formed by cutting out a part of the outline portion of the built-in light shielding film, it is planar on the substrate surface of the element substrate. As seen, a gap is generated between the contour portion of the built-in light shielding film that does not overlap the lower light shielding film and the contour portion of the relay layer. Further, in addition to such a gap, an uneven portion based on the shape of the contour portion of the built-in light shielding film and the contour portion of the relay layer that does not overlap the lower light shielding film occurs in plan view on the substrate surface of the element substrate. . The gaps and irregularities generated in this way cause a problem that light leakage occurs or light is irregularly reflected when the electro-optical device is driven, so that the contrast is lowered and the quality of the display image is deteriorated.

  SUMMARY An advantage of some aspects of the invention is that it provides an electro-optical device capable of performing high-quality image display and various electronic apparatuses including the electro-optical device.

  In order to solve the above problems, an electro-optical device according to the present invention includes a pixel electrode formed for each pixel in an image display region on an element substrate, and at least a part of a driving element or wiring for driving the pixel. A first upper light-shielding film formed so as to at least partially define an opening region for each pixel and having an opening separated from the opening region when viewed in plan on the element substrate And electrically separated from the first upper light-shielding film in the same layer as the first upper light-shielding film, and formed in an island shape in the opening as viewed in plan on the element substrate, A second upper light-shielding film that relays electrical connection between the pixel electrode and the driving element; and at least a part of the driving element or the wiring; and the element on the lower layer side of the first upper light-shielding film So as to cover the opening when viewed in plan on the substrate and And a lower light shielding film formed so as to have a smaller width the width of one of the upper light-shielding film.

  The electro-optical device of the present invention is configured by sandwiching, for example, a liquid crystal as an electro-optical material between an element substrate and a counter substrate disposed to face the element substrate. Then, in the image display region on the element substrate, a laminated structure is formed in which a plurality of conductive films respectively constituting a pixel electrode, a wiring for driving the pixel, and a driving element are formed. In this stacked structure, conductive films formed in different layers among the plurality of conductive films are interlayer-insulated from each other by an interlayer insulating layer. Alternatively, in addition to the plurality of conductive films and interlayer insulating films, functional films such as a scattering film and a reflective film may be formed in the laminated structure.

  In such a stacked structure, the first upper light shielding film is formed so as to at least partially define the opening region for each pixel. The first upper light-shielding film is formed in a lattice shape or a stripe shape as, for example, a light-shielding conductive film that forms at least a part of the wiring or the electronic element. Such a first upper light shielding film may be formed so as to define an opening region together with another conductive film formed on the lower layer side and on the upper layer side of the lower light shielding film. .

  A second upper light shielding film is formed in the same layer as the first upper light shielding film. The second upper light shielding film is a light shielding relay layer that relays electrical connection between the pixel electrode and the driving element. Here, the first upper light-shielding film is provided with a window which is an opening separated from the opening region as viewed in plan on the element substrate. The window is disposed in the first upper light shielding film from the contour defining the opening region. In the window, the second upper light shielding film is electrically separated from the second upper light shielding film by forming the second upper light shielding film in an island shape when viewed in plan on the element substrate. Is done.

  In addition, a lower light-shielding film is formed on the lower layer side of the first upper light-shielding film so as to overlap with the first upper light-shielding film. The lower light-shielding film is, for example, a light-shielding conductive film that forms at least a part of the wiring or the electronic element. When viewed in plan on the substrate surface of the element substrate, the lower light-shielding film is formed so as to cover the window and has a width smaller than the width of the first upper light-shielding film. That is, the lower light-shielding film is formed so as not to protrude outside the contour portion that defines the opening region in the first upper light-shielding film when viewed in plan on the element substrate. Therefore, when the electro-optical device is driven, light incident from the upper side of the element substrate, that is, from the opposite substrate side (for example, normally strong light source light such as projection light) defines an opening region in the first upper light shielding film. It is possible to prevent the light from being reflected by a part of the lower light-shielding film that protrudes outside the contour portion. Therefore, after the incident light is reflected by a part protruding from the upper light shielding film, it becomes multiple reflected light, irregularly reflected light, or stray light between the first upper light shielding film and the lower light shielding film, and is a driving element. Reaching the pixel switching TFT or the like can be effectively prevented. Therefore, generation of light leakage current in this drive element can be prevented more reliably. Conversely, return light (for example, light reflected on the back surface of the element substrate) incident from the lower side of the element substrate may be reflected by a part of the first upper light shielding film that protrudes. The return light is much weaker light than the light source light such as the projection light due to the back surface reflection of the element substrate. Therefore, even if multiple reflected light or the like is generated based on the return light at the part of the first upper light shielding film that protrudes, the amount of the light is extremely small, and there is little or no practical influence.

  Further, when viewed in plan on the element substrate, a gap between the contour of the second upper light-shielding film and the contour of the window is covered with the lower light-shielding film in the window of the first upper light-shielding film. Is in a state. Therefore, it is possible to prevent the light incident from the counter substrate or element substrate side from leaking in such a gap.

  Furthermore, in the first upper light-shielding film, a window is formed inside the contour portion that defines the opening region, and therefore no concave and convex portions or gaps are formed in the contour portion. Therefore, it is possible to prevent light incident from the counter substrate side from leaking or irregularly reflected in the gap or the uneven portion.

  In addition, according to the electro-optical device of the present invention, the first upper light shielding film, the second upper light shielding film, and the lower light shielding film are opposed to each other without forming the light shielding film on the counter substrate side. It is possible to more reliably shield light incident from the substrate side and light incident from the element substrate side. Therefore, in the electro-optical device of the present invention as described above, the contrast can be improved and the definition can be increased.

  Here, in a liquid crystal device configured using liquid crystal as an electro-optical material, disclination occurs in the liquid crystal in a portion corresponding to the gap or uneven portion of the contour portion of the first upper light shielding film as described above. As a result, light leakage occurs. Therefore, in this case, in the first upper light-shielding film, light leakage occurs in the gap or uneven portion regardless of whether or not there is a gap or uneven portion in the contour defining the opening region. Become. Note that such light leakage covers the gap or uneven portion of the contour of the first upper light-shielding film formed as described above when the light-shielding film is seen on the counter substrate side in plan view from the counter substrate side. It can prevent by forming as such a pattern.

  However, in the liquid crystal device, when an image signal having a voltage having a different polarity with respect to the reference potential is supplied to each pixel electrode for each frame period, that is, when frame inversion driving is performed. In the liquid crystal, the above-described disclination does not occur. Therefore, according to the electro-optical device of the present invention, in this case, the contrast can be effectively improved without providing the light shielding film on the counter substrate side.

  As described above, according to the electro-optical device of the present invention, high-quality image display can be performed.

  In one aspect of the electro-optical device of the present invention, the driving element is formed in the non-opening region on the element substrate at a substantially central position between the openings adjacent to each other as viewed in plan on the element substrate. And a thin film transistor for controlling the switching of the pixel electrode.

  According to this aspect, in the window of the first upper light shielding film, a gap is generated between the contour portion of the second upper light shielding film and the contour portion of the window. In this aspect, it is possible to prevent light incident from the counter substrate side from being irradiated to the pixel switching TFT through this gap. For this reason, generation of light leakage current in the pixel switching TFT can be more reliably prevented.

  In another aspect of the electro-optical device of the present invention, the first upper light shielding film is formed as a capacitor electrode for adding a storage capacitor to the pixel electrode or a capacitor wiring connected to the capacitor electrode.

  According to this aspect, the first upper light shielding film is formed as a fixed potential side capacitor electrode of the storage capacitor or a capacitor wiring connected thereto. Since the first upper light-shielding film and the second upper light-shielding film are electrically separated, the first upper light-shielding film can be set to a fixed potential. At this time, the first upper light-shielding film is routed on the element substrate and formed as a common wiring for a plurality of pixel electrodes, for example, in a lattice shape or a stripe shape, so that light incident from the counter substrate side can be efficiently obtained. It is possible to shield the light.

  In another aspect of the electro-optical device of the present invention, the lower light-shielding film is formed as a scanning line to which a scanning signal is supplied.

  According to this aspect, each scanning line is wired in common to a plurality of pixel electrodes formed for each pixel. Therefore, by forming the lower light-shielding film as such a scanning line, it is possible to more efficiently shield light incident on the TFT from the element substrate side. For example, an image signal is supplied to each pixel electrode via a pixel switching TFT in accordance with a scanning signal supplied from a scanning line.

  In another aspect of the electro-optical device of the present invention, a counter substrate provided opposite to the element substrate and sandwiching an electro-optical material between the element substrate, and a side of the counter substrate facing the element substrate In addition, at least the gap between the opening of the first upper light-shielding film and the second upper light-shielding film is planarly covered, and the opening region is formed together with the first upper light-shielding film. And a counter substrate side light shielding film to be defined.

  According to this aspect, on the side of the counter substrate that faces the element substrate, the counter substrate-side light shielding film is formed in a lattice shape or a stripe shape so as to overlap the first upper light shielding film. . Therefore, according to this aspect, when viewed in plan from the counter substrate side, the window of the first upper light shielding film is provided between the contour portion of the second upper light shielding film and the contour portion of the window. The gap is covered with the counter substrate side light shielding film. Accordingly, light incident from the counter substrate side can be more reliably shielded by the counter substrate side light shielding film in addition to the first upper light shielding film and the second upper light shielding film formed on the element substrate side. Become.

  Note that the narrowing of the width of the counter-substrate-side light-shielding film to define the opening region leaves the counter-substrate-side light-shielding film to the non-opening region while leaving it to the light-shielding film on the element substrate. For example, it may be used exclusively for heat countermeasures, in which a considerable portion of powerful light source light such as projection light is shielded to suppress a temperature rise on the element substrate side.

  In another aspect of the electro-optical device according to the aspect of the invention, an image signal whose polarity is inverted with respect to a reference potential is supplied to the pixel electrode for each frame period via the wiring and the driving element. .

  According to this aspect, it is possible to effectively improve contrast even when frame inversion driving is performed.

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention (including various aspects thereof).

  Since the electronic apparatus of the present invention includes the above-described electro-optical device of the present invention, a projection display device, a television, a mobile phone, an electronic notebook, a word processor, a view capable of performing high-quality image display. Various electronic devices such as a finder type or a monitor direct-view type video tape recorder, a workstation, a videophone, a POS terminal, and a touch panel can be realized. Further, as an electronic apparatus of the present invention, for example, an electrophoretic device such as electronic paper, an electron emission device (Field Emission Display and a Conduction Electron-Emitter Display), an electrophoretic device, and an apparatus using the electron emission device, DLP (Digital Light Processing) and the like can also be realized.

  Such an operation and other advantages of the present invention will become apparent from the embodiments described below.

  Hereinafter, embodiments of the present invention will be described with reference to FIGS. In the following embodiments, the electro-optical device of the invention is applied to a liquid crystal device.

<1: Overall configuration of electro-optical device>
First, the overall configuration of the electro-optical device of the present invention will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view of the electro-optical device when the TFT array substrate is viewed from the side of the counter substrate together with the components formed thereon, and FIG. 2 is a cross-sectional view taken along the line HH ′ of FIG. It is. Here, a TFT active matrix driving type liquid crystal device with a built-in driving circuit, which is an example of an electro-optical device, is taken as an example.

  1 and 2, in the electro-optical device according to the present embodiment, a TFT array substrate 10 which is an example of an “element substrate” according to the present invention and a counter substrate 20 are disposed to face each other. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20, and the TFT array substrate 10 and the counter substrate 20 are provided with a sealing material 52 provided in a seal region positioned around the image display region 10a. Are bonded to each other.

  The sealing material 52 is made of, for example, an ultraviolet curable resin, a thermosetting resin, or the like for bonding the two substrates, and is applied on the TFT array substrate 10 in the manufacturing process and then cured by ultraviolet irradiation, heating, or the like. It is. Further, in the sealing material 52, a gap material such as glass fiber or glass beads for dispersing the distance (inter-substrate gap) between the TFT array substrate 10 and the counter substrate 20 to a predetermined value is dispersed. That is, the electro-optical device according to the present embodiment is suitable for a small and enlarged display for a projector light valve.

  A light-shielding frame light-shielding film 53 that defines the frame area of the image display area 10a is provided on the counter substrate 20 side in parallel with the inside of the seal area where the sealing material 52 is disposed. However, part or all of the frame light shielding film 53 may be provided as a built-in light shielding film on the TFT array substrate 10 side.

  In the peripheral region located around the image display region 10a, the data line driving circuit 101 and the external circuit connection terminal 102 are provided on the TFT array substrate 10 in the region located outside the seal region where the sealing material 52 is disposed. It is provided along one side. The scanning line driving circuit 104 is provided along two sides adjacent to the one side so as to be covered with the frame light shielding film 53. Further, in order to connect the two scanning line driving circuits 104 provided on both sides of the image display area 10a in this way, the TFT array substrate 10 is covered with the frame light shielding film 53 along the remaining side. A plurality of wirings 105 are provided.

  In addition, vertical conduction members 106 that function as vertical conduction terminals between the two substrates are disposed at the four corners of the counter substrate 20. On the other hand, the TFT array substrate 10 is provided with vertical conduction terminals in a region facing these corner portions. Thus, electrical conduction can be established between the TFT array substrate 10 and the counter substrate 20.

  In FIG. 2, on the TFT array substrate 10, an alignment film is formed on the pixel electrode 9a after the pixel switching TFT, the scanning line, the data line and the like are formed. On the other hand, on the counter substrate 20, in addition to the counter electrode 21, a lattice-shaped or striped light-shielding film 23 and an alignment film are formed on the uppermost layer portion. Further, the liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films.

  In addition to the data line driving circuit 101, the scanning line driving circuit 104, and the like, the image signal on the image signal line is sampled and supplied to the data line on the TFT array substrate 10 shown in FIGS. Sampling circuit, precharge circuit for supplying a precharge signal of a predetermined voltage level to a plurality of data lines in advance of an image signal, for inspecting the quality, defects, etc. of the electro-optical device during production or at the time of shipment An inspection circuit or the like may be formed.

<2: Configuration in the pixel portion>
Hereinafter, the configuration of the pixel portion of the electro-optical device according to this embodiment of the invention will be described with reference to FIGS. FIG. 3 is an equivalent circuit of various elements and wirings in a plurality of pixels formed in a matrix that forms an image display area of the electro-optical device. FIGS. 4 and 5 are data lines, scanning lines, FIG. 5 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which pixel electrodes and the like are formed. 4 and 5 respectively show the lower layer portion (FIG. 4) and the upper layer portion (FIG. 5) in the laminated structure described later. FIG. 6 is a cross-sectional view taken along line AA ′ when FIGS. 4 and 5 are overlapped. In FIG. 6, the scales of the respective layers and members are different in order to make each layer and each member recognizable on the drawing.

  In FIG. 3, a pixel electrode 9 a and a TFT 30 for controlling the switching of the pixel electrode 9 a are formed in a plurality of pixels formed in a matrix that constitutes the image display region of the electro-optical device according to the present embodiment. The data line 6 a to which the image signal is supplied is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6a. Good.

  Further, the gate electrode 3a is electrically connected to the gate of the TFT 30, and the scanning signals G1, G2,..., Gm are pulse-sequentially applied in this order to the scanning line 11a and the gate electrode 3a at a predetermined timing. It is comprised so that it may apply. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the image signal S1, S2,..., Sn supplied from the data line 6a is obtained by closing the switch of the TFT 30 as a switching element for a certain period. Write at a predetermined timing.

  Image signals S 1, S 2,..., Sn written in a liquid crystal as an example of an electro-optical material via the pixel electrode 9 a are held for a certain period with the counter electrode formed on the counter substrate. The liquid crystal modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The light transmittance is increased, and light having a contrast corresponding to the image signal is emitted from the electro-optical device as a whole.

  In order to prevent the image signal held here from leaking, a storage capacitor 70 is added in parallel with the liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode. The storage capacitor 70 is provided side by side along the scanning line 11a, and includes a capacitor electrode 300 including a fixed potential side capacitor electrode and fixed at a constant potential.

  Hereinafter, a specific configuration of the electro-optical device that realizes the above-described circuit operation by the data line 6a, the scanning line 11a, the gate electrode 3a, the TFT 30, and the like will be described with reference to FIGS. explain.

  First, in FIG. 5, a plurality of pixel electrodes 9 a are provided in a matrix on the TFT array substrate 10 (the outline is indicated by a dotted line portion), and as shown in FIGS. 4 and 5, Data lines 6a and scanning lines 11a are provided along the vertical and horizontal boundaries of the pixel electrode 9a. As will be described later, the data line 6a has a laminated structure including an aluminum film, and the scanning line 11a is made of, for example, a conductive polysilicon film. Further, the scanning line 11a is electrically connected to the gate electrode 3a facing the channel region 1a ′ shown by the hatched region rising to the right in FIG. 4 in the semiconductor layer 1a through the contact hole 12cv. The electrode 3a is included in the scanning line 11a. That is, each of the intersections between the gate electrode 3a and the data line 6a is provided with a pixel switching TFT 30 in which the gate electrode 3a included in the scanning line 11a is opposed to the channel region 1a ′. As a result, the TFT 30 (excluding the gate electrode) is configured to exist between the gate electrode 3a and the scanning line 11a.

  Next, the electro-optical device is opposed to the TFT array substrate 10 made of, for example, a quartz substrate, a glass substrate, or a silicon substrate, as shown in FIG. And a counter substrate 20 made of, for example, a glass substrate or a quartz substrate.

  As shown in FIG. 6, the pixel electrode 9a is provided on the TFT array substrate 10 side, and an alignment film 16 subjected to a predetermined alignment process such as a rubbing process is provided above the pixel electrode 9a. ing. The pixel electrode 9a is made of a transparent conductive film such as an ITO film. On the other hand, a counter electrode 21 is provided on the entire surface of the counter substrate 20, and an alignment film 22 subjected to a predetermined alignment process such as a rubbing process is provided below the counter electrode 21. . The counter electrode 21 is made of a transparent conductive film such as an ITO film, for example, like the pixel electrode 9a described above.

  Between the TFT array substrate 10 and the counter substrate 20 arranged so as to face each other, an electro-optical material such as liquid crystal is sealed in a space surrounded by the above-described sealing material 52 (see FIGS. 1 and 2). 50 is formed. The liquid crystal layer 50 takes a predetermined alignment state by the alignment films 16 and 22 in a state where an electric field from the pixel electrode 9a is not applied.

  On the other hand, on the TFT array substrate 10, in addition to the pixel electrode 9a and the alignment film 16, various configurations including these are provided in a laminated structure. As shown in FIG. 6, this stacked structure includes a first layer including a scanning line 11a, a second layer including a TFT 30 including a gate electrode 3a, a third layer including a storage capacitor 70, and a data line 6a in order from the bottom. And the like, a fifth layer including the capacitor wiring 400 and the like, and a sixth layer (uppermost layer) including the pixel electrode 9a and the alignment film 16 and the like. Further, the base insulating film 12 is provided between the first layer and the second layer, the first interlayer insulating film 41 is provided between the second layer and the third layer, and the second interlayer insulating film 42 is provided between the third layer and the fourth layer. A third interlayer insulating film 43 is provided between the fourth layer and the fifth layer, and a fourth interlayer insulating film 44 is provided between the fifth layer and the sixth layer, so that the above-described elements are short-circuited. Is preventing. Further, these various insulating films 12, 41, 42, 43 and 44 are also provided with, for example, a contact hole for electrically connecting the high concentration source region 1d in the semiconductor layer 1a of the TFT 30 and the data line 6a. It has been. Hereinafter, each of these elements will be described in order from the bottom. Of the foregoing, the first to third layers are shown in FIG. 4 as lower layer portions, and the fourth to sixth layers are shown in FIG. 5 as upper layer portions.

(Laminated structure / Structure of first layer-Scanning line, etc.)
First, for example, the first layer includes at least one of high melting point metals such as Ti, Cr, W, Ta, and Mo, a metal simple substance, an alloy, a metal silicide, a polysilicide, and a stack of these, Alternatively, a scanning line 11a made of conductive polysilicon or the like is provided. The scanning line 11a corresponds to an example of a “lower light-shielding film” according to the present invention, and is patterned in a stripe shape along the X direction in FIG. 4 in plan view. More specifically, the stripe-shaped scanning line 11a includes a main line portion extending along the X direction in FIG. 4 and a protruding portion extending in the Y direction in FIG. 4 from which the data line 6a or the capacitor wiring 400 extends. ing. Note that the protruding portions extending from the adjacent scanning lines 11a are not connected to each other, and therefore, the scanning lines 11a are divided one by one.

  Here, FIG. 5 also shows the configuration of the scanning line 11a shown in FIG. In the present embodiment, as shown in FIG. 5, the scanning line 11 a is formed so as to overlap with the capacitor wiring 400 when viewed in plan on the substrate surface of the TFT array substrate 10. The detailed configuration of the scanning line 11a will be described later.

(Laminated structure / Second layer structure-TFT, etc.)
Next, the TFT 30 including the gate electrode 3a is provided as the second layer. As shown in FIG. 6, the TFT 30 has an LDD (Lightly Doped Drain) structure, and includes the above-described gate electrode 3a, for example, a polysilicon film, and a channel formed by an electric field from the gate electrode 3a. The channel region 1a ′ of the semiconductor layer 1a to be formed, the insulating film 2 including a gate insulating film that insulates the gate electrode 3a from the semiconductor layer 1a, the low concentration source region 1b and the low concentration drain region 1c in the semiconductor layer 1a, and the high concentration A source region 1d and a high concentration drain region 1e are provided.

  In the present embodiment, a relay electrode 719 is formed on the second layer as the same film as the gate electrode 3a described above. As shown in FIG. 4, the relay electrode 719 is formed in an island shape so as to be positioned approximately at the center of one side extending in the X direction of each pixel electrode 9 a as viewed in a plan view. Since the relay electrode 719 and the gate electrode 3a are formed as the same film, when the latter is made of a conductive polysilicon film or the like, the former is also made of a conductive polysilicon film or the like.

  The above-described TFT 30 preferably has an LDD structure as shown in FIG. 6, but may have an offset structure in which impurities are not implanted into the low-concentration source region 1b and the low-concentration drain region 1c. A self-aligned TFT that implants impurities at a high concentration as a mask and forms a high concentration source region and a high concentration drain region in a self-aligning manner may be used.

(Laminated structure / Structure between first layer and second layer-Underlying insulating film-)
A base insulating film 12 made of, for example, a silicon oxide film is provided on the scanning line 11a described above and below the TFT 30. In addition to the function of interlayer insulating the TFT 30 from the scanning line 11a, the base insulating film 12 is formed on the entire surface of the TFT array substrate 10, thereby causing roughness during polishing of the surface of the TFT array substrate 10 and dirt remaining after cleaning. It has a function of preventing changes in the characteristics of the pixel switching TFT 30.

  Groove-shaped contact holes 12cv along the channel length direction of the semiconductor layer 1a extending along the data line 6a described later are dug in the base insulating film 12 on both sides of the semiconductor layer 1a in plan view. In correspondence with the contact hole 12cv, the gate electrode 3a stacked above the contact hole 12cv includes a concave portion formed on the lower side. Further, since the gate electrode 3a is formed so as to fill the entire contact hole 12cv, a side wall portion 3b formed integrally with the gate electrode 3a is extended. ing. As a result, the semiconductor layer 1a of the TFT 30 is covered from the side as seen in a plan view as shown in FIG. 4, so that at least the incidence of light from this portion is suppressed. It has become.

  The side wall 3b is formed so as to fill the contact hole 12cv, and its lower end is in contact with the scanning line 11a. Here, since the scanning line 11a is formed in a stripe shape as described above, the gate electrode 3a and the scanning line 11a existing in a certain row are always at the same potential as long as attention is paid to the row.

(Laminated structure / 3rd layer configuration-storage capacity, etc.)
Now, a storage capacitor 70 is provided in the third layer following the second layer. The storage capacitor 70 includes a lower electrode 71 as a pixel potential side capacitor electrode connected to the high concentration drain region 1e of the TFT 30 and the pixel electrode 9a, and a capacitor electrode 300 as a fixed potential side capacitor electrode. It is formed by arrange | positioning through. According to the storage capacitor 70, it is possible to remarkably improve the potential holding characteristic in the pixel electrode 9a. Further, as can be seen from the plan view of FIG. 4, the storage capacitor 70 according to the present embodiment is formed so as not to reach the light transmission region substantially corresponding to the formation region of the pixel electrode 9a (in other words, In this case, the pixel aperture ratio of the entire electro-optical device is kept relatively large, and thus a brighter image can be displayed.

  More specifically, the lower electrode 71 is made of, for example, a conductive polysilicon film and functions as a pixel potential side capacitor electrode. However, the lower electrode 71 may be composed of a single layer film or a multilayer film containing a metal or an alloy. In addition to the function as a pixel potential side capacitor electrode, the lower electrode 71 has a function of relay-connecting the pixel electrode 9a and the high concentration drain region 1e of the TFT 30. Incidentally, the relay connection here is performed through the relay electrode 719.

  The capacitor electrode 300 functions as a fixed potential side capacitor electrode of the storage capacitor 70. In the present embodiment, in order to set the capacitor electrode 300 to a fixed potential, the capacitor electrode 300 is electrically connected to a capacitor wiring 400 (described later) having a fixed potential. Further, the capacitor electrode 300 includes at least one of refractory metals such as Ti, Cr, W, Ta, and Mo, a simple metal, an alloy, a metal silicide, a polysilicide, a laminate of these, or preferably It consists of tungsten silicide. Accordingly, the capacitor electrode 300 has a function of blocking light that is about to enter the TFT 30 from above.

  As shown in FIG. 6, the dielectric film 75 is, for example, a relatively thin silicon oxide film such as an HTO (High Temperature Oxide) film, an LTO (Low Temperature Oxide) film having a film thickness of about 5 to 200 nm, or a silicon nitride film. Consists of

  In the present embodiment, as shown in FIG. 6, the dielectric film 75 has a two-layer structure in which a lower layer is a silicon oxide film 75a and an upper layer is a silicon nitride film 75b. The upper silicon nitride film 75b is patterned to a size slightly larger than the lower electrode 71 of the pixel potential side capacitor electrode, and is formed so as to fit within the light shielding region (non-opening region).

  In this embodiment, the dielectric film 75 has a two-layer structure, but depending on the case, for example, a three-layer structure such as a silicon oxide film, a silicon nitride film, and a silicon oxide film, Or you may comprise so that it may have more laminated structure. Of course, a single layer structure may be used.

(Laminated structure, configuration between second layer and third layer—first interlayer insulating film)
On the TFT 30 to the gate electrode 3a and the relay electrode 719 described above and below the storage capacitor 70, for example, NSG (non-silicate glass), PSG (phosphorus silicate glass), BSG (boron silicate glass), BPSG ( A silicate glass film such as boron phosphorus silicate glass), a silicon nitride film, a silicon oxide film, or the like, or a first interlayer insulating film 41 preferably made of NSG is formed.

  A contact hole 81 that electrically connects the high-concentration source region 1d of the TFT 30 and a data line 6a described later is opened in the first interlayer insulating film 41 while penetrating the second interlayer insulating film 42, which will be described later. Has been. The first interlayer insulating film 41 is provided with a contact hole 83 that electrically connects the high-concentration drain region 1 e of the TFT 30 and the lower electrode 71 constituting the storage capacitor 70. Further, the first interlayer insulating film 41 is provided with a contact hole 881 for electrically connecting the lower electrode 71 serving as a pixel potential side capacitor electrode constituting the storage capacitor 70 and the relay electrode 719. . In addition, a contact hole 882 for electrically connecting the relay electrode 719 and a later-described second relay electrode 6a2 is opened in the first interlayer insulating film 41 while penetrating the second interlayer insulating film 42 described later. It is holed.

(Laminated structure / 4th layer configuration-data lines, etc.)
Now, the data line 6a is provided in the fourth layer following the third layer. As shown in FIG. 6, the data line 6a includes, in order from the lower layer, a layer made of aluminum (see reference numeral 41A in FIG. 6), a layer made of titanium nitride (see reference numeral 41TN in FIG. 6), and a layer made of a silicon nitride film. It is formed as a film having a three-layer structure (see reference numeral 401 in FIG. 6). The silicon nitride film is patterned to a slightly larger size so as to cover the lower aluminum layer and titanium nitride layer.

  In the fourth layer, a capacitor wiring relay layer 6a1 and a second relay electrode 6a2 are formed as the same film as the data line 6a. As shown in FIG. 5, these are not formed so as to have a planar shape continuous with the data line 6 a when viewed in a plan view, but are formed so as to be separated from each other by patterning. Yes.

  Incidentally, since the capacitor wiring relay layer 6a1 and the second relay electrode 6a2 are formed as the same film as the data line 6a, in order from the lower layer, a layer made of aluminum, a layer made of titanium nitride, and a plasma nitride film It has a three-layer structure.

(Laminated structure / Structure between third and fourth layers-second interlayer insulating film)
Above the storage capacitor 70 described above and below the data line 6a, for example, a silicate glass film such as NSG, PSG, BSG, BPSG, a silicon nitride film, a silicon oxide film, or the like, or preferably TEOS gas is used. A second interlayer insulating film 42 formed by plasma CVD is formed. The second interlayer insulating film 42 is provided with the contact hole 81 for electrically connecting the high-concentration source region 1d of the TFT 30 and the data line 6a, and the relay layer 6a1 for capacitive wiring. A contact hole 801 is formed to electrically connect the capacitor electrode 300 as the upper electrode of the storage capacitor 70. Further, the contact hole 882 is formed in the second interlayer insulating film 42 for electrically connecting the second relay electrode 6a2 and the relay electrode 719.

(Laminated structure / Fifth layer structure-capacitor wiring, etc.)
The capacitor wiring 400 is formed as an example of the “first upper light shielding film” according to the present invention in the fifth layer following the fourth layer. When viewed in plan, the capacitor wiring 400 is formed in a lattice shape so as to extend in the X direction and the Y direction in the drawing, as shown in FIG. An opening region is defined for each pixel by such a capacitor wiring 400.

  The portion extending in the Y direction in FIG. 5 in the capacitor wiring 400 is formed so as to cover the data line 6a and wider than the data line 6a. In addition, the portion extending in the X direction in FIG. 6 is separated from the opening region in the vicinity of the center of one side of each pixel electrode 9a in order to secure a region for forming a third relay electrode 402 described later. A window 400a which is the formed opening is provided.

  Further, in FIG. 5, a substantially triangular portion is provided at the corner of the intersecting portion of the capacitor wiring 400 extending in each of the XY directions so as to fill the corner. By providing the capacitor wiring 400 with the substantially triangular portion, light can be effectively shielded from the semiconductor layer 1a of the TFT 30. That is, the light entering the semiconductor layer 1a obliquely from above is reflected or absorbed by the triangular portion and does not reach the semiconductor layer 1a. Therefore, it is possible to suppress the generation of light leakage current and display a high-quality image without flicker or the like. The capacitor wiring 400 is extended from the image display region 10a where the pixel electrode 9a is disposed to the periphery thereof, and is electrically connected to a constant potential source to have a fixed potential.

  Further, in the fifth layer, a third relay electrode 402 as an example of the “second upper light shielding film” according to the present invention is formed as the same film as the capacitor wiring 400, and the island is formed in the window 400 a of the capacitor wiring 400. It is formed in a shape. More specifically, the capacitor wiring 400 and the third relay electrode 402 are not continuously formed in a planar shape, but are formed so as to be separated by patterning. Thereby, the third relay electrode 402 is electrically separated from the capacitor wiring 400. The third relay electrode 402 has a function of relaying an electrical connection between the second relay electrode 6a2 and the pixel electrode 9a through contact holes 804 and 89 described later.

  In the present embodiment, the capacitor wiring 400 and the third relay electrode 402 described above have a two-layer structure in which a lower layer is made of aluminum and an upper layer is made of titanium nitride. The detailed configuration of the capacitor wiring 400 and the third relay electrode 402 will be described later.

(Laminated structure / Structure between the 4th and 5th layers-3rd interlayer insulation film)
A silicate glass film such as NSG, PSG, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or preferably TEOS gas is used on the above-described data line 6a and below the capacitor wiring 400. A third interlayer insulating film 43 formed by the plasma CVD method is formed. The third interlayer insulating film 43 includes a contact hole 803 for electrically connecting the capacitor wiring 400 and the capacitor wiring relay layer 6a1, and the third relay electrode 402 and the second relay electrode 6a2. Contact holes 804 for electrical connection are respectively opened.

(Laminated structure, 6th layer, 5th layer and 6th layer configuration-pixel electrode, etc.)
Finally, on the sixth layer, the pixel electrodes 9a are formed in a matrix as described above, and the alignment film 16 is formed on the pixel electrodes 9a. Under the pixel electrode 9a, a silicate glass film such as NSG, PSG, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or the like, or a fourth interlayer insulating film 44 preferably made of NSG is formed. In the fourth interlayer insulating film 44, a contact hole 89 for electrically connecting the pixel electrode 9a and the third relay electrode 402 is formed. Between the pixel electrode 9a and the TFT 30, the contact hole 89, the third relay layer 402, the contact hole 804, the second relay layer 6a2, the contact hole 882, the relay electrode 719, the contact hole 881, the lower electrode 71, and the contact described above. Electrical connection is made through the hole 83.

<3: Detailed configuration of capacitance wiring and third relay electrode>
Hereinafter, detailed configurations of the capacitor wiring 400 and the third relay electrode 402 will be described with reference to FIGS. 7 to 9 in addition to FIGS. 1 to 6. FIG. 7 is a plan view showing the positional relationship of any of the pixel portions shown in FIGS. 4 and 5, focusing on the capacitor wiring 400, the third relay electrode 402, and the scanning line 11a. FIG. 3 is a plan view showing a configuration example of a light shielding film 23 formed on a counter substrate 20. 9A is a plan view showing the configuration of the capacitor wiring 400, the third relay electrode 402, and the scanning line 11a in the comparative example, and FIG. 9B is a capacitor wiring in the comparative example. 4 is a plan view showing configurations of 400, a third relay electrode 402, and a light shielding film 23. FIG.

  As shown in FIG. 7, a window 400 a is formed on the inner side of the contour defining the opening region in the portion extending in the X direction of the capacitor wiring 400. The third relay electrode 402 is formed in an island shape in the window 400a. Therefore, in the capacitor wiring 400, no concavo-convex portion or gap is formed in the contour portion that defines the opening region.

  Further, in the scanning line 11a, a portion extending in the X direction when viewed in plan on the TFT array substrate 10 is formed so as to cover the window 400a. Further, when viewed in plan on the substrate of the TFT array substrate 10, the scanning line 11a has a width d11 of a portion extending in the X direction smaller than a width d21 of a portion of the capacitance wiring 400 extending in the X direction. It is formed to become. Similarly to the X direction, the width d12 of the portion extending in the Y direction on the scanning line 11a when viewed in plan on the substrate of the TFT array substrate 10 is also a portion extending in the Y direction of the capacitor wiring 400. It is smaller than the width d22. That is, when viewed in plan on the substrate of the TFT array substrate 10, the scanning line 11 a is formed so as not to protrude outside the contour portion that defines the opening region in the capacitor wiring 400.

  Therefore, when the electro-optical device is driven, light incident from the counter substrate 20 side is prevented from being reflected by a part of the scanning line 11a that protrudes outside the contour portion that defines the opening region in the capacitor wiring 400. Can do.

  In addition, in FIG. 7, the width d11 of the scanning line 11a is larger than the width d31 of the window 400a, and the window 400a is covered with the scanning line 11.

  Further, in this embodiment, as shown in FIGS. 4 to 6, when viewed in plan on the substrate of the TFT array substrate 10, the TFT 30 is located between the windows 400 a of the adjacent capacitor wirings 400 in the non-opening region. It is formed at a substantially central position. Therefore, in the window 400a of the capacitor wiring 400, the TFT 30 is prevented from being irradiated with light incident from the counter substrate 20 side through a gap between the contour portion of the third relay electrode 402 and the contour portion of the window 400a. can do. Therefore, generation of light leakage current in the TFT 30 can be prevented more reliably.

  Further, when viewed in plan on the substrate of the TFT array substrate 10, in the window 400a of the capacitor wiring 400, the gap between the outline of the third relay electrode 402 and the outline of the window 400a is covered by the scanning line 11a. It is in the state. Accordingly, it is possible to prevent light incident from the counter substrate 20 or the TFT array substrate 10 from leaking in such a gap.

  By the way, according to the comparative example shown in FIG. 9A, in the portion extending in the X direction of the capacitor wiring 400, the contour portion defining the opening region is cut out so that the third relay electrode 402 is connected to the capacitor wiring. 400 is formed as a divided pattern. Similarly to the configuration shown in FIG. 7, the scanning line 11 a is formed so as not to protrude outside the capacitive wiring 400 when viewed in plan on the substrate of the TFT array substrate 10 so as to overlap the capacitive wiring 400. Has been.

  According to such a configuration, the outline defining the opening area of the capacitor wiring 400 shown as the area C1 in FIG. 9A has gaps and irregularities when viewed in plan on the TFT array substrate 10. Part will occur. Therefore, in this gap or uneven portion, light incident from the counter substrate 20 side may leak or be irregularly reflected.

  On the other hand, as shown in FIG. 7, in the present embodiment, in the capacitor wiring 400, since the concave and convex portions and the gap are not formed in the contour portion that defines the opening region, light leakage and light in the concave and convex portion and the gap are not formed. It is possible to prevent irregular reflection.

  According to the present embodiment as described above, even if the light shielding film 23 is not formed on the counter substrate 20 side, the capacitor wiring 400, the third relay electrode 402, and the scanning line 11a can be used for the counter substrate 20 side. Therefore, it is possible to more reliably shield light incident from the side and light incident from the element substrate 10 side. Therefore, in the present embodiment, the contrast of the display image can be improved and the definition can be increased in the electro-optical device.

  Here, as shown in FIG. 9A, when gaps or irregularities are formed in the outline of the capacitor wiring 400, a portion corresponding to the gaps or irregularities formed in this way in the liquid crystal layer 50. Then, when the electro-optical device is driven, light leakage occurs due to disclination. Therefore, in this case, in the capacitor wiring 400, light leakage occurs in the gap and the uneven portion regardless of whether or not the gap or the uneven portion exists in the contour portion that defines the opening region. Note that such light leakage covers the gaps and irregularities in the contour portion of the capacitor wiring 400 formed as described above, when the light shielding film 23 is viewed in plan from the counter substrate 20 side on the counter substrate 20 side. It can prevent by forming as such a pattern.

  However, when the electro-optical device performs image display by frame inversion driving, the above-described disclination does not occur in the liquid crystal layer 50. Therefore, in this case, the contrast can be effectively improved without providing the light shielding film 23 on the counter substrate 20 side.

  Further, in the present embodiment, a light shielding film 23 is formed on the counter substrate 20 as shown in FIG. FIG. 8 shows a configuration of the light shielding film 23 formed in a lattice shape on the counter substrate 20. The light shielding film 23 is formed so as to overlap with the capacitor wiring 400 and to define an opening region together with the capacitor wiring 400. Then, as shown in FIG. 8, when viewed in plan from the counter substrate 20, the window 400a of the capacitor wiring 400 is formed between the contour of the third relay electrode 402 and the contour of the window 400a. The gap is covered with the light shielding film 23. Therefore, light incident from the counter substrate 20 side can be more reliably shielded by the light shielding film 23 in addition to the capacitor wiring 400 and the third relay electrode 402 formed on the TFT array substrate 10 side.

  On the other hand, according to the comparative example shown in FIG. 9B, similarly to the configuration shown in FIG. 9A, the contour portion that defines the opening region of the capacitor wiring 400 is cut out to provide the third relay. An electrode 402 is provided. FIG. 9B shows an example of the arrangement relationship between the capacitor wiring 400 and the light shielding film 23 when misalignment occurs. When such misalignment occurs, as in FIG. 9A, the gap formed in the contour portion that defines the opening region of the capacitor wiring 400 shown as the region C2 in FIG. 9A. In the uneven portion, light incident from the counter substrate 20 side may leak or be irregularly reflected.

  In the present embodiment, even when misalignment between the light shielding film 23 formed on the counter substrate 20 side and the capacitor wiring 400 occurs in this way, the contour portion that defines the opening region in the capacitor wiring 400 has an uneven portion. Since no gap is formed, it is possible to prevent light leakage or irregular reflection of light in the uneven part or gap.

  Therefore, according to the present embodiment as described above, high-quality image display can be performed.

<4; Electronic equipment>
Next, a case where the above-described liquid crystal device is applied to various electronic devices will be described.

<4-1: Projector>
First, a projector using this liquid crystal device as a light valve will be described. FIG. 10 is a plan layout diagram illustrating a configuration example of a projector. As shown in this figure, a lamp unit 1102 made of a white light source such as a halogen lamp is provided inside the projector 1100. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and light valves 1110R corresponding to the respective primary colors. Incident on 1110B and 1110G. These three light valves 1110R, 1110B, and 1110G are each configured using a liquid crystal module including a liquid crystal device.

  In the light valves 1110R, 1110B, and 1110G, the liquid crystal panel 100 is driven by R, G, and B primary color signals supplied from the image signal supply circuit 300, respectively. The light modulated by the liquid crystal panel 100 enters the dichroic prism 1112 from three directions. In this dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Accordingly, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  Here, paying attention to the display images by the light valves 1110R, 1110B, and 1110G, the display image by the light valves 1110G needs to be horizontally reversed with respect to the display images by the light valves 1110R and 1110B.

  Note that light valves 1110R, 1110B, and 1110G receive light corresponding to the R, G, and B primary colors by the dichroic mirror 1108, and thus there is no need to provide a color filter.

<4-2: Mobile computer>
Next, an example in which the liquid crystal device is applied to a mobile personal computer will be described. FIG. 11 is a perspective view showing the configuration of the personal computer. In the figure, a computer 1200 includes a main body 1204 having a keyboard 1202 and a liquid crystal display unit 1206. The liquid crystal display unit 1206 is configured by adding a backlight to the back surface of the liquid crystal device 1005 described above.

<4-3; Mobile phone>
Further, an example in which the liquid crystal device is applied to a mobile phone will be described. FIG. 12 is a perspective view showing the configuration of this mobile phone. In the figure, a mobile phone 1300 includes a reflective liquid crystal device 1005 together with a plurality of operation buttons 1302. In the reflective liquid crystal device 1005, a front light is provided on the front surface thereof as necessary.

  In addition to the electronic devices described with reference to FIGS. 10 to 12, a liquid crystal television, a viewfinder type, a monitor direct view type video tape recorder, a car navigation device, a pager, an electronic notebook, a calculator, a word processor, a work Examples include a station, a videophone, a POS terminal, a device equipped with a touch panel, and the like. Needless to say, the present invention can be applied to these various electronic devices.

  The present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the spirit or concept of the invention that can be read from the claims and the entire specification. An electronic apparatus including the electro-optical device is also included in the technical scope of the present invention.

It is a top view which shows the whole structure of an electro-optical apparatus. It is H-H 'sectional drawing of FIG. 2 is an equivalent circuit of various elements, wirings, and the like in a plurality of pixel portions formed in a matrix that forms an image display region of an electro-optical device. FIG. 7 is a plan view of a plurality of adjacent pixel groups on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed, in a lower layer portion (lower layer portion up to reference numeral 70 (storage capacitor) in FIG. 6). Only such a configuration is shown. FIG. 7 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed, and an upper layer portion (the upper layer portion beyond reference numeral 70 (storage capacitor) in FIG. Only the structure which concerns on this is shown. FIG. 6 is a cross-sectional view taken along line A-A ′ when FIG. 4 and FIG. 5 are overlapped. It is a top view which shows the arrangement | positioning relationship of a capacity | capacitance wiring, the 3rd relay electrode, and a scanning line in arbitrary pixel parts. It is a top view which shows the structural example of the light shielding film formed on a counter substrate. FIG. 9A is a plan view showing the configuration of the capacitor wiring, the third relay electrode, and the scanning line in the comparative example, and FIG. 9B is the capacitor wiring and the third relay electrode in the comparative example. FIG. 5 is a plan view showing a configuration of a counter substrate side light shielding film. It is a top view which shows the structure of the projector which is an example of the electronic device to which a liquid crystal device is applied. It is a perspective view which shows the structure of the personal computer which is an example of the electronic device to which the liquid crystal device is applied. It is a perspective view which shows the structure of the mobile telephone which is an example of the electronic device to which a liquid crystal device is applied.

Explanation of symbols

  9a ... Pixel electrode, 10a ... Image display area, 10 ... TFT array substrate, 11a ... Scanning line, 400 ... Capacitance wiring, 400a ... Window, 402 ... Third relay electrode.

Claims (7)

A pixel electrode formed for each pixel in an image display region on the element substrate;
It forms at least a part of a driving element or wiring for driving the pixel, and is formed so as to at least partially define an opening area for each pixel, and the opening area when viewed in plan on the element substrate A first upper light-shielding film separated from the first upper light-shielding film,
The pixel electrode is formed in the same layer as the first upper light-shielding film, is electrically isolated from the first upper light-shielding film, and is formed in an island shape in the opening as viewed in plan on the element substrate. And a second upper light shielding film that relays electrical connection between the driving element and the driving element;
The drive element or at least a part of the wiring is configured, and the first upper light-shielding layer is formed on the lower layer side of the first upper light-shielding film so as to cover the opening when viewed in plan on the element substrate. An electro-optical device comprising: a lower light-shielding film formed to have a width smaller than that of the film. A thin film transistor that controls switching of the pixel electrode formed in a non-opening region on the element substrate, as the driving element, at a substantially central position between the openings adjacent to each other as viewed in plan on the element substrate. The electro-optical device according to claim 1, further comprising: The first upper light-shielding film is formed as a capacitor electrode for adding a storage capacitor to the pixel electrode or a capacitor wiring connected to the capacitor electrode. Electro-optic device. The electro-optical device according to any one of claims 1 to 3, wherein the lower light-shielding film is formed as a scanning line to which a scanning signal is supplied. A counter substrate provided facing the element substrate and sandwiching an electro-optic material between the element substrate;
The counter substrate is formed on the side facing the element substrate so as to cover at least the entire space between the opening of the first upper light-shielding film and the second upper light-shielding film, The electro-optical device according to claim 1, further comprising: a counter substrate side light shielding film that defines the opening region together with the first upper light shielding film. The image signal whose polarity is inverted with respect to a reference potential is supplied to the pixel electrode for each frame period via the wiring and the driving element. The electro-optical device according to claim 1. An electronic apparatus comprising the electro-optical device according to claim 1.

Images