JP2005160212A - Fet drive device and fet drive voltage generation method of fet drive device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To stably drive an FET irrespective of a variation in power supply voltage. <P>SOLUTION: A voltage difference between a first voltage value of a power supply 1 and an output voltage value of a switching regulator 5 is calculated by a differential amplification circuit 4, and the voltage difference is divided in terms of voltage by resistors 15, 16 and entered into the switching regulator 5. The switching regulator 5 compares the voltage value entered from the differential amplification circuit 4 with a reference voltage β, controls the voltage of the power supply 1 and applies it to a gate terminal of the FET 2. By this arrangement, the output voltage value of the switching regulator 5 varies in accordance with a variation in the voltage value of the power supply 1, a voltage between terminals of a gate and a source of the FET 2 is always stable, and thus the FET 2 can be driven while keeping a desired voltage between the terminals of the gate and the source. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an FET drive device that drives an N-channel FET on the high side and an FET drive voltage generation method in the FET drive device.

Conventionally, a so-called high-side switch in which a load is turned on / off by an N-channel FET (hereinafter referred to as FET) provided upstream of the load is boosted by a switching regulator and converted to a constant voltage, and then the gate of the FET There is an FET driver configured to be applied to a terminal.
JP 2002-238251 A JP 2003-180072 A

  However, in such a conventional FET driving device, a constant voltage is always applied to the gate terminal of the FET by the switching regulator regardless of fluctuations in the power supply voltage. As a result, when the power supply voltage fluctuates for some reason and the voltage becomes high, when the FET is turned on, the potential of the source terminal of the FET increases with the power supply voltage, so the gate and source terminals of the FET There is a problem that the inter-voltage becomes less than a predetermined voltage value and the on-state of the FET cannot be maintained, or heat is generated without being in a complete on-state, resulting in lack of stability.

  Therefore, in view of such a problem, an object of the present invention is to stably drive an FET regardless of fluctuations in power supply voltage.

  The present invention includes a differential amplifier circuit that detects a voltage difference between a power supply voltage and an output voltage of a switching regulator, and the switching regulator generates an FET drive voltage for driving an FET based on a detection result of the differential amplifier circuit. It was supposed to be controlled.

  According to the present invention, the switching regulator controls the FET drive voltage based on the detection result of the differential amplifier circuit, and the FET drive voltage is applied to the gate terminal of the FET so that the power supply voltage varies. The voltage between the gate and source terminals of the FET can always be kept above a predetermined value, and the FET can be driven stably.

Next, embodiments of the present invention will be described by way of examples.
FIG. 1 shows a drive circuit for driving the FET.
A power source 1 is connected to the drain terminal of the FET 2, and a load 3 is connected to the source terminal. The voltage of the power supply 1 is regulated by the switching regulator 5, and the regulated voltage is applied to the gate terminal of the FET 2 via the switch 6 that performs an on / off operation in response to a gate on / off signal.
A differential amplifier circuit 4 is connected to the power source 1 and its output terminal is connected to the input side of a switching regulator (SW-RG) 5.

The differential amplifier circuit 4 detects a difference between the voltage value of the power supply 1 and the output voltage value of the switching regulator 5 by a differential amplifier 10 provided therein.
The power source 1 is connected to the negative input terminal of the differential amplifier 10 via a resistor 11. The output terminal of the switching regulator 5 is connected to the positive input terminal of the differential amplifier 10 via the resistor 12.

The positive input terminal of the differential amplifier 10 is connected to the ground via the resistor 14, and the negative input terminal of the differential amplifier 10 is connected to the output terminal of the differential amplifier 10 via the resistor 13. The
Further, the output terminal of the differential amplifier 10 is connected to the ground via the resistor 15 and the resistor 16.
A connection point between the resistor 15 and the resistor 16 is a point d, and the point d and the input side of the switching regulator 5 are connected.

A connection point between the output side of the switching regulator 5 and the switch 6 is a point b, and a connection point between the power source 1 and the resistor 11 is a point a. A connection point between the output terminal of the differential amplifier 10 and the resistor 15 is a point c.
In this embodiment, assuming that the resistance values of the resistors 11, 12, 13, and 14 are the same, the point c voltage Eout is obtained by the following equation.
Eout = (point b voltage value−point a voltage value) × resistance value of resistor 13 / resistance value of resistor 11
(1)

The switching regulator 5 regulates and outputs the voltage of the power supply 1 so that the reference voltage β that is the reference of the voltage output from the switching regulator 5 is equal to the point d voltage input to the switching regulator 5.
The switching regulator 5 controls to decrease the output voltage when the input voltage becomes higher than the reference voltage β, and to increase the output voltage when the input voltage becomes lower than the reference voltage β.

When the point c voltage Eout is divided by the resistors 15 and 16 and input to the switching regulator 5 as the point d voltage, the point d by the resistors 15 and 16 is set so that the point d voltage becomes equal to the reference voltage β of the switching regulator 5. When the voltage dividing ratio of the c voltage Eout is set, the output of the switching regulator 5 is controlled to always output a voltage higher than the voltage of the power supply 1 by Eout even if the voltage of the power supply 1 fluctuates.
Therefore, even if the voltage of the power source 1 changes, a voltage higher than the drain terminal can always be applied to the gate terminal of the FET 2 and the FET 2 can be driven while maintaining a desired gate-source voltage.

  Here, in the FET drive circuit shown in FIG. 1, the voltage of the power supply 1 is 10 V, the output voltage of the switching regulator 5 is 20 V, the reference voltage β of the switching regulator 5 is 1 V, and the resistance values of the resistors 11, 12, 13, 14. Are set to the same value, the resistance value of the resistor 15 is set to 9 kΩ, the resistance value of the resistor 16 is set to 1 kΩ, and the gate-source voltage of the FET 2 is controlled at 10V.

In this case, the point c voltage Eout is expressed by the following equation.
Eout = (20V−10V) × resistance value of resistor 13 / resistance value of resistor 11
= 10V (2)
Therefore, the point d voltage is expressed by the following equation.
Point d voltage = 1kΩ / (9kΩ + 1kΩ) × 10V
= 1V (3)

Here, the voltage value of each part when the voltage value of the power supply 1 rises from 10V to 12V is shown.
When the voltage value of the power supply 1 increases from 10V to 12V, the point c voltage Eout is expressed by the following equation.
Eout = (20V−12V) × resistance value of resistor 13 / resistance value of resistor 11
= 8V (4)
Therefore, the point d voltage is expressed by the following equation.
Point d voltage = 1kΩ / (9kΩ + 1kΩ) × 8V
= 0.8V (5)

Since the reference voltage β of the switching regulator 5 is 1V and the reference voltage β is higher than the input voltage (voltage at point d), the output voltage (point b voltage) from the switching regulator 5 is changed until the input voltage becomes the reference voltage β. Raise.
Therefore, the point d voltage becomes 1V when the point b voltage is 22V, and the switching regulator 5 increases the voltage to 22V.
Therefore, a voltage of 22V is applied to the gate terminal of FET2, and FET2 is driven with a voltage between the gate and source terminals of 10V as described above.

In this embodiment, the voltage difference between the voltage value of the power source 1 and the output voltage value of the switching regulator 5 is calculated by the differential amplifier circuit 4, and the voltage difference is divided by the resistors 15 and 16. To the switching regulator 5. The switching regulator 5 compares the voltage value input from the differential amplifier circuit 4 with the reference voltage β, controls the voltage of the power supply 1 and applies it to the gate terminal of the FET 2.
As a result, the output voltage value of the switching regulator 5 also fluctuates in accordance with the fluctuation of the voltage value of the power supply 1, whereby the voltage between the gate and source terminals of the FET 2 is always constant, while maintaining the desired gate and source terminal voltage. The FET 2 can be driven.

  Further, by dividing the point c voltage Eout by the resistors 15 and 16 in the differential amplifier circuit 4 and inputting the voltage to the switching regulator 5, a low voltage value is obtained as the reference voltage β in the switching regulator 5 to be compared with the input voltage. Can be used.

It is a figure which shows the FET drive circuit in a present Example.

Explanation of symbols

1 Power supply 2 FET
3 Load 4 Differential Amplifier 5 Switching Regulator 6 Switch 10 Differential Amplifier 11, 12, 13, 14, 15, 16 Resistor β Reference Voltage

Claims (4)

In an FET drive device that generates an FET drive voltage for driving an FET by adjusting a power supply voltage by a switching regulator,
A differential amplifier circuit for detecting a voltage difference between the power supply voltage and the output voltage of the switching regulator;
The FET driving apparatus, wherein the switching regulator controls the FET driving voltage based on a detection result of the differential amplifier circuit. The switching regulator is
When the voltage difference detected by the differential amplifier circuit increases, the FET drive voltage is controlled in a decreasing direction,
2. The FET drive device according to claim 1, wherein when the voltage difference detected by the differential amplifier circuit decreases, the FET drive voltage is controlled to increase. The differential amplifier circuit includes a differential amplifier and a resistor,
The differential amplifier circuit detects a voltage difference between the power supply voltage and the output voltage of the switching regulator by the differential amplifier, and steps down the detected voltage difference by the resistor and inputs the voltage difference to the switching regulator. The FET driving device according to claim 1 or 2, characterized in that The differential amplifier circuit detects the voltage difference between the power supply voltage and the output voltage of the switching regulator.
An FET drive voltage generation method in an FET drive device, wherein an FET drive voltage for driving an FET is controlled by the switching regulator based on a detection result of the differential amplifier circuit.

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