JP2005026717A - Solid imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid imaging device with good property, in which an over flow barrier is formed deeply and which is also sensitive to near infrared ray region. <P>SOLUTION: An imaging device 1 of vertical type over flow drain system has a first conductivity type semiconductor substrate 2, a first conductivity type semiconductor layer 3 which is formed on the first conductivity type semiconductor substrate 2 and has lower concentration than that of the first conductivity type semiconductor substrate 2, a second conductivity type semiconductor region 4 which is formed on the first conductivity type semiconductor layer 3, a semiconductor region 5 of a first conductivity type, second conductivity type or intrinsic semiconductor, which is formed on the second conductivity type semiconductor region 4 and has lower concentration than that of the second conductivity type semiconductor region 4 and a thickness of two micrometers or more so that infrared ray may be absorbed sufficiently. A light receiving portion 11 is formed on the surface of the semiconductor region of the first conductivity type, second conductivity type, or intrinsic semiconductor. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a solid-state imaging device applied to, for example, a CCD sensor.

  As a solid-state imaging device, a so-called vertical overflow drain type solid-state imaging device is known in which surplus charges at the light receiving portion are discharged to the substrate side.

  In this vertical overflow drain type solid-state imaging device, for example, in a CCD (charged couple device) type solid-state imaging device manufactured using an n-type semiconductor substrate as a substrate, a so-called overflow barrier is formed as deeply as possible in the silicon of the substrate, and the sensitivity In order to improve this, a method of forming an overflow barrier region by high energy ion implantation is used.

  However, in the above method, the overflow barrier can be formed only to a depth of about 5 μm at the maximum.

  As another method, there is a method in which heat is applied after ion implantation and diffusion is performed to form an overflow barrier region. In this case, however, a long time is required for manufacturing, and contamination during diffusion is also caused. The influence is large, leading to deterioration of the characteristics of the solid-state imaging device.

On the other hand, it is known that a CCD solid-state imaging device manufactured for the purpose of a p-type semiconductor substrate as a substrate has sensitivity in the near infrared region.
However, since the photoelectric conversion region of the light receiving unit is not completely depleted, the MTF (Modulation Transfer Function; indicating resolution) in the near infrared region is poor, and an n-type semiconductor substrate such as a smear or an afterimage due to dark current There is a problem that the characteristics are inferior to the case where a CCD type solid-state imaging device is formed.

  In order to solve the above-described problem, the present invention provides a solid-state imaging device having a deep overflow barrier and good characteristics.

  The solid-state imaging device according to the present invention includes a first conductivity type semiconductor layer, a second conductivity type semiconductor region having a lower concentration than the first conductivity type semiconductor substrate, and a second conductivity type on the first conductivity type semiconductor substrate. A first conductivity type, second conductivity type or intrinsic conductivity type semiconductor region having a thickness of 2 μm or more is formed so that infrared rays can be sufficiently absorbed at a lower concentration than the semiconductor region, and a light receiving portion is formed on the surface of the semiconductor region The configuration is as follows.

  According to the configuration of the present invention described above, by forming a semiconductor region having a thickness of 2 μm or more so that infrared rays can be sufficiently absorbed at a lower concentration than the second conductivity type semiconductor region on the second conductivity type semiconductor region, The second conductivity type semiconductor region becomes a so-called overflow barrier region, and the overflow barrier can be formed to a depth at which infrared rays can be sufficiently absorbed. Therefore, high sensitivity is achieved.

According to the solid-state imaging device of the present invention described above, the surface of the second conductive type semiconductor region and the high resistance semiconductor region having a thickness of 2 μm or more are formed on the second conductive type semiconductor region. By forming the light receiving portion in the second region, the second conductivity type semiconductor region becomes an overflow barrier, and the overflow barrier can be formed to a depth at which infrared rays can be sufficiently absorbed. An image sensor can be configured.
Further, since the width of the depletion layer in the light receiving portion can be made longer than before, the sensitivity of visible light can be improved.

  Moreover, the solid-state imaging device of the present invention can form an electronic shutter that releases charges on the substrate.

  When the high resistance semiconductor region is formed of an epitaxial layer, the second conductivity type semiconductor region can be easily formed to a depth at which infrared rays can be sufficiently absorbed.

  When the second conductivity type semiconductor region is formed by ion implantation, the second conductivity type semiconductor region can be formed by low energy implantation into the first conductivity type semiconductor substrate.

When the second conductivity type semiconductor region has a concentration of 10 ¹⁴ to 10 ¹⁶ cm ⁻³ , a sufficient overflow barrier can be formed here.

  The solid-state imaging device according to the present invention is a vertical overflow drain type solid-state imaging device having a first conductivity type semiconductor substrate and a first concentration lower than that of the first conductivity type semiconductor substrate formed on the first conductivity type semiconductor substrate. 1 conductivity type semiconductor layer, 2nd conductivity type semiconductor region formed on the 1st conductivity type semiconductor layer, and sufficient infrared rays at a lower concentration than the 2nd conductivity type semiconductor region formed on the 2nd conductivity type semiconductor region A first conductivity type, second conductivity type or intrinsic conductivity type semiconductor region having a thickness of 2 μm or more to be absorbed; and on the surface of the first conductivity type, second conductivity type or intrinsic semiconductor region It is assumed that a light receiving part is formed.

  According to the present invention, in the solid-state imaging device, the first conductive type, the second conductive type, or the intrinsic semiconductor region is formed of an epitaxial layer.

  According to the present invention, in the solid-state imaging device, the second conductive semiconductor region formed on the first conductive semiconductor layer is formed by ion implantation.

In the solid-state imaging device according to the present invention, the second conductive semiconductor region formed on the first conductive semiconductor layer has a concentration of 10 ¹⁴ to 10 ¹⁶ cm ⁻³ .

Hereinafter, embodiments of the solid-state imaging device of the present invention will be described with reference to the drawings.
FIG. 1 shows a vertical overflow drain type CCD solid-state imaging device according to the present embodiment.
In this solid-state imaging device 1, a first conductivity type low impurity concentration, ie, n ⁻ type epitaxial layer 3 is formed on a semiconductor substrate 2 of the first conductivity type, in this example, n-type silicon. A second conductivity type semiconductor region by ion implantation, in this example, a first p-type semiconductor well region 4 is formed in the epitaxial layer 3, and the first p-type semiconductor well region 4 is epitaxially grown on the first p-type semiconductor well region 4. A high-resistance semiconductor region 5 having a lower impurity concentration than that of one p-type semiconductor well region 4 is formed. An n ⁺ -type impurity diffusion region 6 and a p ⁺ -type positive charge accumulation region 7 thereon are formed on the surface of the high-resistance semiconductor region 5 to form the light receiving unit 11. In addition, a second p-type semiconductor well region 8 and an n-type transfer channel region 9 are formed in the high-resistance semiconductor region 5 at a position away from the light receiving portion 11, and a p-type channel stop region 14 is further formed. .

  Here, the first p-type semiconductor well region 4 becomes a so-called overflow barrier region. The light receiving unit 11 is a pixel, and a plurality of light receiving units 11 are arranged in a matrix.

A reading gate unit 13 is formed between the light receiving unit 11 and a vertical transfer register 12 described later.
A transfer electrode 16 made of, for example, polycrystalline silicon is formed on the transfer channel region 9, the channel stop region 14, and the readout gate portion 13 via a gate insulating film 15, and the transfer channel region 9, the gate insulating film 15, and the transfer electrode 16 are formed. Thus, a vertical transfer register 12 having a CCD structure is formed.

  Further, a light shielding film 17 is formed on the entire surface other than the opening of the light receiving portion 11 via an interlayer insulating film 18 covering the transfer electrode 16.

  The first conductivity type low impurity concentration epitaxial layer 3 is provided to adjust the so-called shutter voltage. By forming this epitaxial layer 3, the shutter voltage can be easily adjusted by the substrate voltage Vsub.

The second conductivity type first semiconductor well region 4 is formed by ion implantation into the first conductivity type low impurity concentration epitaxial layer 3, and preferably the impurity concentration is in the range of 10 ¹⁴ to 10 ¹⁶ cm ⁻³ . It is assumed to be inside.

  The thickness of the high-resistance semiconductor region 5 is 2 μm or more, preferably 5 μm or more, the impurity concentration is lower than that of the first p-type semiconductor well region 4, and the conductivity type is the same as that of the first p-type semiconductor well region 4. The same p-type, the opposite n-type, or non-doped (intrinsic semiconductor) may be used.

  In this way, a so-called vertical overflow drain type CCD type in which the light receiving portion 11, the first p-type semiconductor well region 3 serving as an overflow barrier, and the substrate 2 serving as an overflow drain are formed in the vertical direction. The solid-state imaging device 1 is configured.

FIG. 2 shows the impurity profile of the solid-state imaging device 1 and the potential change corresponding thereto.
From FIG. 2, the potential rises from the middle of the P ⁺ type positive charge accumulation region 7 at 0 V at the tip of the P ⁺ type positive charge accumulation region 7, reaches a peak near the pn junction, and then decreases. The potential becomes minimum in the first p-type semiconductor well region 4. That is, an overflow barrier is formed in the first p-type semiconductor well region 4. The potential increases as the depth further increases, and the potential is saturated in the n ⁻ -type epitaxial layer 3.

It is depleted to the position where this potential is saturated.
As described above, since the depletion is performed to a position sufficiently deeper than the high-resistance semiconductor region 5 formed at a depth at which infrared rays enter, the solid-state imaging device 1 of the present embodiment detects infrared rays. Can be easily done.

The relationship between the wavelength of incident light and the relative sensitivity of the solid-state imaging device of the above-described embodiment was examined.
Compared to a conventional solid-state image sensor, FIG. 3A and FIG. 3B show.
FIG. 3A shows a comparison with a conventional p-type substrate CCD solid-state imaging device, and FIG. 3B shows a comparison with a conventional n-type substrate CCD solid-state imaging device.

FIG. 3A shows that the solid-state imaging device (curve I) of the present example has not only high sensitivity in the visible light region but also sensitivity in the infrared region of 700 nm or more.
The conventional example of the p-type substrate (curve II) also has sensitivity in the infrared region, but the sensitivity in the visible light region is biased to a narrow range of wavelengths.

  From FIG. 3B, compared with the conventional example using the same n substrate (curve III), the solid-state imaging device (curve I) of this example has improved sensitivity of red having a long wavelength of visible light, and further, in the infrared region. It can be seen that the sensitivity has increased significantly.

  Thus, it can be seen that the solid-state imaging device 1 of this embodiment actually improves the sensitivity of infrared rays.

  That is, according to the present embodiment, a solid-state imaging device having sensitivity not only in the visible light but also in the near infrared region without affecting other characteristics can be obtained. In addition, since the width of the depletion layer of the light receiving portion is longer than before, the sensitivity of visible light is improved. In the n-type substrate CCD solid-state imaging device of this example, characteristics other than sensitivity are equivalent to those of the conventional n-type substrate CCD solid-state imaging device. Furthermore, an electronic shutter operation that releases charges to the substrate side is also possible.

For example, the solid-state imaging device 1 is manufactured as follows.
As shown in FIG. 4A, a first conductivity type, for example, an n-type semiconductor substrate 2 is prepared.
Next, as shown in FIG. 4B, on the first conductivity type semiconductor substrate 2, the first conductivity type and low impurity concentration, ie, n ⁻ type epitaxial layer 3 is formed to a thickness of, for example, 10 μm by epitaxial growth. .

  Next, as shown in FIG. 5C, a second conductivity type, that is, a p-type first semiconductor well region 4 is formed in a part of the epitaxial layer 3 by ion implantation of low-energy impurities. The first p-type semiconductor well layer 4 is formed over the entire so-called imaging region.

  Next, as shown in FIG. 5D, a high-resistance semiconductor region 5 is formed on the epitaxial layer 3 and the first p-type semiconductor well region 4 so as to cover them, for example, to a thickness of 10 μm.

Next, as shown in FIG. 6E (however, only the region corresponding to one pixel is shown in FIG. 6E and thereafter), ion implantation is performed on the high-resistance semiconductor region 5 to form an n ⁺ -type impurity constituting the light receiving portion. A diffusion region 6, a p ⁺ -type positive charge storage region 7, a second p-type semiconductor well region 8, an n-type transfer channel region 9 and a p-type channel stop region 14 are formed.

  Next, as shown in FIG. 6F, a gate insulating film 15 is formed over the entire surface, and a transfer electrode 16 made of a polysilicon layer is selectively formed thereon.

Thereafter, the transfer electrode 16 is covered with an insulating film 15, and a light shielding film 17 made of a light shielding metal such as Al is formed thereon. An opening is formed in the light shielding film 17 at a portion corresponding to the light receiving portion 11.
In this way, the solid-state imaging device 1 shown in FIG. 1 can be formed.

In the above-described embodiment, the n ⁻ type epitaxial layer 2 is formed on the semiconductor substrate 1, but the epitaxial layer 2 is not formed, and the first electrode having the opposite conductivity type is directly implanted into the n type semiconductor substrate 1. The p-type semiconductor well region 4 may be formed. Similarly, the high-resistance semiconductor region 5 is formed so as to cover the first p-type semiconductor well region 4 and can be deeply depleted.

  The solid-state imaging device of the present invention is not limited to the above-described example, and various other configurations can be taken without departing from the gist of the present invention.

It is a schematic block diagram (sectional drawing) of the Example of the solid-state image sensor of this invention. It is an impurity profile of the solid-state image sensor of FIG. It is the figure which compared the spectral sensitivity characteristic of the solid-state image sensor of FIG. 1 with the solid-state image sensor of a comparative example. It is the figure compared with the solid-state image sensor using an Ap type | mold board | substrate. B is a diagram compared with a solid-state imaging device using a conventional n-type substrate. A and B are process diagrams of the manufacturing process of the solid-state imaging device of FIG. C and D are process diagrams of the manufacturing process of the solid-state imaging device of FIG. E and F are process diagrams of the manufacturing process of the solid-state imaging device of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Solid-state image pick-up element, 2 Semiconductor substrate, 3 Epitaxial layer, 1st p-type semiconductor well area | region, 5 High resistance semiconductor area | region, 6 n ⁺ type impurity diffusion area | region, 7 Positive charge storage area area | region, 8 2nd P-type semiconductor well region, 9 transfer channel region, 11 light receiving portion, 12 vertical transfer register, 13, readout gate portion, 14 channel stop region, 15 gate insulating film, 16 transfer electrode, 17 light shielding film, 18 interlayer insulating film

Claims (4)

In the vertical overflow drain type solid-state image sensor,
A first conductivity type semiconductor substrate;
A first conductivity type semiconductor layer having a lower concentration than the first conductivity type semiconductor substrate formed on the first conductivity type semiconductor substrate;
A second conductivity type semiconductor region formed on the first conductivity type semiconductor layer;
A first conductive type, a second conductive type or an intrinsic semiconductor region formed on the second conductive type semiconductor region and having a thickness of 2 μm or more so that infrared rays can be sufficiently absorbed at a lower concentration than the second conductive type semiconductor region. Have
A light-receiving portion is formed on the surface of the first conductivity type, second conductivity type, or intrinsic semiconductor region.   2. The solid-state imaging device according to claim 1, wherein the first conductive type, the second conductive type, or the intrinsic semiconductor region is formed of an epitaxial layer.   2. The solid-state imaging device according to claim 1, wherein the second conductive type semiconductor region formed on the first conductive type semiconductor layer is formed by ion implantation. 2. The solid-state imaging device according to claim 1, wherein the second conductive type semiconductor region formed on the first conductive type semiconductor layer has a concentration of 10 ¹⁴ to 10 ¹⁶ cm ⁻³ .

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