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JP2004319577A - Resin sealed semiconductor device, its manufacturing process, and stacked resin sealed semiconductor device - Google Patents

Resin sealed semiconductor device, its manufacturing process, and stacked resin sealed semiconductor device Download PDF

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Publication number
JP2004319577A
JP2004319577A JP2003107731A JP2003107731A JP2004319577A JP 2004319577 A JP2004319577 A JP 2004319577A JP 2003107731 A JP2003107731 A JP 2003107731A JP 2003107731 A JP2003107731 A JP 2003107731A JP 2004319577 A JP2004319577 A JP 2004319577A
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Japan
Prior art keywords
terminal
resin
semiconductor device
encapsulated semiconductor
semiconductor element
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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JP2003107731A
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Japanese (ja)
Inventor
Masachika Masuda
正親 増田
Chikao Ikenaga
知加雄 池永
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Dai Nippon Printing Co Ltd
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Dai Nippon Printing Co Ltd
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Publication date
Application filed by Dai Nippon Printing Co Ltd filed Critical Dai Nippon Printing Co Ltd
Priority to JP2003107731A priority Critical patent/JP2004319577A/en
Priority to US10/821,173 priority patent/US7405468B2/en
Publication of JP2004319577A publication Critical patent/JP2004319577A/en
Priority to US12/213,277 priority patent/US20080251902A1/en
Priority to US12/801,896 priority patent/US8653647B2/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device suitable for further thinning and mass production of semiconductor components, and to provide a system package stacking a plurality of semiconductor devices. <P>SOLUTION: A plurality of terminal members obtained by etching a machining material such that at least a part of an external terminal part 111 has the thickness of the machining material and by half etching an internal terminal part 112, and a semiconductor element 120 thinner than the machining material are contained entirely within the thickness of the machining material and then resin sealed to produce a resin sealed semiconductor devices. The surface, rear surface and outer side face of the external terminal part 111 are exposed as a terminal surface and the semiconductor element is arranged to expose the rear surface not on the side of the terminal surface. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、エッチング形成した端子部を用いた、小型、薄型の樹脂封止型半導体装置と、そのような半導体装置を積層した構造の積層型樹脂封止型半導体装置に関する。
【０００２】
【従来の技術】
近年、電子機器の小型化に対応するために、電子機器に搭載される半導体部品を高密度に実装することが要求され、それにともなって、半導体部品の小型化、薄型化が進んでおり、更なる薄型化を廉価に達成できるパッケージが求められている。
このような状況のもと、薄型化に対応するものとして、特開平１１−３０７６７５号公報に記載の接続用リードの上面及び下面を露出させた構造の樹脂封止型半導体装置や、特開平１１−２６０９８９号公報に記載の接続用リードの一部を露出して外部端子としている樹脂封止型半導体装置が提案されている。
一方、システムＬＳＩのワンチップ化の開発が盛んであるが、 ２次元方向への配線展開となるため、配線の短縮による高速化には限界があり、また、その開発費、開発期間の増加を招いているのが実状で、最近では、これに代わり、半導体素子を３次元方向に積層したパッケージでシステムＬＳＩを実現しようとする試みがなされている。
このようなパッケージをシステムパッケージとも言う。
【０００３】
特開平１１−３０７６７５号公報には、これに記載の樹脂封止型半導体装置を積層し、その上面及び下面を露出させた接続用リードで電気的接続をとった、いわゆるスタック構造の積層型樹脂封止型半導体装置も記載されているが、ここに記載の樹脂封止型半導体装置は、ダイパッドを備えたもので、薄型化は十分でない。
尚、特開平１１−２６０９８９号公報に記載の樹脂封止型半導体装置はスタック構造をとれるものではない。
また、特開平２００２−３３４３４号公報には、パッケージ内に半導体素子（チップ）を積層したパッケージが記載されているが、この構造では、自由度が少なく、汎用化しずらい。
【０００４】
【特許文献１】
特開平１１−３０７６７５号公報
【特許文献２】
特開平１１−２６０９８９号公報
【特許文献３】
特開平２００２−３３４３４号公報
【０００５】
【発明が解決しようとする課題】
上記のように、近年、半導体部品の小型化、薄型化が進んでおり、更なる薄型化を廉価に達成できるパッケージが求められており、また、システムパッケージの作製が試みられている中、複数の樹脂封止型半導体装置が積層した、いわゆるスタック構造にてこれを実現するには、各樹脂封止型半導体装置を更に薄型化することが必要で、この対応が求められていた。
本発明はこれらに対応するもので、半導体部品の更なる薄型化を廉価に達成できるパッケージを提供しようとするものであり、更に具体的には、複数の樹脂封止型半導体装置を積層した、いわゆるスタック構造にてシステムパッケージを実現した積層型樹脂封止型半導体装置を提供しようとするものであり、このための薄型の樹脂封止型半導体装置で、量産性の良いものを提供しようとするものである。
半導体部品の更なる薄型化を廉価に達成でき、量産性に適した構造の半導体装置を提供しようとするものであり、更に、このような薄型の樹脂封止型半導体装置を複数積層し、いわゆるスタック構造にてシステムパッケージを実現できる積層型樹脂封止型半導体装置を提供しようとするものである。
同時に、このような薄型の樹脂封止型半導体装置の製造方法の提供しようとするものである。
【０００６】
【課題を解決するための手段】
本発明の樹脂封止型半導体装置は、外部回路と接続するための外部端子部と、半導体素子と接続するための内部端子部とを、連結部にて一体的に連結してなる端子部材で、且つ、ハーフエッチング加工法を用いて、加工用素材から、外部端子部の少なくとも一部を加工用素材の厚さの厚肉にし、内部端子部をハーフエッチングにて薄肉にしている端子部材を、複数個と、前記加工用素材の厚さより薄い半導体素子とを用い、半導体素子の所定の端子部と所定の端子部材の内部端子部とをワイヤボンディング接続して、前記加工用素材の厚さ幅内に全体を収め、加工用素材の厚さ幅に揃えて樹脂封止した樹脂封止型半導体装置であって、各端子部材の内部端子部は、そのハーフエッチング面側を端子面とし、各端子部材を同じ向きにし、外部端子部の表裏の面および内部端子部の端子面が、それぞれ、一平面上に、揃うようにし、周辺部に、内部端子部側を内側に向けて、各端子部材を配しており、外部端子部の表裏面と外側側面とを端子面として露出させており、また、半導体素子を、各端子部材の内部端子部から離れた位置に、その端子面を、端子部材のハーフエッチング面側と同じ向きにして、且つ、その端子面でない側の面である裏面を、各端子部材のハーフエッチング面に対向する側の面に、揃えて、ダイパッドなしで、樹脂中に、前記裏面を露出させるようにして、配置していることを特徴とするものである。
そして、上記の樹脂封止型半導体装置において、外部端子部の外側側面部に切り欠け部を設けていることを特徴とするものである。
そしてまた、上記の樹脂封止型半導体装置において、端子部材は、Ｃｕ、Ｃｕ系合金、４２％Ｎｉ−Ｆｅ系合金からなることを特徴とするものである。
また、上記の樹脂封止型半導体装置において、内部端子部の端子面および外部端子部の表裏の端子面に、半田めっき層、金めっき層、銀めっき層、パラジウムめっき層、錫めっき層から選ばれた１つの金属めっき層を、接続用のめっき層としていることを特徴とするものである。
尚、ここで、「ダイパッドなしで、樹脂中に、前記裏面を露出させるようにして、配置している」とは、半導体素子の支持部を設けずに、半導体素子の裏面を露出させ、樹脂中に配置していることで、樹脂のみにより半導体素子が支持されていることを意味する。
【０００７】
本発明の樹脂封止型半導体装置の製造方法は、請求項１に記載の樹脂封止型半導体装置の製造方法であって、順に、（ａ）１つの樹脂封止型半導体装置の端子部材の配置に対応した、端子部材の配置を１単位として、ハーフエッチング技術を用いたエッチング加工にて、端子部材の外部端子部側を支持部で連結した状態で、面付けして形成し、面付け形成された加工シートを得る加工工程と、（ｂ）接続用の表面めっきを施すめっき処理工程と、（ｃ）面付け形成された加工シートのハーフエッチング面側ではない側を、平板状の真空引き板にて真空引きし、加工シートを真空引き板に密着させた状態で、面付け分だけ、半導体素子を所定の位置に位置決めして、その端子面側ではない裏面を真空引きして、真空引き板に搭載する半導体素子搭載工程と、（ｄ）この状態で、各半導体素子について、その端子と端子部材の内部端子部の端子面とをワイヤボンディング接続するワイヤボンディング工程と、（ｅ）真空引き板を外し、これに代え、モールド用のテープを、加工シートのハーフエッチング面側ではない側を覆うように、平面状に貼り、半導体素子の裏面をテープにて貼り固定するテープ貼り工程と、（ｆ）表裏をモールド固定用の平板にて挟み、加工シート全体について、一括してモールドを行う、一括モールド工程と、（ｇ）表裏のモールド固定用の平板、テープを除去し、切断用のテープを貼り、該切断用のテープとは反対側からダイシングソーにて切断して、樹脂封止型半導体装置を１個づつに個片化して得る個片化工程と、を行うことを特徴とするものである。
そして、上記の樹脂封止型半導体装置の製造方法において、平板状の真空引き板が、全面に真空吸着用の孔を配設したものであることを特徴とするものである。
あるいは、本発明の樹脂封止型半導体装置の製造方法は、請求項１に記載の樹脂封止型半導体装置の製造方法であって、順に、（Ａ）１つの樹脂封止型半導体装置の各端子部材の配置に対応した、端子部材の配置を１単位として、ハーフエッチング技術を用いたエッチング加工にて、端子部材の外部端子部側を支持部で連結した状態で、面付けして形成し、面付け形成された加工シートを得る加工工程と、（Ｂ）接続用の表面めっきを施すめっき処理工程と、（Ｃ）面付け形成された加工シートのハーフエッチング面側ではない側を覆うようにモールド用のテープを貼り、面付け分だけ、半導体素子を所定の位置に位置決めして、その端子面側ではない裏面を前記テープに貼り付け搭載する半導体素子搭載工程と、（Ｄ）この状態で、各半導体素子について、その端子と端子部材の内部端子部の端子面とをワイヤボンディング接続するワイヤボンディング工程と、（Ｅ）表裏をモールド固定用の平板にて挟み、加工シート全体について、一括してモールドを行う、一括モールド工程と、（Ｆ）表裏のモールド固定用の平板、テープを除去し、切断用のテープを貼り、該切断用のテープとは反対側からダイシングソーにて切断して、樹脂封止型半導体装置を１個づつに個片化して得る個片化工程と、を行うことを特徴とするものである。
【０００８】
本発明の積層型樹脂封止型半導体装置は、上記本発明の樹脂封止型半導体装置の１つ以上を、複数、積層したもので、それぞれ、上側の樹脂封止型半導体装置の下側の外部端子部の端子面と、下側の樹脂封止型半導体装置の上側の外部端子部の端子面とを、重ね合せて電気的に接続していることを特徴とするものである。
そして、上記の積層型樹脂封止型半導体装置において、樹脂封止型半導体装置の２つ以上が互いにその側面同志を合せて電気的に接続していることを特徴とするものである。
そしてまた、上記の積層型樹脂封止型半導体装置において、上側の樹脂封止型半導体装置の外部端子部の側面の端子面と、下側の樹脂封止型半導体装置の外部端子部の側面の端子面とを、電気的に接続していることを特徴とするものである。
【０００９】
【作用】
本発明の樹脂封止型半導体装置は、このような構成にすることにより、、半導体部品の更なる薄型化を廉価に達成できるパッケージの提供を可能としており、特に、システムパッケージをスタック構造にて実現するための薄型の樹脂封止型半導体装置で、且つ、量産性の良い構造のものの提供を可能としている。
そして、これにより、システムパッケージをスタック構造にて実現する積層型樹脂封止型半導体装置の提供を可能としている。
即ち、ハーフエッチング法にて作製され、外部端子部の少なくとも一部を加工用素材の厚さの厚肉にし、内部端子部をハーフエッチングにて薄肉にしている端子部材と、前記加工用素材の厚さより薄い半導体素子とを用い、ダイパッドのない構造で、半導体素子の端子面側でない面を露出し、加工用素材の厚さ幅内に全体を収めて樹脂封止していることにより、半導体素子自体の厚さの薄化に対応して、薄型化が達成できるものとしている。
具体的には、各端子部材の内部端子部は、そのハーフエッチング面側を端子面とし、各端子部材を同じ向きにし、外部端子部の表裏の面および内部端子部の端子面が、それぞれ、一平面上に、揃うようにして、周辺部に、内部端子部側を内側に向け、各端子部材を配し、外部端子部の表裏面と外側側面とを端子面として露出させており、半導体素子を、各端子部材の内部端子部から離れた位置に、その端子面を、端子部材のハーフエッチング面側と同じ向きにして、且つ、その端子面でない側の面である裏面を、各端子部材のハーフエッチング面に対向する側の面に、揃えて、ダイパッドなしで、樹脂中に、前記裏面を露出させるようにして、配置していることにより、これを達成している。
また、ワイヤボンディング接続をとっていることにより、接続作業性を良いものとし、且つ、接続信頼性を良いものとしている。
また、後述する、本発明の樹脂封止型半導体装置の製造方法により、面付け状態で作製でき、量産性の良い構造といえる。
外部端子部の外側側面部に切り欠け部を設けていることにより、個片化の際の切断を容易なものとしている。
特に、樹脂封止工程（モールド工程）においては、特別な形状にキャビティーを設ける必要はなく、平板状のものでその両側を抑えた状態で一括モールドが簡単に行え、量産性、設備の面からも好ましい構造と言える。
端子部材としては、Ｃｕ、Ｃｕ系合金、４２％Ｎｉ−Ｆｅ系合金からなるものが挙げられる。
また、内部端子部の端子面および外部端子部の表裏の端子面に、半田めっき層、金めっき層、銀めっき層、パラジウムめっき層、錫めっき層から選ばれた１つの金属めっき層を、接続用のめっき層としていることにより、ワイヤボンディング接続を信頼性良いものとしている。
また、半導体素子の端子面側でない面を露出させるようにして、配置していることにより、ダイパッドレスからパッケージ内の半導体素子上のレジン厚を増し、組み立て加工し易いものとしており、より放熱性に優れるものとしている。
【００１０】
本発明の樹脂封止型半導体装置の製造方法は、このような構成にすることにより、請求項１の発明の薄型の樹脂封止型半導体装置を、量産性良く製造できるものとしている。
【００１１】
本発明の積層型樹脂封止型半導体装置は、このような構成にすることにより、システムパッケージを、樹脂封止型半導体装置を積層したスタック構造にて実現できる積層型樹脂封止型半導体装置の提供を可能としている。
【００１２】
【発明の実施の形態】
本発明の実施の形態を図に基づいて説明する。
図１（ａ）は本発明の樹脂封止型半導体装置の実施の形態の第１の例の一部断面図で、図１（ｂ）は図１（ａ）のＡ１側から透視してみた図で、 図２（ａ）は本発明の樹脂封止型半導体装置の実施の形態の第２の例の一部断面図で、図２（ｂ）は図２（ａ）のＢ１側から透視してみた図で、図３は本発明の樹脂封止型半導体装置の製造方法の実施の形態の第１の例の製造工程断面図で、図４は本発明の樹脂封止型半導体装置の製造方法の実施の形態の第２の例の製造工程断面図で、図５は本発明の積層型樹脂封止型半導体装置の実施の形態の第１の例の断面図で、図６は本発明の積層型樹脂封止型半導体装置の実施の形態の第２の例の断面図で、図７は本発明の積層型樹脂封止型半導体装置の実施の形態の第３の例の断面図で、図８は本発明の積層型樹脂封止型半導体装置の実施の形態の第４の例の断面図で、図９（ａ）（ロ）は本発明の積層型樹脂封止型半導体装置の実施の形態の第４の例の断面図で、図９（ａ）（イ）は図９（ａ）（ロ）のＤ１側から透視してみた図で、図９（ｂ）（ロ）は本発明の積層型樹脂封止型半導体装置の実施の形態の第４の例の断面図で、図９（ｂ）（イ）は図９（ｂ）（ロ）のＤ２側から透視してみた図で、図１０はダイシングソーによる切断状態を示した図である。
尚、図１（ａ）は図１（ｂ）のＡ１−Ａ２側から見た図で、図２（ａ）は図２（ｂ）のＢ１−Ｂ２側から見た図であり、図３〜図９においては、分かり易くするために、半導体素子の端子部は省略して示している。
また、図３（ｈ）、図４（ｉ）における両方向矢印は、ダイシングソーの昇降方向を示している。
図１〜図１０中、１０１〜１０４、１０１ａ〜１０４ａ、１０１ｂ〜１０４ｂ、１０１ｃ〜１０４ｃは樹脂封止型半導体装置、１１０は端子部材、１１１は外部端子部、１１１ａ、１１１ｂ、１１１ｃは端子面、１１２は内部端子部、１１２ａは端子面（ハーフエッチング面）、１１３は連結部、１１４は切り欠け部、１２０は半導体素子（半導体チップあるいは単にチップとも言う）、１２１は端子、１３０はボンディングワイヤ、１４０は封止用樹脂、２１０は加工用素材、２１０Ａは加工シート、２２０はレジスト、２３０は端子部材、２３１は外部端子部、２３２は内部端子部、２３３は連結部、２３５は支持部（連結部とも言う）、２３７は凹部、２３７Ａは切り欠け部、２４０は平板状の多孔板（真空引き板とも言う）、２５０は半導体素子、２６０はボンディングワイヤ、２７０は（固定用、モールド用の）テープ、２７５は（ダイシング用の）テープ、２８０は封止用樹脂、３０１は単位の樹脂封止型半導体装置、３１０は加工用素材、３１０Ａは加工シート、３１５は枠部、３１６は治具孔、３１７は長孔部、３２０はレジスト、３３０は端子部材、３３５は支持部（連結部とも言う）、３３７は凹部、３３７Ａは切り欠け部、３４０は（固定用、モールド用の）テープ、３４５は（切断用の）テープ、３５０は半導体素子、３６０はボンディングワイヤ、３７１、３７２はモールド固定用の平板、３８０は封止用樹脂、３８５は切断ライン、４０１〜４０８は樹脂封止型半導体装置、４３０は端子部材、４５０は半導体素子、４６０はボンディングワイヤ、５０１〜５０８は樹脂封止型半導体装置、５３０は端子部材、５５０は半導体素子、５６０はボンディングワイヤである。
である。
【００１３】
はじめに、本発明の樹脂封止型半導体装置の実施の形態の第１の例を図１に基づいて説明する。
第１の例は、加工用素材（図示していない）から、外部回路と接続するための外部端子部を加工用素材の厚さの厚肉にして、半導体素子と接続するための内部端子部をハーフエッチングにて薄肉にして、且つ、外部端子部と内部端子部とを一体的に連結してエッチング加工された端子部材１１０を、複数個と、前記加工用素材の厚さより薄い半導体素子１２０とを用い、半導体素子１２０の所定の端子部１２１と所定の端子部材１１０の内部端子部１１２とをワイヤボンディング１３０にて接続して、前記加工用素材の厚さ幅内に全体を収め、加工用素材の厚さ幅に揃えて樹脂封止した、平板状方形の、積層型樹脂封止型半導体装置用の樹脂封止型半導体装置である。
各端子部材１１０の内部端子部１１２は、そのハーフエッチング面側を端子面１１２ａとし、各端子部材１１０を同じ向きにし、外部端子部１１１の表裏の面１１１ａ、１１１ｂおよび内部端子部１１２の端子面１１２ａが、それぞれ、一平面上に、揃うようにし、周辺部に、内部端子部１１２側を内側に向けて、各端子部材１１０を配しており、外部端子部１１１の表裏面と外側側面とを端子面（１１１ａ，１１１ｂ、１１１ｃ）として露出させている。
また、半導体素子１２０を、各端子部材１１０の内部端子部１１１から離れた位置に、その端子１２１側の面である端子面を、端子部材１１０のハーフエッチング面側と同じ向きにして、且つ、その端子面でない側の面である裏面を、各端子部材１１０のハーフエッチング面に対向する側の面に、揃えて、ダイパッドなしで、樹脂中に、前記裏面を露出させるようにして、配置している。
【００１４】
本例は、ダイパッドのない構造で、半導体素子の端子面側でない面を露出し、加工用素材の厚さ幅内に全体を収めて樹脂封止していることにより、半導体素子自体の厚さを薄化に対応して、薄型化が達成できる。
例えば、端子部材１１０の加工用素材の板厚を０． ２ｍｍ厚とした場合、０． １ｍｍ〜０． ０２５ｍｍ厚の半導体素子を用いることにより、本例の樹脂封止型半導体装置を加工用素材の板厚０． ２ｍｍにすることができる。
また、本例においては、ワイヤボンディング接続をとっていることにより、接続作業性を良いものとし、且つ、接続信頼性を良いものとしている。
また、本例は、後述する、（図３、図４に示す）本発明の樹脂封止型半導体装置の製造方法により、面付け状態で作製できる、量産性に適した構造といえる。
また、本例は、樹脂封止工程（モールド工程）においては、特別な形状にキャビティーを設ける必要はなく、平板状のものでその両側を抑えた状態でモールドが簡単に行える構造で、設備の面からも好ましい構造と言える。
【００１５】
端子部材１１０は、Ｃｕ、Ｃｕ系合金、４２％Ｎｉ−Ｆｅ系合金等が挙げられるが、通常は、導電性等から、Ｃｕ、Ｃｕ系合金が用いられる。
第１の例においては、外部端子部１１１の外側側面の端子面１１１ｃは切断部で、それ以外の表面には、接続用のめっき層が設けられている。
接続用のめっき層としては、半田めっき層、金めっき層、銀めっき層、パラジウムめっき層、錫めっき層から選ばれた１つの金属めっき層が用いられる。
封止用樹脂１４０としては、通常、エポキシ系のものが用いられるが、これに限定はされない。
【００１６】
次に、本発明の樹脂封止型半導体装置の実施の形態の第２の例を図２に基づいて説明する。
第２の例の樹脂封止型半導体装置も、第１の例と、同様、加工用素材（図示していない）から、外部回路と接続するための外部端子部を加工用素材の厚さの厚肉にして、半導体素子と接続するための内部端子部をハーフエッチングにて薄肉にして、且つ、外部端子部と内部端子部とを一体的に連結してエッチング加工された端子部材１１０を、複数個と、前記加工用素材の厚さより薄い半導体素子１２０とを用い、半導体素子１２０の所定の端子部１２１と所定の端子部材１１０の内部端子部１１２とをワイヤボンディング１３０にて接続して、前記加工用素材の厚さ幅内に全体を収め、加工用素材の厚さ幅に揃えて樹脂封止した、平板状方形の、積層型樹脂封止型半導体装置用の樹脂封止型半導体装置で、第１の例において、半導体素子を、第１の例とは異なり、端子をその中心に１列にその対向する２辺に沿うように設けたものに代えて、ワイヤボンディング接続したものである。
それ以外は、第１の例と同じで、各部についても同じものを用いた。
【００１７】
本例における半導体素子１２０はその周辺の対向する２辺に沿い端子１２１を設けているため、これに合せて、端子部材１１０を半導体装置の周辺２辺に沿い配しているが、これに限定はされない。
第１の例、第２の例の樹脂封止型半導体装置の変形例としては、その周辺４辺に沿い端子を設けた半導体素子を用い、端子部材を半導体装置の周辺４辺に沿い配しているものも挙げられる。
【００１８】
第１の例の樹脂封止型半導体装置は、例えば、図５のように、同サイズのもの４個を積層して、積層型樹脂封止型半導体装置として用いられる。
また、第２の例の樹脂封止型半導体装置は、例えば、図６のように、同サイズのもの４個を積層して、積層型樹脂封止型半導体装置として用いられる。
これらの積層型樹脂封止型半導体装置の場合、それぞれ、上側の樹脂封止型半導体装置の下側の外部端子部の端子面と、下側の樹脂封止型半導体装置の上側の外部端子部の端子面とを、重ね合せて電気的に接続している。
また、例えば、図７に示すように、同サイズの、第１の例の樹脂封止型半導体装置と第２の例の樹脂封止型半導体装置とを用いて、これらを重ね、積層型樹脂封止型半導体装置として用いられる。
あるいはまた、例えば、図８に示すように、第１の例の樹脂封止型半導体装置、第２の例の樹脂封止型半導体装置の、異サイズのものを重ね、積層型樹脂封止型半導体装置として用いられる。
【００１９】
更に、例えば、図９（ａ）に示すように、同サイズの、８個の第１の例の樹脂封止型半導体装置４０１〜４０８を用いて、横方向に２個を互いに向きを逆にして、その側面同志を合せて電気的に接続したものを更に４層重ねした構造の積層型樹脂封止型半導体装置も挙げられる。
また、図９（ｂ）に示すように、同サイズの、８個の第２の例の樹脂封止型半導体装置５０１〜５０８を用いて、横方向に２個を互いに向きを同じにして、その側面同志を合せて電気的に接続したものを更に４層重ねした構造の積層型樹脂封止型半導体装置も挙げられる。
接続される側面同志は導電性ペーストにより接続される。
この場合、図９（ａ）、図９（ｂ）において、各外部端子部▲１▼〜▲８▼については、例えば、▲１▼を電源端子、▲２▼をグランド端子、▲３▼〜▲７▼をＩ／Ｏ端子、▲８▼をスイッチ端子とし、側面同志の接続、ワイヤボンディング接続は回路的に問題のないようにする。
尚、重ねる樹脂封止型半導体装置の層数としては、４層に限定はされない。
また、第１の例の、あるいは第２の例の樹脂封止型半導体装置を３つ以上を互いにその側面同志を合せて電気的に接続したものも挙げられ、更に、これを２層以上にしたものも挙げられる。
更に、上記のものに、上下の樹脂封止型半導体装置の側面を接続用に用いる形態を併用したものも挙げられる。
【００２０】
次いで、第１の例の樹脂封止型半導体装置の製造方法の１例を図３に基づいて説明する。
尚、これを以って、本発明の樹脂封止型半導体装置の製造方法の１例の説明に代える。
先ず、加工用素材２１０の両面に所定形状にレジスト２２０を配設し（図３（ａ））、１つの樹脂封止型半導体装置の端子部材の配置に対応した、端子部材の配置を１単位として、この配置状態に、ハーフエッチング技術を用いたエッチング加工法にて、両面からエッチングを行い、端子部材２３０を、支持部２３５にて連結した状態で、面付けして形成する。（図３（ｂ））
これにより、１つの樹脂封止型半導体装置の端子部材の配置に対応した、端子部材の配置を１単位として、これが支持部２３５にて連結され面付けされた、加工シート２１０Ａを得る。
加工用素材２１０としては、Ｃｕ、Ｃｕ系合金、４２合金（Ｎｉ４２％−Ｆｅ合金）等が用いられ、エッチング液としては、塩化第二鉄溶液が用いられる。
また、レジスト２２０としては、耐エッチング性のもので、所望の解像性を有し、処理性の良いものであれば特に限定はされない。
次いで、レジスト２２０を除去後、洗浄処理等を施し、全面に接続用の表面めっきを施した（図示していない）後、面付け形成され、表面めっきが施された加工シート２１０Ａのハーフエッチング面側ではない側を平板状の多孔板２４０にて真空引きし、加工シート２１０Ａを多孔板２４０に密着させた状態で（図３（ｃ））、面付け分の数だけ、半導体素子２５０を所定の位置に位置決めして、その端子面側ではない裏面を真空引き用の多孔板２４０にて真空引きして、該多孔板２４０に搭載する。（図３（ｄ））
尚、真空ポンプ、真空配管等、真空引き用の多孔板２４０の真空引き源は別にあるが、ここでは図示していない。
次いで、この状態で、各半導体素子２５０について、その端子（図１の１２１に相当）と端子部材２３０の内部端子部（図１の１１２に相当）のハーフエッチング面である端子面とをワイヤボンディング接続する。（図３（ｅ））
次いで、多孔板２４０を外し、これに代え、モールド用のテープ２７０を、加工シート２１０Ａのハーフエッチング面側ではない側を覆うように、平面状に貼り、半導体素子２５０の裏面をテープ２７０にて貼り固定、表裏をモールド固定用の平板（図示していない）にて挟み、加工シート２１０Ａ全体について、一括してモールドを行い、表裏のモールド固定用の平板を取り外す。（図３（ｆ））尚、加工シート２１０Ａの端子部材２３０を支持する支持部２３５は、通りぬけ孔等を設けたもので、モールドの際、各面付け間モールド用の樹脂が通りぬけできるような形状になっている。
次いで、モールド用のテープ２７０を剥がし、切断用のテープ２７５を貼り、（図３（ｇ））該切断用のテープ２７５とは反対側からダイシングソー（図示していない）にて切断して（図３（ｈ））、樹脂封止型半導体装置を１個づつに個片化して得る。（図３（ｉ））
ダイシングソー（図示していない）による切断は、（図３（ｈ）に示すように、凹部２３７にて行うもので、この部分は加工用素材の厚さより薄肉で、容易に切断できるものとしている。
ダイシングソー（図示していない）による切断状態は、例えば、図１０（ａ）や、図１０（ｂ）のようになる。
尚、図１０において、単位の樹脂封止型半導体装置３０１は、切断ライン３８５にて互いに分けられた各領域であり、ここでは、説明を分かり易くするため図示していないが、図３の支持部２３５を凹部２３７で切断する。
加工シート３１０Ａは、フレームとも呼ばれる。
また、この切断面が、作製される樹脂封止型半導体装置の外部端子の外側側面となる。
尚、切り欠け部２３７Ａの切断された面でない面には接続用のめっきが配設されておりこの部分は接続用に利用し易い。
このようにして、図１に示す第１の例の樹脂封止型半導体装置は製造することができる。
【００２１】
次いで、第１の例の樹脂封止型半導体装置の製造方法の別の１例を図４に基づいて説明する。
尚、これを以って、本発明の樹脂封止型半導体装置の製造方法の１例の説明に代える。
先ず、加工用素材３１０の両面に所定形状にレジスト３２０を配設し（図４（ａ））、１つの樹脂封止型半導体装置の端子部材の配置に対応した、端子部材の配置を１単位として、この配置状態に、ハーフエッチング技術を用いたエッチング加工法にて、両面からエッチングを行い、端子部材３３０を、支持部３３５にて連結した状態で、面付けして形成する。（図４（ｂ））
これにより、１つの樹脂封止型半導体装置の端子部材の配置に対応した、端子部材の配置を１単位として、これが支持部２３５にて連結され面付けされた、加工シート２１０Ａを得る。
次いで、レジスト３２０を除去後、洗浄処理等を施し、全面に接続用の表面めっきを施した（図示していない）後、面付け形成され、表面めっきが施された加工シート３１０Ａのハーフエッチング面側ではない側を覆うようにモールド用のテープ３４０を貼り（図４（ｃ））、面付け分の数だけ、半導体素子３５０を所定の位置に位置決めして、その端子面側ではない裏面を前記テープ３４０に貼り付け搭載する。（図４（ｄ））
次いで、この状態で、各半導体素子について、その端子と端子部材の内部端子部の端子面とをワイヤボンディング接続する。（図４（ｅ））
次いで、表裏をモールド固定用の平板３７１、３７２にて挟み、加工シート３１０Ａ全体について、一括してモールドを行う。（図４（ｆ））
次いで、表裏のモールド固定用の平板３７１、３７２を除去し（図４（ｇ））、更にテープ３４０を除去し、切断用のテープ３４５を貼り（図４（ｈ））、該切断用のテープ３４５とは反対側からダイシングソー（図示していない）にて切断して（図４（ｉ））、樹脂封止型半導体装置を１個づつに個片化して得る。（図４（ｊ））
尚、図４に示す製造方法においても、各工程の処理、各部材等は基本的に図３に示す製造方法に準じるもので、ここでは、説明を省いている。
このようにして、図１に示す第１の例の樹脂封止型半導体装置は製造することができる。
【００２２】
【発明の効果】
本発明は、上記のように、更なる薄型化を廉価に達成でき、且つ、量産性に適した構造の樹脂封止型半導体装置の提供を可能とした。
更に、このよう薄型の樹脂封止型半導体装置を複数積層した、積層型樹脂封止型半導体装置の提供を可能とした。
これにより、いわゆるスタック構造にてシステムパッケージを実現できるものとした。
これと同時に、このような薄型の樹脂封止型半導体装置の製造方法の提供を可能とした。
【図面の簡単な説明】
【図１】図１（ａ）は本発明の樹脂封止型半導体装置の実施の形態の第１の例の一部断面図で、図１（ｂ）は図１（ａ）のＡ１側から透視してみた図である。
【図２】図２（ａ）は本発明の樹脂封止型半導体装置の実施の形態の第２の例の一部断面図で、図２（ｂ）は図２（ａ）のＢ１側から透視してみた図である。
【図３】本発明の樹脂封止型半導体装置の製造方法の実施の形態の第１の例の製造工程断面図である。
【図４】本発明の樹脂封止型半導体装置の製造方法の実施の形態の第２の例の製造工程断面図である。
【図５】本発明の積層型樹脂封止型半導体装置の実施の形態の第１の例の断面図である。
【図６】本発明の積層型樹脂封止型半導体装置の実施の形態の第２の例の断面図である。
【図７】本発明の積層型樹脂封止型半導体装置の実施の形態の第３の例の断面図である。
【図８】本発明の積層型樹脂封止型半導体装置の実施の形態の第４の例の断面図である。
【図９】図９（ａ）（ロ）は本発明の積層型樹脂封止型半導体装置の実施の形態の第４の例の断面図で、図９（ａ）（イ）は図９（ａ）（ロ）のＤ１側から透視してみた図で、図９（ｂ）（ロ）は本発明の積層型樹脂封止型半導体装置の実施の形態の第４の例の断面図で、図９（ｂ）（イ）は図９（ｂ）（ロ）のＤ２側から透視してみた図である。
【図１０】ダイシングソーによる切断状態を示した図である。
【符号の説明】
１０１〜１０４ 樹脂封止型半導体装置
１０１ａ〜１０４ａ 樹脂封止型半導体装置
１０１ｂ〜１０４ｂ 樹脂封止型半導体装置
１０１ｃ〜１０４ｃ 樹脂封止型半導体装置
１１０ 端子部材
１１１ 外部端子部
１１１ａ、１１１ｂ、１１１ｃ 端子面
１１２ 内部端子部
１１２ａ 端子面（ハーフエッチング面）
１１３ 連結部
１１４ 切り欠け部
１２０ 半導体素子（半導体チップあるいは単にチップとも言う）
１２１ 端子
１３０ ボンディングワイヤ
１４０ 封止用樹脂
２０１ 単位の樹脂封止型半導体装置
２１０ 加工用素材
２１０Ａ 加工シート
２２０ レジスト
２３０ 端子部材
２３１ 外部端子部
２３２ 内部端子部
２３３ 連結部
２３５ 支持部（連結部とも言う）
２３７ 凹部
２３７Ａ 切り欠け部
２４０ 平板状の多孔板（真空引き板とも言う）
２５０ 半導体素子
２６０ ボンディングワイヤ
２７０ （固定用、モールド用の）テープ
２７５ （ダイシング用の）テープ
２８０ 封止用樹脂
３０１ 単位の樹脂封止型半導体装置、
３１０ 加工用素材
３１０Ａ 加工シート
３１５ 枠部
３１６ 治具孔
３１７ 長孔部
３２０ レジスト
３３０ 端子部材
３３５ 支持部（連結部とも言う）
３３７ 凹部
３３７Ａ 切り欠け部
３４０ （固定用、モールド用の）テープ
３４５ （切断用の）テープ
３５０ 半導体素子
３６０ ボンディングワイヤ
３７１、３７２ モールド固定用の平板
３８０ 封止用樹脂
３８５ 切断ライン
４０１〜４０８ 樹脂封止型半導体装置
４３０ 端子部材
４５０ 半導体素子
４６０ ボンディングワイヤ
５０１〜５０８ 樹脂封止型半導体装置
５３０ 端子部材
５５０ 半導体素子
５６０ ボンディングワイヤ[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a small and thin resin-sealed semiconductor device using a terminal portion formed by etching, and a stacked resin-sealed semiconductor device having a structure in which such semiconductor devices are stacked.
[0002]
[Prior art]
In recent years, in order to respond to the miniaturization of electronic devices, it has been required to mount semiconductor components mounted on electronic devices at a high density, and accordingly, semiconductor components have become smaller and thinner. There is a demand for a package that can achieve a thinner device at a lower cost.
Under such circumstances, a resin-sealed semiconductor device having a structure in which the upper and lower surfaces of connection leads are exposed as disclosed in JP-A-11-307675, JP-A-260989 proposes a resin-sealed semiconductor device in which a part of a connection lead is exposed and used as an external terminal.
On the other hand, the development of a one-chip system LSI has been actively pursued, but since wiring is developed in two dimensions, there is a limit to speeding up by shortening the wiring. This is the actual situation, and recently, instead of this, attempts have been made to realize a system LSI with a package in which semiconductor elements are stacked in a three-dimensional direction.
Such a package is also called a system package.
[0003]
Japanese Patent Application Laid-Open No. 11-307675 discloses a so-called stacked-layered resin in which the resin-encapsulated semiconductor devices described in the above are stacked and electrically connected by connection leads having upper and lower surfaces thereof exposed. Although an encapsulated semiconductor device is also described, the resin-encapsulated semiconductor device described herein has a die pad and is not sufficiently thin.
The resin-sealed semiconductor device described in Japanese Patent Application Laid-Open No. 11-260989 cannot have a stack structure.
Also, Japanese Patent Application Laid-Open No. 2002-33434 describes a package in which semiconductor elements (chips) are stacked in a package. However, this structure has a low degree of freedom and is difficult to be widely used.
[0004]
[Patent Document 1]
JP-A-11-307675
[Patent Document 2]
JP-A-11-260989
[Patent Document 3]
JP-A-2002-33434
[0005]
[Problems to be solved by the invention]
As described above, in recent years, semiconductor components have been reduced in size and thickness, and packages that can achieve further reduction in thickness at low cost have been demanded. In order to realize this in a so-called stack structure in which the resin-encapsulated semiconductor devices are stacked, it is necessary to further reduce the thickness of each resin-encapsulated semiconductor device, and this has been required.
The present invention is intended to provide a package that can achieve a further reduction in thickness of a semiconductor component at a low cost, and more specifically, a plurality of resin-encapsulated semiconductor devices are stacked. It is intended to provide a laminated resin-encapsulated semiconductor device that realizes a system package with a so-called stack structure, and to provide a thin resin-encapsulated semiconductor device with good mass productivity for this purpose. Things.
It is intended to provide a semiconductor device having a structure suitable for mass production, which can achieve further thinning of semiconductor parts at low cost, and further stacks a plurality of such thin resin-encapsulated semiconductor devices to form a so-called semiconductor device. An object of the present invention is to provide a laminated resin-encapsulated semiconductor device capable of realizing a system package with a stack structure.
At the same time, an object is to provide a method for manufacturing such a thin resin-encapsulated semiconductor device.
[0006]
[Means for Solving the Problems]
The resin-encapsulated semiconductor device according to the present invention is a terminal member formed by integrally connecting an external terminal portion for connecting to an external circuit and an internal terminal portion for connecting to a semiconductor element with a connecting portion. And, using a half-etching processing method, from the processing material, at least a portion of the external terminal portion to the thickness of the processing material thickness, the terminal member is thinned the internal terminal portion by half etching A plurality of semiconductor elements having a thickness smaller than the thickness of the processing material, and wire bonding connection between a predetermined terminal portion of the semiconductor element and an internal terminal portion of a predetermined terminal member, to thereby obtain a thickness of the processing material. A resin-encapsulated semiconductor device which is entirely enclosed within the width and is resin-encapsulated in accordance with the thickness and width of the processing material, and the internal terminal portion of each terminal member has a half-etched surface side as a terminal surface, Orient each terminal member in the same direction Each terminal member is arranged so that the front and back surfaces of the part and the terminal surface of the internal terminal part are aligned on one plane, and the internal terminal part side is directed inward in the peripheral part. The front and back surfaces and the outer side surface of the portion are exposed as terminal surfaces, and the semiconductor element is located at a position away from the internal terminal portion of each terminal member, and the terminal surface is the same as the half-etched surface side of the terminal member. Orientation, and the back surface that is the non-terminal surface is aligned with the surface facing the half-etched surface of each terminal member, so that the back surface is exposed in the resin without a die pad. And is arranged.
Further, in the above-mentioned resin-sealed semiconductor device, a cutout portion is provided on an outer side surface portion of the external terminal portion.
Further, in the above-described resin-sealed semiconductor device, the terminal member is made of Cu, a Cu-based alloy, or a 42% Ni-Fe-based alloy.
In the above resin-encapsulated semiconductor device, the terminal surfaces of the internal terminal portions and the front and back terminal surfaces of the external terminal portions may be selected from a solder plating layer, a gold plating layer, a silver plating layer, a palladium plating layer, and a tin plating layer. The obtained one metal plating layer is used as a plating layer for connection.
Note that, here, "without a die pad, disposed in a resin such that the back surface is exposed" means that the back surface of the semiconductor element is exposed without providing a support portion of the semiconductor element, and The arrangement inside means that the semiconductor element is supported only by the resin.
[0007]
The method for manufacturing a resin-encapsulated semiconductor device according to the present invention is the method for manufacturing a resin-encapsulated semiconductor device according to claim 1, wherein (a) the terminal member of one resin-encapsulated semiconductor device is sequentially arranged. With the arrangement of the terminal members corresponding to the arrangement as one unit, by performing an etching process using a half-etching technique, the external terminal portion side of the terminal member is connected to the support portion by a support portion, and formed by imposition. A processing step of obtaining the formed processing sheet, (b) a plating processing step of performing surface plating for connection, and (c) a flat-plate-shaped vacuum on the side other than the half-etched surface side of the formed processing sheet. Vacuuming with a pulling plate, in a state where the processing sheet is in close contact with the vacuum drawing plate, positioning the semiconductor element at a predetermined position by the amount of imposition, and vacuuming the back surface other than the terminal surface side, Semiconductor element mounted on vacuum plate Mounting step, (d) wire bonding step of wire bonding connection between the terminal of each semiconductor element and the terminal surface of the internal terminal portion of the terminal member in this state, and (e) removing the evacuated plate, Alternatively, a tape for molding is applied in a planar shape so as to cover the side other than the half-etched surface side of the processing sheet, and a tape attaching step of attaching and fixing the back surface of the semiconductor element with tape; A batch molding step in which the entire processing sheet is sandwiched between fixing flat plates and collectively molded, and (g) the mold fixing flat plate and tape on the front and back are removed, a cutting tape is attached, and the cutting is performed. A dicing saw for cutting the resin-sealed semiconductor device into individual pieces one by one from the side opposite to the tape for use.
In the above-described method for manufacturing a resin-sealed semiconductor device, the flat vacuum plate is provided with holes for vacuum suction on the entire surface.
Alternatively, the method for manufacturing a resin-encapsulated semiconductor device according to the present invention is the method for manufacturing a resin-encapsulated semiconductor device according to claim 1, wherein (A) one of each of the one resin-encapsulated semiconductor device With the arrangement of the terminal members corresponding to the arrangement of the terminal members as one unit, the external terminal portion side of the terminal member is connected to the support portion by an etching process using a half-etching technique, and the surface is formed. And (B) a plating step of applying surface plating for connection, and (C) a step of covering the side other than the half-etched surface of the processed sheet having the imposition formed thereon. A semiconductor element mounting step of attaching a molding tape to a predetermined position, positioning the semiconductor element at a predetermined position by an amount corresponding to the imposed area, and attaching the back surface, not the terminal surface side, to the tape, and (D) this state. In each semi For the element, a wire bonding step of wire-bonding the terminal of the element and the terminal surface of the internal terminal portion of the terminal member, and (E) sandwiching the front and back surfaces with a flat plate for fixing the mold and collectively molding the entire processing sheet. Performing a batch molding process, (F) removing the flat and tape for fixing the mold on the front and back, attaching a cutting tape, and cutting with a dicing saw from the side opposite to the cutting tape, and sealing the resin. And performing a singulation step of singulating the fixed semiconductor device one by one.
[0008]
The laminated resin-encapsulated semiconductor device of the present invention is obtained by laminating one or more of the above-described resin-encapsulated semiconductor devices of the present invention. The terminal surface of the external terminal portion and the terminal surface of the external terminal portion on the upper side of the lower resin-sealed semiconductor device are overlapped and electrically connected.
Further, in the above-mentioned laminated resin-sealed semiconductor device, two or more of the resin-sealed semiconductor devices are electrically connected to each other with their side surfaces aligned.
Further, in the above-mentioned laminated resin-encapsulated semiconductor device, the terminal surface on the side surface of the external terminal portion of the upper resin-encapsulated semiconductor device and the side surface of the external terminal portion on the lower resin-encapsulated semiconductor device The terminal surface is electrically connected.
[0009]
[Action]
The resin-encapsulated semiconductor device of the present invention has such a configuration, thereby enabling the provision of a package capable of achieving a further reduction in the thickness of semiconductor components at low cost. It is possible to provide a thin resin-encapsulated semiconductor device to be realized and having a structure with good mass productivity.
Thus, it is possible to provide a laminated resin-sealed semiconductor device that realizes a system package with a stack structure.
That is, a terminal member which is manufactured by a half-etching method, at least a part of the external terminal portion is thickened to a thickness of the processing material, and the internal terminal portion is thinned by half-etching, By using a semiconductor element thinner than the thickness, with a structure without a die pad, exposing the surface that is not the terminal side of the semiconductor element, and enclosing the whole within the thickness width of the processing material, the semiconductor is sealed It is assumed that the thickness can be reduced in response to the reduction in the thickness of the element itself.
Specifically, the internal terminal portion of each terminal member has its half-etched surface side as a terminal surface, and each terminal member is oriented in the same direction, and the front and back surfaces of the external terminal portion and the terminal surface of the internal terminal portion are respectively On the same plane, the terminal members are arranged in the peripheral portion, with the internal terminal side facing inward, so that the front and back surfaces and the outer side surface of the external terminal portion are exposed as terminal surfaces, The element is placed at a position away from the internal terminal portion of each terminal member, the terminal surface is oriented in the same direction as the half-etched surface side of the terminal member, and the back surface, which is the non-terminal surface, is connected to each terminal. This is achieved by arranging the member so as to expose the back surface in a resin without a die pad, in alignment with the surface opposite to the half-etched surface of the member.
Further, by employing wire bonding connection, the connection workability is improved and the connection reliability is improved.
In addition, by the method for manufacturing a resin-sealed semiconductor device of the present invention, which will be described later, it can be manufactured in an imposed state, and it can be said that the structure has good mass productivity.
By providing a cutout portion on the outer side surface of the external terminal portion, it is easy to cut when individualizing.
In particular, in the resin sealing process (molding process), it is not necessary to provide a cavity in a special shape, and a batch molding can be easily performed with a flat plate-like shape with both sides suppressed. Therefore, it can be said that the structure is preferable.
Examples of the terminal member include those made of Cu, a Cu-based alloy, and a 42% Ni-Fe-based alloy.
In addition, one metal plating layer selected from a solder plating layer, a gold plating layer, a silver plating layer, a palladium plating layer, and a tin plating layer is connected to the terminal surface of the internal terminal portion and the front and back terminal surfaces of the external terminal portion. By using the plating layer for the wire bonding, the wire bonding connection is made highly reliable.
In addition, by arranging so that the surface of the semiconductor element that is not the terminal side is exposed, the resin thickness on the semiconductor element in the package is increased from die padless, making it easier to assemble and process. To be excellent.
[0010]
According to the method of manufacturing a resin-encapsulated semiconductor device of the present invention, with such a configuration, the thin resin-encapsulated semiconductor device of the first aspect of the present invention can be manufactured with good mass productivity.
[0011]
The stacked resin-encapsulated semiconductor device of the present invention has a configuration as described above, whereby a system package can be realized by a stack structure in which the resin-encapsulated semiconductor devices are stacked. It is possible to provide.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
An embodiment of the present invention will be described with reference to the drawings.
FIG. 1A is a partial cross-sectional view of a first example of an embodiment of a resin-sealed semiconductor device of the present invention, and FIG. 1B is seen through from the A1 side in FIG. 1A. FIG. 2A is a partial sectional view of a second example of the embodiment of the resin-sealed semiconductor device of the present invention, and FIG. 2B is a perspective view from the B1 side of FIG. 2A. FIG. 3 is a cross-sectional view showing a manufacturing process of a first embodiment of the method for manufacturing a resin-sealed semiconductor device of the present invention, and FIG. 4 is a cross-sectional view of the resin-sealed semiconductor device of the present invention. FIG. 5 is a cross-sectional view of a second example of a manufacturing method according to a second embodiment of the present invention, FIG. 5 is a cross-sectional view of a first example of the embodiment of the laminated resin-sealed semiconductor device of the present invention, and FIG. FIG. 7 is a cross-sectional view of a second embodiment of the laminated resin-sealed semiconductor device according to the present invention. FIG. 7 is a cross-sectional view of a third embodiment of the laminated resin-sealed semiconductor device according to the present invention. FIG. 8 shows the present invention. FIG. 9A is a cross-sectional view of a fourth example of the embodiment of the laminated resin-encapsulated semiconductor device of the present invention. FIG. 9 (a) and 9 (a) are views seen through from the D1 side of FIGS. 9 (a) and 9 (b), and FIGS. 9 (b) and 9 (b) are laminated resin of the present invention. FIG. 9B is a cross-sectional view of a fourth example of the embodiment of the encapsulated semiconductor device, in which FIG. 9B and FIG. 9A are perspective views seen from the D2 side in FIG. 9B and FIG. FIG. 3 is a diagram showing a cutting state by a dicing saw.
1A is a diagram viewed from the A1-A2 side in FIG. 1B, FIG. 2A is a diagram viewed from the B1-B2 side in FIG. 2B, and FIGS. In FIG. 9, terminal portions of the semiconductor element are omitted for simplicity.
Further, double-headed arrows in FIGS. 3 (h) and 4 (i) indicate the direction in which the dicing saw is moved up and down.
1 to 10, 101 to 104, 101a to 104a, 101b to 104b, 101c to 104c are resin-sealed semiconductor devices, 110 is a terminal member, 111 is an external terminal portion, 111a, 111b, 111c are terminal surfaces, 112 is an internal terminal portion, 112a is a terminal surface (half-etched surface), 113 is a connecting portion, 114 is a cutout portion, 120 is a semiconductor element (also referred to as a semiconductor chip or simply a chip), 121 is a terminal, 130 is a bonding wire, 140 is a sealing resin, 210 is a processing material, 210A is a processing sheet, 220 is a resist, 230 is a terminal member, 231 is an external terminal portion, 232 is an internal terminal portion, 233 is a connecting portion, 235 is a supporting portion (connecting portion). 237 is a concave portion, 237A is a cutout portion, 240 is a flat plate-shaped perforated plate (also called a vacuum plate), 250 A semiconductor element, 260 is a bonding wire, 270 is a tape (for fixing and molding), 275 is a tape (for dicing), 280 is a sealing resin, 301 is a resin-sealed semiconductor device of a unit, and 310 is processing Material, 310A is a processed sheet, 315 is a frame portion, 316 is a jig hole, 317 is a long hole portion, 320 is a resist, 330 is a terminal member, 335 is a supporting portion (also referred to as a connecting portion), 337 is a concave portion, 337A Is a cutout portion, 340 is a tape (for fixing and molding), 345 is a tape (for cutting), 350 is a semiconductor element, 360 is a bonding wire, 371 and 372 are flat plates for fixing a mold, and 380 is a seal. Resin, 385 is a cutting line, 401 to 408 are resin-encapsulated semiconductor devices, 430 is a terminal member, 450 is a semiconductor element, 460 is a bonding wire, 1-508 is resin-sealed semiconductor device, 530 terminal members, 550 denotes a semiconductor element, 560 is a bonding wire.
It is.
[0013]
First, a first embodiment of the resin-sealed semiconductor device according to the present invention will be described with reference to FIG.
In a first example, an external terminal portion for connecting to an external circuit is made thicker from a processing material (not shown), and an internal terminal portion for connecting to a semiconductor element is formed. Are thinned by half-etching, and a plurality of the terminal members 110 which are etched by integrally connecting the external terminal portion and the internal terminal portion, and a semiconductor element 120 thinner than the thickness of the processing material. The predetermined terminal portion 121 of the semiconductor element 120 and the internal terminal portion 112 of the predetermined terminal member 110 are connected by wire bonding 130, and the whole is contained within the thickness and width of the processing material. The present invention is a resin-sealed semiconductor device for a laminated, resin-sealed semiconductor device in the form of a flat plate, which is resin-sealed in accordance with the thickness and width of a material for use.
The internal terminal portion 112 of each terminal member 110 has a half-etched surface side as a terminal surface 112 a, the terminal members 110 are oriented in the same direction, and the front and back surfaces 111 a and 111 b of the external terminal portion 111 and the terminal surface of the internal terminal portion 112. 112a are arranged on one plane, respectively, and the terminal members 110 are arranged in the peripheral portion, with the internal terminal portion 112 side facing inward, and the front and back surfaces and the outer side surface of the external terminal portion 111 Are exposed as terminal surfaces (111a, 111b, 111c).
Further, the semiconductor element 120 is placed at a position away from the internal terminal portion 111 of each terminal member 110, the terminal surface on the terminal 121 side is oriented in the same direction as the half-etched surface side of the terminal member 110, and The rear surface, which is the surface that is not the terminal surface, is aligned with the surface facing the half-etched surface of each terminal member 110, and is arranged in a resin without a die pad so that the rear surface is exposed. ing.
[0014]
This example has a structure without a die pad, exposing the surface of the semiconductor element other than the terminal side, and enclosing the whole within the thickness width of the processing material, and sealing the resin with the thickness of the semiconductor element itself. Can be made thinner in accordance with the thinning of.
For example, the thickness of the processing material of the terminal member 110 is set to 0. When the thickness is 2 mm, 0. 1 mm to 0. By using a semiconductor element having a thickness of 025 mm, the resin-encapsulated semiconductor device of this example can be formed to a thickness of 0. It can be 2 mm.
Further, in this example, the connection workability is improved and the connection reliability is improved by adopting the wire bonding connection.
In addition, this example can be said to be a structure suitable for mass productivity, which can be manufactured in an imposed state by a method for manufacturing a resin-sealed semiconductor device of the present invention (shown in FIGS. 3 and 4), which will be described later.
Also, in this example, in the resin sealing step (molding step), it is not necessary to provide a cavity in a special shape, and the structure is such that the molding can be easily performed in a state of being flat with both sides suppressed. It can be said that the structure is preferable also from the viewpoint of.
[0015]
As the terminal member 110, Cu, a Cu-based alloy, a 42% Ni-Fe-based alloy, or the like can be used, but usually, Cu or a Cu-based alloy is used because of conductivity or the like.
In the first example, the terminal surface 111c on the outer side surface of the external terminal portion 111 is a cut portion, and the other surface is provided with a plating layer for connection.
As the plating layer for connection, one metal plating layer selected from a solder plating layer, a gold plating layer, a silver plating layer, a palladium plating layer, and a tin plating layer is used.
As the sealing resin 140, an epoxy resin is usually used, but the resin is not limited to this.
[0016]
Next, a second embodiment of the resin-sealed semiconductor device according to the present invention will be described with reference to FIG.
Similarly to the first example, the resin-encapsulated semiconductor device of the second example is also configured such that an external terminal portion for connecting to an external circuit is formed from a processing material (not shown) with a thickness of the processing material. The terminal member 110 which is thickened, the internal terminal portion for connecting to the semiconductor element is thinned by half-etching, and the external terminal portion and the internal terminal portion are integrally connected to be etched, Using a plurality and the semiconductor element 120 thinner than the thickness of the processing material, a predetermined terminal portion 121 of the semiconductor element 120 and an internal terminal portion 112 of the predetermined terminal member 110 are connected by wire bonding 130, A resin-encapsulated semiconductor device for a flat, square, laminated resin-encapsulated semiconductor device, which is entirely enclosed within the thickness of the processing material and is resin-sealed in accordance with the thickness of the processing material. In the first example, the semiconductor element is Unlike the first embodiment, instead of the one provided along the two sides thereof facing in a row of terminals in the center, it is obtained by wire bonding.
Other than that, the same as the first example was used, and the same components were used for each part.
[0017]
In the semiconductor element 120 of this example, the terminals 121 are provided along two opposing sides of the periphery, and accordingly, the terminal members 110 are arranged along the two peripheral sides of the semiconductor device. Is not done.
As a modified example of the resin-encapsulated semiconductor device of the first example and the second example, a semiconductor element having terminals provided along four sides thereof is used, and a terminal member is arranged along the four sides of the semiconductor device. Some of them are listed.
[0018]
The resin-encapsulated semiconductor device of the first example is, for example, as shown in FIG.
The resin-sealed semiconductor device of the second example is used as a stacked resin-sealed semiconductor device by stacking four semiconductor devices of the same size, for example, as shown in FIG.
In the case of these stacked resin-sealed semiconductor devices, the terminal surface of the lower external terminal portion of the upper resin-sealed semiconductor device and the upper external terminal portion of the lower resin-sealed semiconductor device, respectively. And are electrically connected to each other.
For example, as shown in FIG. 7, using a resin-sealed semiconductor device of the first example and a resin-sealed semiconductor device of the second example of the same size, Used as a sealed semiconductor device.
Alternatively, for example, as shown in FIG. 8, the resin-encapsulated semiconductor device of the first example and the resin-encapsulated semiconductor device of the second example are stacked in different sizes to form a laminated resin-encapsulated semiconductor device. Used as a semiconductor device.
[0019]
Further, for example, as shown in FIG. 9A, using eight resin-sealed semiconductor devices 401 to 408 of the first example of the same size, two of them are turned in the horizontal direction and the directions are reversed. In addition, there is also a laminated resin-sealed semiconductor device having a structure in which four electrically connected side-to-side electrically connected layers are further stacked.
Further, as shown in FIG. 9B, using eight resin-sealed semiconductor devices 501 to 508 of the second example of the same size, two of them are oriented in the same direction in the horizontal direction, and There is also a laminated resin-sealed semiconductor device having a structure in which four electrically connected side-to-side electrically connected layers are further stacked.
The side surfaces to be connected are connected by a conductive paste.
In this case, in FIGS. 9 (a) and 9 (b), for each of the external terminal portions (1) to (8), for example, (1) is a power terminal, (2) is a ground terminal, and (3) to (3). (7) is an I / O terminal, and (8) is a switch terminal, so that side-to-side connection and wire bonding connection do not cause any circuit problems.
It should be noted that the number of layers of the resin-encapsulated semiconductor device to be stacked is not limited to four.
Further, there is also a device in which three or more resin-encapsulated semiconductor devices of the first example or the second example are electrically connected to each other with their side surfaces being aligned with each other. Some of them have been done.
Further, there may be used a combination of the above-mentioned ones and a form in which the side surfaces of the upper and lower resin-encapsulated semiconductor devices are used for connection.
[0020]
Next, an example of a method for manufacturing the resin-encapsulated semiconductor device of the first example will be described with reference to FIG.
Note that this is replaced with the description of one example of the method for manufacturing the resin-sealed semiconductor device of the present invention.
First, resists 220 are provided in a predetermined shape on both surfaces of the processing material 210 (FIG. 3A), and the arrangement of the terminal members corresponding to the arrangement of the terminal members of one resin-encapsulated semiconductor device is one unit. In this arrangement state, etching is performed from both sides by an etching method using a half-etching technique, and the terminal members 230 are formed by being imposed while being connected by the support portions 235. (FIG. 3 (b))
As a result, a processed sheet 210A is obtained, in which the arrangement of the terminal members corresponding to the arrangement of the terminal members of one resin-encapsulated semiconductor device is set as one unit and connected and imposed by the support portion 235.
Cu, a Cu-based alloy, a 42 alloy (Ni 42% -Fe alloy), or the like is used as the processing material 210, and a ferric chloride solution is used as the etching solution.
The resist 220 is not particularly limited as long as it has etching resistance, has a desired resolution, and has good processability.
Next, after the resist 220 is removed, a cleaning process or the like is performed, a surface plating for connection is performed on the entire surface (not shown), and then an imposed surface is formed. The half-etched surface of the processed sheet 210A on which the surface plating is performed is performed. The side other than the side is evacuated with a flat plate-shaped perforated plate 240, and the semiconductor element 250 is fixed in a predetermined number in a state where the processed sheet 210A is in close contact with the perforated plate 240 (FIG. 3C). And the back surface other than the terminal surface side is evacuated by a perforated plate 240 for evacuation and mounted on the perforated plate 240. (FIG. 3 (d))
Although there are separate vacuum sources for the vacuum pumping perforated plate 240 such as a vacuum pump and a vacuum pipe, they are not shown here.
Next, in this state, for each semiconductor element 250, the terminal (corresponding to 121 in FIG. 1) and the terminal surface which is a half-etched surface of the internal terminal portion (corresponding to 112 in FIG. 1) of the terminal member 230 are wire-bonded. Connecting. (FIG. 3 (e))
Next, the perforated plate 240 is removed, and instead of this, a tape 270 for molding is applied in a flat shape so as to cover the side other than the half-etched surface side of the processing sheet 210A, and the back surface of the semiconductor element 250 is taped 270. The sticking and fixing, the front and back are sandwiched by a mold fixing flat plate (not shown), the entire processing sheet 210A is collectively molded, and the front and back mold fixing flat plates are removed. (FIG. 3 (f)) The supporting portion 235 supporting the terminal member 230 of the processed sheet 210A is provided with a through hole or the like, so that during molding, the resin for molding between the impositions can pass through. It has such a shape.
Next, the mold tape 270 is peeled off, a cutting tape 275 is attached, and the sheet is cut with a dicing saw (not shown) from the side opposite to the cutting tape 275 (FIG. 3G). In FIG. 3H, the resin-encapsulated semiconductor devices are obtained by singulating them one by one. (FIG. 3 (i))
The cutting with a dicing saw (not shown) is performed at the concave portion 237 as shown in FIG. 3 (h), and this portion is thinner than the thickness of the working material and can be easily cut. .
The cutting state by a dicing saw (not shown) is, for example, as shown in FIG.
Note that, in FIG. 10, the unit of the resin-sealed semiconductor device 301 is an area divided from each other by a cutting line 385, and is not shown here for the sake of easy understanding. The part 235 is cut by the concave part 237.
The processing sheet 310A is also called a frame.
This cut surface is the outer side surface of the external terminal of the resin-encapsulated semiconductor device to be manufactured.
In addition, a plating for connection is provided on a surface other than the cut surface of the cutout portion 237A, and this portion is easily used for connection.
Thus, the resin-sealed semiconductor device of the first example shown in FIG. 1 can be manufactured.
[0021]
Next, another example of the method of manufacturing the resin-encapsulated semiconductor device of the first example will be described with reference to FIG.
Note that this is replaced with the description of one example of the method of manufacturing the resin-sealed semiconductor device of the present invention.
First, resists 320 are provided in a predetermined shape on both surfaces of the processing material 310 (FIG. 4A), and the arrangement of the terminal members corresponding to the arrangement of the terminal members of one resin-encapsulated semiconductor device is one unit. In this arrangement state, etching is performed from both sides by an etching method using a half-etching technique, and the terminal members 330 are connected to each other by the support portions 335 to form an imposition. (FIG. 4 (b))
As a result, a processed sheet 210A is obtained, in which the arrangement of the terminal members corresponding to the arrangement of the terminal members of one resin-encapsulated semiconductor device is set as one unit and connected and imposed by the support portion 235.
Next, after the resist 320 is removed, a cleaning process or the like is performed, a surface plating for connection is performed on the entire surface (not shown), and then an imposition is formed. A tape 340 for molding is attached so as to cover the side other than the side (FIG. 4C), the semiconductor element 350 is positioned at a predetermined position by the number of impositions, and the back surface other than the terminal surface side is placed. The tape 340 is attached and mounted. (FIG. 4 (d))
Next, in this state, for each semiconductor element, its terminal and the terminal surface of the internal terminal portion of the terminal member are connected by wire bonding. (FIG. 4 (e))
Next, the front and back sides are sandwiched between the mold fixing plates 371 and 372, and the entire processing sheet 310A is collectively molded. (FIG. 4 (f))
Next, the flat plates 371 and 372 for mold fixing on the front and back are removed (FIG. 4 (g)), the tape 340 is further removed, and a cutting tape 345 is attached (FIG. 4 (h)). The resin-encapsulated semiconductor device is cut into pieces one by one by cutting with a dicing saw (not shown) from the side opposite to 345 (FIG. 4 (i)). (FIG. 4 (j))
Note that, in the manufacturing method shown in FIG. 4 as well, the processing in each step, each member, and the like basically follow the manufacturing method shown in FIG. 3, and description thereof is omitted here.
Thus, the resin-sealed semiconductor device of the first example shown in FIG. 1 can be manufactured.
[0022]
【The invention's effect】
As described above, the present invention has made it possible to provide a resin-sealed semiconductor device having a structure suitable for mass production, which can achieve further reduction in thickness at low cost.
Furthermore, it has become possible to provide a laminated resin-encapsulated semiconductor device in which a plurality of such thin resin-encapsulated semiconductor devices are laminated.
As a result, a system package can be realized with a so-called stack structure.
At the same time, it has become possible to provide a method for manufacturing such a thin resin-encapsulated semiconductor device.
[Brief description of the drawings]
FIG. 1A is a partial cross-sectional view of a first example of an embodiment of a resin-sealed semiconductor device of the present invention, and FIG. 1B is a view from the A1 side in FIG. It is the figure which was seen through.
FIG. 2A is a partial cross-sectional view of a second embodiment of the resin-sealed semiconductor device of the present invention, and FIG. 2B is a view from the B1 side of FIG. 2A. It is the figure which was seen through.
FIG. 3 is a cross-sectional view illustrating a first example of a manufacturing process of a method for manufacturing a resin-sealed semiconductor device according to the present invention.
FIG. 4 is a sectional view showing a manufacturing process of a second example of the embodiment of the method for manufacturing the resin-sealed semiconductor device of the present invention.
FIG. 5 is a sectional view of a first example of the embodiment of the laminated resin-sealed semiconductor device of the present invention.
FIG. 6 is a sectional view of a second example of the embodiment of the laminated resin-sealed semiconductor device of the present invention.
FIG. 7 is a cross-sectional view of a third example of the embodiment of the laminated resin-sealed semiconductor device of the present invention.
FIG. 8 is a sectional view of a fourth example of the embodiment of the laminated resin-sealed semiconductor device of the present invention.
FIGS. 9A and 9B are cross-sectional views of a fourth embodiment of the laminated resin-encapsulated semiconductor device according to the present invention, and FIGS. 9A and 9B are FIGS. 9A is a view seen from the D1 side of FIG. 9B, and FIG. 9B is a cross-sectional view of a fourth example of the embodiment of the laminated resin-sealed semiconductor device of the present invention. FIGS. 9B and 9B are views seen from the side of D2 in FIGS. 9B and 2B.
FIG. 10 is a diagram showing a cutting state by a dicing saw.
[Explanation of symbols]
101-104 Resin-sealed semiconductor device
101a-104a Resin-sealed semiconductor device
101b-104b Resin-sealed semiconductor device
101c-104c Resin-sealed semiconductor device
110 terminal member
111 External terminal
111a, 111b, 111c Terminal surface
112 Internal terminal
112a Terminal surface (half-etched surface)
113 connection
114 Notch
120 Semiconductor element (also called semiconductor chip or simply chip)
121 terminal
130 Bonding wire
140 Resin for sealing
201 unit resin-encapsulated semiconductor device
210 Material for processing
210A Processing sheet
220 resist
230 terminal member
231 External terminal
232 Internal terminal
233 connection
235 Support part (also called connection part)
237 recess
237A Notch
240 flat perforated plate (also called vacuum plate)
250 semiconductor element
260 Bonding wire
270 tape (for fixing and molding)
275 tape (for dicing)
280 Resin for sealing
301 unit resin-encapsulated semiconductor device,
310 Material for processing
310A Processing sheet
315 Frame
316 jig hole
317 Slot
320 resist
330 terminal member
335 Supporting part (also called connection part)
337 recess
337A Notch
340 tape (for fixing, for molding)
345 tape (for cutting)
350 semiconductor element
360 bonding wire
371, 372 Mold fixing plate
380 Resin for sealing
385 cutting line
401-408 Resin-sealed semiconductor device
430 terminal member
450 semiconductor element
460 Bonding wire
501-508 Resin-sealed semiconductor device
530 terminal member
550 semiconductor element
560 Bonding wire

Claims (10)

外部回路と接続するための外部端子部と、半導体素子と接続するための内部端子部とを、連結部にて一体的に連結してなる端子部材で、且つ、ハーフエッチング加工法を用いて、加工用素材から、外部端子部の少なくとも一部を加工用素材の厚さの厚肉にし、内部端子部をハーフエッチングにて薄肉にしている端子部材を、複数個と、前記加工用素材の厚さより薄い半導体素子とを用い、半導体素子の所定の端子部と所定の端子部材の内部端子部とをワイヤボンディング接続して、前記加工用素材の厚さ幅内に全体を収め、加工用素材の厚さ幅に揃えて樹脂封止した樹脂封止型半導体装置であって、各端子部材の内部端子部は、そのハーフエッチング面側を端子面とし、各端子部材を同じ向きにし、外部端子部の表裏の面および内部端子部の端子面が、それぞれ、一平面上に、揃うようにし、周辺部に、内部端子部側を内側に向けて、各端子部材を配しており、外部端子部の表裏面と外側側面とを端子面として露出させており、また、半導体素子を、各端子部材の内部端子部から離れた位置に、その端子面を、端子部材のハーフエッチング面側と同じ向きにして、且つ、その端子面でない側の面である裏面を、各端子部材のハーフエッチング面に対向する側の面に、揃えて、ダイパッドなしで、樹脂中に、前記裏面を露出させるようにして、配置していることを特徴とする樹脂封止型半導体装置。An external terminal for connecting to an external circuit, and an internal terminal for connecting to the semiconductor element, a terminal member integrally connected by a connecting portion, and, using a half-etching method, From the material for processing, at least a part of the external terminal portion is made thicker than the thickness of the material for processing, and a plurality of terminal members for making the internal terminal portion thinner by half-etching, Using a thinner semiconductor element, a predetermined terminal part of the semiconductor element and an internal terminal part of a predetermined terminal member are wire-bonded and connected, and the whole is contained within the thickness width of the processing material. A resin-encapsulated semiconductor device in which the thickness is equal to the width and the resin-encapsulated semiconductor device, wherein the internal terminal portion of each terminal member has a half-etched surface side as a terminal surface, each terminal member has the same direction, and an external terminal portion. Of the front and back surfaces and the internal terminals Each terminal member is arranged so that the child surfaces are aligned on one plane, and the inner terminal portion side is directed inward in the peripheral portion, and the front and back surfaces and the outer side surface of the external terminal portion are connected to the terminals. The terminal is exposed as a surface, and the semiconductor element is located at a position away from the internal terminal portion of each terminal member, the terminal surface is oriented in the same direction as the half-etched surface side of the terminal member, and is not the terminal surface. The rear surface that is the side surface is aligned with the surface facing the half-etched surface of each terminal member, without a die pad, in resin, such that the rear surface is exposed, and is arranged. Resin-encapsulated semiconductor device. 請求項１に記載の樹脂封止型半導体装置において、外部端子部の外側側面部に切り欠け部を設けていることを特徴とする樹脂封止型半導体装置。The resin-sealed semiconductor device according to claim 1, wherein a cutout portion is provided on an outer side surface of the external terminal portion. 請求項１ないし２のいずれかに記載の樹脂封止型半導体装置において、端子部材は、Ｃｕ、Ｃｕ系合金、４２％Ｎｉ−Ｆｅ系合金からなることを特徴とする樹脂封止型半導体装置。3. The resin-sealed semiconductor device according to claim 1, wherein the terminal member is made of Cu, a Cu-based alloy, or a 42% Ni--Fe-based alloy. 請求項１ないし３のいずれかに記載の樹脂封止型半導体装置において、内部端子部の端子面および外部端子部の表裏の端子面に、半田めっき層、金めっき層、銀めっき層、パラジウムめっき層、錫めっき層から選ばれた１つの金属めっき層を、接続用のめっき層として設けていることを特徴とする樹脂封止型半導体装置。4. The resin-encapsulated semiconductor device according to claim 1, wherein a solder plating layer, a gold plating layer, a silver plating layer, and a palladium plating are provided on the terminal surfaces of the internal terminal portion and the front and back terminal surfaces of the external terminal portion. A resin-encapsulated semiconductor device, wherein one metal plating layer selected from a layer and a tin plating layer is provided as a plating layer for connection. 請求項１に記載の樹脂封止型半導体装置の製造方法であって、順に、（ａ）１つの樹脂封止型半導体装置の端子部材の配置に対応した、端子部材の配置を１単位として、ハーフエッチング技術を用いたエッチング加工にて、端子部材の外部端子部側を支持部で連結した状態で、面付けして形成し、面付け形成された加工シートを得る加工工程と、（ｂ）接続用の表面めっきを施すめっき処理工程と、（ｃ）面付け形成された加工シートのハーフエッチング面側ではない側を、平板状の真空引き板にて真空引きし、加工シートを真空引き板に密着させた状態で、面付け分だけ、半導体素子を所定の位置に位置決めして、その端子面側ではない裏面を真空引きして、真空引き板に搭載する半導体素子搭載工程と、（ｄ）この状態で、各半導体素子について、その端子と端子部材の内部端子部の端子面とをワイヤボンディング接続するワイヤボンディング工程と、（ｅ）真空引き板を外し、これに代え、モールド用のテープを、加工シートのハーフエッチング面側ではない側を覆うように、平面状に貼り、半導体素子の裏面をテープにて貼り固定するテープ貼り工程と、（ｆ）表裏をモールド固定用の平板にて挟み、加工シート全体について、一括してモールドを行う、一括モールド工程と、（ｇ）表裏のモールド固定用の平板、テープを除去し、切断用のテープを貼り、該切断用のテープとは反対側からダイシングソーにて切断して、樹脂封止型半導体装置を１個づつに個片化して得る個片化工程と、を行うことを特徴とする樹脂封止型半導体装置の製造方法。The method for manufacturing a resin-encapsulated semiconductor device according to claim 1, wherein (a) the arrangement of the terminal members corresponding to the arrangement of the terminal members of one resin-encapsulated semiconductor device is one unit. (B) a step of forming an imposed work sheet by performing an etching process using a half-etching technique in a state where the external terminal portion side of the terminal member is connected to the support portion by a supporting portion; A plating step of applying surface plating for connection; and (c) evacuating the non-half-etched side of the imposed processed sheet with a flat vacuum plate to evacuate the processed sheet. A semiconductor element mounting step of positioning a semiconductor element at a predetermined position by an amount corresponding to an imposition, vacuuming a back surface other than the terminal surface side, and mounting the semiconductor element on a vacuum plate; (d) ) In this state, each semiconductor element Then, a wire bonding step of wire bonding connection between the terminal and the terminal surface of the internal terminal portion of the terminal member, and (e) removing the evacuated plate, and replacing the tape with a molding tape on the half-etched surface of the processed sheet A tape attaching step of attaching the semiconductor element in a flat shape so as to cover the side other than the side, and attaching and fixing the back surface of the semiconductor element with a tape; and (f) sandwiching the front and back surfaces with a mold fixing flat plate. And (g) removing the flat plate and tape for fixing the mold on the front and back sides, attaching a cutting tape, and cutting with a dicing saw from the side opposite to the cutting tape. And performing a singulation step of singulating the resin-encapsulated semiconductor device one by one. 請求項５に記載の樹脂封止型半導体装置の製造方法において、平板状の真空引き板が、全面に真空吸着用の孔を配設したものであることを特徴とする樹脂封止型半導体装置の製造方法。6. The method of manufacturing a resin-sealed semiconductor device according to claim 5, wherein the flat vacuum plate has holes for vacuum suction arranged on the entire surface. Manufacturing method. 請求項１に記載の樹脂封止型半導体装置の製造方法であって、順に、（Ａ）１つの樹脂封止型半導体装置の各端子部材の配置に対応した、端子部材の配置を１単位として、ハーフエッチング技術を用いたエッチング加工にて、端子部材の外部端子部側を支持部で連結した状態で、面付けして形成し、面付け形成された加工シートを得る加工工程と、（Ｂ）接続用の表面めっきを施すめっき処理工程と、（Ｃ）面付け形成された加工シートのハーフエッチング面側ではない側を覆うようにモールド用のテープを貼り、面付け分だけ、半導体素子を所定の位置に位置決めして、その端子面側ではない裏面を前記テープに貼り付け搭載する半導体素子搭載工程と、（Ｄ）この状態で、各半導体素子について、その端子と端子部材の内部端子部の端子面とをワイヤボンディング接続するワイヤボンディング工程と、（Ｅ）表裏をモールド固定用の平板にて挟み、加工シート全体について、一括してモールドを行う、一括モールド工程と、（Ｆ）表裏のモールド固定用の平板、テープを除去し、切断用のテープを貼り、該切断用のテープとは反対側からダイシングソーにて切断して、樹脂封止型半導体装置を１個づつに個片化して得る個片化工程と、を行うことを特徴とする樹脂封止型半導体装置の製造方法。The method for manufacturing a resin-encapsulated semiconductor device according to claim 1, wherein (A) the arrangement of the terminal members corresponding to the arrangement of each terminal member of one resin-encapsulated semiconductor device is one unit. (B) an etching process using a half-etching technique, in which the external terminal portion side of the terminal member is connected by a support portion to form an imposition, and a processing step of obtaining an imposition-formed processing sheet; ) A plating process for applying surface plating for connection, and (C) a mold tape is applied so as to cover the side other than the half-etched surface side of the processed sheet formed by imposition, and the semiconductor element is removed by the imposition. A semiconductor element mounting step of positioning the semiconductor element at a predetermined position and attaching a back surface other than the terminal surface side to the tape, and (D) in this state, for each semiconductor element, its terminals and internal terminal portions of terminal members Terminal A wire bonding step of wire bonding connection between (E) and (E) a mold molding step of sandwiching the front and back surfaces with a mold fixing flat plate and performing collective molding on the entire processing sheet; Remove the flat plate and tape, attach a cutting tape, cut the dicing saw from the side opposite to the cutting tape, and singulate the resin-encapsulated semiconductor devices one by one. A method for manufacturing a resin-encapsulated semiconductor device, comprising performing a fragmentation step. 請求項１ないし４のいずれかに記載の樹脂封止型半導体装置の１つ以上を、複数、積層したもので、それぞれ、上側の樹脂封止型半導体装置の下側の外部端子部の端子面と、下側の樹脂封止型半導体装置の上側の外部端子部の端子面とを、重ね合せて電気的に接続していることを特徴とする積層型樹脂封止型半導体装置。A terminal surface of a lower external terminal portion of at least one of the resin-encapsulated semiconductor devices according to claim 1, wherein one or more of the resin-encapsulated semiconductor devices according to claim 1 are stacked. And a terminal surface of an upper external terminal portion of the lower resin-encapsulated semiconductor device is superposed and electrically connected to each other. 請求項８に記載の積層型樹脂封止型半導体装置において、樹脂封止型半導体装置の２つ以上が互いにその側面同志を合せて電気的に接続していることを特徴とする積層型樹脂封止型半導体装置。9. The laminated resin-sealed semiconductor device according to claim 8, wherein two or more of the resin-encapsulated semiconductor devices are electrically connected to each other with their side surfaces aligned. Stop type semiconductor device. 請求項８ないし９のいずれかに記載の積層型樹脂封止型半導体装置において、上側の樹脂封止型半導体装置の外部端子部の側面の端子面と、下側の樹脂封止型半導体装置の外部端子部の側面の端子面とを、電気的に接続していることを特徴とする積層型樹脂封止型半導体装置。The stacked resin-encapsulated semiconductor device according to claim 8, wherein a terminal surface of a side surface of an external terminal portion of the upper resin-encapsulated semiconductor device and a lower surface of the resin-encapsulated semiconductor device are disposed. A laminated resin-encapsulated semiconductor device, wherein a side surface of an external terminal portion is electrically connected to a terminal surface.
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