JP2004281486A - Semiconductor package and semiconductor device employing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor package in which semiconductor chips having various sizes and shapes can be mounted in one semiconductor package, and to provide a semiconductor device employing the package. <P>SOLUTION: In the semiconductor package 1 composed of an insulating substrate 2 of a predetermined shape constituted to mount the semiconductor chip 11 via connecting bumps 12 formed on the semiconductor chip 11, connecting wiring 3 for connected to the bumps 12 is provided on the top surface of the insulating substrate so as to radially extend from the center of the insulating substrate. Also, in the semiconductor device 10 formed by mounting the semiconductor chip formed with connecting bumps via the connecting bumps in a semiconductor package composed of an insulating substrate having a predetermined shape and by hermetically sealing the semiconductor chip, connecting wiring 3 connected to each of the connecting bumps of the semiconductor chip is provided so as to radially extending from the center of the insulating substrate. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor package and a semiconductor device using the package.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, a semiconductor device is formed by mounting a semiconductor chip on a semiconductor package formed of a required insulating substrate and sealingly sealing the semiconductor chip with a sealing resin such as a molding resin.
[0003]
The semiconductor chip is provided with connection electrodes for electrically connecting to the semiconductor package, while the semiconductor package is connected to the connection electrodes of the semiconductor chip on the surface on which the semiconductor chip is mounted. Connection pads are provided. Further, on the back surface of the semiconductor package, there are provided external connection terminals for connection to a mounting board, and the external connection terminals and connection pads provided on the surface of the semiconductor package correspond to internal wiring provided on the semiconductor package. Are electrically connected by
[0004]
The electrical connection between the connection electrode of the semiconductor chip and the connection pad of the semiconductor package can be broadly divided into those by wire bonding using a metal wire and one or both of the connection electrode and the connection pad. There are two types, one based on the formed bumps, and these are used as needed (for example, see Patent Document 1 and Patent Document 2).
[0005]
Regardless of the connection configuration using wire bonding or the connection configuration using bumps, the connection pads formed on the surface of the semiconductor package must be compatible with the semiconductor chips mounted on the same semiconductor package. The semiconductor device is basically manufactured by forming a dedicated semiconductor package for each semiconductor chip of one form.
[0006]
[Patent Document 1]
JP 2000-269261 A
[Patent Document 2]
JP 2000-150695 A
[Problems to be solved by the invention]
However, when a dedicated semiconductor package is formed for each semiconductor chip in one form as described above, it is difficult to reduce the product price in order to recover capital investment costs required for forming a new semiconductor package. There was a danger that it could not be accepted by the market.
[0009]
Therefore, the present inventor aims to suppress the production of a new semiconductor package by enabling one semiconductor package to be applied to a semiconductor chip of a different form, to suppress the occurrence of a new cost burden, and to reduce costs. Research and development have led to the present invention.
[0010]
[Means for Solving the Problems]
The present inventor has conducted research and development to solve the above-described problems. As a result, CSP (Chip Size Package), which has been frequently used recently, is only a miniaturized QFP (Quad Flat Pack Package), and furthermore, a semiconductor package. It was found that the wiring pattern of the internal wiring did not change.
[0011]
Therefore, in the semiconductor package of the present invention, in a semiconductor package formed of an insulating substrate of a predetermined shape configured to mount the semiconductor chip via a connecting bump provided on the semiconductor chip, the connection of the semiconductor chip is formed on the upper surface of the insulating substrate. The connection wirings respectively connected to the bumps were provided to extend radially from the central portion of the insulating substrate.
[0012]
In the semiconductor device of the present invention, a semiconductor chip provided with connection bumps is mounted on a semiconductor package formed of an insulating substrate having a predetermined shape via the connection bumps, and the semiconductor chip is formed by hermetically sealing. In the semiconductor device, the connection wirings respectively connected to the connection bumps of the semiconductor chip are provided on the upper surface of the insulating substrate so as to extend radially from the central portion of the insulating substrate.
[0013]
BEST MODE FOR CARRYING OUT THE INVENTION
A semiconductor package and a semiconductor device according to the present invention include a semiconductor package on which a semiconductor chip provided with connection bumps is mounted, wherein connection wires on the semiconductor package connected to the connection bumps of the semiconductor chip are insulated from the semiconductor package. It is provided to extend radially from the central portion of the substrate.
[0014]
That is, the connection terminals formed of the connection bumps provided on the semiconductor chip are provided on the semiconductor chip based on a predetermined arrangement rule, and in the case of semiconductor chips having similar shapes and different sizes, the connection terminals are provided. Since the arrangement positions of the bumps are similar, by providing connection wiring extending radially from the center portion to the semiconductor package, the same type of semiconductor package can be applied to semiconductor chips having different sizes. Can be used.
[0015]
Therefore, it is not necessary to design and manufacture a new semiconductor package with a change in the size of the semiconductor chip, so that it is possible to suppress the occurrence of a new capital investment and to mass-produce the same type of semiconductor package. Therefore, it is possible to reduce the manufacturing cost due to mass production.
[0016]
In particular, semiconductor chips having required functions generally tend to be reduced in size sequentially by shrinking. Conventionally, as semiconductor chips become smaller, new semiconductor packages corresponding to each type are designed and manufactured. However, by using the semiconductor package of the present invention, design and manufacture of a new semiconductor package can be suppressed, so that the semiconductor package can be provided at low cost and a semiconductor device using the semiconductor package can be provided at low cost.
[0017]
Not only in the case of changing the size of the semiconductor chip, but also in the case of a semiconductor chip having different functions and having connection terminals formed of connection bumps corresponding to respective connection wirings, the semiconductor chip is regulated by the size of the semiconductor chip. Since the above-described semiconductor package can be used without using the same, the same type of semiconductor package can be used for multiple types of semiconductor chips.
[0018]
Moreover, in the semiconductor package and the semiconductor device of the present invention, by mounting the semiconductor chip on the semiconductor package via the connection bumps, it is possible to eliminate a process requiring a lot of work time such as wire bonding, thereby reducing the manufacturing efficiency. The thickness of the molded resin portion when the mounted semiconductor chip is hermetically sealed with the molded resin can be reduced, and the thickness of the semiconductor device can be reduced.
[0019]
【Example】
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0020]
FIG. 1 is a partially cutaway perspective view of a semiconductor package 1 of the present embodiment. In the present embodiment, the semiconductor package 1 is constituted by an insulating substrate 2 made of a polyimide tape having a substantially rectangular shape, and the insulating substrate 2 is provided with a plurality of connection wirings 3 made of a metal thin film on the upper surface.
[0021]
In particular, the connection wirings 3 are provided to extend radially from the central portion of the insulating substrate 2 to the outer edges, respectively, and the connection wirings 3 are linear. By forming the connection wiring 3 in a straight line, it is possible to prevent noise from occurring in the connection wiring 3.
[0022]
Further, the connection wiring 3 has a gradually increasing width as the distance from the central portion of the insulating substrate 2 toward the outer edge increases. Therefore, as will be described later, in the case where semiconductor chips 11 of different sizes are mounted on the semiconductor package 1, when the large semiconductor chips 11 are mounted, the large connection bumps 12 are formed on the semiconductor chips 11. Even if used, the connection bump 12 can be reliably connected to the connection wiring 3 without causing a short circuit with the adjacent connection wiring 3 (see FIG. 2).
[0023]
An electrode forming pad 4 is provided on the back surface of the insulating substrate 2 along the outer edge, and an external connection terminal 5 formed of a solder ball or the like is attached to the electrode forming pad 4. The pad 4 is connected to the connection wiring 3 via an internal wiring 6 provided through the insulating substrate 2.
[0024]
In this embodiment, the insulating substrate 2 is formed using a polyimide film, but is not limited to a polyimide film, and may be formed using an appropriate insulating material such as ceramics.
[0025]
The semiconductor device 10 using the semiconductor package 1 configured as described above is configured as follows. Here, from the viewpoint of workability, the external connection terminals 5 are not attached to the electrode forming pads 4 of the semiconductor package 1, and the semiconductor package 1 before the external connection terminals 5 are attached is used. Further, in this embodiment, the insulating substrate 2 of the semiconductor package 1 is a polyimide tape, and the semiconductor package 1 is configured to be supplied in a state of a plurality of strip-shaped substrates (not shown) arranged in one direction. I have.
[0026]
First, the semiconductor chip 11 mounted on the semiconductor package 1 has connection bumps 12 formed by gold bumps, solder bumps, or the like. It is placed on the upper surface of the semiconductor package 1 portion of the strip-shaped substrate while being in contact therewith.
[0027]
Then, by applying an ultrasonic wave to the semiconductor chip 11 using an ultrasonic horn or the like, the respective connection bumps 12 are ultrasonically bonded to the connection wirings 3, respectively, and the semiconductor chip 11 is mounted on the semiconductor package 1 portion. ing. The mounting of the semiconductor chip 11 on the portion of the semiconductor package 1 is not limited to the one by ultrasonic bonding, and an appropriate connecting means can be used. For example, an anisotropic conductive sheet may be used.
[0028]
Then, the band-shaped substrate having the semiconductor chip 11 mounted on the semiconductor package 1 portion is sandwiched between a lower mold die (not shown) and an upper mold die (not shown), and a mold space (FIG. (Not shown), and a mold resin 13 is press-fitted into the mold space to form a mold portion 13 in which the semiconductor chip 11 is hermetically sealed with the mold resin. Before the formation of the mold portion 13, an underfill material or the like may be filled between the semiconductor chip 11 and the insulating substrate 2.
[0029]
After the formation of the mold portion 13, the external connection terminal 5 is attached to the electrode forming pad 4 of each semiconductor package 1, and each semiconductor package 1 is separated from the strip-shaped substrate, thereby forming one semiconductor device 10 at a time. Is formed. The insulating substrate 2 of the semiconductor package 1 has a predetermined shape as the semiconductor package 1 is separated from the strip-shaped substrate.
[0030]
In this way, by electrically connecting the semiconductor chip 11 to the semiconductor package 1 via the connection bump 12 instead of wire bonding, the time for attaching the semiconductor chip 11 to the semiconductor package 1 can be reduced, Work efficiency can be improved.
[0031]
Moreover, by electrically connecting the semiconductor chip 11 to the semiconductor package 1 via the connection bumps 12, the height of the mold portion 13 covering the semiconductor chip 11 is made lower than in the case of connection by wire bonding. Accordingly, the semiconductor device 10 can be made thinner.
[0032]
As described above, in order to improve the productivity in the manufacturing process of manufacturing the semiconductor chip 11, the area of the semiconductor chip 11 mounted on the semiconductor package 1 is increased with the successive introduction of new technologies. Is reduced as much as possible, and as shown in FIG. 3, the semiconductor chip is gradually reduced in size.
[0033]
FIG. 3 shows an initial semiconductor chip 11a before shrinking of a required semiconductor chip, an intermediate semiconductor chip 11b that has been shrinked, and an end semiconductor chip 11c that has been further shrinked. Is performed, the arrangement interval of the connection bumps 12a on the initial semiconductor chip 11a, the arrangement interval of the connection bumps 12b on the intermediate semiconductor chip 11b, and the arrangement interval of the connection bumps 12c on the final semiconductor chip 11c. Since the installation interval is similarly reduced, the connection wiring 3 of the semiconductor package 1 is provided to extend radially from the central portion of the insulating substrate 2 to the outer edge, whereby the size of the semiconductor chip is reduced due to shrinking. , The same semiconductor package 1 can be used, and the design and manufacturing of a new semiconductor package 1 can be suppressed. To, can be suppressed manufacturing cost is increased. In addition, since the same semiconductor package 1 is mass-produced, the cost associated with mass production can be reduced.
[0034]
Further, as described above, the connection wiring 3 has a gradually increasing width as the distance from the central portion of the insulating substrate 2 toward the outer edge increases, so that a large-sized semiconductor chip such as the initial semiconductor chip 11a can be mounted on the semiconductor package 1. Not only can the connection bump 12a of the initial semiconductor chip 11a be connected to the adjacent connection wiring 3 without short-circuiting, but also a large connection bump can be used for the connection bump 12a. it can.
[0035]
In particular, by using a large connection bump as the connection bump 12a, when the initial semiconductor chip 11a, which is a large semiconductor chip, is mounted on the semiconductor package 1, the connection between the connection bump 12a and the connection wiring 3 is formed. The large acting stress can be reduced by increasing the size of the connection bump 12a, and the reliability of the semiconductor device can be improved.
[0036]
In the above description, the case where the size of the semiconductor chip 11 changes due to shrinking has been described. However, not only the size change due to shrinking but also a semiconductor chip having a different function is provided in the semiconductor package 1. The same semiconductor package 1 can be used regardless of the size of the semiconductor chip as long as the semiconductor chip has a connection bump corresponding to each connection wiring 3.
[0037]
As described above, by using the same semiconductor package 1 for a variety of types and forms of semiconductor chips, design and manufacturing of a new semiconductor package 1 can be suppressed, and the same semiconductor package 1 can be mass-produced. Therefore, the cost associated with mass production can be reduced, so that an inexpensive semiconductor package 1 can be provided. Therefore, the semiconductor device 10 using the semiconductor package 1 can be provided at a low cost.
[0038]
【The invention's effect】
According to the first aspect of the present invention, in a semiconductor package including an insulating substrate having a predetermined shape configured to mount the semiconductor chip via a connecting bump provided on the semiconductor chip, the semiconductor chip is provided on an upper surface of the insulating substrate. By providing connection wirings to be connected to the connection bumps and extending radially from the central part of the insulating substrate, semiconductor chips of various sizes and forms can be mounted in one semiconductor package. In addition to suppressing the design and manufacturing of the semiconductor package, the manufacturing cost of the semiconductor package can be reduced along with mass production, and the manufacturing cost of a semiconductor device using this semiconductor package can be significantly reduced.
[0039]
According to the second aspect of the present invention, a semiconductor chip provided with connection bumps is mounted on a semiconductor package made of an insulating substrate having a predetermined shape via the connection bumps, and the semiconductor chip is hermetically sealed. In the formed semiconductor device, connection wirings respectively connecting to the connection bumps of the semiconductor chip are provided on the upper surface of the insulating substrate so as to extend radially from the central portion of the insulating substrate. The semiconductor device can be configured by mounting a semiconductor chip of the form, so that design and manufacture of a new semiconductor package can be suppressed, and by reducing the manufacturing cost due to mass production of the semiconductor package, The manufacturing cost of the semiconductor device can be significantly reduced.
[0040]
In addition, in this semiconductor device, since the semiconductor chip and the semiconductor package are electrically connected via the connection bumps, the sealing resin such as a molding resin is used as compared with the case where the semiconductor chip and the semiconductor package are electrically connected by wire bonding. The thickness dimension of the semiconductor device after sealing can be reduced. In addition, since a wire bonding step for performing wire bonding can be eliminated, manufacturing efficiency can be improved.
[Brief description of the drawings]
FIG. 1 is a partially cutaway perspective view of a semiconductor package according to the present invention.
FIG. 2 is a schematic sectional view of a semiconductor device according to the present invention.
FIG. 3 is an explanatory view of a mounting mode of a semiconductor chip on a semiconductor package.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Semiconductor package 2 Insulating substrate 3 Connection wiring 4 Electrode formation pad 5 External connection terminal 6 Internal wiring 10 Semiconductor device 11 Semiconductor chip 12 Connection bump 13 Mold part

Claims (2)

In a semiconductor package comprising an insulating substrate of a predetermined shape configured to mount the semiconductor chip via a connecting bump provided on the semiconductor chip, connection wirings respectively connected to the connection bumps of the semiconductor chip are formed on the upper surface of the insulating substrate. A semiconductor package provided radially extending from a central portion of an insulating substrate. In a semiconductor device formed by mounting a semiconductor chip provided with connection bumps via a connection bump on a semiconductor package formed of an insulating substrate having a predetermined shape, and sealingly sealing the semiconductor chip,
A semiconductor device, wherein connection wirings respectively connected to connection bumps of a semiconductor chip are provided on an upper surface of an insulating substrate so as to extend radially from a central portion of the insulating substrate.

Images