JP2004221415A - Semiconductor package mounting structure - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor package mounting structure wherein short circuit due to solder flakes or solder balls is prevented. <P>SOLUTION: In this package mounting structure wherein a semiconductor package 1 having a heat sink 15 for a semiconductor chip is soldered to a printed board 2 by a reflow process, the area of a heat radiating metallic pattern 4 is designed to be larger than the area of the heat sink 15, and the region on the metallic pattern 4 except for the connection section for the heat sink 15 is divided into an inner region which is in contact with the circumference of the heat sink connection section and an outer region which is in contact with the outer circumference of the inner region. A solder resist 12 is formed in the inner region which is in contact with the heat sink connection section, and a narrow gap 8 is formed therein. The outer region is a trap member 4a wherein the metal section of the metallic pattern 4 is exposed, and a wide gap 9 is formed in between the trap member 4a and the semiconductor package 1. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor package mounting structure having a heat radiating member on a side surface of a substrate.
[0002]
[Prior art]
As a method of soldering and mounting a semiconductor package having semiconductor leads such as a flat package on a printed circuit board, there are flow soldering in which preheated solder is sprayed or immersed in a solder bath to perform soldering. In the flow soldering, there is a possibility that excess solder is bridged between the conductor lead terminals due to the influence of the flow of the solder, thereby causing an electric short circuit. Therefore, there is known a method of preventing the above-mentioned electrical short by providing a dummy land for drawing in excess solder at a position downstream of the solder flow on the substrate (for example, see Patent Document 1).
[0003]
However, as the density of electronic components has been increased, the pitch between conductor leads has been reduced. In particular, when a flat package having a pitch of 0.5 mm or less is mounted on a substrate by soldering, a reflow soldering method generally tends to be used instead of the flow soldering described above. In reflow soldering, solder paste is printed on the land of the printed circuit board, a flat package is mounted on the board so that the conductor leads are placed on the solder paste, and the solder paste is heated, melted and cooled, so that the solder paste is A land and a solder connection are made (for example, see Patent Document 2).
[0004]
[Patent Document 1]
JP-A-8-250844 [Patent Document 2]
JP-A-7-74209
[Problems to be solved by the invention]
In a flat package, there is a flat package in which a metal heat radiating member is provided on a part of a package body molded with a molding material on a substrate side. Note that the substrate side of the package body is a surface facing the substrate when the semiconductor package is mounted on the substrate, and is hereinafter referred to as a back surface. When the flat package is mounted on the printed board in the soldering process, the heat radiating member is formed on the solder paste printed on the heat radiating on the printed board or the metal pattern for electrodes (hereinafter simply referred to as a metal pattern for simplicity of description). And a very narrow gap is formed between the mold portion on the back surface of the package and the substrate.
[0006]
In the heating step of reflow soldering, the flux component contained in the solder paste on the metal pattern begins to melt, and spreads to the gap between the back surface of the package and the printed board due to the capillary phenomenon. However, extra solder or solder that behaves in an unstable manner without contacting a metal pattern or a heat radiating member may be taken into the spread of the flux and move in the gap between the back surface of the package and the printed circuit board.
[0007]
In this case, the molten solder moves with the spread of the flux, moves as a flake-shaped lump while in the gap, and forms a ball-shaped lump when the solder goes out of the gap through the gap. The ball-shaped solder forms a bridge or the like near the connection between the conductor lead and the land and causes an electrical short. Further, even if the above-mentioned dummy lands are formed on the substrate, the moving directions of the flake solder and the ball solder in the reflow soldering process are irregular, so that they do not always flow in the dummy land direction. Therefore, even if dummy lands are formed, short-circuiting due to flake solder or ball solder cannot often be prevented.
[0008]
The present invention provides a semiconductor package mounting structure that can prevent a short circuit due to flake solder or ball solder by providing a groove or an exposed metal member in a substrate or a semiconductor package.
[0009]
[Means for Solving the Problems]
INDUSTRIAL APPLICABILITY The present invention is applied to a semiconductor package mounting structure in which a lead terminal of a semiconductor package is soldered to a land on a substrate and a chip heat radiation member of the semiconductor package is soldered to a metal pattern on the substrate by a reflow method. The trap member prevents solder flakes generated when the chip heat radiating member is soldered onto the metal pattern from moving from the metal pattern toward the lead terminals due to the flow of the flux.
Also, a first gap region between the semiconductor package and the substrate, which is provided in contact with a periphery of a connection portion between the semiconductor chip heat radiating member and the metal pattern, and a first gap between the semiconductor package and the substrate. A second gap region provided in contact with the outer periphery of the region and having a larger gap size than the gap size of the first gap region may be provided. The flux spreads to the first gap region due to the capillary phenomenon, and the expansion of the flux is regulated by the second gap region.
[0010]
【The invention's effect】
According to the first to eighth aspects of the present invention, even if the solder flake generated at the time of solder connection moves together with the flux, it is prevented by the trap member and does not move in the lead terminal direction. As a result, it is possible to prevent solder flakes and the like from adhering to the lead terminal portion, and it is possible to reliably prevent an electric short circuit caused by the solder flakes from adhering.
Further, according to the third to eighth aspects of the present invention, the flux melted from the solder connecting the chip heat radiating member to the metal pattern spreads to the first gap region formed therearound, and the flux of the first gap region is formed. A wider second gap region provided around the periphery restricts the spread of the flux. Therefore, it is possible to prevent the flux from spreading to the lead terminal side and to prevent the solder flakes from moving to the lead terminal side due to the flux. As a result, it is possible to prevent quality deterioration such as poor solder connection or electrical short.
[0011]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
-1st Embodiment-
1 and 2 are views showing a first embodiment of a semiconductor package mounting structure according to the present invention. FIG. 1 is a plan view showing a semiconductor package 1 mounted on a printed board 2, and FIG. 2 is a sectional view taken along line II-II of FIG. The semiconductor package 1 is provided with a plurality of lead terminals 16, and these lead terminals 16 are connected to the lands 3 of the printed circuit board 2 by solder 5b (see FIG. 2). 1 shows the printed circuit board 2 where the semiconductor package 1 is mounted, in which the solder 5a, the solder resist 12, and the trap member 4a are shown.
[0012]
As shown in the cross-sectional view of FIG. 2, the semiconductor package 1 is obtained by molding a semiconductor chip 18 with an insulating molding material 1a, and a lead terminal 16 and a metal heat radiation member 15 are exposed outside the molding material 1a. I have. The semiconductor chip 18 is provided on the metal heat radiating member 15, and the surface of the heat radiating member 15 opposite to the chip mounting surface is exposed on the back side of the semiconductor package 1. The terminals (not shown) of the semiconductor chip 18 and the lead terminals 16 are connected by bonding wires 19.
[0013]
On the other hand, on the printed circuit board 2 side, in addition to the lands 3, a heat radiation metal pattern 4 and an electrode metal pattern 7 are formed. The electrode metal pattern 7 is, for example, a ground electrode pattern usually provided for improving noise immunity. FIG. 2 shows a state before the heating step of the reflow method, in which paste-like solders 5 a and 5 b are applied on a part of the heat radiation metal pattern 4 and on the land 3. In the case of the metal pattern 4 for heat dissipation, a rectangular solder 5a is applied only to the portion of the semiconductor package 1 facing the heat dissipation member 15 (see FIG. 1). In this embodiment, the metal pattern 4 is a metal pattern for heat dissipation, but this may be a metal pattern for an electrode.
[0014]
As shown in FIG. 1, a solder resist 12 is provided around the solder 5a so as to surround the solder 5a. Actually, a rectangular ring-shaped solder resist 12 is formed on the metal pattern 4 for heat radiation, and a solder paste 5a is applied to a rectangular area surrounded by the solder resist 12. As shown in FIG. 2, a solder resist 12 is also formed on the electrode metal pattern 7. A metal surface of the metal pattern 4 is exposed in an area 4a outside the solder resist forming area of the metal pattern 4 for heat radiation, and this area 4a is hereinafter referred to as a trap member.
[0015]
The semiconductor package 1 is placed on the solders 5a and 5b, and the respective solders 5a and 5b are melted and solidified by the subsequent heating and cooling steps, so that the lead terminals 16 and the lands 3 are connected by soldering and the heat radiating member. 15 and the metal pattern 4 are connected by soldering. When the semiconductor package 1 is placed on the solders 5a and 5b, gaps 8 and 9 are formed between the back surface of the semiconductor package 1 and the printed board 2.
[0016]
In the present embodiment, a rectangular ring-shaped solder resist 12 is formed on the metal pattern 4 around the solder 5a, and the gap 8 in that portion is narrower. On the other hand, the gap 9 in the portion of the trap member 4a around the gap 8 is larger than the gap 8 because the solder resist 12 is not formed.
[0017]
FIG. 3 is a diagram for explaining the flux that expands the gap in the heating step, and is an enlarged view of the gap in FIG. 2. In the heating step, the flux melts out of the solders 5a and 5b. The flux 10 melted from the solder 5a on the metal pattern 4 tends to spread to the narrow gap 8 due to the capillary phenomenon. At this time, since the gap interval of the gap 9 is larger than the gap 8, the flux 10 first spreads over the entire gap 8 and does not leak to the gap 9 side during that time.
[0018]
Further, the area where the gap 8 is formed, that is, the area of the solder resist 12 on the metal pattern 4 is set to have a sufficient area to allow all of the flux 10 melted from the solder 5 a to remain in the gap 8. ing. As a result, it is possible to prevent the flux 10 from spreading from the gap 8 to the gap 9 side, and to prevent the solder flakes 6 from flowing out to the gap 9 side together with the flux 10 to cause an electrical short circuit.
[0019]
Further, even when the solder flakes 6 floating in the flux 10 jump out of the gap 8 toward the gap 9, the solder flakes 6 are captured by the trap member 4 a exposing the metal pattern 4. . Since the metal part of the trap member 4a is exposed, the solder flake 6 and the metal that are in contact with each other are bonded to each other, and the solder flake 6 is restrained at that location. Therefore, the solder flakes 6 protruding from the gaps 8 do not move to the vicinity of the lead terminals 16 of the semiconductor package 1, and an electrical short circuit due to the solder flakes 6 can be prevented.
[0020]
FIG. 4 is a view showing a comparative example, and is a cross-sectional view for explaining the flow of the flux 10 and the behavior of the solder flakes 6 in a mounting structure having no gap 9 or metal trap 4a. FIG. 4 shows a situation in which paste solder 5 is applied on the lands 3 and the heat radiation metal pattern 24 of the printed circuit board 20, and the semiconductor package 1 is placed thereon and heated. The area of the heat dissipating metal pattern 24 is substantially the same as the area of the heat dissipating member 15 of the semiconductor package 1. An electrode metal pattern 21 is formed on the printed circuit board 20, and a solder resist 12 is formed thereon.
[0021]
The solder 5 is melted by the heating process, and the lead terminals 6 and the lands 3 are connected to each other, and the heat radiating member 15 and the heat radiating metal pattern 24 are connected by soldering. The flux 10 is melted from the solder 5 by the heating, and spreads into the gap between the semiconductor package 1 and the substrate 20 by a capillary phenomenon. At this time, a part of the solder 5 is separated and jumps out into the flux 10 and floats in the flux 10 as the solder flake 6. When such a solder flake 6 reaches the edge of the gap and jumps out of the gap, the solder becomes ball-shaped because the space is suddenly widened.
[0022]
As can be seen from FIG. 4, the edge of the gap is located at a position close to the solder connection between the lead terminal 6 and the land 3. Therefore, when such a solder ball 22 moves and adheres to the solder connection, the solder ball 22 Therefore, adjacent lead terminals may be electrically short-circuited.
[0023]
On the other hand, in the above-described first embodiment, the area of the heat radiation metal pattern 4 provided on the printed board 2 is made larger than the area of the heat radiation member 15 of the semiconductor package 1, and the solder resist 12 is formed around the solder 5a. Was formed. Further, by forming the trap member 4 a in which the metal portion of the metal pattern 4 is exposed on the outer peripheral side of the solder resist 12, a region of the gap 9 having a large gap interval is formed on the outer peripheral portion of the gap 8. As a result, it is possible to prevent the solder flakes 6 from flowing into the gap 9 together with the flux 10. Further, even when the solder flake 6 jumps out of the gap 8 toward the gap 9, the solder flake 6 is restrained by the trap member 4 a and does not move to the lead terminal 6 side. A short circuit can be reliably prevented.
[0024]
[Modification]
FIG. 5 to FIG. 7 are views showing modified examples of the first embodiment. FIG. 5 is a sectional view similar to FIG. 2, and FIG. 6 is a perspective view showing a part of the back surface side of the semiconductor package 100. In the modified example, a trap member 101 surrounding the gap 8 is formed on the back surface of the semiconductor package 100 and in a portion corresponding to the outer peripheral region of the gap 8. Further, a groove 102 surrounding the outer periphery of the trap member 101 was formed on the back surface of the semiconductor package 100. The trap member 101 can be easily formed by using a part of the lead frame constituting the heat radiation member 15. 100a is a molding material.
[0025]
The gap 109 between the groove 102 and the printed circuit board 20 has a larger gap interval than the gap 8, and the volume of the gap 8 is set to be sufficiently large compared to the amount of the flux 10 to be melted. The flux 10 can be prevented from flowing out of the gap 8. Further, since the trap member 101 is provided around the gap 8, the binding ability of the solder flakes 6 is further enhanced in combination with the trap member 4a formed by the metal pattern 4.
[0026]
Of course, even when the trap member 4a is not provided on the substrate side as shown in FIG. In the example shown in FIG. 7, the metal pattern 4 covered with the solder resist 12 is formed up to a position facing the groove 102 of the semiconductor package 100a, and a large gap between the groove 102 and the solder resist 12 is provided. 109 are formed.
[0027]
By forming the trap member 101 and the groove 102 on the semiconductor package 100 side as in the above-described modified example, even when the gap 9 and the trap member 4a cannot be formed on the substrate side due to, for example, the convenience of pattern wiring, This can be easily handled on the semiconductor package 100 side.
[0028]
In the above-described embodiment, the trap members 4 a and 101 are provided so as to be in contact with the periphery of the gap 8. good.
[0029]
-2nd Embodiment-
FIGS. 8A and 8B are diagrams illustrating a second embodiment of the mounting structure according to the present invention, wherein FIG. 8A is a plan view of a printed circuit board on which the semiconductor package 1 is mounted, and FIG. It is VII sectional drawing. The semiconductor package 1 is mounted on the printed board 30 as shown by a broken line. Reference numeral 34 denotes a heat-dissipating metal pattern to which the heat-dissipating member 15 of the semiconductor package 1 is connected by soldering. The solder resist 12 is formed in a peripheral region surrounding a region where the solder 5 is applied.
[0030]
Small gaps 8 are formed between the solder resist 12 of the metal pattern 34 and the semiconductor package 1 as in the first embodiment. The four corners of the metal pattern 34 extend in the direction in which the arrangement of the lands 3 is broken. That is, the region of the gap 8 (8a) extends not only around the solder 5 as shown in FIG. 8A, but also in the four corner directions of the semiconductor package 1 as shown by reference numeral 8a. At the entrances of the gaps 8a at the four corners, trap members 34a from which the solder resist 12 has been partially removed are formed. In the example shown in FIG. 8A, three trap members 34a are formed for each gap 8a. Although the number of the trap members 34a is three in the present embodiment, the number of the trap members 34a is not limited to this.
[0031]
A gap 9 having a larger gap interval than the gap 8 is formed around the gap 8 (8a). This gap 9 is cut off only at the end of the gap 8a (the portion indicated by the arrow). In the present embodiment, as shown in FIG. 8B, the region of the gap 9 is formed so as to expose the substrate material. In the above-described first embodiment, the area of the area of the gap 8 around the solder 5a is set to be large enough to store the melted flux 10, but in the second embodiment, the first area is set to the first area. It is set smaller than in the embodiment. With such a setting, it is possible to sufficiently secure an area E on which a wiring pattern used for wiring, a through hole, a VIA hole, and the like can be formed on the printed circuit board corresponding to the back surface of the semiconductor package 1. In FIG. 8B, an electrode metal pattern 32 is formed in the area E.
[0032]
In the present embodiment, the flux melted out of the solder 5 spreads in the narrow gap 8 due to the capillary phenomenon, and spreads from the gap 8 in the peripheral portion of the solder 5 toward the gaps 8a at the four corners. If the amount of the melted flux is larger than the volume of the gap 8 (8a), the excess flux spreads toward the end of the gap 8a and flows out onto the substrate from the portion where the gap 9 is cut as shown by the arrow. The portion where the flux flows out is also a region where the arrangement of the lands 3 is broken, and by extending the electrode pattern 34 on which the solder resist 12 is formed in the direction of this region, the flux in the gap 8 is reduced via the gap 8a. 3 can be discharged. Therefore, it is possible to prevent the adverse effect of the flux on the solder connection between the land 3 and the lead terminal.
[0033]
Also, even if a part of the solder 5 melts into the flux and floats as a solder flake, the solder flake moves in the direction of the gap 8a according to the flow of the flux. Since the trap member 34a is formed at the entrance of the gap 8a, the solder flakes are caught by the trap member 34a, and the solder flakes can be reliably prevented from being discharged to the outside of the gap 8.
[0034]
In the correspondence between the embodiment described above and the elements of the claims, the region where the solder resist 12 of the metal pattern 4 is formed corresponds to the first pattern region, and the trap member 4a of the metal pattern 4 corresponds to the second pattern. The area and the gap 8a constitute the extending area. Further, the present invention is not limited to the above-described embodiment at all, as long as the features of the present invention are not impaired.
[Brief description of the drawings]
FIG. 1 is a plan view showing a first embodiment of a semiconductor package mounting structure according to the present invention.
FIG. 2 is a sectional view taken along line II-II of FIG.
FIG. 3 is a diagram illustrating a flux that expands a gap in a heating step.
FIG. 4 is a diagram showing a comparative example.
FIG. 5 is a cross-sectional view showing a modification of the first embodiment.
6 is a perspective view showing a part of the back surface side of the semiconductor package 100 shown in FIG. 5;
FIG. 7 is a diagram showing another example of the modified example.
8A and 8B are diagrams illustrating a second embodiment of the mounting structure according to the present invention, wherein FIG. 8A is a plan view of a printed circuit board on which the semiconductor package 1 is mounted, and FIG. 8B is a VII of FIG. It is a VII sectional view.
[Explanation of symbols]
1,100 Semiconductor package 2,20,30 Printed circuit board 3 Land 4,7,24,32,34 Metal pattern 4a, 101,34a Trap member 5,5a, 5b Solder 6 Solder flake 8,8a, 9,109 Gap 10 Flux 12 Solder resist 15 Heat dissipation member 16 Lead terminal 18 Semiconductor chip 22 Solder ball 102 Groove

Claims (8)

In a semiconductor package mounting structure in which a lead terminal of a semiconductor package is connected to a land on a substrate and a chip heat radiation member of the semiconductor package is soldered to a heat radiation or an electrode metal pattern on the substrate by a reflow method, respectively.
A mounting structure for a semiconductor package, comprising: a trap member for preventing solder flakes generated when the chip heat radiating member is connected to the metal pattern by soldering from moving from the metal pattern toward the lead terminal. . The mounting structure of the semiconductor package according to claim 1,
A semiconductor package mounting structure, wherein the trap member is provided on a substrate mounting surface and / or a surface of the semiconductor package on a substrate side. The mounting structure of a semiconductor package according to claim 2,
A first gap region between the semiconductor package and the substrate, provided in contact with a periphery of a connection portion between the semiconductor chip heat radiating member and the metal pattern;
A second gap region provided between the semiconductor package and the substrate in contact with an outer periphery of the first gap region and having a gap size larger than a gap size of the first gap region. A mounting structure of a semiconductor package, characterized in that: The mounting structure of a semiconductor package according to claim 3,
A second gap region formed by providing a groove on at least one of a substrate mounting surface and a substrate-side surface of the semiconductor package on the lead terminal side with respect to the trap member; Construction. The mounting structure of the semiconductor package according to claim 3 or 4,
The first gap area sandwiched by the second gap area is separated from the first gap area provided around the connection between the semiconductor chip heat dissipation member and the metal pattern by the semiconductor package. A mounting structure of a semiconductor package, wherein the mounting structure is formed in a direction of a package apex where no lead terminal is provided. The mounting structure of the semiconductor package according to claim 1,
The area of the metal pattern is set to be larger than the area of the heat dissipation member for the semiconductor chip,
A mounting structure of a semiconductor package, characterized in that at least a part of a region excluding a connecting portion of the heat dissipation member for a semiconductor chip on the metal pattern is exposed to serve as the trap member. The mounting structure of the semiconductor package according to claim 1,
The area of the metal pattern is set to be larger than the area of the semiconductor chip heat radiating member, and a region on the metal pattern except the semiconductor chip heat radiating member connecting portion is formed around the semiconductor chip heat radiating member connecting portion. Dividing into a first pattern region in contact with and a second pattern region in contact with the outer periphery of the first pattern region,
Forming a solder resist layer of a predetermined thickness on the first pattern region so as to form a gap between the semiconductor package and the semiconductor package;
A mounting structure for a semiconductor package, wherein a metal pattern in the second pattern region is exposed to serve as the trap member. In a semiconductor package mounting structure in which a lead terminal of a semiconductor package is connected to a land on a substrate and a chip heat radiation member of the semiconductor package is soldered to a heat radiation or an electrode metal pattern on the substrate by a reflow method, respectively.
A peripheral region which is a gap formed between the semiconductor package and the substrate and which is in contact with a periphery of a connection portion between the semiconductor chip heat radiating member and the metal pattern; and a lead of the semiconductor package from the peripheral region. A first gap region having an extension region extending in the vertex direction of the package where no terminal is provided;
A second gap region provided between the semiconductor package and the substrate in contact with an outer periphery of the first gap region and having a gap size larger than a gap size of the first gap region;
A semiconductor package mounting structure, comprising: a trap member provided in the extension region, for preventing movement of the solder flake in the package apex direction.

Images