JP2004104608A - Input device - Google Patents

Abstract

In an input device, when an Nch transistor is arranged between an input pad and an input buffer in order to provide a withstand voltage equal to or higher than a power supply voltage for an input signal, the power supply voltage or the H level of the input signal is reduced. , No H-level signal propagates inside the chip.
A Pch transistor (P103) is disposed in parallel with an Nch transistor (N103) for power supply protection, and is turned on / off by a control signal (c). The transistor P103 is turned on, and the potential applied to the input pad is propagated inside the chip. When a signal higher than the power supply voltage is applied to the input pad IN, the Pch transistor P103 is turned off, and at the same time, the substrate bias of the transistor is changed by the substrate bias switching circuit 104 to prevent a leak current.
[Selection diagram] Fig. 1

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an input device, and more particularly to an input device capable of controlling a withstand voltage of an input signal at an input terminal.
[0002]
[Prior art]
Conventionally, a device for providing a withstand voltage equal to or higher than a power supply voltage to an input terminal generally has a configuration as shown in FIG. 4 (for example, see Patent Document 1). Hereinafter, the configuration will be described with reference to the drawings.
[0003]
FIG. 4 is a diagram showing a basic configuration of a conventional withstand voltage type input terminal. 4, a signal input from an input pad IN is input to an inverter 201 via a protection circuit 403, and a signal is transmitted from out to the inside of the chip.
[0004]
When an H-level signal is input to the input pad IN, the Nch transistor N403 in the protection circuit 403 functions as a transistor that is always ON because its gate is connected to the internal power supply VDD. Is input, a voltage V between the gate and the source of the Nch transistor N403 is input. _{GS ｜ N403} Becomes the threshold voltage Vth of the Nch transistor, the level of the signal input to the inverter 401 becomes Vth _{S ｜ N403} = V _{G ｜ N403} -V _th = VDD-V _th Even if the H level of the signal input to the input pad IN is equal to or higher than the internal power supply voltage VDD, the gate voltage input to the input inverter 401 is given the source potential of the Nch transistor, The Nch transistor N401 inside the input inverter is protected. At the same time, the N-channel transistor N403 in the protection circuit 403 also has the gate-drain voltage V _{DG ｜ N403} Is V _IN −VDD, the above V _IN -VDD is the voltage V _{DG ｜ N203} Is protected until the voltage exceeds the withstand voltage. At this time, since the H level signal is input to the input pad IN of the power supply circuit 402 that supplies power to the input inverter 401, the Pch transistor P402 in the power supply circuit 402 is turned off.
[0005]
On the other hand, the gate potential of the Nch transistor N402 in the power supply circuit 402 is connected to the source potential V of the Nch transistor N403 in the protection circuit 403. _{S ｜ N403} And the drain voltage of the Pch transistor P401 in the input inverter 401 becomes V _{S ｜ N403} -V _th As a result, the Pch transistor P401 itself is protected.
[0006]
Next, when an L-level signal is input to the input pad IN, the Nch transistor N403 inside the protection circuit 403 functions as a transistor that is always ON because its gate input is connected to the internal power supply VDD. When the L-level signal is input, an Nch gate is open between the drain and the source of the Nch transistor N403. _{S ｜ N403} = GND, and the L-level potential is applied to the gate voltage input to the input inverter 401 as it is. Also, at this time, in the power supply circuit 402 that supplies power to the input inverter 401, since an L-level signal is input to the input pad IN, the Pch transistor P402 inside the power supply circuit 402 is turned on. The gate potential of the Nch transistor N402 in the power supply circuit 402 is connected to the source potential V of the Nch transistor N403 in the protection circuit 403. _{S ｜ N403} = GND is applied and the state is turned off, so that the drain voltage of the Pch transistor P401 in the input inverter 401 is V _{S ｜ P403} = VDD.
[0007]
As described above, in the configuration of the conventional input device shown in FIG. 4, even when an H level signal having a potential equal to or higher than the internal power supply voltage is input to the input pad, the internal transistor is not destroyed. An H-level signal having the same potential as the internal power supply voltage can be transmitted to the inside of the chip.
[0008]
[Patent Document 1]
JP-A-5-212299
[0009]
[Problems to be solved by the invention]
However, in this conventional input device, when the voltage of the power supplied to the chip is reduced, the voltage input to the input inverter 403 is changed regardless of the H level potential of the signal input from the input pad IN. The voltage VDD and the threshold voltage V of the Nch transistor N403 inside the protection circuit 403 _th Therefore, it is expected that the Nch transistor N401 of the input inverter 401 will not be turned on, and as a result, no signal will be transmitted inside the chip.
[0010]
The present invention has been made in order to solve such a problem of the related art. Even when the power supply voltage supplied to the chip becomes low, the H-level signal input from the input pad IN can be correctly corrected. It is an object to provide an input circuit that can be transmitted to the inside of a chip.
[0011]
[Means for Solving the Problems]
In order to solve the above-mentioned problem, an input device according to claim 1 of the present invention has an input pad to which a signal is input, and an H level of a signal input from the input pad being higher than a power supply voltage of a chip. An Nch transistor for protecting a transistor inside the inverter for transmitting a signal to the inside of the chip; an input inverter for transmitting a signal input via the Nch transistor to the inside of the chip; and a signal input from the input pad. A power supply circuit for switching power supplied to the input inverter in accordance with the level of the input inverter, and a control signal c which becomes H when the power supply voltage of the chip is low when the power supply voltage of the chip is low, A protection circuit for transmitting the H / L level of the input signal to the input inverter as it is, together with the Nch transistor. A Pch transistor for constituting the and is characterized in that it comprises a.
[0012]
According to a second aspect of the present invention, in the input device according to the first aspect, the Pch transistor of the protection circuit is configured such that an H level of an input signal input from the input pad is a power supply of a chip. When the voltage is higher than the voltage, the power supply for biasing the substrate of the Pch transistor which is in the OFF state is set to one of a power supply terminal to which the same potential as the H level signal higher than the power supply voltage of the chip is applied and a power supply voltage of the chip A substrate bias switching circuit for switching to one side is provided.
[0013]
According to a third aspect of the present invention, in the input device according to the first aspect, the Pch transistor of the protection circuit is configured such that an H level of an input signal input from the input pad is a power supply of a chip. A substrate bias switching circuit for biasing the substrate of the Pch transistor which is in an OFF state when the voltage is higher than the voltage, at the same H / L level potential as the input signal input from the input pad; It is assumed that.
[0014]
In the input device according to a fourth aspect of the present invention, in the input device according to the first aspect, the Pch transistor of the protection circuit is configured such that an H level of an input signal input from the input pad is a power supply of a chip. When the voltage is higher than the voltage, a charge pump circuit for biasing a potential obtained by charging up a power supply voltage of the chip is provided on a substrate of the Pch transistor which is in an OFF state.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(Embodiment 1)
FIG. 1 is a diagram showing a configuration of the input device according to the first embodiment of the present invention.
In FIG. 1, when the H level of the signal input from the input pad IN has a higher potential than the power supply voltage of the chip, the input signal is input to the protection circuit 103 via the signal line S103. Inside the protection circuit 103, an Nch transistor N103 and a Pch transistor P103 are configured in parallel, and each functions as a switch circuit. In the Nch transistor N103 and the Pch transistor P103, the gate of the transistor N103 is connected to the power supply voltage VDD1 and is always on. On the other hand, the Pch transistor P103 is ON / OFF controlled by the control signal c.
[0016]
Here, when the power supply voltage of the chip is low, the control signal c becomes L and the Pch transistor P103 is turned on. When the power supply voltage of the chip is high, the control signal c becomes H and the Pch transistor P103 is turned off.
[0017]
Under the condition that the H level of the signal input from the input pad IN is higher than the power supply voltage of the chip, an H signal is given to the control signal c, whereby the Nch transistor N103 While the Pch transistor P103 is always in the ON state, the Pch transistor P103 is in the OFF state. That is, the input signal S103 is propagated to the input inverter 101 via the drain and source of the N-channel transistor N103 in the ON state. At this time, the H-level signal input from the input pad IN is input to the drain side of the Nch transistor N103 in the protection circuit 103, but the potential of the H-level signal output from the source side of the Nch transistor N103 is , The voltage V applied to the gate of the Nch transistor N103 _{G ｜ N103} And the threshold voltage V of the transistor N103 _{th ｜ N103} Therefore, the H-level potential of the signal S102 input to the input inverter 101 is V _{G ｜ N103} -V _{th ｜ N103} It becomes.
[0018]
As described above, even when the H level of the signal input to the input pad IN is higher than the power supply voltage of the chip, the H level of the signal S102 input to the input inverter 101 remains at the above-described potential V _{G ｜ N103} -V _{th ｜ N103} Therefore, an H-level signal can be input from the output terminal out into the chip without destroying the transistors P101 and N101 constituting the input inverter 101.
[0019]
At this time, since the signal input from the input pad IN is at the H level, the Pch transistor P102 in the power supply circuit 102 is turned off. On the other hand, the signal S102 having the potential as described above is also input to the Nch transistor N102 of the power supply circuit 102 in addition to the input inverter 101, and the transistor N102 is turned on. At this time, the potential output to the source side of the transistor N102 is V _{G ｜ N102} -V _{th | N102} And supplied as a power source for the input inverter 101. In other words, the input inverter 101 has the Vch on the drain side of the Pch transistor P101. _{G ｜ N102} -V _{th | N102} Is supplied, the power supply voltage VDD of the chip is not directly applied to the drain of the Pch transistor P101 in the input inverter 101. Therefore, the V input originally input to the gate side of the transistor P101. _{G ｜ N103} -V _{th ｜ N103} And the potential difference between the power supply voltage VDD1 of the chip and the power supply voltage VDD1 of the chip prevents the Pch transistor P101 from being turned on.
[0020]
Next, when the signal input from the input pad IN is at the H level and the power supply voltage of the chip is low, the input signal is input to the protection circuit 103 via the signal line S103. Is supplied with an L-level signal, so that the Nch transistor N103 in the protection circuit 103 and the Pch transistor P103 in the protection circuit 103 are both turned on. Accordingly, the input signal S103 is transmitted to the input inverter 101 via the source-drain of the N-channel transistor N103 and the P-channel transistor P103 in the ON state. At this time, the input signal S103 has the H level input from the input pad IN. Since the signal is a P channel between the drain and the source of the Pch transistor P103 in the protection circuit 103 and the gate is open, the potential of the input signal is directly transmitted to the input inverter 101 via the P channel transistor. You.
[0021]
Lastly, when the signal input to the input pad IN is at the L level, the input signal is input to the protection circuit 103 via the signal line S103, but the Nch transistor N103 in the protection circuit 103 is always ON. Therefore, the L signal input to the input pad IN is transmitted to the input inverter 101 via the source-drain of the N-channel transistor N103 in the ON state without depending on the state of the control signal c. You.
[0022]
At this time, since the signal input from the input pad IN is at the L level, the Pch transistor P102 in the power supply circuit 102 is turned on. On the other hand, as described above, the L-level signal S102 output from the source side of the Nch transistor N103 in the protection circuit 103 is input not only to the input inverter 101 but also to the Nch transistor N102 of the power supply circuit 102, The transistor N102 is turned off. At this time, the potential output to the source side of the Pch transistor P102 in the power supply circuit 102 becomes the power supply voltage VDD1 and is supplied as power for the input inverter 101. That is, since the L-level potential is applied to the gate of the Pch transistor P101 in the input inverter 101, the transistor P101 is turned on, and the output signal of the inverter 101 becomes the potential of the power supply voltage VDD1.
[0023]
As described above, in the circuit shown in FIG. 1, when the H level of the signal input from the input pad IN has a higher potential than the power supply voltage of the chip, the input signal is transmitted through the signal line S103. At the same time as input to the protection circuit 103 via the control circuit c, an H signal is given to the control signal c to turn off the Pch transistor P103. At this time, the power supply voltage is usually used as the substrate bias of the Pch transistor P103. Since VDD1 is supplied, when an H signal having a potential higher than the power supply voltage VDD1 is input to the drain side of the transistor P103, a leakage current occurs between the P layer on the drain side and the N layer on the substrate side. Then, there is a possibility that the chip may be destroyed.
[0024]
Therefore, in the circuit shown in FIG. 1 according to the first embodiment, the voltage applied to the substrate of the Pch transistor P103 is switched by the substrate bias switching circuit 104 to prevent the occurrence of the leak current as described above. Like that. That is, when an H level signal having a higher potential than the power supply voltage VDD1 is input to the input pad IN, the substrate bias switching circuit 104 is switched to the high potential side power supply terminal VDD2 by the control signal c. The potential difference between the drain and the substrate of the Pch transistor P104 is eliminated to prevent generation of a leak current. On the other hand, when the H-level signal input to the input pad IN is lower than the power supply voltage VDD1, the substrate bias switching circuit 104 is switched to the power supply voltage VDD1 by the control signal c, and the Pch transistor P103 is in the normal state. To
[0025]
As described above, in the first embodiment, the input pad to which a signal is input, the inverter that transmits the signal input to the input pad to the inside of the chip, and the H level of the signal input from the input pad An Nch transistor provided between the input pad and the input of the inverter so that the H level of the input signal is not directly input to the input of the inverter even when the input signal is higher than the power supply voltage of the chip; A power supply circuit for switching power supplied to the input inverter in accordance with the level of a signal input from the pad; and a power supply circuit connected in parallel with the Nch transistor and turned on by a control signal c when the power supply voltage of the power supply circuit is low. State, and when the power supply voltage of the power supply circuit is low, the H / L level of the input signal is directly supplied to the input inverter. A power supply having the same potential as an H level signal higher than a power supply voltage of a chip, comprising: a power supply having a Pch transistor constituting a protection circuit together with the Nch transistor, and a power supply biasing a substrate of the Pch transistor. In the case where the power supply voltage of the input device drops, the Pch transistor connected in parallel with the Nch transistor in the protection circuit is turned on by the control signal when the power supply voltage of the input device drops. Thus, the H level of the input signal can be directly input to the input inverter, and the signal can be correctly transmitted in the chip. On the other hand, when a normal power supply voltage is supplied to the chip and an H-level signal having a higher potential than this power supply voltage is input, it is applied to the back gate of the Pch transistor which is in the OFF state inside the protection circuit. By switching the signal to be supplied to a power supply terminal having the same potential as the H level of the input signal, it is possible to prevent a leak current generated between the source and the substrate inside the Pch transistor.
[0026]
(Embodiment 2)
FIG. 2 is a diagram showing a configuration of the input device according to the second embodiment of the present invention.
In the second embodiment shown in FIG. 2, the configurations and operation principles of input inverter 201, power supply circuit 202, and protection circuit 203 are the same as those of 101, 102, and 103 in the first embodiment. In the second embodiment, the configuration of substrate bias switching circuit 204 for switching the substrate bias of Pch transistor P203 in protection circuit 203 is different from that in the first embodiment.
[0027]
In the input device according to the second embodiment shown in FIG. 2, when the H level of the signal input from the input pad IN has a higher potential than the power supply voltage of the chip, the input signal is transmitted via the signal line S203. At the same time as input to the protection circuit 203, an H signal is given to the control signal c, and the Pch transistor P203 is turned off. At this time, since the power supply voltage VDD1 is normally supplied as the substrate bias of the Pch transistor P203, when an H signal having a potential higher than the power supply voltage VDD1 is input to the drain side of the transistor P203, the drain side is supplied. Since current flows between the P layer and the N layer on the substrate side, the chip may be broken.
[0028]
For this reason, in the circuit shown in FIG. 2, the bias voltage applied to the substrate of the Pch transistor P203 is switched by the substrate bias switching circuit 204 to prevent the occurrence of the leak current as described above. I have. That is, when an H level signal having a higher potential than the power supply voltage VDD1 is input to the input pad IN, the substrate bias switching circuit 204 is switched to the input pad IN side by the control signal c which is the H signal. The potential difference between the drain and the substrate of the Pch transistor P204 in the OFF state is eliminated, thereby preventing the generation of a leak current between the drain and the substrate. On the other hand, when the power supply voltage is low, the substrate bias switching circuit 204 is switched to the power supply voltage VDD1 by the control signal c which is the L signal, and the Pch transistor P203 is brought into a normal state.
[0029]
As described above, in the second embodiment, the input pad to which a signal is input, the inverter that transmits the signal input to the input pad to the inside of the chip, and the H level of the signal input from the input pad An Nch transistor provided between the input pad and the input of the inverter so that the H level of the input signal is not directly input to the input of the inverter even when the input signal is higher than the power supply voltage of the chip; A power supply circuit for switching power supplied to the input inverter in accordance with a level of a signal input from a pad; and a power supply circuit connected in parallel with the Nch transistor and turned on by a control signal when a power supply voltage of the power supply circuit is low. When the power supply voltage of the power supply circuit is low, the H / L level of the input signal is directly transmitted to the input inverter. A P-channel transistor constituting a protection circuit together with the N-channel transistor, and a substrate bias switching circuit for applying a potential at the same H / L level as an input signal as a power supply for biasing the substrate of the P-channel transistor. Therefore, when the power supply voltage of the input device is reduced, the P-channel transistor connected in parallel with the N-channel transistor in the protection circuit is turned on by the control signal, so that the H level of the input signal is reduced. The signal can be directly input to the input inverter, and the signal can be transmitted correctly inside the chip. On the other hand, when a normal power supply voltage is supplied to the chip and an H-level signal having a potential higher than the potential of the power supply voltage is input, the signal is input to the back gate of the Pch transistor which is in the OFF state inside the protection circuit. By applying the signal, it is possible to prevent a leak current generated between the source and the substrate inside the Pch transistor. Moreover, since the input signal itself is applied to the back gate of the Pch transistor, the number of terminals can be reduced.
[0030]
(Embodiment 3)
FIG. 3 is a diagram illustrating a configuration of the input device according to the third embodiment of the present invention.
In the third embodiment shown in FIG. 3, the configuration and operation principle of input inverter 301, power supply circuit 302, and protection circuit 303 are the same as those of 101, 102, and 103 in the first embodiment. In the third embodiment, the configuration of substrate bias switching circuit 304 for switching the substrate bias of Pch transistor P303 in protection circuit 303 is different from that in the first or second embodiment.
[0031]
In the input device according to the third embodiment shown in FIG. 3, when the H level of the signal input from input pad IN has a higher potential than the power supply voltage of the chip, the input signal is protected via signal line S303. At the same time as input to the circuit 303, an H signal is given to the control signal c, and the Pch transistor P303 is turned off. At this time, the power supply voltage VDD1 is normally supplied as the substrate bias of the Pch transistor P303. When an H signal having a higher potential than the power supply voltage VDD1 is input to the drain side of the transistor P303, the drain side of the transistor P303 is turned off. Leakage current may occur between the P layer and the N layer on the substrate side, and the chip may be broken.
[0032]
Therefore, in the circuit shown in FIG. 3, the voltage applied to the substrate of the Pch transistor P303 is switched by the substrate bias switching circuit 304 to prevent the occurrence of the leak current as described above. That is, when an H level signal having a higher potential than the power supply voltage VDD1 is input to the input pad IN, the charge pump function in the substrate bias switching circuit 304 is operated by the control signal c which is the H signal. By increasing the voltage biasing the substrate of the Pch transistor P303 and eliminating the potential difference between the drain and the substrate of the Pch transistor P303, the occurrence of a leak current is prevented. On the other hand, when the power supply voltage VDD1 is low, the charge pump function in the substrate bias switching circuit 304 is turned off by the control signal c so that a bias having the same potential as the power supply VDD1 is applied, and the Pch transistor Put P303 in a normal state.
[0033]
As described above, in the third embodiment, the input pad to which the signal is input, the inverter that transmits the signal input to the input pad to the inside of the chip, and the H level of the signal input from the input pad An Nch transistor provided between the input pad and the input of the inverter so that the H level of the input signal is not directly input to the input of the inverter even when the input signal is higher than the power supply voltage of the chip; A power supply circuit for switching power supplied to the input inverter in accordance with a level of a signal input from a pad; and a power supply circuit connected in parallel with the Nch transistor and turned on by a control signal when a power supply voltage of the power supply circuit is low. When the power supply voltage of the power supply circuit is low, the H / L level of the input signal is directly transmitted to the input inverter. And a Pch transistor constituting a protection circuit together with the Nch transistor, and a charge pump circuit for applying a potential obtained by charging up a power supply voltage of a chip as a power supply for biasing a substrate of the Pch transistor. When the power supply voltage of the input device decreases, the P-channel transistor connected in parallel with the N-channel transistor in the protection circuit is turned on by a control signal, so that the H level of the input signal is directly input to the input inverter. Thus, a signal can be transmitted correctly inside the chip. On the other hand, when a normal power supply voltage is supplied to the chip and an H-level signal having a higher potential than the power supply voltage is input, the back gate of the Pch transistor in the OFF state in the protection circuit is By supplying and applying a voltage having the same potential as the H level of the input signal from the charge pump, it is possible to prevent generation of a leak current between the source and the substrate inside the Pch transistor. Moreover, by using the charge pump circuit, an input device with a reduced number of terminals and a simple circuit configuration can be realized.
[0034]
【The invention's effect】
As described above, according to the input device of the present invention (claim 1), when the input pad to which a signal is input and the H level of the signal input from the input pad are higher than the power supply voltage of the chip, An Nch transistor for protecting a transistor inside the inverter for transmitting a signal to the inside of the chip, an input inverter for transmitting a signal input via the Nch transistor to the inside of the chip, and a level of a signal input from the input pad A power supply circuit for switching power supplied to the input inverter in response to the input signal; and a control signal c which becomes H when the power supply voltage of the chip is low and which is H when the power supply voltage of the chip is low. To form the protection circuit together with the Nch transistor. In the conventional circuit configuration as shown in FIG. 4, when the voltage of the power supply supplied to the chip is reduced, the H level of the input signal is transmitted to the inside of the chip. In contrast, when the power supply voltage is lowered, the P-channel transistor connected in parallel with the N-channel transistor in the protection circuit is turned on by the control signal, so that the H level of the input signal is reduced. The signal can be directly input to the input inverter, and the signal can be transmitted correctly inside the chip.
[0035]
According to the input device of the present invention (claim 2), in the input device according to claim 1, the Pch transistor of the protection circuit is configured such that an H level of an input signal input from the input pad is a power supply voltage of a chip. If the voltage is higher than the power supply voltage of the chip, the power supply for biasing the substrate of the Pch transistor which is in the OFF state is either a power supply terminal to which the same potential as the H level signal higher than the power supply voltage of the chip is applied or the power supply voltage of the chip. Is provided, a normal power supply voltage is supplied to the chip, and when an H-level signal having a potential higher than the potential of the power supply voltage is input, the internal circuit of the protection circuit is provided. By switching the voltage applied to the back gate of the Pch transistor to the power supply terminal having the same potential as the H level of the input signal, Effect of preventing a leakage current generated between the substrates is obtained - source inside register.
[0036]
According to the input device of the present invention (claim 3), in the input device of claim 1, the Pch transistor of the protection circuit is configured such that an H level of an input signal input from the input pad is a power supply voltage of a chip. When the voltage is higher, the substrate of the Pch transistor in the OFF state is provided with the substrate bias switching circuit for biasing the same H / L level potential as the input signal input from the input pad. When a normal power supply voltage is supplied to the chip and an H level signal having a higher potential than the power supply voltage is input, the voltage applied to the back gate of the Pch transistor inside the protection circuit is determined by the input signal Is switched to the power supply terminal having the same potential as the H level of Prevention can effect can be obtained.
[0037]
According to the input device of the present invention (claim 4), in the input device according to claim 1, the Pch transistor of the protection circuit is configured such that the H level of the input signal input from the input pad is the power supply voltage of the chip. In the case where the voltage is higher, a charge pump circuit for biasing the potential obtained by charging up the power supply voltage of the chip is provided on the substrate of the Pch transistor in the OFF state. By supplying and applying a voltage having the same potential as the H level of the input signal to the back gate from the charge pump, it is possible to prevent a leak current generated between the source and the substrate inside the Pch transistor and reduce the number of terminals. The effect of realizing the input device can be obtained with a simple circuit configuration.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of an input device according to a first embodiment of the present invention.
FIG. 2 is a configuration diagram of an input device according to a second embodiment of the present invention.
FIG. 3 is a configuration diagram of an input device according to a third embodiment of the present invention.
FIG. 4 is a configuration diagram of an input device according to a conventional example.
[Explanation of symbols]
101 input inverter
P101 Pch transistor of input inverter
N101 Nch transistor of input inverter
S101 Output of input inverter
102 Power supply circuit for input inverter
P102 Pch transistor of power supply circuit
N102 Nch transistor for power supply circuit
S102 Output of protection circuit
103 Protection circuit
P103 Pch transistor of protection circuit
N103 Nch transistor of protection circuit
S103 Input signal
104 Substrate bias switching circuit for Pch transistor of protection circuit
S104 control signal
201 input inverter
P201 Pch transistor of input inverter
N201 Nch transistor of input inverter
S201 Output of input inverter
202 Input power supply circuit for inverter
P202 Pch transistor of power supply circuit
N202 Nch transistor for power supply circuit
S202 Output of protection circuit
203 protection circuit
N203 Nch transistor for protection circuit
P203 Pch transistor of protection circuit
S203 Input signal
204 Substrate bias switching circuit for Pch transistor of protection circuit
S204 control signal
301 input inverter
P301 Pch transistor of input inverter
N301 Nch transistor of input inverter
S301 Output of input inverter
302 Inverter power supply circuit
P302 Pch transistor of power supply circuit
N302 Nch transistor for power supply circuit
S302 Output of protection circuit
303 protection circuit
P303 Pch transistor of protection circuit
N303 Nch transistor of protection circuit
S303 Input signal
304 Charge pump for substrate bias of Pch transistor of protection circuit
S304 control signal
401 input inverter
P401 Pch transistor of input inverter
N401 Nch transistor of input inverter
S401 Output of input inverter
402 Input inverter power supply circuit
P402 Pch transistor of power supply circuit
N402 Nch transistor of power supply circuit
S402 Output of protection circuit
403 protection circuit
N403 Nch transistor for protection circuit
S403 Input signal

Claims (4)

An input pad for inputting a signal,
An Nch transistor for protecting a transistor inside the inverter that transmits a signal to the inside of the chip when the H level of the signal input from the input pad is higher than the power supply voltage of the chip;
An input inverter for transmitting a signal input through the Nch transistor to the inside of the chip;
A power supply circuit that switches power supplied to the input inverter according to a level of a signal input from the input pad;
The Nch transistor, which is turned on by a control signal c which becomes H when the power supply voltage of the chip is low and becomes H when the power supply voltage of the chip is low, and transmits the H / L level of the input signal to the input inverter as it is. A Pch transistor which together forms a protection circuit,
An input device comprising: The input device according to claim 1,
When the H level of the input signal input from the input pad is higher than the power supply voltage of the chip, the Pch transistor of the protection circuit supplies a power supply for biasing the substrate of the Pch transistor in an OFF state to a power supply of the chip. A power supply terminal to which the same potential as the H level signal higher than the voltage is applied, and a substrate bias switching circuit for switching to any one of a chip power supply voltage,
An input device, characterized in that: The input device according to claim 1,
When the H level of the input signal input from the input pad is higher than the power supply voltage of the chip, the Pch transistor of the protection circuit is input from the input pad to the substrate of the Pch transistor that is in the OFF state. A substrate bias switching circuit for biasing the same H / L level potential as the input signal.
An input device, characterized in that: The input device according to claim 1,
When the H level of the input signal input from the input pad is higher than the power supply voltage of the chip, the Pch transistor of the protection circuit charges the power supply voltage of the chip to the substrate of the Pch transistor which is in the OFF state. A charge pump circuit for biasing the increased potential,
An input device, characterized in that:

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