JP2004103711A - Semiconductor light emitting device - Google Patents

Abstract

An extremely inexpensive and low operating voltage semiconductor light emitting device is obtained by suppressing In diffusion from a metal oxide window layer to a semiconductor contact layer and generating a tunnel current at a low voltage.
A light-emitting portion in which an active layer is sandwiched between cladding layers having different conductivity types is formed on a substrate having a first conductivity type, and a contact layer having a second conductivity type is formed thereon. In the semiconductor light emitting device, a metal oxide window layer 7 is formed thereon, a front surface electrode 8 is formed on a part of the front surface side, and a back surface electrode 9 composed of a whole or partial electrode is formed on the back surface of the substrate. The metal oxide window layer 7 has a two-layer structure including a high-temperature forming part 7a having a film forming temperature of 400 ° C. or more and a low-temperature forming part 7b having a film forming temperature of 350 ° C. or less in order from the surface in contact with the contact layer 6. I do.
[Selection diagram] Fig. 1

Description

【００４０】
【表２】

【００４１】
表１及び表２において、符号ｃ、ｄ、ｇ、ｈを付けた試料が本発明の実施例であり、本発明の要件である「高温形成部の成膜温度が４００℃以上であり、低温形成部の成膜温度が３５０℃以下である」を満たす。他の試料はこれに対する比較例となるものである。表１から判るように、この実施例ｃ、ｄ、ｇ、ｈについては、順方向電圧が２Ｖ前後であり、これ以外の比較例よりも段違いに低い動作電圧のＬＥＤとなる。また、従来例（図５）のＬＥＤの順方向動作電圧５．２４Ｖよりも、段違いに低い動作電圧のＬＥＤとなる。
【００４２】
また、表２から判るように、この実施例ｃ、ｄ、ｇ、ｈのＬＥＤは、その発光出力についても、２ｍＷ台という大きな値が得られる。これ以外の試料である比較例のＬＥＤは１ｍＷ前後であり、また従来例（図５）のＬＥＤの発光出力は１．１０ｍＷであるから、実施例ｃ、ｄ、ｇ、ｈのＬＥＤは、これらの２倍近い発光出力が得られる。
【００４３】
図１（ａ）構造のＬＥＤの上記試作例（表１及び表２）において、順方向動作電圧が２Ｖ前後であったもの（実施例ｃ、ｄ、ｇ、ｈ）について、各層のＩｎ濃度プロファイルをＳＩＭＳ分析により測定した所、図１（ｂ）に示すようになり、ｐ型コンタクト層６へのＩｎの拡散が抑えられている事が確認された。
【００４４】
これに対し、順方向動作電圧が４Ｖ以上であったもの（表１及び表２中の比較例のＬＥＤ）について、同様に各層のＩｎ濃度プロファイルをＳｌＭＳ分析により測定した所、図５（ｂ）に示すようになり、ｐ型コンタクト層６へのＩｎ拡散が起きていることが確認された。
【００４５】
以上のように、金属酸化物窓層の中のｐ型コンタクト層６に接した部分（高温形成部７ａ）を、成膜温度４００℃以上で形成し、さらに、低温形成部７ｂを、成膜温度３５０℃以下で形成したことにより、低動作電圧であり、且つ良好な発光出力を併せ持つＬＥＤを製作することができた。
【００４６】
＜実施形態２＞
本発明の第二の実施形態にかかる試作例として、図１（ａ）のような構造の、発光波長６３０ｎｍ付近の赤色ＬＥＤ用エピタキシャルウェハを、次のように作製した。
【００４７】
すなわち、エピタキシャル成長方法、エピタキシャル層の構造等は、基本的に上記の従来例と同じとし、また、電極形成方法及び電極形状も基本的に上記の従来例と同じとした。更にプロセス加工及びワイヤボンディング工程も、上記の従来例と同じとした。
【００４８】
そして、ｐ型コンタクト層６の表面に、金属酸化物窓層であるＩＴＯ膜をスプレー熱分解法にて、高温形成部７ａと低温形成部７ｂを順次成膜し、高温形成部７ａと低温形成部７ｂからなる２層構造とした。
【００４９】
ｐ型コンタクト層６と接する該ＩＴＯ膜の高温形成部７ａは、成膜温度４００℃で、膜厚をそれぞれ３ｎｍ、５ｎｍ、１５ｎｍ、２０ｎｍ、５０ｎｍ、５５ｎｍ成膜し、さらに低温形成部７ｂは、成膜温度３００℃とし、膜厚をそれぞれ１９７ｎｍ、１９５ｎｍ、１８５ｎｍ、１８０ｎｍ、１５０ｎｍ、１４５ｎｍ成膜した。この時のＩＴＯ膜の膜厚は、高温形成部の膜厚と低温形成部の膜厚の和が全て２００ｎｍになる様にした。すなわち、上記表１及び表２の実施例ｃについて、高温形成部７ａと低温形成部７ｂの厚みを変化させたＬＥＤの試料（ｃ１〜ｃ６）を製作した。
【００５０】
また別の試料として、ｐ型コンタクト層６と接する該ＩＴＯ膜の高温形成部７ａは、成膜温度４００℃で、膜厚をそれぞれ３ｎｍ、５ｎｍ、１５ｎｍ、２０ｎｍ、５０ｎｍ、５５ｎｍ成膜し、さらに低温形成部７ｂを成膜温度３５０℃とし、膜厚をそれぞれ１９７ｎｍ、１９５ｎｍ、１８５ｎｍ、１８０ｎｍ、１５０ｎｍ、１４５ｎｍ成膜した。この時のＩＴＯ膜の膜厚は、高温形成部の膜厚と低温形成部の膜厚の和が全て２００ｎｍになる様にした。すなわち、上記表１及び表２の実施例ｇについて、高温形成部７ａと低温形成部７ｂの厚みを変化させたＬＥＤの試料（ｇ１〜ｇ６）を製作した。
【００５１】
このようにして製作された試料のＬＥＤ特性を調べた結果、下記の表３及び表４のような結果になった。
【００５２】
【表３】

【００５３】
【表４】

【００５４】
すなわち、高温形成部７ａの成膜温度が４００℃で、低温形成部７ｂの成膜温度が３００℃の場合において、ＩＴＯ膜の高温形成部７ａの膜厚が、それぞれ３ｎｍ、５ｎｍ、１５ｎｍ、２０ｎｍ、５０ｎｍ、５５ｎｍ（比較例ｃ１、実施例ｃ２〜ｃ５、比較例ｃ６）であった時、表３及び図２に示すように、順方向電圧（２０ｍＡ通電時）が、それぞれ６．４８Ｖ（比較例ｃ１）、２．０３Ｖ、２．０７Ｖ、２．０７Ｖ、２．０２Ｖ（実施例ｃ２〜ｃ５）、２．４５Ｖ（比較例ｃ６）であり（図２）、また、表４に示すように、このときの発光出力は１．３５ｍＷ（比較例ｃ１）、１．６２ｍＷ、２．０７ｍＷ、２．１２ｍＷ、２．０８ｍＷ（実施例ｃ２〜ｃ５）、１．８３ｍＷ（比較例ｃ６）であった。
【００５５】
同様に、高温形成部７ａの成膜温度が４００℃で、低温形成部７ｂの成膜温度が３５０℃の場合において、ＩＴＯ膜の高温形成部７ａの膜厚が、それぞれ３ｎｍ、５ｎｍ、１５ｎｍ、２０ｎｍ、５０ｎｍ、５５ｎｍ（比較例ｇ１、実施例ｇ２〜ｇ５、比較例ｇ６）であった時、表３及び図２に示すように、順方向電圧（２０ｍＡ通電時）が、それぞれ６．０８Ｖ（比較例ｇ１）、２．０４Ｖ、２．１０Ｖ、２．１０Ｖ、２．０５Ｖ（実施例ｇ２〜ｇ５）、２．６９Ｖ（比較例ｇ６）であり（図２）、また、表４に示すように、このときの発光出力は１．２９ｍＷ（比較例ｇ１）、１．７３ｍＷ、２．１０ｍＷ、２．０５ｍＷ、２．１１ｍＷ（実施例ｇ２〜ｇ５）、１．７７ｍＷ（比較例ｇ６）であった。
【００５６】
よって、金属酸化物窓層の高温形成部７ａの膜厚は、順方向動作電圧及び発光出力のいずれの観点からも、５ｎｍ〜５０ｎｍの範囲（実施例ｃ１〜ｃ５、ｇ２〜ｇ５）とするのが好ましい。
【００５７】
また、図１（ａ）の構造のＬＥＤにおいて、順方向動作電圧が２．１Ｖ以下であったもの（実施例ｃ２〜ｃ５、ｇ２〜ｇ５のＬＥＤ）について、各層のＩｎ濃度プロファイルをＳＩＭＳ分析により測定した所、図１（ｂ）に示すようになり、ｐ型コンタクト層６へのＩｎの拡散が抑えられている事が確認された。
【００５８】
また、同様に順方向動作電圧が２．４５Ｖ以上であったもの（比較例ｃ１、ｃ６、ｇ１、ｇ６のＬＥＤ）について、各層のＩｎ濃度プロファイルをＳＩＭＳ分析により測定した所、図５（ｂ）に示すようになり、ｐ型コンタクト層６へのＩｎ拡散が起きていることが確認された。
【００５９】
以上のように、金属酸化物窓層中のコンタクト層と接している高温形成部の膜厚を、５ｎｍ〜５０ｎｍの範囲に限定して形成したことによって、低動作電圧であり、且つ良好な発光出力を併せ持つＬＥＤを製作することができた。
【００６０】
＜実施形態３＞
本発明の第三の実施形態にかかる試作例として、図１（ａ）のような構造の発光波長６３０ｎｍ付近の赤色ＬＥＤ用エピタキシャルウェハを、次のように作製した。
【００６１】
すなわち、ｎ型ＧａＡｓ基板１上に、ＭＯＶＰＥ法で、ｎ型ＧａＡｓバッファ層（膜厚５００ｎｍ、Ｓｅドープ、１×１０^１８ｃｍ^−３）２、ｎ型（Ａｌ_０．７Ｇａ_０．３）_０．５Ｉｎ_０．５Ｐクラッド層（膜厚５００ｎｍ、Ｓｅドープ、５×１０^１７ｃｍ^−３）３、アンドープ（Ａｌ_０．１５Ｇａ_０．８５）_０．５Ｉｎ_０．５Ｐ活性層（膜厚６００ｎｍ）４、ｐ型（Ａｌ_０．７Ｇａ_０．３）_０．５Ｉｎ_０．５Ｐクラッド層（膜厚１０００ｎｍ、Ｚｎドープ、４×１０^１７ｃｍ^−３）５を成長させ、その上にｐ型ＧａＡｓコンタクト層（膜厚５０ｎｍ、Ｚｎドープ）６を順次成長させた。
【００６２】
この時の上記ｐ型ＧａＡｓコンタクト層６のキャリア濃度を、それぞれ５×１０^１８ｃｍ^−３、８×１０^１８ｃｍ^−３、１×１０^１９ｃｍ^−３（実施例ｑ）、３×１０^１９ｃｍ^−３（実施例ｒ）とした。
【００６３】
また、電極形成方法及び電極形状は基本的に上記の従来例と同じとした。更にプロセス加工及びワイヤボンディング工程も、上記の従来例と同じとした。
【００６４】
そして、ｐ型コンタクト層６の表面に、金属酸化物窓層であるＩＴＯ膜を、スプレー熱分解法にて、高温形成部７ａと低温形成部７ｂからなる２層構造として成膜した。このＩＴＯ膜の高温形成部７ａは、成膜温度４００℃で、膜厚を２０ｎｍ成膜し、さらに低温形成部を成膜温度３５０℃で１８０ｎｍ成膜した。
【００６５】
このようにして製作されたＬＥＤの特性を調べた結果、図３に示す関係が得られた。ここで、図３の縦軸は順方向動作電圧（Ｖ）、横軸はｐ型ＧａＡｓコンタクト層６のキャリア濃度であり、濃度の単位は、例えば「１Ｅ＋１８」で１×１０^１８ｃｍ^−３を表す。すなわち、上記ｐ型ＧａＡｓコンタクト層６のキャリア濃度が、それぞれ５×１０^１８ｃｍ^−３、８×１０^１８ｃｍ^−３、１×１０^１９ｃｍ^−３（実施例ｑ）、３×１０^１９ｃｍ^−３（実施例ｒ）であった時、順方向動作電圧（２０ｍＡ通電時）が、それぞれ５．６２Ｖ、５．３５Ｖ、２．１０Ｖ（実施例ｑ）、２．０４Ｖ（実施例ｒ）であり（図３）、またこのときの発光出力は１．０５ｍＷ、１．１３ｍＷ、２．０５ｍＷ（実施例ｑ）、２．０８ｍＷ（実施例ｒ）であった。よって、ｐ型ＧａＡｓコンタクト層のキャリア濃度は図３中の１×１０^１９ｃｍ^−３以上の範囲とするのが好ましい。
【００６６】
以上のように、ｐ型ＧａＡｓコンタクト層のキャリア濃度を１×１０^１９ｃｍ^−３以上にしたことによって、低動作電圧であり、且つ良好な発光出力を併せ持つＬＥＤを製作することができた。
【００６７】
また、ｐ型ＧａＡｓコンタクト層６の膜厚と発光出力との関係を示したのが、図４であり、膜厚が１ｎｍ〜１００ｎｍの範囲において大きな発光出力が得られている。従って、第二導電型コンタクト層６は活性層のバンドギャップよりも小さいバンドギャップを有するｐ型ＧａＡｓ半導体から構成し、その膜厚については、少なくとも１ｎｍ以上保有し、さらに１００ｎｍ以下の範囲にあるようにすることが好ましい。そして、図４から、コンタクト層の膜厚としてより好ましいのは５０ｎｍ以下の範囲であり、更に好ましいのは１〜１５ｎｍの範囲であることが判る。
【００６８】
＜他の実施例、変形例＞
上記実施例では発光部をＡｌＧａＩｎＰ４元ダブルヘテロ構造部分にて構成したが、ＧａＩｎＰで構成することもできる。
【００６９】
また上記実施例では、表面電極の金属層の形状が円形であるが、異形状、例えば四角、菱形、多角形等でも、同様の効果を得ることができる。
【００７０】
また、裏面電極は全面電極としたが、部分電極でも同様の効果を得ることができる。
【００７１】
【発明の効果】
以上説明したように本発明によれば、第一導電型の基板の上に、活性層を導電型が異なるクラッド層で挟んだ発光部を形成し、その上に第二導電型のコンタクト層、その上に金属酸化物の窓層を形成し、その表面側の一部に表面電極を形成し、上記基板の裏面に全面又は部分電極から成る裏面電極を形成した半導体発光素子において、上記金属酸化物の窓層が、コンタクト層に接する面から順に高温形成部、低温形成部からなる構成とする、つまり、金属酸化物窓層を、コンタクト層上に形成された高温形成部と、その上に形成された低温形成部からなる膜の積層構造とするものであり、これによって、一方では、上記金属酸化物窓層の高温形成部と半導体コンタクト層の間でトンネル接合を形成し、他方では低温形成部により、上記金属酸化物窓層から半導体コンタクト層へのＩｎ拡散を抑止し、低電圧でのトンネル電流を発生させる。
【００７２】
従って、本発明によれば、製造コストが極めて安価で、且つ順方向動作電圧の低いＬＥＤを容易に製作することができる。これによりＬＥＤ用のエピタキシャル層の膜厚は五分の一から数十分の一まで薄くする事ができるようになった。これは、ＬＥＤを構成するエピタキシャル層の中で窓層（電流分散層）の厚さが最も厚かったためである。これにより、ＬＥＤ用エピタキシャルウェハの価格を大幅に低減することができた。
【図面の簡単な説明】
【図１】本発明の一実施形態にかかるＡｌＧａＩｎＰ系赤色ＬＥＤ用エピタキシャルウェハを示したもので、（ａ）はその断面構造図、（ｂ）はその各層のＩｎ濃度プロファイルを示す図である。
【図２】本発明の一実施例にかかる金属酸化物窓層の高温形成部の膜厚と順方向動作電圧の関係を示すグラフである。
【図３】本発明の一実施例にかかるｐ型ＧａＡｓコンタクト層のキャリア濃度と順方向動作電圧の関係を示すグラフである。
【図４】ＧａＡｓコンタクト層の膜厚と発光出力の関係を示すグラフである。
【図５】従来例にかかるＡｌＧａＩｎＰ系赤色ＬＥＤ用エピタキシャルウェハを示したもので、（ａ）はその断面構造図、（ｂ）はその各層のＩｎ濃度プロファイルを示す図である。
【図６】従来のＡｌＧａＩｎＰ系発光ダイオードチップの外観図である。
【符号の説明】
１　基板
２　バッファ層
３　第一クラッド層
４　活性層
５　第二クラッド層
６　コンタクト層
７　金属酸化物窓層（ＩＴＯ膜）
７ａ　高温形成部
７ｂ　低温形成部
８　ｐ側電極（表面電極）
９　ｎ側電極（裏面電極）[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a structure of a high-brightness semiconductor light-emitting device having a metal oxide window layer, particularly, a semiconductor light-emitting device having an extremely low cost and a low operating voltage.
[0002]
[Prior art]
Conventionally, LEDs (Light Emitting Diodes) have been mostly GaP green and AlGaAs red. However, recently, since a GaN-based or AlGaInP-based crystal layer can be grown by the MOVPE method, orange, yellow, green, and blue high-brightness LEDs can be manufactured.
[0003]
An epitaxial wafer formed by the MOVPE (Metal Organic Vapor Phase Epitaxy) method has made it possible to produce an LED exhibiting short-wavelength light emission and high brightness, which has never been seen before. However, in order to obtain high brightness, it is necessary to grow the thickness of the window layer (current dispersion layer) thickly, and this causes a problem that the manufacturing cost of the epitaxial wafer for LED is increased.
[0004]
FIG. 6 shows a yellow light-emitting diode chip having a light emission peak wavelength of 590 nm manufactured using an AlGaInP-based epitaxial wafer. All epitaxial layers are grown by MOVPE. An n-type (Se-doped) GaAs buffer layer 22, an n-type (Se-doped) AlGaInP cladding layer 23, an undoped AlGaInP active layer 24, and a p-type (zinc-doped) AlGaInP cladding layer 25 are sequentially formed on an n-type GaAs substrate 21. Is formed. 23 to 25 form an AlGaInP quaternary double heterostructure. On the p-type AlGaInP cladding layer 25 having the AlGaInP quaternary double heterostructure, a current distribution layer 26 (window layer) of p-type (zinc-doped) AlGaAs is formed. 28 is a p-side electrode (front surface electrode) and 29 is an n-side electrode (back surface electrode).
[0005]
The current supplied from the front electrode 28 spreads in the chip lateral direction in the current dispersion layer 26, and as a result, the ratio of light emission in a region other than immediately below the upper electrode is increased. The lower the electric resistance of the current dispersion layer 26 is, the more efficiently the current can be spread in the lateral direction. Therefore, it is desired to reduce the electric resistance. Specifically, the resistance is reduced by increasing the carrier concentration and increasing the film thickness. Further, the current spreading layer 26 must be made of a material that transmits light emitted from the active layer 24. At present, an AlGaAs layer (Al composition of 0.8 or more) or a GaP layer satisfying these conditions is used as the current dispersion layer. In order to sufficiently spread the current in the lateral direction using the current spreading layers made of these materials, the current spreading layer 26 needs to have a thickness of 8 μm or more.
[0006]
In order to reduce the manufacturing cost of the light emitting diode, the thickness of the window layer (current distribution layer 26) may be reduced and the current distribution may be improved. That is, the resistivity of the window layer itself may be further reduced. In order to obtain an epitaxial layer having a low resistance, there is a method of largely changing the mobility or increasing the carrier concentration.
[0007]
Therefore, as a method for solving these problems, a method of using a material having a resistance as low as possible as a window layer is commonly used. For example, in the case of an AlGaInP quaternary system, GaP or AlGaAs is used as a window layer. However, even if these materials having low resistivity are used, in order to improve the current dispersion effect, it is necessary to increase the thickness of the window layer to 8 μm or more. Therefore, the epitaxial growth of the window layer occupies most of the manufacturing cost of the entire LED.
[0008]
To reduce the thickness of the window layer, it is conceivable to further lower the resistivity of the window layer itself. Since it is difficult to significantly change the mobility, attempts have been made to increase the carrier concentration. However, at this stage, the carrier concentration cannot be so high that the window layer can be made thinner.
[0009]
Here, an ITO (Indium Tin Oxide) film (a material in which tin is added to indium oxide), which is a metal oxide film, attracts attention as a film having sufficient light-transmitting properties and having electric characteristics to obtain current dispersion. Is done. If this ITO film can be used as a current dispersion film, the semiconductor layer has been thickened for the current dispersion film, but since the epitaxial layer is not required, a high-brightness LED can be produced at low cost.
[0010]
[Problems to be solved by the invention]
As a means for solving the problems of the prior art, a method of using a transparent conductive film (ITO film) having a very high carrier concentration and capable of obtaining a sufficient current dispersion effect with a thin film thickness, instead of a window layer made of a semiconductor. Has been proposed.
[0011]
However, when a transparent conductive film (ITO film), which is a metal oxide, is usually used for the window layer, a metal electrode is formed thereon, but contact resistance occurs between the uppermost layer of the epitaxial wafer and the transparent conductive film. As a result, there is a problem that the forward operation voltage is increased.
[0012]
On the other hand, a method has been disclosed in which an LED is driven by a tunnel current by making the carrier concentration of a semiconductor contact layer extremely high (see ELECTRONICS LETTERS, 7Th December 1995, pp. 2210-2212).
[0013]
However, in such a structure, in a method of forming an ITO film (transparent conductive film) serving as a metal oxide window layer at a high temperature, In diffusion from the ITO film occurs, and the forward operating voltage of the LED is reduced. There was a problem that the cost would be high.
[0014]
In view of the above, an object of the present invention is to solve the above-mentioned problem and provide a semiconductor light emitting device having a structure provided with an oxide window layer (transparent conductive film) made of a metal oxide. An object of the present invention is to provide a semiconductor light emitting device which is extremely inexpensive and has a low operating voltage by suppressing diffusion and generating a tunnel current at a low voltage.
[0015]
[Means for Solving the Problems]
In order to achieve the above object, the present invention is configured as follows.
[0016]
The semiconductor light emitting device according to claim 1, wherein a light emitting portion in which an active layer is sandwiched between cladding layers of different conductivity types is formed on a substrate of a first conductivity type, and a contact layer of a second conductivity type is formed thereon. A metal oxide window layer is formed thereon, a front surface electrode is formed on a part of the front surface side, and a back electrode made of the entire surface or a partial electrode is formed on the back surface of the substrate. The oxide window layer includes a high-temperature forming portion and a low-temperature forming portion in order from the surface in contact with the contact layer.
[0017]
In has a tendency that during crystal growth, the longer the growth time at a high temperature, the easier the diffusion. Therefore, here, the whole is not grown only in the high temperature forming portion, but by growing separately in the high temperature forming portion and the low temperature forming portion, the growth time for the high temperature forming portion is shorter than before, Therefore, diffusion of In is suppressed.
[0018]
According to a second aspect of the present invention, in the semiconductor light emitting device according to the first aspect, a film forming temperature of a high temperature forming portion of a portion of the metal oxide window layer which is in contact with the second conductive type contact layer is 400 ° C. or more, The film forming temperature of the low-temperature forming section is 350 ° C. or lower.
[0019]
According to a third aspect of the present invention, in the semiconductor light emitting device according to the first or second aspect, the thickness of the metal oxide window layer in the high-temperature formation portion is 5 nm to 50 nm, and the thickness of the low-temperature formation portion is 50 nm or more. It is characterized by the following.
[0020]
According to a fourth aspect of the present invention, in the semiconductor light emitting device according to any one of the first to third aspects, the carrier concentration of the second conductivity type contact layer is 1 × 10 ¹⁹ cm ⁻³ or more.
[0021]
According to a fifth aspect of the present invention, in the semiconductor light emitting device according to any one of the first to fourth aspects, the material of the second conductive type contact layer has a band gap smaller than the band gap of the active layer. Wherein the second conductive type contact layer has a thickness of at least 1 nm and is in a range of 100 nm or less.
[0022]
According to a sixth aspect of the present invention, in the semiconductor light emitting device according to any one of the first to fifth aspects, the substrate is made of GaAs, and the light emitting portion is made of AlGaInP or GaInP.
[0023]
<The gist of the invention>
The inventor of the present invention has intensively researched to solve the above-mentioned problems, and as a result, has reached the present invention. That is, the present invention provides a metal oxide window layer, which is a transparent conductive film, to have a layered structure of a high-temperature forming portion and a low-temperature forming portion in order from the surface in contact with the contact layer, that is, a high-temperature forming portion formed on the contact layer. A layered structure of a film including a forming part and a low-temperature forming part formed thereon is used. Thereby, on the one hand, a tunnel junction is formed between the high-temperature formation part of the metal oxide window layer and the semiconductor contact layer, and on the other hand, the low-temperature formation part, which is a metal oxide window layer formed at a low temperature thereafter. By suppressing the diffusion of In from the metal oxide window layer to the semiconductor contact layer and generating a tunnel current at a low voltage, an extremely inexpensive and low operating voltage semiconductor light emitting device is realized.
[0024]
The films of the high-temperature forming portion and the low-temperature forming portion constituting the metal oxide window layer are formed first from the high-temperature forming portion such that the high-temperature forming portion is lower as the order of lamination on the second conductivity type contact layer. . The film forming temperature at this time is such that the film forming temperature of the high-temperature forming section is 400 ° C. or higher and the film forming temperature of the low-temperature forming section is 350 ° C. or lower.
[0025]
Here, the optimum conditions of the film thickness of the metal oxide window layer at the high temperature forming portion and the low temperature forming portion and the film thickness of the contact layer will be described.
[0026]
If the thickness of the high-temperature portion of the metal oxide window layer is too small, the contact between the low-temperature portion having a higher resistance than the high-temperature portion and the contact layer becomes dominant, and tunnel current stops flowing. The voltage increases. If the thickness of the high-temperature formation portion of the metal oxide window layer is too large, the time during which the metal oxide window layer is formed at a high temperature becomes long, and diffusion of In from the metal oxide to the contact layer occurs. Since the tunnel current stops flowing, the forward voltage increases. From this, there is an optimum value for the film thickness of the high-temperature forming portion and the low-temperature forming portion of the metal oxide window layer. For this reason, the film thickness of the high temperature forming portion is in the range of 5 nm to 50 nm, more preferably in the range of 10 to 30 nm, and still more preferably in the range of 10 to 20 nm (see FIG. 2). Further, it is preferable that the film thickness of the low temperature forming portion is 50 nm or more.
[0027]
It is desirable that the semiconductor material used for the contact layer in contact with the metal oxide window layer can easily have a high carrier concentration. For example, GaAs is used. However, a contact layer made of a semiconductor material such as GaAs having a band gap smaller than the band gap of the light emitting layer becomes a light absorbing layer for light emitted from the active layer. And a sufficient luminance cannot be obtained. Therefore, there is an optimum value for the thickness of the contact layer. Therefore, the thickness of the contact layer is in the range of 1 nm to 100 nm, more preferably in the range of 50 nm or less, and still more preferably in the range of 1 to 15 nm (see FIG. 4).
[0028]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described focusing on examples.
[0029]
<Conventional example>
For convenience of explanation, a description will be given of a prototype of a conventional example. FIG. 5A is a cross-sectional view showing a device structure of a conventional red-band AlGaInP-based light-emitting diode prototyped, and FIG. 5B is a diagram showing an In concentration profile of each layer at that time. Note that the In concentration profile was obtained by SIMS measurement, and its absolute value was calibrated using a standard sample.
[0030]
An epitaxial wafer for a red LED having a light emission wavelength of about 630 nm having the structure shown in FIG. An n-type GaAs buffer layer (500 nm thick, Se-doped, 1 × 10 ¹⁸ cm ⁻³ ) 2 and an n-type (Al _0.7 Ga _0.3 ) _{0.5 are formed} on the n-type GaAs substrate 1 by MOVPE. In _0.5 P cladding layer (500 nm thick, Se-doped, 5 × 10 ¹⁷ cm ⁻³ ) 3, undoped (Al _0.15 Ga _0.85 ) _0.5 In _0.5 P active layer (600 nm thick) ) 4, p-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P clad layer (thickness: 1000 nm, Zn-doped, 4 × 10 ¹⁷ cm ⁻³ ) 5 is grown, and p-type is grown thereon. A type GaAs contact layer (Zn-doped, 3 × 10 ¹⁹ cm ⁻³ ) 6 was grown to a thickness of 50 nm.
[0031]
On this epitaxial wafer, an ITO film 7 serving as a metal oxide window layer was formed to a thickness of about 200 nm by a spray pyrolysis method. At this time, the film forming temperature (substrate surface temperature) was set to 400 ° C. A circular p-side electrode 8 having a diameter of 125 μm was formed on the upper surface of the epitaxial wafer by vapor deposition in a matrix. On the p-side electrode 8, gold, zinc, nickel, and gold were deposited in the order of 60 nm, 10 nm, and 1000 nm, respectively. Further, an n-side electrode 9 was formed on the entire bottom surface of the epitaxial wafer. The n-side electrode 9 was formed by depositing gold, germanium, nickel, and gold in the order of 60 nm, 10 nm, and 500 nm, respectively, and then performing alloying of the electrode at 400 ° C. for 5 minutes in a nitrogen gas atmosphere. Thereafter, the above-mentioned ITO film and the epitaxial wafer with electrodes were processed into a chip shape having a chip size of 300 μm square by dicing or the like, and further, die bonding and wire bonding were performed to produce an LED.
[0032]
As a result of examining the characteristics of this LED, the light emission output was 1.10 mW, and the forward operating voltage (when 20 mA was supplied) was 5.24 V.
[0033]
<First embodiment>
FIG. 1A is a cross-sectional view showing an element structure of a red-band AlGaInP-based light emitting diode according to an embodiment of the present invention, and FIG. 1B is a view showing an In concentration profile of each layer at that time. Note that the In concentration profile was obtained by SIMS measurement, and its absolute value was calibrated using a standard sample.
[0034]
As a prototype example according to the first embodiment of the present invention, an epitaxial wafer for a red LED having a structure as shown in FIG. 1A and having a light emission wavelength of about 630 nm was manufactured as follows. The epitaxial growth method, the structure of the epitaxial layer, and the like were basically the same as the above-described conventional example, and the electrode forming method and the electrode shape were also basically the same as the above-described conventional example. Further, the processing and the wire bonding step were the same as those in the above-mentioned conventional example.
[0035]
More specifically, an n-type GaAs buffer layer (thickness: 500 nm, Se-doped, 1 × 10 ¹⁸ cm ⁻³ ) 2 and an n-type ( _{Al 0.7 Ga 0.3) 0.5 In 0.5} P cladding layer (film thickness 500 nm, ^{Se-doped, 5 × 10 17 cm -3)} 3, an undoped _{(Al 0.15 Ga 0.85) 0. 5} In _0.5 P active layer (600 nm thick) 4, p-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P clad layer (1000 nm thick, Zn-doped, 4 × 10 ¹⁷ cm) ^-3 ) 5 was grown, and a p-type GaAs contact layer (Zn-doped, 3 × 10 ¹⁹ cm ⁻³ ) 6 was grown thereon to 50 nm. Reference numerals 3 to 5 form an AlGaInP quaternary double heterostructure portion (light emitting portion).
[0036]
Then, an ITO film, which is a metal oxide window layer, is sequentially formed on the surface of the p-type contact layer 6 by a spray pyrolysis method as a film having a two-layer structure including a high-temperature forming portion 7a and a low-temperature forming portion 7b. did. Here, as a prototype example, the film formation temperature of the high temperature forming portion 7a of the ITO film in contact with the p-type contact layer 6 was changed to a film formation temperature of 300 ° C., 350 ° C., 400 ° C., and 450 ° C., respectively, and the film was formed in 20 nm increments. Then, on these samples, the low-temperature forming portions 7b were formed at a film forming temperature of 300 ° C. and 350 ° C., respectively, to form films of 180 nm each.
[0037]
On the upper surface of the epitaxial wafer, a circular p-side electrode (surface electrode) 8 having a diameter of 125 μm was formed in a matrix by vapor deposition. On the p-side electrode 8, gold, zinc, nickel, and gold were deposited in the order of 60 nm, 10 nm, and 1000 nm, respectively. Further, an n-side electrode (backside electrode) 9 was formed on the entire surface of the bottom surface of the epitaxial wafer. The n-side electrode 9 was formed by depositing gold, germanium, nickel, and gold in the order of 60 nm, 10 nm, and 500 nm, respectively, and then performing alloying of the electrode at 400 ° C. for 5 minutes in a nitrogen gas atmosphere. Thereafter, the above-mentioned ITO film and the epitaxial wafer with electrodes were processed into a chip shape having a chip size of 300 μm square by dicing or the like, and further, die bonding and wire bonding were performed to produce LED chips.
[0038]
When the LED characteristics (forward operation voltage and light emission output when 20 mA current is applied) of the LED chip manufactured as described above were examined, the results shown in Tables 1 and 2 below were obtained.
[0039]
[Table 1]

[0040]
[Table 2]

[0041]
In Tables 1 and 2, the samples with reference numerals c, d, g, and h are examples of the present invention, and the requirement of the present invention is that the film forming temperature of the high-temperature forming section is 400 ° C. or higher, The film forming temperature of the forming part is 350 ° C. or lower ”. Other samples are comparative examples. As can be seen from Table 1, in Examples c, d, g, and h, the forward voltage is around 2 V, and the LED has an operation voltage lower than that of the other comparative examples. In addition, the LED has an operation voltage that is lower than the conventional operation voltage (5.24 V) of the LED of the conventional example (FIG. 5).
[0042]
Also, as can be seen from Table 2, the LEDs of Examples c, d, g, and h have a large light emission output of about 2 mW. The LEDs of the comparative examples, which are other samples, are around 1 mW, and the LED of the conventional example (FIG. 5) has an emission output of 1.10 mW. Therefore, the LEDs of Examples c, d, g, and h A light emission output nearly twice as large as
[0043]
In the above-mentioned prototypes (Tables 1 and 2) of the LED having the structure shown in FIG. 1A (Tables 1 and 2), the In-concentration profile of each layer was about 2V in forward operation voltage (Examples c, d, g, h). Was measured by SIMS analysis, as shown in FIG. 1B, and it was confirmed that the diffusion of In into the p-type contact layer 6 was suppressed.
[0044]
On the other hand, when the forward operation voltage was 4 V or more (LEDs of Comparative Examples in Tables 1 and 2), the In concentration profiles of the respective layers were similarly measured by SlMS analysis, and FIG. 5B. And it was confirmed that In diffusion into the p-type contact layer 6 occurred.
[0045]
As described above, the portion of the metal oxide window layer that is in contact with the p-type contact layer 6 (the high-temperature forming portion 7a) is formed at a film forming temperature of 400 ° C. or more, and further, the low-temperature forming portion 7b is formed. By forming the LED at a temperature of 350 ° C. or lower, an LED having a low operating voltage and good light emission output can be manufactured.
[0046]
<Embodiment 2>
As a prototype example according to the second embodiment of the present invention, a red LED epitaxial wafer having a structure as shown in FIG. 1A and having an emission wavelength of about 630 nm was manufactured as follows.
[0047]
That is, the epitaxial growth method, the structure of the epitaxial layer, and the like are basically the same as those of the above-described conventional example, and the electrode forming method and the electrode shape are also basically the same as those of the above-described conventional example. Further, the processing and the wire bonding step were the same as those in the above-mentioned conventional example.
[0048]
Then, on the surface of the p-type contact layer 6, an ITO film, which is a metal oxide window layer, is sequentially formed by a spray pyrolysis method into a high-temperature forming section 7a and a low-temperature forming section 7b, and the high-temperature forming section 7a and the low-temperature forming section are formed. It has a two-layer structure composed of the portion 7b.
[0049]
The high temperature forming portion 7a of the ITO film which is in contact with the p-type contact layer 6 is formed at a film forming temperature of 400 ° C. to have a thickness of 3 nm, 5 nm, 15 nm, 20 nm, 50 nm, and 55 nm, respectively. The film formation temperature was 300 ° C., and the film thickness was 197 nm, 195 nm, 185 nm, 180 nm, 150 nm, and 145 nm, respectively. At this time, the thickness of the ITO film was set so that the sum of the thickness of the high-temperature portion and the low-temperature portion was 200 nm. That is, with respect to Example c in Tables 1 and 2, LED samples (c1 to c6) in which the thickness of the high temperature forming portion 7a and the low temperature forming portion 7b were changed were manufactured.
[0050]
Further, as another sample, the high temperature forming portion 7a of the ITO film which is in contact with the p-type contact layer 6 is formed at a film forming temperature of 400 ° C. to have a film thickness of 3 nm, 5 nm, 15 nm, 20 nm, 50 nm, and 55 nm, respectively. The low-temperature forming part 7b was formed at a film formation temperature of 350 ° C., and the film thickness was formed at 197 nm, 195 nm, 185 nm, 180 nm, 150 nm, and 145 nm, respectively. At this time, the thickness of the ITO film was set so that the sum of the thickness of the high-temperature portion and the low-temperature portion was 200 nm. That is, with respect to Example g in Tables 1 and 2, LED samples (g1 to g6) in which the thicknesses of the high-temperature forming portion 7a and the low-temperature forming portion 7b were changed were manufactured.
[0051]
As a result of examining the LED characteristics of the sample manufactured as described above, the results shown in Tables 3 and 4 below were obtained.
[0052]
[Table 3]

[0053]
[Table 4]

[0054]
That is, when the film forming temperature of the high temperature forming part 7a is 400 ° C. and the film forming temperature of the low temperature forming part 7b is 300 ° C., the film thickness of the high temperature forming part 7a of the ITO film is 3 nm, 5 nm, 15 nm, and 20 nm, respectively. , 50 nm, and 55 nm (Comparative Example c1, Examples c2 to c5, and Comparative Example c6), as shown in Table 3 and FIG. 2, the forward voltage (when 20 mA was supplied) was 6.48 V (comparative). Example c1), 2.03 V, 2.07 V, 2.07 V, 2.02 V (Examples c2 to c5), 2.45 V (Comparative Example c6) (FIG. 2), and as shown in Table 4. The emission output at this time was 1.35 mW (Comparative Example c1), 1.62 mW, 2.07 mW, 2.12 mW, 2.08 mW (Examples c2 to c5), and 1.83 mW (Comparative Example c6). .
[0055]
Similarly, when the film forming temperature of the high temperature forming part 7a is 400 ° C. and the film forming temperature of the low temperature forming part 7b is 350 ° C., the film thickness of the high temperature forming part 7a of the ITO film is 3 nm, 5 nm, 15 nm, At 20 nm, 50 nm, and 55 nm (Comparative Example g1, Examples g2 to g5, and Comparative Example g6), as shown in Table 3 and FIG. 2, the forward voltage (when 20 mA is applied) is 6.08 V ( Comparative Example g1), 2.04 V, 2.10 V, 2.10 V, 2.05 V (Examples g2 to g5), 2.69 V (Comparative Example g6) (FIG. 2), and as shown in Table 4. The emission output at this time was 1.29 mW (Comparative Example g1), 1.73 mW, 2.10 mW, 2.05 mW, 2.11 mW (Examples g2 to g5), and 1.77 mW (Comparative Example g6). Was.
[0056]
Therefore, the film thickness of the metal oxide window layer high-temperature formation portion 7a is in the range of 5 nm to 50 nm (Examples c1 to c5, g2 to g5) from both viewpoints of forward operation voltage and light emission output. Is preferred.
[0057]
In the LED having the structure shown in FIG. 1A, the forward operation voltage was 2.1 V or less (Examples c2 to c5, g2 to g5), and the In concentration profile of each layer was analyzed by SIMS. As a result of the measurement, the result was as shown in FIG. 1B, and it was confirmed that the diffusion of In into the p-type contact layer 6 was suppressed.
[0058]
Similarly, when the forward operating voltage was 2.45 V or more (LEDs of Comparative Examples c1, c6, g1, and g6), the In concentration profile of each layer was measured by SIMS analysis, and FIG. And it was confirmed that In diffusion into the p-type contact layer 6 occurred.
[0059]
As described above, since the film thickness of the high-temperature forming portion in contact with the contact layer in the metal oxide window layer is limited to the range of 5 nm to 50 nm, a low operating voltage and good light emission are obtained. An LED with both outputs was produced.
[0060]
<Embodiment 3>
As a prototype example according to the third embodiment of the present invention, a red LED epitaxial wafer having a structure as shown in FIG. 1A and having a light emission wavelength of around 630 nm was manufactured as follows.
[0061]
That is, an n-type GaAs buffer layer (500 nm thick, Se-doped, 1 × 10 ¹⁸ cm ⁻³ ) 2 and an n-type (Al _0.7 Ga _0.3 ) _{0 are formed} on the n-type GaAs substrate 1 by MOVPE. _.5 an In _0.5 P cladding layer (film thickness 500 nm, ^{Se-doped, 5 × 10 17 cm -3)} 3, an undoped _{(Al 0.15 Ga 0.85) 0.5 In} 0.5 P active layer (film A p-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P cladding layer (thickness: 1000 nm, Zn-doped, 4 × 10 ¹⁷ cm ⁻³ ) 5 is grown thereon, and a p-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P cladding layer 5 is grown thereon. Then, a p-type GaAs contact layer (thickness: 50 nm, Zn-doped) 6 was sequentially grown.
[0062]
At this time, the carrier concentration of the p-type GaAs contact layer 6 was set to 5 × 10 ¹⁸ cm ⁻³ , 8 × 10 ¹⁸ cm ⁻³ , 1 × 10 ¹⁹ cm ⁻³ (Example q) and 3 × 10 ¹⁹ cm, respectively. ⁻³ (Example r).
[0063]
The electrode forming method and the electrode shape were basically the same as those of the above-described conventional example. Further, the processing and the wire bonding step were the same as those in the above-mentioned conventional example.
[0064]
Then, an ITO film as a metal oxide window layer was formed on the surface of the p-type contact layer 6 by a spray pyrolysis method in a two-layer structure including a high-temperature forming portion 7a and a low-temperature forming portion 7b. The high-temperature portion 7a of the ITO film was formed to a thickness of 20 nm at a film forming temperature of 400 ° C., and a low-temperature portion was formed to a thickness of 180 nm at a film forming temperature of 350 ° C.
[0065]
As a result of examining the characteristics of the LED manufactured as described above, the relationship shown in FIG. 3 was obtained. Here, the vertical axis of FIG. 3 is the forward operating voltage (V), the horizontal axis is the carrier concentration of the p-type GaAs contact layer 6, and the unit of the concentration is, for example, “1E + 18” and 1 × 10 ¹⁸ cm ⁻³ . Represent. That is, the carrier concentration of the p-type GaAs contact layer 6 is 5 × 10 ¹⁸ cm ⁻³ , 8 × 10 ¹⁸ cm ⁻³ , 1 × 10 ¹⁹ cm ⁻³ (Example q), and 3 × 10 ¹⁹ cm ^{−. 3} (Example r), the forward operating voltages (when 20 mA is applied) are 5.62 V, 5.35 V, 2.10 V (Example q), and 2.04 V (Example r), respectively. (FIG. 3), and the emission outputs at this time were 1.05 mW, 1.13 mW, 2.05 mW (Example q), and 2.08 mW (Example r). Therefore, it is preferable that the carrier concentration of the p-type GaAs contact layer be in the range of 1 × 10 ¹⁹ cm ⁻³ or more in FIG.
[0066]
As described above, by setting the carrier concentration of the p-type GaAs contact layer to 1 × 10 ¹⁹ cm ⁻³ or more, it was possible to manufacture an LED having a low operating voltage and good emission output.
[0067]
FIG. 4 shows the relationship between the film thickness of the p-type GaAs contact layer 6 and the light emission output. A large light emission output is obtained when the film thickness is in the range of 1 nm to 100 nm. Therefore, the second conductivity type contact layer 6 is made of a p-type GaAs semiconductor having a band gap smaller than the band gap of the active layer, and has a film thickness of at least 1 nm and at most 100 nm. Is preferable. FIG. 4 shows that the thickness of the contact layer is more preferably in the range of 50 nm or less, and still more preferably in the range of 1 to 15 nm.
[0068]
<Other Embodiments and Modifications>
In the above-described embodiment, the light emitting portion is constituted by the AlGaInP quaternary double hetero structure portion, but may be constituted by GaInP.
[0069]
Further, in the above embodiment, the shape of the metal layer of the surface electrode is circular. However, similar effects can be obtained even if the shape is different, for example, a square, a rhombus, or a polygon.
[0070]
Although the back electrode is a full-surface electrode, a similar effect can be obtained with a partial electrode.
[0071]
【The invention's effect】
As described above, according to the present invention, a light emitting portion in which an active layer is sandwiched between cladding layers having different conductivity types is formed on a substrate of a first conductivity type, and a contact layer of a second conductivity type is formed thereon. In the semiconductor light emitting device, a metal oxide window layer is formed thereon, a front electrode is formed on a part of the front surface side, and a back electrode composed of the entire surface or a partial electrode is formed on the back surface of the substrate. The window layer of the product has a configuration in which a high-temperature forming portion and a low-temperature forming portion are sequentially formed from the surface in contact with the contact layer. A stacked structure of films formed of low-temperature formed portions is formed, whereby a tunnel junction is formed between the high-temperature formed portion of the metal oxide window layer and the semiconductor contact layer on the one hand, and a low-temperature Depending on the forming part, the metal acid Suppresses In diffusion into the semiconductor contact layer from the object window layer, in which a tunneling current at low voltage.
[0072]
Therefore, according to the present invention, an LED having a very low manufacturing cost and a low forward operating voltage can be easily manufactured. As a result, the thickness of the epitaxial layer for the LED can be reduced from one fifth to several tenths. This is because the window layer (current distribution layer) was the thickest among the epitaxial layers constituting the LED. As a result, the price of the epitaxial wafer for LED was significantly reduced.
[Brief description of the drawings]
FIGS. 1A and 1B show an AlGaInP-based red LED epitaxial wafer according to an embodiment of the present invention, in which FIG. 1A is a cross-sectional structure diagram, and FIG.
FIG. 2 is a graph showing a relationship between a film thickness of a high-temperature forming portion of a metal oxide window layer and a forward operating voltage according to one embodiment of the present invention.
FIG. 3 is a graph showing a relationship between a carrier concentration of a p-type GaAs contact layer and a forward operating voltage according to one embodiment of the present invention.
FIG. 4 is a graph showing the relationship between the thickness of a GaAs contact layer and light emission output.
5A and 5B show an AlGaInP-based red LED epitaxial wafer according to a conventional example, in which FIG. 5A is a cross-sectional structure diagram, and FIG. 5B is a diagram showing an In concentration profile of each layer.
FIG. 6 is an external view of a conventional AlGaInP-based light emitting diode chip.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Substrate 2 Buffer layer 3 First cladding layer 4 Active layer 5 Second cladding layer 6 Contact layer 7 Metal oxide window layer (ITO film)
7a High-temperature forming section 7b Low-temperature forming section 8 p-side electrode (surface electrode)
9 n-side electrode (backside electrode)

Claims (6)

On a substrate of the first conductivity type, a light emitting portion in which an active layer is sandwiched between cladding layers of different conductivity types is formed, and a contact layer of the second conductivity type is formed thereon, and a metal oxide window layer is formed thereon. Then, a front surface electrode is formed on a part of the front surface side, and a semiconductor light emitting element in which a back electrode composed of the entire surface or a partial electrode is formed on the back surface of the substrate,
A semiconductor light-emitting device, wherein the metal oxide window layer comprises a high-temperature forming portion and a low-temperature forming portion in order from the surface in contact with the contact layer. The semiconductor light emitting device according to claim 1,
The film forming temperature of the high-temperature forming portion of the portion of the metal oxide window layer in contact with the second conductivity type contact layer is 400 ° C. or more, and the film forming temperature of the low-temperature forming portion is 350 ° C. or less. Semiconductor light emitting device. The semiconductor light emitting device according to claim 1, wherein
A semiconductor light emitting device wherein the thickness of the high-temperature portion of the metal oxide window layer is 5 nm to 50 nm, and the thickness of the low-temperature portion is 50 nm or more. The semiconductor light emitting device according to claim 1,
A semiconductor light emitting device, wherein the carrier concentration of the second conductivity type contact layer is 1 × 10 ¹⁹ cm ⁻³ or more. The semiconductor light emitting device according to claim 1,
The material of the second conductivity type contact layer is a second conductivity type semiconductor having a band gap smaller than the band gap of the active layer, and the film thickness of the second conductivity type contact layer is at least 1 nm, and further 100 nm or less. A semiconductor light-emitting device, wherein The semiconductor light emitting device according to any one of claims 1 to 5,
A semiconductor light emitting device wherein the substrate is GaAs and the light emitting portion is AlGaInP or GaInP.

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