JP2004093666A - Liquid crystal driving device and liquid crystal driving method - Google Patents

Abstract

A liquid crystal driving device for driving a simple matrix type liquid crystal display panel, which reduces a bias in a driving circuit system and has an appropriate intermediate gradation corresponding to a γ characteristic of the liquid crystal display panel itself. Realize the display.
A liquid crystal display panel is divided into, for example, four areas A to D corresponding to adjacent scanning electrode ranges, and one display period for displaying each pixel is divided into, for example, four frames 0 to 3. Then, gradation display (PWM0 to PWM15) based on PWM is performed in each of a plurality of divided frames so as to select a different frame for each of the divided areas A to D, and in other frames, By performing binary (ON / OFF) display in units, gradation display is performed on the entire four frames 0 to 3 constituting one display period.
[Selection diagram] Fig. 4

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention particularly relates to a simple matrix type liquid crystal driving device and a liquid crystal driving method.
[0002]
[Prior art]
A method of performing halftone display with a simple matrix type liquid crystal display device using a TN (Twisted Nematic) liquid crystal or an STN (Super Twisted Nematic) liquid crystal is roughly divided into an FRC (Frame Rate Control) method and a PWM method. (Pulse Width Modulation) method.
[0003]
[Problems to be solved by the invention]
In the FRC method, the liquid crystal display panel itself uses a binary display of on / off for each pixel, and divides a display period of one pixel into a plurality of frames and controls on / off for each frame. Is used to drive and display the intermediate gray scale with the effective value. For example, in order to display 4 gray scales including full on (1) / off (0), one pixel is displayed in three frames, and 16 gray scales are displayed. To display tones, one pixel must be divided into 15 frames, and so to display n gradations, one pixel must be temporally divided into "n-1" frames.
[0004]
Therefore, for example, when displaying the gray scale "1/16" in the 16 gray scale display, the display period of one pixel is divided into 15 frames, and only one of the frames is turned on. Such display causes flicker.
[0005]
As a measure to prevent the occurrence of flicker, it is conceivable to increase the frame frequency. However, in this case, there is a problem that the low power consumption characteristic of the FRC method is impaired.
[0006]
On the other hand, in the PWM method, the effective period applied to the liquid crystal is controlled by variably driving the selection period of the scanning electrode of the liquid crystal display device by the signal width of the signal electrode divided by one less than the number of gradations to be displayed. The gradation is displayed by controlling the value.
[0007]
Therefore, when the number of gray scales to be displayed is increased, the number of divisions of the selection period of the scanning electrode is increased, so that the frequency of the drive clock used for the control circuit is increased, and the power consumption is also increased.
[0008]
In view of this, it is assumed that there are two gradation display circuits based on the FRC method and the gradation display circuit based on the PWM method, and only a specific frame is driven by the PWM method while other frames are driven by the FPC method. It is conceivable to combine both drive schemes.
[0009]
FIG. 6 shows four frame periods in which one pixel of display data is displayed at each pixel position of the liquid crystal display panel when four bits and 16 gradations are driven in four frames by combining FRC and PWM. It shows the contents of the signal actually applied.
[0010]
In the figure, frame0 to frame3 are frame periods that are turned on at the timings corresponding to the four frames, respectively, and each of the signals PWM0 to PWM15 has the grayscale level “middle grayscale” in the fourth frame period “frame3”. This signal has a pulse width corresponding to “0” to “15”.
[0011]
It is assumed that the gradation signal level15 is always on over the frames 0 to 3, and that the gradation signal level0 is always off over the frames 0 to 3.
[0012]
Therefore, the PWM 15 used for the gradation signal level 15 is a signal that is always on over one frame, and the PWM 0 used for the gradation signal level 0 is a signal that is always off for one frame. It is not generated as an intermediate gradation signal.
[0013]
As described above, in three of the four frame periods, frame0 to frame2, gradation display is performed only by ON / OFF in a frame unit as in the normal FRC method.
[0014]
On the other hand, in frame 4 which is the fourth final frame, PWM signals of a total of 16 gradations of PWM 0 to 15 as shown in FIG.
[0015]
In this case, PWM0 is off (0 (zero)) throughout the period of frame3 obtained by dividing one frame into 15, and is equal to off in frames 0 and 2.
[0016]
On the other hand, the PWM 15 is turned on (1) throughout the period of frame 3 obtained by dividing one frame into 15, and is equal to the ON state in frames 0 to 2.
[0017]
For example, according to the gradation signal Level14 instructing the display of the second highest gradation among the 16 gradations, if the minimum unit representing the value obtained by dividing one frame into 15 is “1”,
15 (frame0) +15 (frame1) +15 (frame2) +11 (frame3: PWM11) displays the halftone “56/60” for the full gradation “60/60” (60 = 15 × 4).
[0018]
Similarly, according to the gradation signal Level13,
15 (frame0) +15 (frame1) +15 (frame2) +7 (frame3: PWM7)
Displays the halftone "52/60".
[0019]
As described above, since the drive for expressing all 16 gray scales by 4 frames can be realized, a multi-gray scale display can be performed while the frame frequency is much smaller than that of the simple FRC method, and only the PWM method is used. Power consumption can be significantly reduced.
[0020]
Therefore, if the gradation signals Level 14 to 1 are decoded in accordance with display data to be displayed by each pixel, a high-quality image having multiple gradations is displayed while easily reducing power consumption. It becomes possible.
[0021]
By employing such a driving method, it is possible to display a high-quality image having a large number of gradations while suppressing power consumption to some extent and preventing flicker.
[0022]
However, in this driving method, a load difference between the FRC display and the PWM display is large, and a load is applied to the power supply circuit by performing the driving by the PWM method in a specific frame every whole display period.
[0023]
Further, in this driving method, it is difficult to correct the applied voltage for each gradation according to the γ characteristic of the liquid crystal display panel.
[0024]
SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to display a high-quality image having a large number of gradations while minimizing power consumption and preventing occurrence of flicker. In addition, a liquid crystal driving device and a liquid crystal driving device capable of reducing the bias of the driving circuit system and realizing an appropriate halftone display corresponding to the γ (gamma) characteristic of the liquid crystal display panel. It is to provide a method.
[0025]
[Means for Solving the Problems]
The invention according to claim 1 is a liquid crystal driving device for driving a simple matrix type liquid crystal display panel, wherein the liquid crystal display panel is divided into a plurality of regions corresponding to adjacent scanning electrode ranges and each pixel is displayed. One display period is divided into a plurality of frames, and gradation display based on pulse width modulation is performed in at least one of the plurality of divided frames so as to select a different frame for each divided region, and In this frame, gray scale display is performed in a plurality of frames forming one display period by performing binary display in frame units.
[0026]
With such a configuration, a high-quality image having a large number of gradations is displayed while suppressing power consumption as much as possible and flicker is prevented, and a frame for performing gradation display by pulse width modulation is formed in a panel area. , The load on the drive circuit system can be reduced from being biased.
[0027]
According to a second aspect of the present invention, in the first aspect of the present invention, the number of display gradation values of the drive signal applied to the signal electrode based on the pulse width modulation is made equal to the number of display gradation values of the entire frame. It is characterized by the following.
[0028]
With this configuration, in addition to the effect of the first aspect of the invention, it is possible to easily correct the display gradation value corresponding to the γ (gamma) characteristic of the liquid crystal display panel. Thus, an appropriate halftone display can always be realized.
[0029]
The invention according to claim 3 is a liquid crystal driving method for driving a simple matrix type liquid crystal display panel, wherein the liquid crystal display panel is divided into a plurality of regions corresponding to adjacent scanning electrode ranges, and each pixel is divided into a plurality of regions. One display period to be displayed is divided into a plurality of frames, and gradation display based on pulse width modulation is performed in at least one of the plurality of divided frames so as to select a different frame for each of the divided regions. In another frame, binary display is performed in frame units, so that gradation display is performed in a plurality of frames constituting the one display period.
[0030]
With such a configuration, a high-quality image having a large number of gradations is displayed while suppressing power consumption as much as possible and flicker is prevented, and a frame for performing gradation display by pulse width modulation is formed in a panel area. , The load on the drive circuit system can be reduced from being biased.
[0031]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, a liquid crystal driving device according to an embodiment of the present invention will be described with reference to the drawings.
[0032]
FIG. 1 shows the basic configuration of a liquid crystal display panel 10 of a simple matrix type to be driven, in which column electrodes 12, 12,... Row electrodes 14, 14,... Also formed of transparent electrodes are formed on the lower surface of another glass 13, and a liquid crystal material (not shown) is sealed between the glasses 11, 13 to form a liquid crystal display panel. Be composed.
[0033]
The glass 11 is also provided with a column driver 15 for driving the column electrodes 12, 12,... To provide a column signal corresponding to image data, while the glass 13 is not shown here. Are provided with row drivers for sequentially scanning and driving the row electrodes 14, 14,.
[0034]
Here, in the present embodiment, as shown in FIG. 2, the liquid crystal display panel 10 is divided into a plurality of, for example, four area areas A to D corresponding to the range of the adjacent row electrodes 14, 14,. In addition, one display period for displaying each pixel is divided into a plurality of frames, and in each of the areas A to D, at least one of the plurality of frames divided so as to select a different frame as described later in detail. It is assumed that gradation display based on pulse width modulation is performed in one frame, and binary display is performed in frame units in another frame.
[0035]
FIG. 3 is a circuit configuration of a data conversion circuit 21a provided in the column driver 15 for generating a gradation signal to be applied to the column electrodes 12, 12,... Belonging to the area A shown in FIG. Is an example.
[0036]
Here, it is assumed that FRC and PWM are combined to drive 4 bits and 16 gradations in 4 frames. In the figure, frame0 to frame3 are frame timing signals which are turned on at timings corresponding to the four frames, respectively. The PWM (1:14) signal is a first frame period corresponding to the signal of frame0, This is a signal having a pulse width corresponding to the gray scale levels “1” to “14”.
[0037]
As shown in the figure, grayscale signals Level1 to Level14 are generated by logic circuits including AND circuits 22a to 22k, NOR circuits 23a to 23k, NAND circuits 24a to 24c, and inverters 25a to 25n. I have.
[0038]
It is assumed that the gradation signal level15 is always on over frame0 to frame3, and that the gradation signal level0 is always off over frame0 to frame3. The signal level15,0 is not generated.
[0039]
The column driver 15 selects one of the gradation signals Level0 to Level15 in accordance with the image data and supplies the selected signal to each of the column electrodes. The voltage applied to each pixel in the region where the electrode intersects is controlled, and the light passing through each pixel is turned on / off, or is controlled to have a transmittance between these.
[0040]
The data conversion circuit 21a is for generating a gradation signal to be applied to the column electrodes 12, 12,... Belonging to the area A shown in FIG. 2, and for the other areas B to D, Here, it is assumed that data conversion circuits 21b to 21d (not shown) are provided.
[0041]
In this case, the circuit configuration is exactly the same as the data conversion circuit 21a, and only the input positions of the frame timing signals frame0 to frame3 and the input timing of the PWM (1:14) signal are different.
[0042]
For example, in the data conversion circuit 21b that generates a gradation signal to be applied to the column electrodes 12, 12,... Belonging to the area B, the input positions of the frame timing signals frame0 and frame1 of the data conversion circuit 21a are switched, and PWM ( 1:14) signal is provided in the second frame period according to the signal of frame1.
[0043]
In the above configuration, the operation is as follows.
[0044]
FIG. 4 shows that the gray scale signals levels 15 to 0 are used to display one pixel of display data at each pixel position corresponding to each of the areas A to D of the liquid crystal display panel 10 during four frame periods of frames 0 to 3. Shows the contents of the signal applied to the.
[0045]
In the area A of the liquid crystal display panel 10, in frame0 which is the first frame in the four frame periods, PWM signals of a total of 16 gradations of PWM0 to 15 as shown in FIG.
[0046]
In this case, PWM0 is off (0 (zero)) throughout the period of frame0 obtained by dividing one frame into 15 and is equal to off in frames 1 to 3.
[0047]
Conversely, the PWM 15 is always on (1) throughout the period of frame 0 obtained by dividing one frame into 15 and is equal to the ON in frames 1 to 3.
[0048]
On the other hand, in the remaining three frame periods, that is, frame 1 to 3, gradation display is performed only by ON / OFF on a frame basis as in the normal FRC method.
[0049]
As a result, according to the gradation signal Level14 instructing the display of the second highest gradation among the 16 gradations, if the minimum unit representing the value obtained by dividing one frame into 15 is “1”,
11 (frame0: PWM14) +15 (frame1) +15 (frame2) +15 (frame3)
Displays the halftone "56/60" for the full gradation "60/60" (60 = 15 * 4).
[0050]
Similarly, according to the gradation signal Level13,
7 (frame0: PWM13) +15 (frame1) +15 (frame2) +15 (frame3)
Displays the halftone "52/60".
[0051]
Similarly, according to the gradation signal Level12,
3 (frame0: PWM12) +15 (frame1) +15 (frame2) +15 (frame3)
Displays the halftone "48/60".
[0052]
Similarly, according to the gradation signal Level11,
14 (frame0: PWM11) + 0 (frame1) + 15 (frame1) + 15 (frame2)
Displays the halftone "44/60".
[0053]
The above description relates to the display of the pixels belonging to the area A of the liquid crystal display panel 10. In the area B, the first frame frame0 and the third and fourth frames frame2 and 3 in the four frame periods are used. As in the case of the normal FRC method, gradation display is performed only by ON / OFF in units of frames, and a PWM signal of a total of 16 gradations of PWM0 to 15 as shown in FIG. 5 is displayed in the second frame frame1. It is assumed.
[0054]
Further, in the area C, the gray scale is obtained only by ON / OFF in the frame unit in the first and second frames frame0 and 1 and the fourth frame frame3 in the four frame periods as in the normal FRC method. While the display is performed, a PWM signal of a total of 16 gradations of PWM0 to 15 as shown in FIG. 5 is displayed in the third frame frame2.
[0055]
Further, in the area D, the first to third frames frame0 to frame2 of the four frame periods perform grayscale display only by ON / OFF in units of frames in the same manner as in the normal FRC method. In the third frame frame3, PWM signals of a total of 16 gradations of PWM0 to 15 as shown in FIG. 5 are displayed.
[0056]
As described above, in any of the areas A to D, driving in which all 16 gray scales are expressed by 4 frames can be realized, so that multi-gray scale display can be performed with a much lower frame frequency than the simple FRC method. In addition, power consumption can be significantly reduced as compared with the case where only the PWM method is used.
[0057]
Therefore, if the gradation signals Level 14 to 1 are decoded in accordance with display data to be displayed by each pixel, a high-quality image having multiple gradations is displayed while easily reducing power consumption. It becomes possible.
[0058]
In addition, the frame displaying the PWM signal is made different in each of the areas A to D, and the PWM signal is displayed every time the areas A to D are driven by the sequential scanning drive of the row electrodes 14, 14,. Since the timings of the frames in which the display is performed are dispersed, the load on the drive circuit system including the power supply circuit due to the difference in load between the FRC method and the PWM method can be reduced in a specific frame.
[0059]
Further, in the above embodiment, the number n of display gradation values of the drive signal PWM “n” (n = 0 to 15) given to the signal electrode based on the PWM method is changed to the display gradation Level “n” of the entire display period. "(N = 0 to 15).
[0060]
For example, in the conventional method shown in FIG. 6, the value n of the drive signal PWM “n” (n = 0 to 15) is set in accordance with the pulse width of the drive signal. Level 14) is supplied with the drive signal PWM11 when displayed, and 13 gradations (Level 13) is supplied with the drive signal PWM7. For example, the number of gradation values to be displayed and the number of drive signals are supplied. And there was little agreement.
[0061]
On the other hand, in the present embodiment, as described above, the number of display gradation values of the drive signal applied to the signal electrode based on the PWM method is made to match the number of display gradation values of the entire display period. By compensating the number of signal values, it is possible to easily correct the display gradation value corresponding to the γ (gamma) characteristic of the individual liquid crystal display panel 10, and as a result, the individual liquid crystal display panel 10 has An appropriate halftone display can always be realized without being affected by the gamma characteristic.
[0062]
In the above embodiment, when displaying one pixel, the display period is divided into four frames, and at the same time, the liquid crystal display panel is divided into four area areas corresponding to the range of the adjacent row electrodes (scanning electrodes). However, the present invention is not limited to this, and the frame frequency, the number of gradations of pulse width modulation, the number of divisions of the area of the liquid crystal display panel 10 and the like can be naturally realized with other numerical values. It is possible.
[0063]
Further, in the above embodiment, the pulse width modulation is performed only in one frame among a plurality of frames for displaying one pixel. However, by distributing the pulse width modulation frame into a plurality of frames, the pixel width can be reduced. It is expected that the simultaneous change of the liquid crystal driving waveform applied to the LCD will be reduced, and the power consumption will be further reduced. Can be reduced.
[0064]
In addition, the present invention is not limited to the above-described embodiment, and can be variously modified and implemented without departing from the gist thereof.
[0065]
Further, the embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some components are deleted from all the components shown in the embodiment, at least one of the problems described in the column of the problem to be solved by the invention can be solved, and the problem described in the column of the effect of the invention can be solved. If at least one of the effects described above can be obtained, a configuration from which this configuration requirement is deleted can be extracted as an invention.
[0066]
【The invention's effect】
According to the first aspect of the present invention, a frame for displaying a high-quality image having a large number of gradations while suppressing power consumption as much as possible and preventing flicker and performing gradation display by pulse width modulation is provided. Since the distribution is performed according to the panel area, it is possible to reduce the bias of the drive circuit system.
[0067]
According to the second aspect of the present invention, in addition to the effect of the first aspect of the present invention, it is possible to easily correct the display gradation value corresponding to the γ (gamma) characteristic of the liquid crystal display panel. Therefore, an appropriate halftone display can always be realized.
[0068]
According to the third aspect of the present invention, a frame for displaying a high-quality image having a large number of gradations while suppressing power consumption as much as possible and preventing occurrence of flicker and performing gradation display by pulse width modulation is provided. Since the distribution is performed according to the panel area, it is possible to reduce the bias of the drive circuit system.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a basic configuration of a liquid crystal display panel according to an embodiment of the present invention.
FIG. 2 is a view exemplifying divided regions according to a row electrode range of the liquid crystal display panel according to the embodiment.
FIG. 3 is a view exemplifying one specific configuration of the data conversion circuit according to the embodiment;
FIG. 4 is an exemplary view showing the contents of a signal applied in each frame period corresponding to the gradation signal according to the embodiment;
FIG. 5 is an exemplary view showing contents of a PWM signal according to the embodiment;
FIG. 6 is an exemplary view showing the contents of signals actually applied during four frame periods in a case where four bits and 16 gray scales are driven in four frames by combining FRC and PWM.
FIG. 7 is a view exemplifying a waveform of a PWM signal given in a last frame frame3 of FIG. 6;
[Explanation of symbols]
10 liquid crystal display panel 11 glass 12 column electrode 13 glass 14 row electrode 15 column driver 21a data conversion circuits 22a to 22k AND circuits 23a to 23k NOR circuits 24a to 24c NAND circuits 25a to 25n Inverter

Claims (3)

A liquid crystal driving device for driving a simple matrix type liquid crystal display panel,
The liquid crystal display panel is divided into a plurality of regions corresponding to adjacent scanning electrode ranges, and one display period for displaying each pixel is divided into a plurality of frames, and a different frame is selected for each divided region. By performing gradation display based on pulse width modulation in at least one of the plurality of frames, and performing binary display in frame units in other frames, the plurality of frames constituting the one display period are displayed. A liquid crystal driving device characterized by performing gradation display as a whole. 2. The liquid crystal drive according to claim 1, wherein the number of display gradation values of the drive signal applied to the signal electrode based on the pulse width modulation is made to match the number of display gradation values of the entire frame. apparatus. A liquid crystal driving method for driving a simple matrix type liquid crystal display panel,
The liquid crystal display panel is divided into a plurality of regions corresponding to adjacent scanning electrode ranges, and one display period for displaying each pixel is divided into a plurality of frames, and a different frame is selected for each divided region. The gray scale display based on the pulse width modulation is performed in at least one of the plurality of frames, and the binary display is performed in frame units in the other frames, so that the plurality of frames constituting the one display period are displayed. A liquid crystal driving method characterized in that gradation display is performed over the entire frame.

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