JP2008533519A - Backlit LCD display device and driving method thereof - Google Patents

Abstract

The present invention relates to an active matrix liquid crystal display device and a driving method thereof, the step of driving the pixel (12) with a predetermined driving voltage level, and the step of driving the pixel (12) with an overdrive correction level of the driving voltage. And the predetermined drive voltage level is the same for each pixel (12), and the overdrive correction level of the drive voltage for each pixel corresponds to the data signal of each pixel (12). And a driving method that provides an overdrive corrected voltage level for each pixel (12). The backlight (28) can be switched on or off as to whether the pixel (12) or a pixel is driven by a predetermined drive voltage level or by an overdrive correction level of the drive voltage.

Description

  The present invention relates to a matrix display device and system and a method for driving or addressing such a display device.

  Liquid crystal display devices are well known and typically have a plurality of pixels arranged in a row and column arrangement.

  In general, a pixel is addressed or driven as follows. One row of pixels is selected at a time. The pixels in the currently selected row are given their display settings based on each data voltage applied to each of the columns. Such data voltages are known by a number of names in the art, including data signals, video signals, image signals, drive signals, column voltages, and the like.

  Each selection of each row provides a one-frame display of the displayed image, with the column drive required during each row selection. The display is then refreshed with further frames displayed in the same manner and so on.

  The level of the data voltage applied to the pixel determines how much light is output by the pixel by controlling the range of light modulation effects of the liquid crystal layer in the pixel. Due to the capacitance effect and time response of the liquid crystal layer, the liquid crystal layer may fail to reach a light modulation state that can be reached in a steady state for a given drive voltage by the end of the time that the drive voltage is applied in the addressing scheme. It is known. A correction method called overdrive correction (ODC), which is also called overdrive compensation, has been used to mitigate this effect.

  Under ODC, the pixel is driven at a voltage level that is higher or lower than the voltage level that may be required for steady state operation. Thus, with the end of the associated voltage application period, the voltage present across the pixel reaches a level that is estimated to be substantially equal to what the steady state level should be. Further details of known ODC methods are described in US 5,495,265 and WO 2004/013835. These are incorporated herein by reference.

  The correction applied under the ODC (ie, how much the level of the voltage applied to the pixel to reach a given voltage across the pixel's liquid crystal layer differs from the given voltage). Will change according to. Furthermore, the correction required is at which voltage level the pixel is in the frame before the pixel is corrected, and what voltage level is sought in the current frame, i.e. the current setting of the pixel. And the next data setting (which is often referred to as a voltage pair). The required correction is usually recalculated for each pixel of each frame. Thus, in the conventional ODC schema, multiple voltage pairs and multiple voltage settings (and possibly different panels) so that the voltage pair can be read with respect to the frame buffer and the voltage pair with the appropriate correction determined. It is necessary to have a look-up table having a matrix and a processing unit for determining corrections from these items.

  Another troublesome problem with ODC is that the correction to be applied can also vary with temperature. Considering the many variables already used in conventional ODC, this requires more complex calculations and others. WO 2004/034135 A1 describes one example where an ODC schema that uses a frame buffer and a look-up table with multiple matrix elements is temperature compensated by using multiple look-up tables with each of the multiple matrix elements. .

  Furthermore, increased selector matrix complexity and / or additional buffering in the panel driver IC is typically required to implement ODC for gray level transitions to or near the extremes of the liquid crystal transmission curve. This results in increased silicon area and cost.

  Liquid crystal displays often have a backlight, such as a fluorescent lamp, and the backlight is arranged such that light from the backlight passes through the pixel, where the light is modulated by the liquid crystal layer. US 2004/0012551 A1 describes a variable backlight control system used in a drive schema.

It is known independently to drive other liquid crystal panels by so-called black fields inserted between picture image fields. That is, as described in US Pat. No. 5,912,651, which is incorporated herein by reference, in each frame, the pixels are driven for some time at the data voltage level and driven in black mode for the remainder of the frame The drive method used is used. The visual effect perceived by the viewer is such that this approach can reduce the blur effect of moving images.
US 5,495,265 WO2004 / 013835 WO2004 / 034135A1 US2004 / 0012551A1 US 5,912,651

  The inventor has realized that it is desirable to provide an ODC drive for a matrix display that reduces or reduces the number of processes required with a conventional ODC schema. The inventor also provides an ODC drive for a matrix display device that allows the need for frame buffers and / or lookup tables used in conventional ODC schemas to be eliminated or their size reduced. I found it desirable.

  In a first aspect, the present invention includes a plurality of pixels and a drive circuit arranged to drive each pixel with a predetermined drive voltage level followed by an overdrive correction level of the drive voltage, The drive voltage level of each pixel is the same, and the overdrive correction level of the drive voltage for each pixel is the overdrive correction for each pixel corresponding to the video data signal that can be applied to each pixel. An active matrix liquid crystal display device is provided that is at a specified voltage level.

  The active matrix liquid crystal display device may include a backlight and a backlight control circuit, and the backlight control circuit is configured so that the drive circuit is driven by the predetermined drive voltage level or overdrive correction of the drive voltage. It is arranged to switch the backlight on or off as to whether the pixel or a pixel is driven by level.

  The driving circuit and the backlight control circuit are configured such that the pixel or a pixel is driven at the predetermined voltage level during a first time period, and the backlight is switched off during the first time period. And the pixel or a pixel is addressed by their respective overdrive correction drive voltage level during a second time period and the backlight is off during the second time period Can be arranged as follows.

  The drive circuit and the backlight control circuit continue to address the pixel and a pixel by their respective overdrive correction drive voltage levels during a third time period and during the third time period. It can be arranged such that the backlight is switched on.

  The drive circuit and the backlight control circuit sequentially drive the rows of the active matrix liquid crystal display device during a first time period of the frame, and each pixel in one row has its own overdrive correction. Driven by a drive voltage level, the backlight is switched off during the first time period of the frame, and the rows are driven sequentially during the second time period of the frame; Each pixel in the row is driven by its own video signal data voltage level without overdrive correction, and the backlight is switched on at the start of the second time period, so that the second It remains switched on for the duration of the time period, and the row has a common predetermined value for the third time period of the frame. Are sequentially driven by pressure level, the backlight during the duration of the third time period may be arranged to remain switched on.

  The drive circuit has a drive pulse at a predetermined voltage level applied to a row of the active matrix liquid crystal display device shorter than a drive pulse at a respective ODC drive voltage applied to the row of the active matrix liquid crystal display device. It can be arranged to have a lifetime.

  In the drive circuit, a drive pulse at its own ODC drive voltage is sequentially applied to the row for each row as a function of time, and a drive pulse at a predetermined voltage level is applied to a plurality of rows of the active matrix liquid crystal display device. It can be arranged to be applied simultaneously.

In a further aspect, the present invention is a method for driving an active matrix liquid crystal display device having a plurality of pixels, comprising:
Driving the pixel with a predetermined drive voltage level;
Driving the pixel according to an overdrive correction level of a driving voltage,
The predetermined drive voltage level is the same for each pixel, and the overdrive correction level of the drive voltage for each pixel is overdrive corrected for each pixel corresponding to the data signal of each pixel. A method for driving an active matrix liquid crystal display device at a voltage level is provided.

  The method may further comprise switching a backlight on or off with respect to whether the pixel or a pixel is driven by the predetermined drive voltage level or by an overdrive correction level of the drive voltage.

  The method includes the pixel or a pixel being driven at the predetermined voltage level for a first time period, the backlight being switched off during the first time period, and The pixels or certain pixels may be addressed by their respective overdrive correction drive voltage levels during a second time period, and the backlight may be executed during the second time period. .

  In the method, addressing the pixel or a pixel with their respective overdrive correction drive voltage level is continued for a third time period, and during the third time period, the backlight Can be executed to be switched on.

  The method includes sequentially driving rows of the active matrix liquid crystal display device during a first time period of a frame, and driving each pixel in a row with its respective overdrive correction drive voltage level; During the first time period of the frame, the backlight is switched off, and during the second time period of the frame, the rows are driven sequentially, and each pixel in one row is Driven by its respective video signal data voltage level without overdrive correction, and the backlight is switched on at the start of the second time period, for the duration of the second time period For a third time period of the frame, and the rows are sequentially driven at a common predetermined voltage level during the third time period of the frame, Backlight may be performed to remain switched on during the duration of the third time period.

  The method includes the active matrix liquid crystal having a shorter duration than the drive pulse at the predetermined voltage level than the drive pulse at the respective OCD drive voltage is applied to a row of the active matrix liquid crystal display device. It can be implemented to be applied to a row of a display device.

  In the method, a driving pulse at the respective ODC driving voltage is sequentially applied to the row for each row as a function of time, and a driving pulse at the predetermined voltage level is applied to the plurality of active matrix liquid crystal display devices. Can be applied to the rows simultaneously.

  In a further aspect, the present invention provides an active matrix liquid crystal display device comprising: applying a blank field to a pixel of the active matrix liquid crystal display device; and applying an overdrive corrected video field to the pixel. A driving method is provided.

  The method may further include illuminating a backlight that illuminates the pixels.

  The overdrive correction drive voltage applied to the pixel may be a correction voltage calculated or specified according to device characteristics. The overdrive correction drive voltage may be a voltage level applied to a pixel under an overdrive correction drive schema. Thus, during the application of the overdrive corrected voltage or by the end of the application of the overdrive corrected voltage, the light modulation level of the liquid crystal layer of the pixel has been achieved, or has been specified or received. A liquid crystal layer of a pixel when an uncorrected data voltage level (eg, data signal, video signal) is applied to the pixel for a period longer than the delay in the voltage response of the pixel caused by the capacitance effect and time response of the liquid crystal layer. Is closer to the level of light modulation that can be reached than it would otherwise.

  In a further aspect, the present invention relates to an active matrix liquid crystal display device and a driving method thereof, the step of driving a pixel with a predetermined driving voltage level, and the step of driving the pixel with an overdrive correction level of the driving voltage. And the predetermined drive voltage level is the same for each pixel, and the overdrive correction level of the drive voltage for each pixel corresponds to the data signal of each pixel. A drive method is provided that is at a drive-corrected voltage level. The backlight can be switched on or off with respect to whether the pixel or a pixel is driven by the predetermined drive voltage level or by an overdrive correction level of the drive voltage.

  In a further aspect, in each frame, the pixel is driven to a predetermined level before being driven by the ODC level of the drive voltage. The predetermined level may be a level corresponding to a dark state, that is, “black”. In a given frame, all pixels can be driven to a predetermined level before all the pixels are driven by the ODC level of their respective drive voltage. Thus, for each pixel and for each frame, the required voltage ODC level is always based on the same starting point. That is, the two-dimensional of the prior art ODC system where the data voltages to be achieved across the pixels in the current frame are arranged in a matrix (voltage pairs described above) that is compared to the voltage levels of the pixels in the previous frame. The matrix no longer occurs. This eliminates the need for a conventional ODC look-up table with a frame buffer and a two-dimensional matrix of a given data voltage to be achieved compared to the buffered voltage levels from the previous frame.

  Hereinafter, embodiments of the present invention will be described by way of example with reference to the accompanying drawings.

  FIG. 1 is a schematic diagram of an active matrix liquid crystal display device in which a first embodiment of the present invention is implemented. The display device is a display device suitable for displaying a video image, and has an active matrix liquid crystal display device 10 having a matrix arrangement of pixels. The matrix arrangement of pixels has m rows (1 to m) including pixels 12 (1 to n) arranged in n horizontal directions in each row.

  Each row 12 is coupled to a respective switching device in the form of a thin film transistor (TFT) 11. The gate terminals of all TFTs 11 that are coupled to pixels in the same row are connected to a common row conductor 14. This row conductor 14 is supplied with a selection (gate) signal in operation. Similarly, source terminals that are coupled to all pixels in the same column are connected to a common column conductor 16. A data (video) signal is applied to the column conductor 16. The drain terminals of the TFTs are each connected to a respective transparent pixel electrode 17 that forms and defines a part of the pixel. Conductors 14 and 16, TFT 11 and pixel electrode 17 are mounted on one transparent plate, while the second, spaced transparent plate is an electrode common to all pixels (hereinafter referred to as a common electrode). .) Liquid crystals are placed between the plates.

  The backlight 28 is arranged so that light from the backlight 28 passes through the panel and is modulated according to the transmission characteristics of the pixels 12. The backlight 28 is controlled by the backlight control module 30.

  The display panel operates as follows. The device scans the row conductors 14 with a select (gate) signal to turn on the TFT rows in turn, and the data (to the column conductors of each row of the picture display elements to form a complete display frame (picture). By applying the (video) signal, one row is driven at a time. With one row for addressing, all TFTs 11 in the selected row are switched on for a period determined by the duration of the selection signal. During this period, the data signal is transmitted from the column conductor 16 to the pixel 12.

  The row conductors 14 are supplied with selection signals in the order of selection by a row driver circuit 20 having a digital shift register controlled by timing and timing pulses from the control circuit 21 at regular intervals. At intervals between the select signals, the row conductors 14 are supplied with a substantially constant reference potential by the row driver circuit 20.

  The ODC drive voltage (data voltage) 23 is supplied from the column driver circuit 22 via the column conductor 16. The column driver circuit 22 supplies a timing pulse 27 from the timing and control circuit 21 and a video signal 25 from the video processing circuit 24 simultaneously with the row scanning so as to provide serial-parallel conversion suitable for the row when the panel 10 is addressed. Is done. The column driver circuit 22 is further supplied with a DC voltage 29 from a voltage source 26. In this embodiment, the DC voltage 29 supplied by the voltage source 26 takes the form of one or several discrete DC voltage levels.

  FIG. 2 is a block diagram showing the column driver circuit 22 in more detail. The column driver circuit 22 has a selector control module 90. The selector control module 90 is coupled to the timing and control circuit 21 and receives timing pulses 27 from the timing and control circuit 21.

  The column driver circuit 22 further includes n selectors 92. One selector 92 is provided for each of the n column conductors 16. Each selector 92 is coupled to a selector control module 90.

  The column driver circuit 22 further includes n output buffers 82. Each buffer 82 is coupled to a respective selector 92 and a corresponding common column conductor 16.

  The column driver circuit 22 further includes a resistive digital-analog converter (R-DAC) 91. R-DAC 91 is coupled to voltage source 26 and receives a DC voltage 29 from voltage source 26. The R-DAC 91 is coupled to each of the selectors 92 by a common bus 93 having N lines. One line of the common bus 93 is provided for each of the N voltage levels supplying one of each of the N gray levels.

  In operation, the R-DAC 91 converts the DC voltage 29 and supplies N voltage levels, one for each line of the bus 93, to all of the selectors 92. For each selector 92, the selector control module 90 under timing control of the timing pulse 27 determines which of the N voltage levels should be selected according to the video signal 25 received for each column conductor 16. Each selector 92 is instructed. The selected voltage level is selected by the selector 92 and input to each buffer 82. It is output from each buffer 82 and applied to the column conductor 16 as a respective ODC drive voltage level 23.

  Unless stated below, other details of the liquid crystal display device may be as in any conventional active matrix liquid crystal display device driven by the ODC schema, disclosed in this particular embodiment in US Pat. No. 5,495,265. It is the same as the liquid crystal display device and operates in the same way. The contents of US 5,495,265 are incorporated herein by reference. Alternatively, some or all of the details may be the same as and / or alternatively the same as the liquid crystal display device disclosed in US 5,130,829. The contents of US 5,130,829 are incorporated herein by reference.

  However, in this embodiment, the video processing circuit 24, the voltage source 26 and the column driver circuit 22 execute an ODC driving scheme including blank field insertion, as will be described in more detail with reference to FIGS. It is configured as follows.

  In general, in each frame, the pixel is driven to a predetermined level before being driven by the ODC level of the drive voltage. In this embodiment, the predetermined level is a level corresponding to a dark state, that is, “black”. Furthermore, in this embodiment, in a given frame, all pixels are driven to a predetermined level before all pixels are driven by the ODC level of their respective drive voltage. Thus, for each pixel and for each frame, the required voltage ODC level is always based on the same starting point. That is, the two-dimensional of the prior art ODC system where the data voltages to be achieved across the pixels in the current frame are arranged in a matrix (voltage pairs described above) that is compared to the voltage levels of the pixels in the previous frame. The matrix no longer occurs. This eliminates the need for a conventional ODC look-up table with a frame buffer and a two-dimensional matrix of a given data voltage to be achieved compared to the buffered voltage levels from the previous frame.

  This process therefore requires that different voltage levels be applied compared to the conventional ODC format of the device. Therefore, the voltage source 26 in this embodiment is accordingly configured to supply the required voltage. Specifically, for example, with respect to N pixel luminance settings, only N DC voltage levels are required for ODC driving in this embodiment, compared to conventional ODC driving that may require more than N DC voltage levels. And not. This is because conventional ODC driving is typically overdriven to or near threshold voltages Vth and / or Vsat that are outside the threshold Vth and saturation voltage Vsat that are inevitably required in conventional ODC arrangements. This is because an additional voltage level needs to be supplied to cope with the transition. Furthermore, with conventional ODC arrangements, certain voltage levels are required so that no ODC occurs. Various such reasons for the additional voltage level are that the required ODC level of the voltage is always based on the same starting point, and this variation is not included and therefore tends to be avoided by this example. Have

  Further, in this embodiment, the visual appearance generated by the above driving process is described in more detail below with reference to FIGS. 2 and 3, the ODC voltage level driving stage and the blank field driving stage. Is further improved by turning the backlight on and off.

  FIG. 3 is a flowchart showing the processing steps used for a given row of pixels in the adaptive ODC driving process according to this embodiment. FIG. 4 is a schematic (not to scale) showing a plot 34 of light transmission 36 from a pixel against time 38 in progress of process steps s2, s4 and s6 described below with reference to FIG. Light transmission 36 is the relative transmission from the pixel for a given light entering the pixel. That is, plot 34 is a situation that does not consider whether the backlight is switched on or off.

  In step s2, the pixel is driven by a blank field for a first time period indicated by reference numeral 40 in FIG. That is, in this embodiment, all the pixels are driven at a common predetermined voltage level. The predetermined voltage level is a level that provides a low light transmission level that can be considered a “black” display output. During the first time period 40, the backlight 28 is in a switched off state, as indicated by the word “backlight off” in FIG.

  In step s4, the pixels are addressed by their respective ODC drive voltage levels for a second time period indicated by reference numeral 42 in FIG. That is, the ODC video field is applied. The column driver circuit 22 selects the appropriate ODC drive voltage level 23 for a given pixel according to the received video signal 25 as described above with reference to FIG. During the second time period 42, the backlight 28 is off, as indicated by the word “backlight off” in FIG.

  Obviously, performing frame driving according to steps s2 and s4 alone provides an improved ODC driving configuration, and in other embodiments such processing is utilized in this simple manner. In that case, the backlight may be switched to be on continuously. Another possibility is that the backlight may be switched on only for a part of the frame period, for example substantially switched on only during step s4 applying the video field. is there.

  However, in this embodiment, the backlight 28 is illuminated in step s6. That is, as indicated by the word “backlight on” in FIG. 4, the backlight 28 is turned on and remains on for the third time period indicated by reference numeral 44 in FIG. 4. During step s6, ie during the third period 44, the pixels continue to be addressed by their respective ODC drive voltage levels, similar to step s4. That is, the ODC video field continues to be applied during the third time period 44.

  In the above processing, the backlight is switched on and off in the scanning mode. That is, it operates in the scanning backlight mode. That is, the backlight is arranged in a number of portions, each corresponding to a number of consecutive rows of pixels, and only the portion of the backlight that is driven at a given point in time is the succession of pixels in which the selected row is located. This is the portion of the backlight corresponding to the set of rows to be performed.

  In this example, the first period 40 has a duration that is approximately equal to the second period 42, while the third period 44 is the respective duration of the first period 40 and the second period 42. Half of the period. Therefore, the ratio of backlight off to backlight on is 4: 1. In general, for example, in other embodiments, this ratio should desirably be between 4: 1 and 1: 1, although other ratios may be used.

  Furthermore, in this embodiment, the voltage drive stage is fully synchronized with the backlight switching on and off, but this need not be the case in other embodiments. For example, the backlight may be switched off a short time after the blank field drive voltage is applied.

  The first, second and third time periods 40, 42, 44 together provide an address frame 49. The processing, i.e. steps s2, s4 and s6, then, for example, provide a first period 50, a second period 52 and a third period 54 of a further frame 59, respectively, so as to continue thereafter, respectively. Repeated for further frames. In this embodiment, the address frequency is 70 Hz so that there are 70 frames 49, 59 per second, but this frequency may be a different value in other embodiments.

  By driving all the pixels to a common predetermined voltage level in step s2, the subsequent ODC drive is always performed from a given starting voltage. Thus, a two-dimensional array of voltage pairs for the calculation of the ODC voltage is no longer needed (hence the use of a frame buffer and a two-dimensional lookup table is no longer needed). Thus, the ODC driving process performed at s4 and s6 is dramatically simplified, for example, no longer requires a lookup table or frame buffer RAM. ODC driving is performed in the first stage when the backlight 28 is off (ie, the second period 42), and when the backlight 28 is on (ie, the third period 44). By effectively dividing into the second stage, the contrast ratio of the display is improved. This is because the displayed image light level is displayed only during a more stable or proper stage of the third period 44 rather than a more variable stage of the second period 42. Furthermore, the contrast ratio is also improved by the backlight 28 being off during the first period 40 during which a blank field is inserted.

  In the embodiment described above, the backlight is used in scan mode. In the second main embodiment, the backlight is used in strobe mode rather than scan mode as follows.

  In this second main embodiment, the active matrix liquid crystal display device is shown in FIG. 1, but now operates as described with reference to FIGS.

  FIG. 5 is a schematic diagram showing the order in which rows 1-m are addressed as a function of time 70 during frame 69 in the drive schema of this second main embodiment. FIG. 6 is a schematic (not to scale) showing a plot 74 of light transmission 76 from a pixel against time 70 of the pixel during a frame 69 as a result of the voltage application shown in FIG. As before, light transmission 76 is the relative transmission from the pixel for a given light entering the pixel. That is, plot 74 is a situation that does not consider whether the backlight 28 is switched on or off.

  Referring to FIG. 5, during the first time period 60 of frame 69, the rows are driven sequentially from row 1 to row m, and each pixel included in the row is represented by its respective appropriate ODC. Driven by drive voltage level. During the first time period 60, the backlight 28 is switched off. Referring now to FIG. 6, since ODC is applied, the pixel transmission level is increased to the level required to be displayed during the upcoming second time period 62.

  Referring again to FIG. 5, during the second time period 62, the rows are driven sequentially from row 1 to row m, and each pixel included in the row has its own video signal data voltage level. Driven by. That is, the pixel is driven without using the ODC during the second time period. The backlight 28 is switched on at the beginning of the second time period 62 and remains switched on for the duration of the second time period 62. Referring again to FIG. 6, the pixel transmission 76 is at the video signal data voltage level required to be displayed for illumination by the backlight 28 which is now switched on.

  Referring again to FIG. 5, during the third time period 64, the rows are driven sequentially from row 1 to row m by a blank field. That is, in this embodiment, all the pixels are driven at a common predetermined voltage level. The backlight 28 remains switched on for the duration of the third time period 64. Referring again to FIG. 6, pixel transmission 76 is a low light transmission level 68 that can be thought of as a “black” display output resulting from the application of a predetermined voltage level.

  Thus, in other words, in the second embodiment, the panel is addressed by a video frame followed by a 'blank' frame twice for all video (super) frames. In the first video subframe, an overdrive voltage is applied to obtain an appropriate transmission level by the second video subframe. In the second video subframe, a standard voltage is applied to maintain the proper transmission level. The backlight is switched on during the second video subframe and the 'blank' frame. The backlight is 'black' in this case. It should be noted that two distinct sets of gray level voltages are used in this example, the first being the overdrive voltage (ie, ODC drive voltage level) during the first subframe. And the second is a standard voltage (ie, video signal data voltage level) during the second subframe. However, this is not necessarily a significant drawback. This is because in many applications it may be desirable to have such a set of drive voltages available anyway. Thus, for example, standard voltage levels can be used (rather than ODC) when it is desired that power consumption reduction be available as a user-selectable or automatically triggered option. A further advantage is that only one set is required at any time, even if there are more than one set of gray levels, so the selection matrix is relatively simple. Furthermore, for buffers in general, it is the number of buffers used at the same time that tends to require silicon rather than different buffers, if different buffers are not required to operate simultaneously.

  By applying a voltage in the manner described above, different brightness in different rows is avoided or reduced. By strobing the backlight, i.e. by illuminating the backlight of all rows each time, the rows addressed at the beginning of the frame will establish further ODC benefits for the liquid crystal to respond. Can be brighter than the line addressed behind the frame in another way. Thus, in this embodiment, by having the backlight 28 switched on during the use of the third time period, i.e. applying the blank field (common predetermined voltage level), such an effect is achieved by the frame. It is achieved throughout, i.e. over all rows 1 to m. Another possibility is that this approach can still be used with a scanning backlight.

  As mentioned above, it may be desirable to switch between ODC and non-ODC modes for a given panel. The following examples described below with reference to FIGS. 1-7 are particularly suitable for providing such convenience in an efficient manner.

  The active matrix liquid crystal display device of this embodiment is the same as that shown in FIG. 1 except that in this embodiment, certain details of the column driver circuit 22 are different from those of the column driver circuit 22 of the first embodiment. Is the same. FIG. 7 is a block diagram showing the column driver circuit 22 of this embodiment. The column driver circuit 22 of this embodiment is also included in the column driver circuit 22 of the first embodiment shown in FIG. 2, and the following components indicated by the same reference numerals, ie, selector control modules 90, n This includes a selector 92, n output buffers 82, and a resistive digital-to-analog converter (R-DAC) 91. Such components are coupled together and to other parts of the active matrix liquid crystal display device, as in the example of FIG. 2, unless indicated below.

  The column driver circuit 22 of this embodiment further includes a look-up table (LUT) 112 and an N-of-X output selector 110. Both of these are coupled to the selector control module 90. N-of-X selector 110 is also coupled to selector 92 via bus 93 and to R-DAC 91 via a particular portion of bus 93 shown as bus 93a in FIG.

  In this embodiment, the DC voltage 29 received by the R-DAC 91 from the voltage source 26 has X levels. Note that X> N. In operation, the N-of-X selector 110 selects a set of N voltage levels from the available X voltage levels and sends it to the selector 92 under the control of the selector control module 90. Thus, in this embodiment, a plurality of different sets of N voltages can be utilized. Thus, for example, different sets of N voltages may be utilized to perform temperature compensation and / or to switch between one for ODC mode and one for non-ODC mode. Thus, in this embodiment, the design flexibility is programmable including a LUT 112 that is programmed so that the selector control module 90 selects the set of N voltages by reading the required set of values from the LUT 112. Provided in that it has a circuit. This provides a flexible arrangement that can be used, for example, to provide a common design used in a wide variety of liquid crystal panels, and the appropriate voltage level for a given type of panel is read from the LUT accordingly. . However, in other embodiments, multiple sets of voltage levels may be provided in a less flexible manner that does not include an LUT, for example, by having a predetermined fixed set available. This can be conveniently used, for example, as a fixed design for a given type of liquid crystal panel.

  Therefore, to reiterate, the present embodiment, in particular the column driver circuit shown in FIG. 7, is suitable for at least two dynamically selectable sets of N grayscale level voltages, ie, ODC mode. One and one for non-ODC mode are provided. Additional selectable sets may be provided as needed, for example with respect to the reflective mode compared to the transmission mode of display operation. In other embodiments, other methods of providing two or more of the dynamically selectable sets of grayscale level voltages may be implemented, such as a voltage selectable fixed There are sets, fixed sets that are selectable and programmable.

  The advantage associated with such a dynamically selectable set of grayscale levels is that the column driver circuit 22 can be used in a variety of different panels and that the grayscale voltage is specific for use in any particular environment. It is programmable according to the panel. In addition, other variables such as, for example, temperature compensation and the use of different frame rates can be adapted in one product design.

  In the embodiment shown in FIGS. 7 and 2, the (column) buffer 82 is connected after the (1-of-N) selector 92. This is referred to as a “buffer per column” architecture and is typically used in large panels. In other embodiments not specifically limited to smaller panels, other so-called “buffer per gray level” architectures may be employed. In this architecture, the buffer is connected before the 1-of-N selector. That is, one buffer (or set of buffers) is shared by all columns.

  In further embodiments, more complex circuitry may be used, including the use of RAM. Video data and synchronization are arranged in a conventional format for non-ODC mode. However, a further clock generation circuit block that generates a higher frequency clock is used for the ODC mode (with blank field insertion). The advantage of this implementation is that display scan timing is decoupled from data and clock at the interface. A variable frame rate is possible due to the optional synchronization to the display's inherent scan rate, which is common in current portable display applications. However, this comes at the cost of the need to use full frame buffer RAM.

  In each of the previous embodiments, temperature compensation for ODC driving may be performed in the same manner as in a conventional ODC driving arrangement. That is, different ODC drive voltage levels are required for a given voltage data level according to temperature. Such processing is simplified by the present invention compared to conventional ODC arrangements since there is usually little data to be temperature compensated.

  The order in which different treatments are performed in a given frame in the previous embodiment may be changed in other embodiments. For example, referring to FIG. 4, in the first embodiment described above, frame 49 begins with a first time period 40 and ends with a third time period 44. However, in other embodiments, the frame may start from a third time period, followed by a first time period, and end at a second time period. In other words, the boundary setting where the frame starts and ends compared to the three stages of the frame may be different in other embodiments. The same idea applies for example in FIGS.

  In the previous embodiment, all pixels are driven to the black field predetermined voltage simultaneously or sequentially (ie, without driving any pixel or row to the ODC voltage level during that time). However, this need not be the case, and in other embodiments, some pixels that are not all pixels, for example, some rows that are not all rows, are driven to a blank field predetermined voltage, followed by Thus, several other pixels or rows of pixels are driven by the ODC voltage level.

In the previous embodiment, for a given pixel, driving with an ODC voltage level is alternated with driving with a blank field predetermined voltage. However, this need not be the case and in other embodiments the following may be implemented.
(I) A given pixel is driven multiple times with an ODC voltage, then driven once with a blank field, then driven multiple times with an ODC voltage, then driven once with a blank field, and so on It may be driven. Or
(Ii) A given pixel is driven multiple times with an ODC voltage, then driven multiple times with a blank field, then driven multiple times with an ODC voltage, then driven multiple times with a blank field, and so on It may be driven. Or
(Iii) A given pixel is driven once with an ODC voltage, then driven multiple times with a blank field, then driven once with an ODC voltage, then multiple times with a blank field, and so on It may be driven.

  In some embodiments, eg, embodiments (i), (ii), and (iii) described in the previous paragraph, the selection pulse that drives the pixel by a blank field (ie, by a common predetermined voltage level) is: It may be shorter than a selection pulse for driving a pixel by video data. This is shown schematically in FIG. FIG. 8 shows the ODC voltage drive pulse 104 supplied from row 1 to m sequentially for each row as a function of time 102 over the video frame 105 along with the blank field drive pulse 106 and the video voltage drive pulse 104. FIG. 6 is a schematic diagram showing a blank field drive pulse 106 having a short duration and supplied sequentially from row 1 to row m as a function of time 102 over a blank frame 107 following a video frame 105. Accordingly, the blank frame 107 is shorter than the video frame 105. This advantageously reduces the required address time. However, this need not be the case, and in other embodiments, the selection pulse that drives a pixel with a blank field (ie, with a common predetermined voltage level) has the same width as the selection pulse that drives the pixel with video data. Or it may be longer.

  In some embodiments, eg, embodiments (i), (ii), and (iii) described in the previous paragraph, driving a pixel by a blank field (ie, by a common predetermined voltage level) Are executed one line at a time. However, since each pixel is driven to the same voltage level, such row-by-row selection is not essential, and therefore, in other embodiments, some or all of the rows are at a common predetermined voltage level at the same time. May be selected for driving. This is shown schematically in FIG. FIG. 9 shows an ODC voltage drive pulse 94 supplied sequentially from row 1 to row m as a function of time 92 over the video frame 95 and simultaneously during a blank frame 97 for each row 1-m. FIG. 6 is a schematic diagram showing a supplied black field drive pulse 96; FIG. Accordingly, the blank frame 97 is shorter than the video frame 95. This advantageously reduces the required address time.

  In the previous embodiment, the predetermined voltage applied during the blank field is a voltage level that provides a low display output that can be considered black. However, this need not be the case, and in other embodiments, a predetermined voltage level that forms a gray level may be used. This may be used, for example, to provide a simpler ODC drive value. In embodiments where the backlight is not switched on during the blank field, such gray levels have no adverse effect on contrast. However, even in non-example embodiments, for example, a reduction in contrast ratio can be a price paid for simpler ODC drive values.

  Further, in some embodiments, the predetermined voltage applied during the blank field may correspond to VSAT (saturation voltage) or VTH (threshold voltage) of the liquid crystal. In such cases, the transition to 'blank' may itself be overdriven to improve the limit at which the transition is completed within a given time.

For each of the previous embodiments, it is desirable to be able to operate the panel in non-ODC mode as well as in ODC mode, for example for power consumption in mobile and portable applications. In that case, two separate sets of drive voltage levels may be required to define an accurate gamma curve in each mode of operation. this is,
a) having two fixed drive voltage level sets available and a mechanism that allows one or other voltage sets to be selected, or b) other voltage level sets look up Having one fixed voltage level set and programmable via a table, or c) having both voltage level sets programmable via a look-up table (this is the driver IC (This is the most flexible solution that can be used with many panels without changing to.)
Can be achieved.

  The idea of the present invention as its most general form is that each pixel element (R, G and B) in the LCD is alternately addressed by a gray scale level corresponding to the video data and a predetermined gray scale level. It is to be done. The overdrive technology is applied to a transition from a predetermined gray scale level to the next gray scale level corresponding to the video data. The predetermined gray scale level is the same for all pixel elements.

  Various aspects of the previous examples are briefly described as follows.

  Instead of a conventional (contrast output) backlight, a strobe or scanning backlight may be used to enhance the image quality. Both overdrive technology and conventional (i.e. non-ODC) drive technology may be combined, e.g. the transition from a predetermined grayscale level to the next video data is overdriven and then the predetermined grayscale Further video data follows that is not overdriven one or more times (applied to the pixel as usual) before the next addressing by level. Similarly, the transition to a predetermined gray scale level may be overdriven and / or repeated one or more times in succession.

  Variations on these schemas address the entire frame alternately with video data and a predetermined grayscale level ('blank field insertion'), or address part of each frame with video data and Addressing the rest of the frame by gray scale level ('blank stripe insertion') may also be included. It should be noted that video data with overdrive, then optionally video data without overdrive (one or more times), then a predetermined gray level (one or more times), then The sequence of video data with overdrive is applied at the pixel level, but not necessarily at the entire frame level. That is, it is possible to have both video data and 'blank data' present in the same frame, and the frame need not be 'blank' or video as a whole.

With a simple implementation, the following applies:
-No further circuit blocks or extensions of existing circuits are required.
-An extended voltage range is provided for column driving compared to conventional driving (column driver ICs can be modified to accommodate higher voltages).
-The data sequence and synchronization in the LCD module interface is different from the conventional driving. That is, the following is executed. VIDEO DATA1, 'BLANK' DATA, VIDEO DATA2, 'BLANK' DATA, VIDEO DATA3, and so on (note that video data and / or blank data can be repeated one or more times).
-Non-switched, strobe or scanning backlight modes may be used.

In some embodiments, the following is provided.
A further circuit block that allows the selection of one or several sets (dynamic rows or frames) of N column drive voltages (N = number of gray scales). The set of column drive voltages may be fixed at the column driver IC or externally, or they may be programmable with the column driver IC, or somehow using, for example, a linear programmable DAC Then, it may be supplied from the outside.
-Extended voltage range for column drive compared to conventional drive.
-Data sequence and synchronization in the LCD module interface may be different from the conventional driving, for example, VIDEO DATA1, 'BLANK' DATA, VIDEO DATA2, 'BLANK' DATA, VIDEO DATA3, etc. Good (note that video data and / or blank data can be repeated one or more times. Also note that if an entire 'blank' frame is sent, the data Instead of sending data to the pixel, it is replaced by a 'blank frame command'.)

Various embodiments tend to provide one or more of the following advantages, respectively.
The need for frame buffer RAM at the module level can be eliminated (providing Si area and cost savings).
• The need for a look-up table can be eliminated. Alternatively, at least the size of the lookup table can be reduced (providing Si area and cost savings).
The need for extra column drive buffers can be eliminated (providing Si area and cost savings).
The need for an extra column switch matrix can be eliminated (providing Si area and cost savings).
-Motion blur due to the slow response of the AMLCD panel can be reduced (performance improvement).
-Motion blur due to 'sample and hold effect' can be reduced (performance improvement).
One or more lookup tables can be generated more easily than with a conventional ODC system. For conventional ODCs, accurate timing measurements usually must be made for all or part of a possible grayscale transition. Here, the look-up table can determine the gamma polarity of the panel in the previous embodiment, so that usually only accurate luminance measurements are considered or required.

1 is a schematic diagram of an active matrix liquid crystal display device. FIG. 2 is a block diagram illustrating a column driver of the active matrix liquid crystal display device of FIG. 1. 6 is a flowchart illustrating processing steps used for a given row of pixels in an adaptive ODC drive process. FIG. 4 is a schematic diagram (not to scale) showing a plot of light transmission from a pixel versus time during the process shown in FIG. Fig. 4 is a schematic diagram showing the order in which row 1 of m is addressed as a function of time during a frame in the drive scheme. FIG. 6 is a schematic diagram (not to scale) showing a plot of light transmission from a pixel against time of the pixel during a frame as a result of the voltage application shown in FIG. FIG. 6 is a block diagram showing another example of the column driver circuit of the active matrix liquid crystal display device shown in FIG. 1. 4 is a schematic diagram illustrating ODC voltage drive pulses and blank field drive pulses supplied sequentially from row 1 to m. 4 is a schematic diagram illustrating an ODC voltage drive pulse supplied sequentially from row 1 to m and a blank field drive pulse supplied simultaneously.

Claims (16)

A plurality of pixels;
A drive circuit arranged to drive each pixel with a predetermined drive voltage level followed by an overdrive correction level of the drive voltage;
The predetermined drive voltage level is the same for each pixel;
The active matrix liquid crystal display device, wherein the overdrive correction level of the drive voltage for each pixel is a voltage level after overdrive correction of each pixel corresponding to the data signal of each pixel. A backlight and a backlight control circuit;
The backlight control circuit switches the backlight on or off with respect to whether the driving circuit is driving the pixel or a pixel according to the predetermined driving voltage level or according to an overdrive correction level of the driving voltage. 2. The active matrix liquid crystal display device according to claim 1, which is arranged. The drive circuit and the backlight control circuit are:
The pixel or a pixel is driven at the predetermined voltage level during a first time period, the backlight is switched off during the first time period; and
The pixels or certain pixels are addressed during their second time period by their respective overdrive correction drive voltage levels and arranged so that the backlight is off during the second time period The active matrix liquid crystal display device according to claim 2. The drive circuit and the backlight control circuit are:
Arranged such that the pixel and a pixel remain addressed by their respective overdrive correction drive voltage levels during a third time period and the backlight is switched on during the third time period The active matrix liquid crystal display device according to claim 3. The drive circuit and the backlight control circuit are:
During the first time period of the frame, the rows of the active matrix liquid crystal display device are driven sequentially, and each pixel in one row is driven by its respective overdrive correction drive voltage level, During the first time period, the backlight is switched off;
During the second time period of the frame, the rows are driven sequentially, and each pixel in a row is driven by its respective video signal data voltage level without overdrive correction, and the back The light is switched on at the beginning of the second time period and remains switched on for the duration of the second time period; and
During the third time period of the frame, the rows are driven sequentially at a common predetermined voltage level so that the backlight remains switched on for the duration of the third time period. The active matrix liquid crystal display device according to claim 2, which is arranged. The drive circuit is
A drive pulse at a predetermined voltage level applied to the row of the active matrix liquid crystal display device has a shorter duration than a drive pulse at the respective ODC drive voltage applied to the row of the active matrix liquid crystal display device. The active matrix liquid crystal display device according to claim 1, which is disposed on the substrate. The drive circuit is
A drive pulse at each ODC drive voltage is sequentially applied to the rows row by row as a function of time, and
6. The active matrix liquid crystal display device according to claim 1, wherein a drive pulse at a predetermined voltage level is arranged to be applied simultaneously to a plurality of rows of the active matrix liquid crystal display device. 7. A driving method of an active matrix liquid crystal display device having a plurality of pixels,
Driving the pixel with a predetermined drive voltage level;
Driving the pixel according to an overdrive correction level of a driving voltage,
The predetermined drive voltage level is the same for each pixel;
The driving method of an active matrix liquid crystal display device, wherein the overdrive correction level of the driving voltage for each pixel is a voltage level subjected to overdrive correction for each pixel corresponding to the data signal of each pixel.   9. The active matrix liquid crystal according to claim 8, further comprising a step of switching a backlight on or off with respect to whether the pixel or a pixel is driven by the predetermined drive voltage level or by an overdrive correction level of the drive voltage. Driving method of display device. The pixel or a pixel is driven at the predetermined voltage level during a first time period, and during the first time period, the backlight is switched off; and
10. The pixel or a pixel is addressed by its respective overdrive correction drive voltage level during a second time period, and the backlight is off during the second time period. A driving method of the active matrix liquid crystal display device described.   Addressing the pixel or a pixel with their respective overdrive correction drive voltage level is continued for a third time period, during which the backlight is switched on. The method of driving an active matrix liquid crystal display device according to claim 10. During the first time period of the frame, the rows of the active matrix liquid crystal display device are driven sequentially, and each pixel in one row is driven by its respective overdrive correction drive voltage level, During the first time period, the backlight is switched off;
During the second time period of the frame, the rows are driven sequentially, and each pixel in a row is driven by its respective video signal data voltage level without overdrive correction, and the back The light is switched on at the beginning of the second time period and remains switched on for the duration of the second time period; and
The rows are sequentially driven at a common predetermined voltage level during a third time period of the frame, and the backlight remains switched on for the duration of the third time period. 10. A driving method of an active matrix liquid crystal display device according to 9.   The drive pulse at the predetermined voltage level has a shorter duration than the drive pulse at the respective OCD drive voltage is applied to the row of the active matrix liquid crystal display device. The method for driving an active matrix liquid crystal display device according to claim 8, wherein the active matrix liquid crystal display device is applied to the active matrix liquid crystal device. The drive pulses at the respective ODC drive voltages are sequentially applied to the rows row by row as a function of time, and
The driving method of the active matrix liquid crystal display device according to claim 8, wherein the driving pulse at the predetermined voltage level is simultaneously applied to a plurality of rows of the active matrix liquid crystal display device. Applying a blank field to the pixels of the device;
Applying an overdrive-corrected video field to the pixels.   The method of driving an active matrix liquid crystal display device according to claim 15, further comprising: illuminating a backlight that illuminates the pixels.

Images