JP2004088419A - Amplifier circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a pop noise from occurring when an amplifier makes transection to an operation start state from a standby state. <P>SOLUTION: An amplifying circuit has a switching transistor Q10 connected to an interval between an inputting signal path L and a power supply voltage V<SB>DD</SB>, a control terminal T3 to which a voltage controlling on/off of the switching transistor Q10 is applied, control means Q16 and Q17 controlling one of output transistors according to a voltage of the inputting signal path. Furthermore, the amplifying circuit has a time constant circuit including a capacitor C<SB>2</SB>and a delay control circuit delaying the control of the output transistor by the control means for a time corresponding to the time constant circuit, when a voltage making the switching transistor Q10 off is provided to the control terminal T3, and executing the control. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an amplifier circuit used in a power circuit or the like of an audio device.
[0002]
[Prior art]
FIG. 2 shows a conventional amplifier circuit. When the operation of the amplifier circuit is to be _disabled while the power is turned on (therefore, _VDD is applied), a low-level voltage is input to the control terminal T3. As a result, the transistors Q7 and Q10 are turned on, and the transistors Q8 and Q9 are turned off. At this time, the constant current sources A1 to A5 are turned off. That is, the amplifier circuit becomes inactive.
[0003]
On the other hand, since the transistor Q10 is turned on, the voltage at the point a is substantially equal to the power supply voltage _VDD . Therefore, the transistors Q11 and Q14 are off. The low-level amplifier 1 is disabled by turning off the transistor Q14. The constant current source A2 is not flow the current _{I B} through the transistor Q13 because is off, no current flows _{I C} from the transistor Q16 with no given current _{I B} from the transistor Q11. Therefore, the transistors Q16 and Q17 are off, and the transistors Q22 and Q23 are also off. Since the constant current source A4 is off, the transistors Q18, Q19, Q20, and Q21 are off. Therefore, the output terminal OUT has a high impedance.
[0004]
Next, when a high level is input to the control terminal T3, the amplifier circuit enters an operating state. That is, at this time, the constant current sources A1, A2, A3, A4, and A5 are turned on, the transistors Q7 and Q10 are turned off, and the transistors Q8 and Q9 are turned on. Therefore, the signal current amplified by the first-stage amplifiers Q1 and Q2 is a is transmitted to the point side, the current _{I B} that flows to the transistor Q13 is given from the transistor Q11 and Q16. Therefore, the high-level amplifier 2 is also operable.
[0005]
[Problems to be solved by the invention]
By the way, when a high level is applied to T3 from a state in which a low level is applied to the control terminal T3 (an inoperative state of the amplifier circuit) and the amplifier circuit is operated, a pop noise is temporarily generated from the speaker. . If this applies a high level to the control terminal T3, the transistors Q10, after Q7 is turned off, until the voltage at the point a current I _A flow is a voltage during normal operation, the current flowing through the transistor Q11, Q14 Is less than during normal operation. Thus current _{I B} is supplied by the _{I C,} because transistors Q16, Q17, Q22, Q23 output terminal OUT since the current flows in becomes operable after becoming once ground potential from a high-impedance state.
An object of the present invention is to provide an amplifier circuit that solves such a problem.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, an amplifier according to the present invention connects a pair of output transistors of opposite conductivity type in series between a power supply and a ground, connects a connection midpoint between the transistors to an output terminal, and sets a first output transistor. An output circuit connected to the input signal path via a capacitor,
Output circuit control means for controlling the output transistor according to the voltage of the input signal path;
A switching element connected between the input signal path and a power supply,
A control terminal to which a signal for controlling on / off of the switching element is applied;
A time constant circuit including a second capacitor and connected to the control terminal, wherein when the control terminal receives a signal for turning off the switching element, the output circuit control means controls the output transistor. And a delay control circuit for gradually executing the program with a time delay according to the time constant circuit.
In the embodiment of FIG. 1 described later, a pair of output transistors Q21 and Q23 of the opposite conductivity type are connected in series between the power supply voltage _VDD and the ground, while the connection midpoint of the transistors Q21 and Q23 is connected. the first through the capacitor C ₁ as well as connected to the output terminal OUT and an output circuit formed by connecting the input signal line L; a switching transistor Q10 connected between the input signal line L and a power supply voltage V _DD A control terminal T3 to which a voltage for controlling on / off of the switching transistor Q10 is applied; and a control means Q16 for controlling one of the output transistors Q21 and Q23 according to the voltage of the input signal path L. , Q17; a time constant circuit including a _second capacitor C2 and connected to the control terminal T3; A delay control circuit 3 for executing control of the output transistor by the control means Q16 and Q17 with a time delay according to the time constant circuit when a voltage for turning off the switching transistor Q10 is applied to the control terminal T3; Consisting of;
[0007]
BEST MODE FOR CARRYING OUT THE INVENTION
In the present embodiment shown in FIG. 1, a delay control circuit 3 for preventing pop noise is additionally connected to the conventional example shown in FIG. The delay control circuit 3 has an inverter 4 connected to a control terminal T3 and a P-channel MOS transistor Q30. The source of the transistor Q30 is connected to the power supply voltage _VDD , and the drain is connected to the constant current source 5.
[0008]
P-channel MOS transistors Q31 and Q32 form a current mirror circuit. The source of one transistor Q31 is directly connected to power supply voltage V _DD, and the source of the other transistor Q32 is connected to power supply voltage V _DD via resistor R1. Have been. The gates of the transistors Q31 and Q32 are connected to the constant current source 5 and the drain of the transistor Q30. The output of the inverter 4 is connected to the gate of the N channel MOS transistor Q33 having its source connected to ground, the capacitor C ₂ between the drain and source of the transistor Q33 is connected.
[0009]
Connecting node K of the drain and the capacitor _{C 2} of the transistor Q32 is connected to the gate of the P-channel MOS transistor Q34. The source of transistor Q34 is connected to power supply voltage _VDD , and the drain is coupled to the gates of transistors Q16 and Q17 of high-level amplifier 2.
[0010]
Next, the operation of the delay control circuit 3 when the amplifier circuit is activated by applying a high level to the control terminal T3 from the inoperative state in the present embodiment will be described. Now, when a high level is applied to the control terminal T3, the transistor Q33 is turned off. On the other hand, the transistor Q30 is turned off, and the transistors Q31 and Q32 are turned on. Therefore, the capacitor _{C 2} constant current source 5, is charged according to the time constant of the transistors Q31, Q32, determined by the current mirror circuit and the capacitor _{C 2} formed by the resistor R1. As a result, the transistor Q34 turns off with a delay from the time when the high level is applied to the control terminal T3.
[0011]
In other words, the phenomenon that the voltage of the output terminal OUT temporarily changes from the high impedance to the ground potential and then becomes the normal operation voltage by the application of the high level to the control terminal T3 is, as mentioned above, the control terminal T3. upon application of a high level from the low level state, the current current _{I C} to compensate for the _{I B} flows from the transistor Q16, the transistor Q17, Q22, Q23 that are turned on, and the control terminal thereof on state T3 Is turned off after a lapse of time from when a high level is applied to the potential at the point a to the normal state, and in the present invention, a high level is applied to the control terminal T3 and transient by the voltage between the until the voltage at the time of normal operation, I'll be supplied from a separate delay control circuit 3 the current I _E in place of the current I _C The star Q16 and Q17 are gradually turned on.
[0012]
When a low level is applied to the control terminal T3, the transistors Q16 and Q17 are off due to the operation of the delay control circuit, so that the transistor Q23 remains off and the output terminal OUT is at high impedance when the amplifier circuit does not operate. It becomes. When the high level is applied to the control terminal T3, a capacitor C _2, the current mirror circuit capacitor C ₂ is charged according to the charging time constant of (transistors Q31, Q32, a current source 5, constituted by resistors 1 and), The transistor Q34 is gradually turned off, and gradually changes the voltage of the output terminal OUT to a value according to the input signal. That is, the transistors Q16, Q17, Q22, and Q23 are released from the off state for a predetermined time from the time when the high level is applied to the control terminal T3 to operate the amplifier circuit. By doing so, when the operation of the amplifier is started, the output terminal OUT does not go from the high impedance state to the normal operating voltage once passing through the ground potential, and pop noise is less likely to occur.
[0013]
The delay control circuit 3 can be formed on the same LSI chip together with the amplifier circuit. The first capacitor C1 is to function as a phase compensation by configuring the second capacitor C ₂ of the same type as (in the case of forming the same chip is the same type), mutual pairability Can be taken well. If the pairing property is good, the matching between the previously designed time constant of the first capacitor and the time constant of the second capacitor C2 (the time constant of the delay control circuit) becomes easy, and the variation is strong. , Pop noise rejection accuracy can be improved.
[0014]
【The invention's effect】
As described above, according to the present invention, there is an effect that pop noise does not occur when transitioning from the standby state of the amplifier to the operation start state. In particular, by taking a pair of the first and second capacitors, the pop noise rejection accuracy is improved.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing a conventional amplifier circuit. FIG. 2 is a circuit diagram of an amplifier circuit according to an embodiment of the present invention.
3 delay control circuit _VDD power supply voltage Q10 switching transistor T3 control terminal Q21 output transistor Q23 output transistor C ₁ first capacitor C ₂ second capacitor

Claims (2)

An output formed by connecting a pair of output transistors of opposite conductivity type in series between a power supply and a ground, connecting a connection midpoint of the transistors to an output terminal, and connecting to an input signal path via a first capacitor. Circuit and
Output circuit control means for controlling the output transistor according to the voltage of the input signal path;
A switching element connected between the input signal path and a power supply,
A control terminal to which a signal for controlling on / off of the switching element is applied;
A time constant circuit including a second capacitor and connected to the control terminal, wherein when the control terminal receives a signal for turning off the switching element, the output circuit control means controls the output transistor. A delay control circuit for gradually executing with a time delay according to the time constant circuit,
An amplifier circuit consisting of The amplifier circuit according to claim 1, wherein the first capacitor and the second capacitor have a pair property.

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