JP2004056143A - Method for releasing - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for releasing which not only does not damage a layer to be released, but also does in addition will release the layer to be released having a small area in but also will release the layer to be released having a large area over the entire surface. <P>SOLUTION: A metal layer or a nitride layer 11 is provided on a substrate, and an oxide layer 12 is provided in contact with the metal layer or the nitride layer 11. Further, a layer 13 to be released and made of a substrate insulating film, and a layer containing hydrogen is formed. The layer can be more separated meatly in a physical means by heat treating at 410°C or higher at which hydrogen diffuses. <P>COPYRIGHT: (C)2004,JPO

Description

<< The present invention relates to a method for peeling a layer to be peeled, particularly to a method for peeling a layer to be peeled including various elements. In addition, the present invention relates to a semiconductor device having a circuit including a thin film transistor (hereinafter, referred to as a TFT) in which a layer to be separated is attached to a substrate and transferred, and a manufacturing method thereof. For example, the present invention relates to an electro-optical device typified by a liquid crystal module and a light emitting device typified by an EL module, and an electronic device equipped with such a device as a component.

Note that in this specification, a semiconductor device generally means a device that can function by utilizing semiconductor characteristics, and an electro-optical device, a light-emitting device, a semiconductor circuit, and an electronic device are all semiconductor devices.

In recent years, a technique of forming a thin film transistor (TFT) by using a semiconductor thin film (having a thickness of several to several hundred nm) formed on a substrate having an insulating surface has been receiving attention. Thin film transistors are widely applied to electronic devices such as ICs and electro-optical devices, and their development is particularly urgent as switching elements for image display devices.

ア プ リ ケ ー シ ョ ン Various applications using such an image display device are expected, and use of such devices for mobile devices is particularly attracting attention. At present, glass substrates and quartz substrates are often used, but have drawbacks of being easily broken and heavy. Further, in performing mass production, it is difficult to increase the size of a glass substrate or a quartz substrate, which is not suitable. Therefore, an attempt has been made to form a TFT element on a flexible substrate, typically a flexible plastic film.

However, since the heat resistance of the plastic film is low, the maximum temperature of the process has to be lowered, and as a result, a TFT having better electric characteristics than a TFT formed on a glass substrate cannot be formed at present. Therefore, high-performance liquid crystal display devices and light-emitting elements using a plastic film have not been realized.

剥離 Further, a separation method for separating a layer to be separated, which is present on a substrate via a separation layer, from the substrate has already been proposed. For example, the techniques described in Patent Literature 1 and Patent Literature 2 include a separation layer made of amorphous silicon (or polysilicon), and are included in the amorphous silicon by irradiating a laser beam through a substrate. By releasing hydrogen, a void is formed to separate the substrate. In addition, Patent Document 3 discloses that a liquid crystal display device is completed by attaching a layer to be peeled (referred to as a layer to be transferred) to a plastic film using this technique.

However, in the above method, it is essential to use a substrate having a high light-transmitting property, and a relatively large laser is used to give sufficient energy to pass through the substrate and further release hydrogen contained in the amorphous silicon. There is a problem that light irradiation is required and the layer to be peeled is damaged. In the above method, when a device is manufactured on the separation layer, if high-temperature heat treatment or the like is performed in the device manufacturing process, hydrogen contained in the separation layer is diffused and reduced, and the laser light is applied to the separation layer. However, there is a possibility that the peeling may not be performed sufficiently. Therefore, there is a problem that the process after the formation of the separation layer is limited in order to maintain the amount of hydrogen contained in the separation layer. The above publication also discloses that a light-shielding layer or a reflective layer is provided in order to prevent damage to the layer to be separated, but in that case, it is difficult to manufacture a transmissive liquid crystal display device. In addition, in the above method, it is difficult to peel off a layer to be peeled having a large area.
JP-A-10-125929 JP-A-10-125931 JP-A-10-125930

The present invention has been made in view of the above problems, the present invention provides a peeling method that does not damage the layer to be peeled, not only peeling of the layer to be peeled having a small area, but also a large area It is an object to enable the layer to be separated to be peeled over the entire surface.

Another object of the present invention is to provide a peeling method in which a layer to be peeled is not restricted by a heat treatment temperature, a type of a substrate, or the like.

Another object of the present invention is to provide a light-weight semiconductor device in which a layer to be separated is attached to various base materials and a method for manufacturing the semiconductor device. In particular, to provide a light-weight semiconductor device and a method for manufacturing the same by attaching various elements typified by a TFT (thin film diode, photoelectric conversion element formed of PIN junction of silicon and silicon resistance element) to a flexible film. As an issue.

The present inventors have conducted a number of experiments and studies, and provided a metal layer provided on a substrate, an oxide layer in contact with the metal layer, and further provided an insulating film on the oxide layer. After a layer containing hydrogen, typically an amorphous silicon film containing hydrogen, is formed on the insulating film and then subjected to a heat treatment at 410 ° C. or higher, no process abnormality such as film peeling (peeling) occurs. Can be easily separated at the interface of the oxide layer (the interface between the oxide layer and the metal layer) by physical means, typically by applying a mechanical force (for example, peeling with a human hand). A peeling method was found.

That is, while the bonding force between the metal layer and the oxide layer is strong enough to withstand thermal energy, the heat treatment causes hydrogen to diffuse between the metal layer and the oxide layer and react with the metal layer. Then, the film stress of the oxide layer or the amorphous silicon film changes, and the mechanical energy between the metal layer and the oxide layer becomes weak. As a result, peeling is likely to occur when a mechanical force is applied. Note that the present invention is not limited to the amorphous silicon film, and may be a semiconductor film that can be formed by a PCVD method, for example, a germanium film, an alloy film of silicon and germanium, or an amorphous silicon film containing phosphorus or boron.

When the oxide layer is formed on the metal layer, the surface of the metal layer is oxidized, so that the adhesion between the metal layer and the oxide layer increases. Then, it is considered that the adhesion between the metal layer and the oxide layer is reduced by diffusing hydrogen contained in the hydrogen-containing layer at 410 ° C. or higher and reacting with the oxidized metal layer surface (for example, reduction reaction). In addition, the layer containing hydrogen changes to the tensile stress side by heating, so that the interface between the metal layer and the oxide layer is distorted, and peeling is likely to occur.

Note that, in this specification, the internal stress of a film (referred to as film stress) means that when an arbitrary cross section is considered inside a film formed on a substrate, one side of the cross section extends to the other side. Force per unit cross-sectional area. It can be said that the internal stress more or less always exists in a thin film formed by vacuum evaporation, sputtering, vapor phase growth, or the like. Its value reaches a maximum of 10 ⁹ N / m ² . The internal stress value changes depending on the material of the thin film, the substance of the substrate, the conditions for forming the thin film, and the like. Further, the internal stress value also changes by performing the heat treatment.

Also, a state in which the force exerted on the partner through the unit cross-sectional area perpendicular to the substrate surface is in a direction in which the force is pulled is referred to as a tensile state, the internal stress at that time is referred to as a tensile stress, and a state in which the pressing direction is referred to as a compressed state. The internal stress is called a compressive stress.

Configuration 1 of the invention relating to the peeling method disclosed in the present specification includes:
A peeling method for peeling a layer to be peeled from a substrate,
A metal layer on the substrate, an oxide layer in contact with the metal layer, an insulating film, and a step of sequentially forming a semiconductor film containing hydrogen and having an amorphous structure on the insulating film,
Performing a heat treatment for diffusing hydrogen;
After bonding a support to a layer to be peeled including the oxide layer, the insulating film, and the semiconductor film, a layer to be peeled bonded to the support is physically separated from the substrate provided with the metal layer by physical means. And a peeling step.

In addition, Configuration 2 of the present invention relating to another peeling method includes:
A peeling method for peeling a layer to be peeled from a substrate,
A metal layer on the substrate, an oxide layer in contact with the metal layer, an insulating film, and a step of sequentially forming a semiconductor film containing hydrogen and having an amorphous structure on the insulating film,
Performing a heat treatment for diffusing hydrogen;
Forming a TFT having the semiconductor film as an active layer and an element connected to the TFT;
After a support is bonded to a layer to be separated including the oxide layer, the insulating film, the TFT, and the element, the layer to be separated bonded to the support is physically separated from a substrate provided with the metal layer. And a step of separating by means.

In the above structure, the order of the step of performing a heat treatment for diffusing hydrogen and the step of forming a TFT having the semiconductor film as an active layer and an element connected to the TFT are not particularly limited. In the case where heat treatment at 410 ° C. or higher is performed in the step of forming a TFT having the semiconductor film as an active layer and an element connected to the TFT, it is not necessary to separately perform heat treatment for diffusing hydrogen.

に お い て In each of the above structures, the heat treatment is performed at a temperature at which hydrogen in the film is released or diffused, that is, at 410 ° C. or higher.

In each of the above structures, the metal layer is an element selected from Ti, Ta, W, Mo, Cr, Nd, Fe, Ni, Co, Zr, Zn, Ru, Rh, Pd, Os, Ir, and Pt. Or a single layer made of an alloy material or a compound material containing the above element as a main component, or a laminate of these metals or a mixture thereof.

In this specification, the physical means is a means recognized by physics rather than chemistry, and specifically, a mechanical means or a mechanical means having a process that can be applied to the laws of mechanics. It refers to a means and means to change some mechanical energy (mechanical energy).

However, in any of the above configurations, it is necessary that the bonding force between the oxide layer and the metal layer be smaller than the bonding force between the oxide layer and the metal layer when peeled off by physical means.

In addition, a metal film containing hydrogen may be formed instead of the semiconductor film containing hydrogen.
A peeling method for peeling a layer to be peeled from a substrate,
A step of sequentially forming a metal layer on the substrate, an oxide layer in contact with the metal layer, an insulating film, and a metal layer containing hydrogen on the insulating film;
Performing a heat treatment for diffusing hydrogen;
Forming a TFT and an element connected to the TFT;
After a support is bonded to a layer to be separated including the oxide layer, the insulating film, the TFT, and the element, the layer to be separated bonded to the support is physically separated from a substrate provided with the metal layer. And a step of separating by means.

Further, a metal layer containing hydrogen may be used as the metal layer, and the structure 4 of the present invention relating to another separation method includes:
A peeling method for peeling a layer to be peeled from a substrate,
A step of sequentially forming a metal layer containing hydrogen on the substrate, an oxide layer in contact with the metal layer, an insulating film, and a semiconductor film having an amorphous structure over the insulating film;
Performing a heat treatment for diffusing hydrogen;
Forming a TFT having the semiconductor film as an active layer and an element connected to the TFT;
After a support is bonded to a layer to be separated including the oxide layer, the insulating film, the TFT, and the element, the layer to be separated bonded to the support is physically separated from a substrate provided with the metal layer. And a step of separating by means.

In each of the above structures, the oxide layer is a silicon oxide film formed by a sputtering method.

In each of the above structures, the insulating film is a silicon oxide film, a silicon oxynitride film, or a laminate thereof.

In addition, in each of the above structures, the thickness of the oxide layer is larger than the thickness of the metal layer.

In each of the above structures, the element provided over the insulating film is a light-emitting element, a semiconductor element, or a liquid crystal element.

Further, as the metal layer containing hydrogen, a W film or a Ni film using a CVD method (such as a remote plasma method) can be used. For example, silicon serving as a nucleus of a W film is deposited with SiH ₄ gas, or the surface of a silicon oxide film (or a silicon nitride film) is exposed to a rare gas plasma to cut Si—O bonds (or Si—N bonds). When a WF ₆ / H ₂ gas is allowed to flow, a W film can be deposited by a reduction reaction. A film formation method of depositing a W film by a reduction reaction is a kind of a CVD method also called a blanket W method. Further, as the metal layer containing hydrogen, AB ₂ type hydrogen storage alloy containing hydrogen (provided that, Ti or Zr as A, Ni as B, V, Cr, Co, Fe, Mn), or AB ₅ type hydrogen storage alloy (However, Mm (Misch metal) as A and Ni, Co, Mn, Al, Mo as B) may be used.

In each of the above structures, the metal layer may be provided with another layer, for example, an insulating layer or the like, between the substrate and the metal layer. Preferably, it is formed.

In the present invention, not only a substrate having a light-transmitting property but also any substrate, for example, a glass substrate, a quartz substrate, a semiconductor substrate, a ceramic substrate, a metal substrate can be used. Can be peeled off.

In the present specification, the transfer body is one that is adhered to the layer to be peeled after being peeled off, and is not particularly limited, and may be a substrate of any composition such as plastic, glass, metal, and ceramics. In this specification, the support is used for bonding to a layer to be separated when peeled by physical means, and is not particularly limited, and may have any composition such as plastic, glass, metal, and ceramics. It may be a substrate. Further, the shape of the transfer body and the shape of the support are not particularly limited, and may be one having a flat surface, one having a curved surface, one having flexibility, or a film shape. If weight reduction is a top priority, a film-shaped plastic substrate, for example, polyethylene terephthalate (PET), polyether sulfone (PES), polyethylene naphthalate (PEN), polycarbonate (PC), nylon, polyether ether Plastic substrates such as ketone (PEEK), polysulfone (PSF), polyetherimide (PEI), polyarylate (PAR), polybutylene terephthalate (PBT), and polyimide are preferable.

In each of the above structures of the method for manufacturing a semiconductor device, in the case of manufacturing a liquid crystal display device, the support may be used as a counter substrate, and the support may be bonded to the layer to be separated using a sealant as an adhesive. In this case, the element provided on the separation layer has a pixel electrode, and a space between the pixel electrode and the counter substrate is filled with a liquid crystal material.

In each of the above structures of the method for manufacturing a semiconductor device, in the case where a light-emitting device represented by a light-emitting device having an EL element is manufactured, a support is used as a sealing material and an organic compound layer such as moisture or oxygen is externally provided. It is preferable that the light-emitting element be completely shielded from the outside so as to prevent a substance promoting deterioration from entering. Further, if the weight reduction is the highest priority, a film-shaped plastic substrate is preferable, but since the effect of preventing a substance which promotes the deterioration of the organic compound layer such as moisture or oxygen from entering from outside is weak, for example, A structure in which a first insulating film, a second insulating film, and a third insulating film are provided thereon to prevent a substance such as moisture or oxygen, which promotes deterioration of an organic compound layer, from sufficiently entering from the outside. Good. However, the second insulating film (stress relieving film) sandwiched between the first insulating film (barrier film) and the third insulating film (barrier film) includes the first insulating film and the The film stress is made smaller than that of the third insulating film.

In the case of manufacturing a light-emitting device typified by a light-emitting device having an EL element, not only a support but also a transfer body is similarly formed of a first insulating film, a second insulating film, and a third insulating film. It is preferable to provide an organic compound layer that sufficiently promotes deterioration of the organic compound layer such as moisture and oxygen from the outside.

According to the present invention, since the semiconductor device is separated from the substrate by physical means, the reliability of the device can be improved without damaging the semiconductor layer.

According to the present invention, not only can a layer having a small area be peeled off, but also a layer having a large area can be peeled over the entire surface with good yield.

In addition, the present invention can be said to be a process suitable for mass production because it can be easily peeled off by physical means, for example, peeled off by a human hand. Further, when a manufacturing apparatus for peeling off a layer to be peeled off during mass production is manufactured, a large-sized manufacturing apparatus can be manufactured at low cost.

The best mode for carrying out the invention will be described below.

中 In FIG. 1A, reference numeral 10 denotes a substrate, 11 denotes a nitride layer or a metal layer, 12 denotes an oxide layer, and 13 denotes a layer to be peeled.

In FIG. 1A, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used as the substrate 10. Further, a silicon substrate, a metal substrate, or a stainless steel substrate may be used.

First, a nitride layer or a metal layer 11 is formed on a substrate 10 as shown in FIG. As the nitride layer or the metal layer 11, a typical example is an element selected from W, Ti, Ta, Mo, Nd, Ni, Co, Zr, Zn, Ru, Rh, Pd, Os, Ir, Pt, or A single layer of an alloy material or a compound material containing the element as a main component, or a stacked layer thereof, or a nitride thereof, for example, a single layer of titanium nitride, tungsten nitride, tantalum nitride, or molybdenum nitride, or Lamination may be used. The thickness of the nitride layer or metal layer 11 is 10 nm to 200 nm, preferably 50 nm to 75 nm.

で は In addition, since the substrate is fixed by the sputtering method, the film thickness near the periphery of the substrate is likely to be uneven. Therefore, it is preferable to remove only the peripheral portion by dry etching. In this case, an insulating film made of a silicon oxynitride film is formed between the substrate 10 and the nitride layer or the metal layer 11 so as to prevent the substrate from being etched. It may be formed to a degree.

Next, an oxide layer 12 is formed on the nitride layer or the metal layer 11. As the oxide layer 12, a layer formed using silicon oxide, silicon oxynitride, or a metal oxide material may be formed by a sputtering method. The thickness of the oxide layer 12 is preferably about twice or more the thickness of the nitride layer or the metal layer 11. Here, the thickness of the silicon oxide film is set to be 150 nm to 200 nm by a sputtering method using a silicon oxide target. When the stress of the silicon oxide film obtained by the sputtering method was measured, it was -3.97 × 10 ⁸ (Dyne / cm ² ), and the hydrogen concentration by SIMS measurement was 4 × 10 ²⁰ atoms / cm ³ . is there. However, these measured values are measured values for a single film and are not values for a laminated film.

Next, the layer 13 to be peeled is formed on the oxide layer 12. At the time of forming the layer 13 to be separated, after forming a material film containing at least hydrogen (semiconductor film or metal film), a heat treatment for diffusing hydrogen contained in the material film containing hydrogen is performed. This heat treatment may be performed at a temperature of 410 ° C. or higher, and may be performed separately from the formation process of the layer 13 to be peeled, or the step may be omitted because it is also used. For example, when an amorphous silicon film containing hydrogen is used as a material film containing hydrogen and a polysilicon film is formed by heating, if a heat treatment at 500 ° C. or more is performed for crystallization, the polysilicon film is formed and hydrogen is removed at the same time. Diffusion can take place. The layer to be peeled 13 is formed of various elements represented by a TFT (a thin film diode, a photoelectric conversion element formed of a PIN junction of silicon, a silicon resistance element, or a sensor element (typically, a pressure-sensitive fingerprint sensor using polysilicon). ).

Next, a second substrate 15 serving as a support for fixing the layer 13 to be peeled is attached with the first adhesive 14. (FIG. 1B) Note that the second substrate 15 is preferably a substrate having higher rigidity than the first substrate 10. As the first adhesive 14, an adhesive or a double-sided tape may be used.

Next, the substrate 10 provided with the nitride layer or the metal layer 11 is peeled off by physical means. (FIG. 1C) Since the film stress of the oxide layer 12 is different from the film stress of the nitride layer or the metal layer 11, the film can be peeled off with a relatively small force. Here, an example is shown in which it is assumed that the mechanical strength of the layer 13 to be peeled is sufficient. However, when the mechanical strength of the layer 13 to be peeled is insufficient, the layer 13 to be peeled is fixed. It is preferred that the support (not shown) be adhered and then peeled off.

Thus, the layer to be peeled 13 formed on the oxide layer 12 can be separated from the substrate 10. FIG. 1D shows the state after peeling.

Next, the peeled layer 13 to be peeled is attached to a third substrate as a transfer body with a second adhesive 16. (FIG. 1 (E))

Next, the second substrate 15 is peeled off by removing or peeling off the first adhesive 14. (FIG. 1 (F))

Next, an EL layer 20 is formed, and the fourth substrate 18 serving as a sealing material for the EL layer 20 is sealed with a third adhesive 19. (FIG. 1G) Note that the fourth substrate 18 is not particularly required as long as the third adhesive 19 is a material that can sufficiently block substances (moisture and oxygen) that promote deterioration of the organic compound layer. Here, an example of manufacturing a light-emitting device using an EL element is described; however, there is no particular limitation, and various semiconductor devices can be completed.

In the case of manufacturing a liquid crystal display device, the support may be bonded to the layer to be separated by using the support as a counter substrate and using a sealant as an adhesive. In this case, the element provided in the layer to be peeled has a pixel electrode, and a space between the pixel electrode and the counter substrate is filled with a liquid crystal material. The order in which the liquid crystal display device is manufactured is not particularly limited, and a counter substrate as a support may be attached, and after injecting liquid crystal, the substrate may be peeled off and a plastic substrate as a transfer body may be attached. After the pixel electrode is formed, the substrate may be peeled off, a plastic substrate as a first transfer body may be attached, and then an opposing substrate as a second transfer body may be attached.

The order in which the light-emitting device is manufactured is not particularly limited. After a light-emitting element is formed, a plastic substrate as a support may be attached, the substrate may be separated, and a plastic substrate as a transfer body may be attached. After forming the light emitting element, the substrate may be peeled off, a plastic substrate as a first transfer member may be attached, and then a plastic substrate as a second transfer member may be attached.

In the present invention, by heat treatment at 410 ° C. or higher, hydrogen is diffused at the interface between the nitride layer or metal layer 11 and the oxide layer 12 to cause a reaction, and further, the film stress of the oxide layer 12 and the nitride It is important to change the film stress of the layer or metal layer 11, or all the stresses stacked on the substrate. However, if the film stress is changed too much, peeling will occur. Therefore, it is preferable to carefully perform film formation and other processes.

(4) Even when heat treatment at 500 ° C. or higher or laser light irradiation is performed, film peeling does not occur during the process. Then, clean separation can be easily performed in the oxide layer or at the interface by physical means.

In the experiments of the present inventors, separation was confirmed by the separation method of the present invention even when the metal layer 11 was a tungsten film 10 nm and the oxide layer 12 was a silicon oxide film 200 nm by a sputtering method. Even when the oxide layer 12 is a silicon oxide film having a thickness of 100 nm formed by a sputtering method, peeling has been confirmed by the peeling method of the present invention. Further, even when the tungsten film is 50 nm as the metal layer 11 and the silicon oxide film is 400 nm by the sputtering method as the oxide layer 12, the peeling can be confirmed by the peeling method of the present invention.

実 験 In addition, in the experiments of the present inventors, peeling of the tungsten nitride film or the titanium nitride film as the nitride layer 11 was confirmed by the peeling method of the present invention.

In addition, the following experiment was conducted.

(Experiment 1)
After an amorphous silicon film containing hydrogen was formed on a glass substrate by a PCVD method (a film forming temperature of 300 ° C. and a film forming gas of SiH ₄ ), heat treatment was performed under different conditions, and the results of measuring each stress were shown in FIG. is there. The heat treatment conditions are 350 ° C. for 1 hour, 400 ° C. for 1 hour, 410 ° C. for 1 hour, 430 ° C. for 1 hour, and 450 ° C. for 1 hour.

Under any of the conditions, the heat treatment changes the stress value (−8 × 10 ⁹ (Dyne / cm ² ) to −6 × 10 ⁹ (Dyne / cm ² )) to the tensile stress side immediately after the film formation. 2 can be read from FIG. The stress value after the heat treatment is in the range of −6 × 10 ⁹ (Dyne / cm ² ) to 2 × 10 ⁹ (Dyne / cm ² ).

Also, a tungsten film, a silicon oxide film formed by a sputtering method, a base insulating film, and an amorphous silicon film containing hydrogen formed by a PCVD method are sequentially laminated on a glass substrate, and heat treatment under the above conditions is performed. Was performed, peeling was confirmed by heat treatment at 410 ° C. or more.

(Experiment 2)
Here, when the hydrogen concentration of an amorphous silicon film containing hydrogen obtained by the PCVD method under the same conditions as in Experiment 1 was measured by FT-IR, Si-H was 1.06 × 10 ²² (atoms / cm ^3). ) And Si-H ₂ were 8.34 × 10 ¹⁹ (atoms / cm ³ ), and the hydrogen concentration in the composition ratio was 21.5%. Further, when the hydrogen concentration was similarly calculated by changing the film forming conditions of the PCVD method, the hydrogen concentrations in the composition ratio were 16.4%, 17.1%, and 19.0%.

A tungsten film, a silicon oxide film formed by a sputtering method, a base insulating film, an amorphous silicon film containing hydrogen (a film having a hydrogen concentration of 16.4% to 21.5% in composition ratio) formed by a PCVD method are formed on a glass substrate. The layers were sequentially formed, and heat treatment was performed at 410 ° C. for 1 hour, and a peeling test using a tape was performed. As a result, peeling was confirmed under all conditions. On the other hand, an amorphous silicon film obtained by sputtering instead of PCVD could not be peeled off in a peeling test using a tape.

A tungsten film, a silicon oxide film formed by a sputtering method, a base insulating film, a silicon nitride film containing hydrogen by a PCVD method (having a stress value of -2.4 × 10 ⁸ (Dyne / cm ² ), Si-H Is 8.9 × 10 ²¹ (atoms / cm ³ ), and N—H is 6.6 × 10 ²¹ (atoms / cm ³ ), and heat-treated at 410 ° C. for 1 hour. Then, a peeling test using a tape was performed, and peeling was confirmed. For this reason, the present invention is not particularly limited to an amorphous silicon film, and similar results can be obtained as long as the film contains hydrogen.

(Experiment 3)
Here, after laminating a W film (100 nm) and a silicon oxide film (100 nm) formed on a silicon wafer, heat treatment (350 ° C. for 1 hour, 400 ° C. for 1 hour, 410 ° C. for 1 hour, 430 ° C.) FIG. 3 shows the results of measuring the stress change for each treatment by performing etching at 1 ° C. for 1 hour and 450 ° C. for 1 hour), further etching the silicon oxide film.

(4) The film formation conditions of the W film were as follows: a tungsten target was formed by a sputtering method, a film forming pressure was 0.2 Pa, a film forming power was 3 kW, and an argon flow rate was 20 sccm.

The silicon oxide film was formed under the following conditions: an RF sputtering system, a silicon oxide target (diameter: 30.5 cm), an argon gas heated to heat the substrate at a flow rate of 30 sccm, and a substrate temperature of The temperature was 300 ° C., the film forming pressure was 0.4 Pa, the film forming power was 3 kW, and the flow rate of argon / flow rate of oxygen was 10 sccm / 30 sccm.

か ら From FIG. 3, it can be seen that the stress changes significantly after the formation of the silicon oxide film and after the etching of the silicon oxide film.

As a comparison, a change in stress in the lamination of a W film (100 nm) and a silicon oxide film (20 nm) formed on a silicon wafer was measured, but almost no change was observed even when all the above processes were performed. From this, it is clear that the stress after the formation of the silicon oxide film depends on the thickness of the silicon oxide film. When the thickness of the silicon oxide film is large, the stress changes greatly, so that the interface between the W film and the silicon oxide film is likely to be distorted, and a peeling phenomenon occurs. Therefore, in the present invention, the thickness of the silicon oxide film and the thickness ratio of the W film to the silicon oxide film are important, and the thickness of the silicon oxide film is set to be at least larger than that of the W film. Double or more.

(Experiment 4)
In addition, a tungsten film, a silicon oxide film by a sputtering method, a base insulating film, and an amorphous silicon film containing hydrogen by a PCVD method are sequentially formed on a glass substrate, and a heat treatment at 410 ° C. or more for diffusing hydrogen is performed, and then etching is performed. When the tape test was performed after removing the amorphous silicon film by the above, peeling was confirmed. In addition, a tungsten film, a silicon oxide film formed by a sputtering method, and a base insulating film were sequentially formed on a glass substrate, and after a heat treatment at 410 ° C. or higher, a tape test was performed. Therefore, it is considered that the existence of the amorphous silicon film which is a layer formed on the base film is caused by the peeling phenomenon.

The results of these experiments, that is, whether peeling is possible or not are determined at 410 ° C. In addition, since the change in stress is not so much observed, the inventors have found that not only the stress of the laminated film is related to the peeling, but also the amorphous silicon film and the hydrogen contained in the film are caused by the peeling phenomenon. Are finding that.

FIG. 11 is a graph showing the relationship between the density of hydrogen desorbed from the amorphous silicon film formed on the glass substrate and the substrate surface temperature (° C.) by thermal desorption spectroscopy (TDS). FIG. 11 shows that the amount of hydrogen desorbed from the amorphous silicon film tends to increase as the substrate temperature rises. From the obtained data, the temperature at which the peak of the amount of desorbed hydrogen reaches 382 ° C. to 411 ° C. I found it. Therefore, FIG. 11 shows data related to the above-mentioned experimental results (experimental results in which the possibility of peeling is determined at 410 ° C.), and a sufficient heating temperature for easily causing the peeling phenomenon is about 410 ° C. or more. It can be said that

The inventors have also found that the thickness ratio between the W film and the silicon oxide film is also caused by the peeling phenomenon. Further, the inventors believe that the combination of the material of the metal layer or the nitride layer and the material of the oxide layer and the interface state such as adhesion are also caused by the peeling phenomenon.

本 The present invention having the above configuration will be described in more detail with reference to the following embodiments.

(4) An embodiment of the present invention will be described with reference to FIGS. Here, a method for simultaneously manufacturing a pixel portion and a TFT (an n-channel TFT and a p-channel TFT) of a driver circuit provided around the pixel portion over the same substrate will be described in detail. Here, an example of manufacturing an active matrix substrate for manufacturing a reflective liquid crystal display device is described. However, the present invention is not particularly limited. It goes without saying that a display device can be manufactured, and a light-emitting device having a light-emitting layer containing an organic compound can also be manufactured.

A glass substrate (# 1737) was used as the substrate. First, a 100-nm-thick silicon oxynitride layer was formed over a substrate by a PCVD method.

Next, a tungsten layer was formed as a metal layer with a thickness of 50 nm as a metal layer by a sputtering method, and a silicon oxide layer was formed as a oxide layer with a thickness of 200 nm as an oxide layer continuously without opening to the atmosphere. The silicon oxide layer was formed by using an RF sputtering apparatus, using a silicon oxide target (30.5 cm in diameter), flowing argon gas heated to heat the substrate at a flow rate of 30 sccm, and setting the substrate temperature to 300 ° C. The deposition pressure was 0.4 Pa, the deposition power was 3 kW, and the flow rate of argon / flow rate of oxygen was 10 sccm / 30 sccm.

Next, the tungsten layer is removed from the peripheral portion or the end surface of the substrate by O ₂ ashing.

Next, a silicon oxynitride film (composition ratio: Si = 32%, O = 59%, N = 7%, H = 2%) formed from a raw material gas SiH ₄ and N ₂ O by a plasma CVD method at a film formation temperature of 300 ° C. Is formed in a thickness of 100 nm, and a semiconductor layer having an amorphous structure (here, an amorphous silicon layer) is formed by plasma CVD at a film forming temperature of 300 ° C. and a film forming gas of SiH ₄ without release to the atmosphere. ) Was formed with a thickness of 54 nm. This amorphous silicon layer contains hydrogen, and hydrogen can be diffused by a heat treatment performed later, and can be separated in the oxide layer or at the interface by physical means.

Next, a nickel acetate solution containing 10 ppm by weight of nickel is applied with a spinner. Instead of coating, a method of spraying a nickel element over the entire surface by a sputtering method may be used. Next, a semiconductor film (here, a polysilicon layer) having a crystal structure is formed by heat treatment and crystallization. Here, after a heat treatment for dehydrogenation (500 ° C., 1 hour), a heat treatment for crystallization (550 ° C., 4 hours) is performed to obtain a silicon film having a crystal structure. The heat treatment for dehydrogenation (at 500 ° C. for one hour) also serves as a heat treatment for diffusing hydrogen contained in the amorphous silicon layer to the interface between the W film and the silicon oxide layer. Although a crystallization technique using nickel as a metal element for promoting crystallization of silicon is used here, other known crystallization techniques, for example, a solid phase growth method or a laser crystallization method may be used.

Next, after removing the oxide film on the surface of the silicon film having a crystal structure with diluted hydrofluoric acid or the like, irradiation with laser light (XeCl: wavelength 308 nm) for increasing the crystallization rate and repairing defects remaining in the crystal grains is performed. Is performed in the air or an oxygen atmosphere. Excimer laser light having a wavelength of 400 nm or less, or the second and third harmonics of a YAG laser is used as the laser light. Here, a pulse laser beam having a repetition frequency of about 10 to 1000 Hz is used, the laser beam is condensed to 100 to 500 mJ / cm ² by an optical system, and irradiated with an overlap ratio of 90 to 95% to form a silicon film surface. May be scanned. Here, laser light irradiation was performed in the atmosphere at a repetition frequency of 30 Hz and an energy density of 470 mJ / cm ² . Note that an oxide film is formed on the surface by laser light irradiation because the irradiation is performed in the air or in an oxygen atmosphere. Although an example using a pulsed laser is shown here, a continuous wave laser may be used. In order to obtain a crystal with a large grain size during crystallization of an amorphous semiconductor film, continuous oscillation is possible. It is preferable to use a simple solid-state laser and apply the second to fourth harmonics of the fundamental wave. Typically, Nd: YVO ₄ may be applied laser (fundamental wave 1064 nm) second harmonic (532 nm) or the third harmonic (355 nm). When a continuous wave laser is used, laser light emitted from a continuous wave YVO ₄ laser having an output of 10 W is converted into a harmonic by a nonlinear optical element. There is also a method in which a YVO ₄ crystal and a nonlinear optical element are put in a resonator to emit a harmonic. Then, the laser light is preferably shaped into a rectangular or elliptical laser beam on the irradiation surface by an optical system, and the laser beam is irradiated on the object to be processed. At this time, the energy density of approximately 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation may be performed by moving the semiconductor film relatively to the laser light at a speed of about 10 to 2000 cm / s.

Next, in addition to the oxide film formed by the irradiation with the laser light, the surface is treated with ozone water for 120 seconds to form a barrier layer made of an oxide film having a total thickness of 1 to 5 nm. In this embodiment, the barrier layer is formed using ozone water. However, the surface of the semiconductor film having a crystal structure is oxidized by irradiation with ultraviolet light in an oxygen atmosphere or the surface of the semiconductor film having a crystal structure is formed by oxygen plasma treatment. The barrier layer may be formed by depositing an oxide film of about 1 to 10 nm by an oxidation method, a plasma CVD method, a sputtering method, an evaporation method, or the like. Further, before forming the barrier layer, an oxide film formed by laser light irradiation may be removed.

Next, an amorphous silicon film containing an argon element to be a gettering site is formed to a thickness of 10 nm to 400 nm, here 100 nm, over the barrier layer by a sputtering method. In this embodiment, the amorphous silicon film containing an argon element is formed in an atmosphere containing argon using a silicon target. When an amorphous silicon film containing an argon element is formed by a plasma CVD method, the film forming conditions are as follows: the flow rate ratio of monosilane and argon (SiH ₄ : Ar) is 1:99, and the film forming pressure is 6.665 Pa. (0.05 Torr), the RF power density is 0.087 W / cm ² , and the film formation temperature is 350 ° C.

After that, heat treatment is performed in a furnace heated to 650 ° C. for 3 minutes to perform gettering to reduce the nickel concentration in the semiconductor film having a crystal structure. A lamp annealing device may be used instead of the furnace.

Next, after the amorphous silicon film containing an argon element, which is a gettering site, is selectively removed using the barrier layer as an etching stopper, the barrier layer is selectively removed with dilute hydrofluoric acid. Note that at the time of gettering, since nickel tends to move to a region having a high oxygen concentration, it is desirable to remove the barrier layer made of an oxide film after gettering.

Next, after forming a thin oxide film with ozone water on the surface of the obtained silicon film having a crystal structure (also called a polysilicon film), a mask made of a resist is formed, and an etching process is performed into a desired shape to form an island shape. To form a separated semiconductor layer. After the formation of the semiconductor layer, the resist mask is removed.

Through the above steps, a nitride layer or a metal layer 101, an oxide layer 102, and a base insulating film 103 are formed over the substrate 100, and a semiconductor film having a crystalline structure is obtained. Semiconductor layers 104 to 108 can be formed.

Next, after removing the oxide film with an etchant containing hydrofluoric acid and cleaning the surface of the silicon film at the same time, an insulating film containing silicon as a main component to be the gate insulating film 109 is formed. In this embodiment, a silicon oxynitride film (composition ratio: Si = 32%, O = 59%, N = 7%, H = 2%) is formed with a thickness of 115 nm by a plasma CVD method.

Next, as shown in FIG. 4A, a first conductive film 110a with a thickness of 20 to 100 nm and a second conductive film 110b with a thickness of 100 to 400 nm are formed over the gate insulating film 109. In this embodiment, a 50 nm-thick tantalum nitride film and a 370 nm-thick tungsten film are sequentially stacked on the gate insulating film 109.

As a conductive material forming the first conductive film and the second conductive film, an element selected from Ta, W, Ti, Mo, Al, and Cu, or an alloy material or a compound material containing the above element as a main component is used. Form. Further, as the first conductive film and the second conductive film, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus, or an AgPdCu alloy may be used. The structure is not limited to a two-layer structure. For example, a three-layer structure in which a 50-nm-thick tungsten film, a 500-nm-thick aluminum-silicon alloy (Al-Si) film, and a 30-nm-thick titanium nitride film are sequentially stacked. Is also good. In the case of a three-layer structure, tungsten nitride may be used instead of tungsten of the first conductive film, or aluminum may be used instead of an aluminum-silicon alloy (Al-Si) film of the second conductive film. A titanium alloy film (Al-Ti) may be used, or a titanium film may be used instead of the titanium nitride film of the third conductive film. Further, it may have a single-layer structure.

Next, as shown in FIG. 4B, masks 112 to 117 made of resist are formed by a light exposure process, and a first etching process for forming a gate electrode and a wiring is performed. The first etching process is performed under the first and second etching conditions. It is preferable to use an ICP (Inductively Coupled Plasma) etching method for the etching. The film is formed into a desired tapered shape by appropriately adjusting the etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side, the temperature of the electrode on the substrate side, etc.) using the ICP etching method. Can be etched. As the etching gas, a chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl ₄ , CCl ₄ , a fluorine-based gas typified by CF ₄ , SF ₆ , NF ₃ , or the like, or O ₂ is appropriately used. Can be used.

In this embodiment, RF (13.56 MHz) power of 150 W is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. The electrode area size on the substrate side is 12.5 cm × 12.5 cm, and the coil-type electrode area size (here, a quartz disk provided with a coil) is a disk having a diameter of 25 cm. The W film is etched under the first etching conditions to make the end of the first conductive layer tapered. Under the first etching conditions, the etching rate for W is 200.39 nm / min, the etching rate for TaN is 80.32 nm / min, and the selectivity ratio of W to TaN is about 2.5. Further, the taper angle of W becomes about 26 ° under the first etching condition. After that, the masks 112 to 117 made of resist are not removed and the second etching condition is changed, and CF ₄ and Cl ₂ are used as etching gases, and the respective gas flow ratios are 30/30 (sccm). 500 W RF (13.56 MHz) power was applied to the coil-type electrode at a pressure of 1 Pa to generate plasma, and etching was performed for about 30 seconds. 20 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. Under the second etching condition in which CF ₄ and Cl ₂ are mixed, the W film and the TaN film are etched to the same extent. The etching rate for W under the second etching condition is 58.97 nm / min, and the etching rate for TaN is 66.43 nm / min. Note that in order to perform etching without leaving a residue on the gate insulating film, the etching time may be increased by about 10 to 20%.

In the first etching process, the shape of the resist mask is made appropriate, so that the edges of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. It becomes. The angle of the tapered portion may be 15 to 45 degrees.

Thus, the first shape conductive layers 119 to 123 (the first conductive layers 119 a to 123 a and the second conductive layers 119 b to 123 b) composed of the first conductive layer and the second conductive layer by the first etching process. To form The insulating film 109 serving as a gate insulating film is etched by about 10 to 20 nm, and becomes a gate insulating film 118 in which a region which is not covered with the first shape conductive layers 119 to 123 is thinned.

Next, a second etching process is performed without removing the resist mask. Here, SF ₆ , Cl _2, and O ₂ are used as etching gases, the respective gas flow rates are set to 24/12/24 (sccm), and 700 W of RF ( (13.56 MHz) Power was supplied to generate plasma, and etching was performed for 25 seconds. A 10 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. In the second etching process, the etching rate with respect to W is 227.3 nm / min, the etching rate with respect to TaN is 32.1 nm / min, the selectivity ratio of W with respect to TaN is 7.1, and SiON as the insulating film 118 is SiON. Is 33.7 nm / min, and the selectivity ratio of W to SiON is 6.83. As described above, when SF ₆ is used as the etching gas, the selectivity with respect to the insulating film 118 is high, so that the film loss can be suppressed. In this embodiment, the thickness of the insulating film 118 is reduced by only about 8 nm.

に よ り The taper angle of W became 70 ° by the second etching process. The second conductive layers 126b to 131b are formed by this second etching process. On the other hand, the first conductive layer is hardly etched and becomes first conductive layers 126a to 131a. Note that the first conductive layers 126a to 131a have substantially the same size as the first conductive layers 119a to 124a. Actually, the width of the first conductive layer may be set back by about 0.3 μm as compared with before the second etching treatment, that is, about 0.6 μm in the entire line width, but there is almost no change in size.

Further, instead of the two-layer structure, a three-layer structure in which a 50-nm-thick tungsten film, a 500-nm-thick aluminum-silicon alloy (Al-Si) film, and a 30-nm-thick titanium nitride film are sequentially stacked, As the first etching conditions in the first etching process, BCl ₃ , Cl _2, and O ₂ are used as source gases, the respective gas flow ratios are 65/10/5 (sccm), and the substrate side (sample stage) is used. ) Is supplied with 300 W RF (13.56 MHz) power, and 450 W RF (13.56 MHz) power is supplied to the coil-type electrode at a pressure of 1.2 Pa to generate plasma and perform etching for 117 seconds. Ebayoku, as the second etching conditions of the first etching treatment, CF ₄ and using a Cl ₂ and O _2, a ratio of respective gas flow rates is 25/25/10 (scc ), 20 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and 500 W RF (13.56 MHz) power is applied to the coil-type electrode at a pressure of 1 Pa to generate plasma. The etching may be performed for about 30 seconds. BCl ₃ and Cl ₂ are used as the second etching process, the respective gas flow rates are set to 20/60 (sccm), and 100 W is applied to the substrate side (sample stage). RF (13.56 MHz) power is supplied, and 600 W RF (13.56 MHz) power is supplied to the coil-type electrode at a pressure of 1.2 Pa to generate plasma and perform etching.

Next, after removing the resist mask, a first doping process is performed to obtain the state in FIG. The doping treatment may be performed by an ion doping method or an ion implantation method. The conditions of the ion doping method are a dose of 1.5 × 10 ¹⁴ atoms / cm ² and an acceleration voltage of 60 to 100 keV. Typically, phosphorus (P) or arsenic (As) is used as an impurity element imparting n-type. In this case, the first conductive layer and the second conductive layers 126 to 130 serve as masks for the impurity element imparting n-type, and the first impurity regions 132 to 136 are formed in a self-aligned manner. The first impurity regions 132 to 136 are doped with an impurity element imparting n-type in a concentration range of 1 × 10 ¹⁶ to 1 × 10 ¹⁷ / cm ³ . Here, a region having the same concentration range as the first impurity region is also referred to as an n ⁻ region.

In the present embodiment, the first doping process is performed after removing the resist mask, but the first doping process may be performed without removing the resist mask.

Next, as shown in FIG. 5A, masks 137 to 139 made of resist are formed, and a second doping process is performed. The mask 137 is a mask that protects a channel formation region of a semiconductor layer forming a p-channel TFT of the driver circuit and a peripheral region thereof, and a mask 138 is a mask of a semiconductor layer forming one of the n-channel TFTs of the driver circuit. The mask 139 is a mask that protects the channel formation region and its peripheral region, and the mask 139 is a mask that protects the channel formation region and its peripheral region of the semiconductor layer forming the TFT of the pixel portion and its peripheral region, and the region serving as the storage capacitor.

The condition of the ion doping method in the second doping process is to dope phosphorus (P) with a dose amount of 1.5 × 10 ¹⁵ atoms / cm ² and an acceleration voltage of 60 to 100 keV. Here, an impurity region is formed in each semiconductor layer in a self-aligned manner using the second conductive layers 126b to 128b as a mask. Of course, it is not added to the area covered with the masks 137 to 139. Thus, second impurity regions 140 to 142 and third impurity region 144 are formed. The second impurity regions 140 to 142 are doped with an impurity element imparting n-type in a concentration range of 1 × 10 ²⁰ to 1 × 10 ²¹ / cm ³ . Here, a region in the same concentration range as the second impurity region is also called an n ⁺ region.

The third impurity region is formed at a lower concentration than the second impurity region by the first conductive layer, and is an impurity element which imparts n-type in a concentration range of 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ^3. Will be added. Note that the third impurity region has a concentration gradient in which the impurity concentration increases toward the end of the tapered portion because doping is performed by passing through the portion of the first conductive layer having a tapered shape. . Here, a region having the same concentration range as the third impurity region is also called an n ⁻ region. Further, the regions covered with the masks 138 and 139 are not added with an impurity element by the second doping process, and become the first impurity regions 146 and 147.

Next, after the masks 137 to 139 made of resist are removed, masks 148 to 150 made of resist are newly formed, and a third doping process is performed as shown in FIG.

In the driving circuit, by the third doping treatment, the fourth impurity region 151 in which the impurity element imparting the p-type conductivity is added to the semiconductor layer forming the p-channel TFT and the semiconductor layer forming the storage capacitor , 152 and fifth impurity regions 153 and 154 are formed.

Further, an impurity element imparting p-type is added to the fourth impurity regions 151 and 152 in a concentration range of 1 × 10 ²⁰ to 1 × 10 ²¹ / cm ³ . Although the fourth impurity regions 151 and 152 are regions (n ⁻ regions) to which phosphorus (P) is added in the previous step, the concentration of the impurity element imparting p-type is 1.5 to 1.5. It is added three times and the conductivity type is p-type. Here, a region having the same concentration range as the fourth impurity region is also referred to as ap ⁺ region.

Further, the fifth impurity regions 153 and 154 are formed in a region overlapping with the tapered portion of the second conductive layer 127a, and the p-type is formed in a concentration range of 1 × 10 ¹⁸ to 1 × 10 ²⁰ / cm ^3. An impurity element to be provided is added. Here, a region having the same concentration range as the fifth impurity region is also referred to as ap ⁻ region.

Through the steps up to the above, an impurity region having n-type or p-type conductivity is formed in each semiconductor layer. The conductive layers 126 to 129 serve as TFT gate electrodes. Further, the conductive layer 130 serves as one electrode forming a storage capacitor in the pixel portion. Further, the conductive layer 131 forms a source wiring in the pixel portion.

Next, an insulating film (not shown) covering almost the entire surface is formed. In this embodiment, a 50 nm-thick silicon oxide film is formed by a plasma CVD method. Of course, this insulating film is not limited to a silicon oxide film, and another insulating film containing silicon may be used as a single layer or a laminated structure.

Next, a step of activating the impurity element added to each semiconductor layer is performed. This activation step is performed by a rapid thermal annealing method (RTA method) using a lamp light source, a method of irradiating a YAG laser or an excimer laser from the back surface, a heat treatment using a furnace, or a combination of any of these methods. Done by the method

Further, in this embodiment, the example in which the insulating film is formed before the activation is described. However, a step of forming the insulating film after the activation may be performed.

Next, a first interlayer insulating film 155 made of a silicon nitride film is formed and heat-treated (heat treatment at 300 to 550 ° C. for 1 to 12 hours) to hydrogenate the semiconductor layer. (FIG. 5C) In this step, dangling bonds in the semiconductor layer are terminated by hydrogen contained in the first interlayer insulating film 155. The semiconductor layer can be hydrogenated regardless of the presence of an insulating film (not shown) made of a silicon oxide film. However, in this embodiment, since a material containing aluminum as a main component is used for the second conductive layer, it is important to set heat treatment conditions under which the second conductive layer can withstand in the hydrogenation step. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.

Next, a second interlayer insulating film 156 made of an organic insulating material is formed on the first interlayer insulating film 155. In this embodiment, an acrylic resin film having a thickness of 1.6 μm is formed. Next, a contact hole reaching the source wiring 131, a contact hole reaching the conductive layers 129 and 130, and a contact hole reaching each impurity region are formed. In this embodiment, a plurality of etching processes are sequentially performed. In this embodiment, after the second interlayer insulating film is etched using the first interlayer insulating film as an etching stopper, the first interlayer insulating film is etched using the insulating film (not shown) as an etching stopper, and then the insulating film (illustrated). No) was etched.

After that, a wiring and a pixel electrode are formed using Al, Ti, Mo, W, or the like. It is desirable to use a material having excellent reflectivity, such as a film containing Al or Ag as a main component, or a laminated film thereof, for these electrodes and pixel electrodes. Thus, the source or drain electrodes 157 to 162, the gate wiring 164, the connection wiring 163, and the pixel electrode 165 are formed.

As described above, the driving circuit 206 including the n-channel TFT 201, the p-channel TFT 202, and the n-channel TFT 203, and the pixel portion 207 including the pixel TFT 204 including the n-channel TFT and the storage capacitor 205 are formed on the same substrate. Can be formed. (FIG. 6) In this specification, such a substrate is referred to as an active matrix substrate for convenience.

In the pixel portion 207, a channel forming region 169, a first impurity region (n ⁻ region) 147 formed outside a conductive layer 129 forming a gate electrode, and a source region are formed in the pixel TFT 204 (n-channel TFT). Alternatively, the semiconductor device includes second impurity regions (n ⁺ regions) 142 and 171 functioning as drain regions. Further, a fourth impurity region 152 and a fifth impurity region 154 are formed in a semiconductor layer functioning as one electrode of the storage capacitor 205. The storage capacitor 205 includes the second electrode 130 and the semiconductor layers 152, 154, and 170 using the insulating film (the same film as the gate insulating film) 118 as a dielectric.

In the driver circuit 206, the n-channel TFT 201 (first n-channel TFT) is a third impurity region (partially overlapped with the channel formation region 166 and a part of the conductive layer 126 forming a gate electrode with an insulating film interposed therebetween). an n ⁻ region 144 and a second impurity region (n ⁺ region) 140 functioning as a source or drain region.

In the driver circuit 206, the p-channel TFT 202 includes a channel formation region 167, a fifth impurity region (p ⁻ region) 153 overlapping with part of the conductive layer 127 forming a gate electrode with an insulating film interposed therebetween, and a source region or There is a fourth impurity region (p ⁺ region) 151 functioning as a drain region.

In the driver circuit 206, the n-channel TFT 203 (second n-channel TFT) has a channel formation region 168 and a first impurity region (n ⁻ region) 146 outside the conductive layer 128 where a gate electrode is formed. And a second impurity region (n ⁺ region) 141 functioning as a source region or a drain region.

(4) A shift register circuit, a buffer circuit, a level shifter circuit, a latch circuit, and the like may be formed by appropriately combining the TFTs 201 to 203, and the driving circuit 206 may be formed. For example, in the case of forming a CMOS circuit, the n-channel TFT 201 and the p-channel TFT 202 may be complementarily connected to each other.

In particular, the structure of the n-channel TFT 203 is suitable for a buffer circuit with a high drive voltage, for the purpose of preventing deterioration due to the hot carrier effect.

{Circle around (1)} In a circuit in which reliability is the highest priority, the structure of the n-channel TFT 201 which is a GOLD structure is suitable.

In addition, since the reliability can be improved by improving the planarization of the surface of the semiconductor film, even in the GOLD-structured TFT, even if the area of the impurity region overlapping with the gate electrode with the gate insulating film interposed therebetween is reduced, it is sufficient. Reliability can be obtained. Specifically, sufficient reliability can be obtained even when the size of the tapered portion of the gate electrode in the GOLD structure TFT is reduced.

In a GOLD structure TFT, the parasitic capacitance increases as the gate insulating film becomes thinner. However, if the parasitic capacitance is reduced by reducing the size of the tapered portion of the gate electrode (first conductive layer), the f characteristic ( The frequency characteristics are also improved, so that a higher-speed operation is possible, and a TFT having sufficient reliability is obtained.

In the pixel TFT of the pixel portion 207, off-current and variation can be reduced by irradiation with the second laser light.

In this embodiment, an example in which an active matrix substrate for forming a reflective display device is manufactured is described. However, when a pixel electrode is formed using a transparent conductive film, although a photomask is increased by one, a transmissive display is performed. A device can be formed.

Although a glass substrate was used in this embodiment, the present invention is not particularly limited, and a quartz substrate, a semiconductor substrate, a ceramic substrate, and a metal substrate can be used.

After the state in FIG. 6 is obtained, the substrate 100 may be peeled off if the layer including the TFT (layer to be peeled) provided over the oxide layer 102 has sufficient mechanical strength. In this embodiment, since the mechanical strength of the layer to be peeled is insufficient, it is preferable that the layer to be peeled is attached after attaching a support (not shown) for fixing the layer to be peeled.

In the first embodiment, an example of a reflective display device in which a pixel electrode is formed of a reflective metal material is described. In the present embodiment, a transmissive display in which a pixel electrode is formed of a light-transmitting conductive film is used. An example of the device is shown.

The steps up to the step of forming an interlayer insulating film are the same as those in the first embodiment, and thus are omitted here. After forming an interlayer insulating film according to the first embodiment, a pixel electrode 601 made of a light-transmitting conductive film is formed. As the light-transmitting conductive film, ITO (indium tin oxide alloy), indium zinc oxide alloy (In ₂ O ₃ —ZnO), zinc oxide (ZnO), or the like may be used.

After that, a contact hole is formed in the interlayer insulating film 600. Next, a connection electrode 602 overlapping with the pixel electrode is formed. This connection electrode 602 is connected to the drain region through a contact hole. In addition, a source electrode or a drain electrode of another TFT is formed simultaneously with the connection electrode.

Although the example in which all the driving circuits are formed on the substrate is shown here, several ICs may be used as a part of the driving circuit.

ア ク テ ィ ブ The active matrix substrate is formed as described above. Using this active matrix substrate, after the substrate is peeled off, a plastic substrate is attached to form a liquid crystal module, a backlight 604 and a light guide plate 605 are provided, and a cover 606 is provided. An active matrix type liquid crystal display device as shown in FIG. Note that the cover and the liquid crystal module are bonded together using an adhesive or an organic resin. Further, when the plastic substrate and the counter substrate are bonded to each other, an organic resin may be filled between the frame and the substrate so as to be adhered by being surrounded by a frame. Further, since it is a transmission type, the polarizing plate 603 is attached to both the plastic substrate and the counter substrate.

In this embodiment, an example of manufacturing a light-emitting device including a light-emitting element in which an organic compound layer formed over a plastic substrate is used as a light-emitting layer is illustrated in FIGS.

Note that FIG. 8A is a top view illustrating the light-emitting device, and FIG. 8B is a cross-sectional view of FIG. 8A taken along a line A-A ′. Reference numeral 1101 indicated by a dotted line denotes a source signal line driver circuit, 1102 denotes a pixel portion, and 1103 denotes a gate signal line driver circuit. Reference numeral 1104 denotes a sealing substrate, and 1105 denotes a sealant. The inside surrounded by the first sealant 1105 is filled with a transparent second sealant 1107.

Reference numeral 1108 denotes a wiring for transmitting a signal input to the source signal line driver circuit 1101 and the gate signal line driver circuit 1103, and receives a video signal or a clock signal from an FPC (flexible printed circuit) 1109 serving as an external input terminal. receive. Although only the FPC is shown here, a printed wiring board (PWB) may be attached to the FPC. The light-emitting device in this specification includes not only the light-emitting device main body but also a state in which an FPC or a PWB is attached thereto.

Next, the cross-sectional structure will be described with reference to FIG. A driver circuit and a pixel portion are formed over a substrate 1110; here, a source signal line driver circuit 1101 and a pixel portion 1102 are illustrated as the driver circuits. Note that the substrate 1110 is attached to the base film with the adhesive layer 1100 by using the separation method described in Embodiment Mode 1 or Example 1.

Note that as the source signal line driver circuit 1101, a CMOS circuit in which an n-channel TFT 1123 and a p-channel TFT 1124 are combined is formed. Further, the TFT forming the driving circuit may be formed by a known CMOS circuit, PMOS circuit, or NMOS circuit. Further, in this embodiment, a driver integrated type in which a drive circuit is formed on a substrate is shown; however, this is not always necessary, and the driver circuit can be formed outside instead of on the substrate.

The pixel portion 1102 is formed by a plurality of pixels including a switching TFT 1111, a current control TFT 1112, and a first electrode (anode) 1113 electrically connected to a drain thereof. Note that an example in which two TFTs are used for one pixel is described here, but three or more TFTs may be used as appropriate.

Here, since the first electrode 1113 is configured to be in direct contact with the drain of the TFT, the lower layer of the first electrode 1113 is a material layer capable of forming an ohmic contact with the drain made of silicon, and a layer containing an organic compound. It is desirable to form a material layer having a large work function on the surface in contact. For example, when a three-layer structure of a titanium nitride film, a film containing aluminum as a main component, and a titanium nitride film is used, the resistance as a wiring is low, a good ohmic contact can be obtained, and the wiring can function as an anode. . Further, the first electrode 1113 may be a single layer of a titanium nitride film or a stacked layer of three or more layers.

In addition, an insulator (referred to as a bank, a partition, a barrier, a bank, etc.) 1114 is formed at both ends of the first electrode (anode) 1113. The insulator 1114 may be formed using an organic resin film or an insulating film containing silicon. Here, as the insulator 1114, an insulator having a shape illustrated in FIG. 8 is formed using a positive photosensitive acrylic resin film.

In order to improve coverage, it is preferable that a curved surface having a curvature be formed at an upper end or a lower end of the insulator 1114. For example, in the case where positive photosensitive acrylic is used as the material of the insulator 1114, it is preferable that only the upper end portion of the insulator 1114 have a curved surface having a radius of curvature (0.2 μm to 3 μm). As the insulator 1114, any of a negative type which becomes insoluble in an etchant by photosensitive light and a positive type which becomes soluble in an etchant by light can be used.

絶 縁 The insulator 1114 may be covered with a protective film formed of an aluminum nitride film, an aluminum nitride oxide film, or a silicon nitride film. This protective film is an insulating film mainly containing silicon nitride or silicon nitride oxide obtained by a sputtering method (DC method or RF method), or a thin film mainly containing carbon. When a silicon target is formed in an atmosphere containing nitrogen and argon, a silicon nitride film can be obtained. Further, a silicon nitride target may be used. Further, the protective film may be formed using a film forming apparatus using remote plasma. In addition, in order to allow light to pass through the protective film, the thickness of the protective film is preferably as small as possible.

{Circle over (1)} On the first electrode (anode) 1113, a layer 1115 containing an organic compound is selectively formed by an evaporation method using an evaporation mask or an inkjet method. Further, a second electrode (cathode) 1116 is formed over the layer 1115 containing an organic compound. Thus, a light-emitting element 1118 including the first electrode (anode) 1113, the layer 1115 containing an organic compound, and the second electrode (cathode) 1116 is formed. Here, since the light-emitting element 1118 is an example of emitting white light, a color filter including a coloring layer 1131 and a BM 1132 (an overcoat layer is not illustrated here for simplicity) is provided.

{Circle around (2)} By selectively forming layers containing organic compounds capable of emitting R, G, and B light, full-color display can be obtained without using a color filter.

{Circle over (1)} In order to seal the light emitting element 1118, a sealing substrate 1104 is attached to the first sealing material 1105 and the second sealing material 1107. Note that an epoxy resin is preferably used for the first sealant 1105 and the second sealant 1107. Further, it is desirable that the first sealing material 1105 and the second sealing material 1107 are materials that do not transmit moisture and oxygen as much as possible.

In this embodiment, a plastic substrate made of FRP (Fiberglass-Reinforced Plastics), PVF (polyvinyl fluoride), mylar, polyester, acrylic, or the like is used as a material of the sealing substrate 1104 in addition to a glass substrate or a quartz substrate. be able to. Further, after the sealing substrate 1104 is bonded using the first sealing material 1105 and the second sealing material 1107, the sealing substrate 1104 can be further sealed with a third sealing material so as to cover a side surface (exposed surface).

By enclosing the light-emitting element in the first sealant 1105 and the second sealant 1107 as described above, the light-emitting element can be completely shut off from the outside, and the deterioration of the organic compound layer such as moisture and oxygen can be prevented from the outside. It is possible to prevent entry of a stimulating substance. Therefore, a highly reliable light-emitting device can be obtained.

(4) When a transparent conductive film is used for the first electrode 1113, a double-sided light-emitting device can be manufactured.

In this embodiment, a structure in which a layer containing an organic compound is formed on an anode and a cathode which is a transparent electrode is formed on the layer containing the organic compound (hereinafter, referred to as a top emission structure) is described. Has a light-emitting element in which an organic compound layer is formed on an anode made of a transparent conductive film, and a cathode is formed on the organic compound layer, and light generated in the organic compound layer is transmitted from the anode, which is a transparent electrode, to the TFT toward the (Hereinafter, referred to as a bottom emission structure).

This embodiment can be freely combined with the above-described best mode or Embodiment 1.

Various modules (active matrix type liquid crystal module, active matrix type EL module, active matrix type EC module) can be completed by implementing the present invention. That is, by implementing the present invention, all electronic devices incorporating them are completed.

Such electronic devices include video cameras, digital cameras, head-mounted displays (goggle-type displays), car navigation systems, projectors, car stereos, personal computers, personal digital assistants (mobile computers, mobile phones, e-books, etc.). No. Examples of these are shown in FIGS.

FIG. 9A illustrates a personal computer, which includes a main body 2001, an image input unit 2002, a display unit 2003, a keyboard 2004, and the like.

FIG. 9B illustrates a video camera, which includes a main body 2101, a display portion 2102, an audio input portion 2103, operation switches 2104, a battery 2105, an image receiving portion 2106, and the like.

FIG. 9C illustrates a mobile computer (mobile computer), which includes a main body 2201, a camera unit 2202, an image receiving unit 2203, operation switches 2204, a display unit 2205, and the like.

FIG. 9D illustrates a player using a recording medium on which a program is recorded (hereinafter, referred to as a recording medium), and includes a main body 2401, a display portion 2402, a speaker portion 2403, a recording medium 2404, operation switches 2405, and the like. The player can use a DVD (Digital Versatile Disc), a CD, or the like as a recording medium, and can enjoy music, movies, games, and the Internet.

FIG. 9E illustrates a digital camera, which includes a main body 2501, a display portion 2502, an eyepiece portion 2503, operation switches 2504, an image receiving portion (not shown), and the like.

FIG. 10A illustrates a mobile phone, which includes a main body 2901, an audio output unit 2902, an audio input unit 2903, a display unit 2904, operation switches 2905, an antenna 2906, an image input unit (CCD, image sensor, and the like) 2907, and the like.

FIG. 10B illustrates a portable book (e-book) including a main body 3001, display portions 3002 and 3003, a storage medium 3004, operation switches 3005, an antenna 3006, and the like.

FIG. 10C illustrates a display, which includes a main body 3101, a support base 3102, a display portion 3103, and the like.

Incidentally, the display shown in FIG. 10C is of a small, medium or large size, for example, a screen size of 5 to 20 inches. In addition, in order to form a display portion having such a size, it is preferable to use a substrate having a side of 1 m and mass-produce it by performing multi-paneling.

As described above, the applicable range of the present invention is extremely wide, and the present invention can be applied to electronic device manufacturing methods in all fields. Further, the electronic apparatus of this embodiment can be realized by freely combining with any one of the above-described best mode and Embodiments 1 to 3.

According to the present invention, not only a layer to be peeled having a small area can be peeled, but also a layer to be peeled having a large area can be peeled over the entire surface with high yield. Therefore, when applied to a display device, a large screen and thin display can be provided.

FIG. 2 illustrates an embodiment. 4 is a graph showing a relationship between a heat treatment temperature and a stress in a single layer of an amorphous silicon film. 4 is a graph showing a change in stress in lamination. It is a figure showing the manufacturing process of an active matrix substrate. (Example 1) It is a figure showing the manufacturing process of an active matrix substrate. (Example 1) It is a figure showing the manufacturing process of an active matrix substrate. (Example 1) It is a figure showing the sectional view of a liquid crystal display. (Example 2) FIG. 13 is a diagram illustrating a top view or a cross-sectional view of a light-emitting device. (Example 3) FIG. 13 illustrates an example of an electronic device. (Example 4) FIG. 13 illustrates an example of an electronic device. (Example 4) The graph which shows the result by TDS.

Explanation of reference numerals

10: First substrate 11: Nitride layer or metal layer 12: Oxide layer 13: Layer to be peeled 14: First adhesive or double-sided tape 15: Second substrate (support)
16: Second adhesive 17: Third substrate (transfer)

Claims (10)

A peeling method for peeling a layer to be peeled from a substrate,
A metal layer on the substrate, an oxide layer in contact with the metal layer, an insulating film, and a step of sequentially forming a semiconductor film containing hydrogen and having an amorphous structure on the insulating film,
Performing a heat treatment for diffusing hydrogen;
After bonding a support to a layer to be peeled including the oxide layer, the insulating film, and the semiconductor film, a layer to be peeled bonded to the support is physically separated from the substrate provided with the metal layer by physical means. And a peeling step. A peeling method for peeling a layer to be peeled from a substrate,
A metal layer on the substrate, an oxide layer in contact with the metal layer, an insulating film, and a step of sequentially forming a semiconductor film containing hydrogen and having an amorphous structure on the insulating film,
Performing a heat treatment for diffusing hydrogen;
Forming a TFT having the semiconductor film as an active layer and an element connected to the TFT;
After a support is bonded to a layer to be separated including the oxide layer, the insulating film, the TFT, and the element, the layer to be separated bonded to the support is physically separated from a substrate provided with the metal layer. Stripping by means. A peeling method for peeling a layer to be peeled from a substrate,
A step of sequentially forming a metal layer on the substrate, an oxide layer in contact with the metal layer, an insulating film, and a metal layer containing hydrogen on the insulating film;
Performing a heat treatment for diffusing hydrogen;
Forming a TFT and an element connected to the TFT;
After a support is bonded to a layer to be separated including the oxide layer, the insulating film, the TFT, and the element, the layer to be separated bonded to the support is physically separated from a substrate provided with the metal layer. Stripping by means. A peeling method for peeling a layer to be peeled from a substrate,
A step of sequentially forming a metal layer containing hydrogen on the substrate, an oxide layer in contact with the metal layer, an insulating film, and a semiconductor film having an amorphous structure over the insulating film;
Performing a heat treatment for diffusing hydrogen;
Forming a TFT having the semiconductor film as an active layer and an element connected to the TFT;
After a support is bonded to a layer to be peeled including the oxide layer, the insulating film, the TFT, and the element, the layer to be peeled bonded to the support is physically separated from a substrate provided with the metal layer. Stripping by means. The method according to any one of claims 1 to 4, wherein the heat treatment is performed at a temperature at which hydrogen in the film is released or diffused or higher. The metal layer according to any one of claims 1 to 5, wherein the metal layer is made of W, Ti, Ta, Mo, Cr, Nd, Fe, Ni, Co, Zr, Zn, Ru, Rh, Pd, Os, Ir, or Pt. A peeling method, which is a single layer of a selected element, an alloy material or a compound material containing the element as a main component, or a stacked layer of these metals or a mixture thereof. 7. The method according to claim 1, wherein the oxide layer is a silicon oxide film formed by a sputtering method. The method according to claim 1, wherein the insulating film is a silicon oxide film, a silicon oxynitride film, or a stack thereof. 9. The method according to claim 1, wherein the thickness of the oxide layer is larger than the thickness of the metal layer. The separation method according to any one of claims 2 to 9, wherein the element provided over the insulating film is a light-emitting element, a semiconductor element, or a liquid crystal element.

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