JP2004006454A - Land construction of substrate - Google Patents
Land construction of substrate Download PDFInfo
- Publication number
- JP2004006454A JP2004006454A JP2002158760A JP2002158760A JP2004006454A JP 2004006454 A JP2004006454 A JP 2004006454A JP 2002158760 A JP2002158760 A JP 2002158760A JP 2002158760 A JP2002158760 A JP 2002158760A JP 2004006454 A JP2004006454 A JP 2004006454A
- Authority
- JP
- Japan
- Prior art keywords
- land
- opening
- substrate
- lands
- wiring pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title abstract 4
- 238000010276 construction Methods 0.000 title abstract 2
- 239000000463 material Substances 0.000 claims abstract description 6
- 239000011241 protective layer Substances 0.000 abstract description 7
- 238000009413 insulation Methods 0.000 abstract 1
- 239000013039 cover film Substances 0.000 description 9
- 239000010410 layer Substances 0.000 description 8
- 229910000679 solder Inorganic materials 0.000 description 7
- 238000000034 method Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
Images
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【0001】
【発明の属する技術分野】
本発明は、回路基板に電子部品等を確実に搭載する為の回路基板のランド構造に関する。
【0002】
【従来の技術とその問題点】
回路基板において、電子部品等を実装する為のランドを形成するには、銅箔をエッチング、或いはアディティブ法にて銅等のランドを形成し、それにカバーフィルムを開口したものを貼り合せるか、レジスト等で表面保護層を形成するのが一般的である。
【0003】
電子部品を搭載する為には、両ランドの寸法、形状等のサイズが同一である事が望ましいが、電子部品やランドの微小化に伴い、カバーフィルム等の表面保護層の開口位置ズレの影響が深刻な問題となっている。
【0004】
また、カバーフィルムの貼り合せ精度が不十分な場合は、よりランド形成位置精度の高い他の工法、例えばフォトカバーやフォトレジストの使用等を採用する必要が出てきており、コストアップの要因となっている。
【0005】
ここで、カバーフィルムの開口位置ズレが発生したランドにクリームはんだを印刷、その後、電子部品を搭載してリフローした場合には、はんだボールの発生、はんだフィレット不足、フィレット過多或いはチップ立ち等の不具合が発生する率が高くなる。
【0006】
このような問題を解消する為には、ランドの外形寸法よりも大きな開口を形成したカバーフィルムを貼り合せて、カバーフィルムがずれてもランド寸法に影響を及ぼさないようにする事が出来るが、この方法では、ランドがカバーフィルムで押さえられる部位が少ない為、ランド剥がれが発生し易くなり、特には耐環境特性を低下させる事になり、好ましくない。
【0007】
【課題を解決するための手段】
その為に本発明に於いては、絶縁ベース材上には、回路配線パターンと部品搭載の為のランドが形成されると共に、上記回路配線パターン上には、所要の部位に上記ランドの為の開口を有する表面保護層を形成した回路基板において、上記開口は上記ランドの一部を露出するように形成されると共に、上記ランドは上記開口の内側に孔を有するように構成した回路基板のランド構造が提供される。
【0008】
【発明の実施の形態】
図1は、本発明の一実施例による回路基板のランド構造を示す図であって、2は部品搭載の為のランドであって、電子部品の正負両極の為のランド2は絶縁ベース材上に対向して形成されている。3はポリイミド等の絶縁フィルムを接着剤等で接着されて形成されるカバーフィルムからなる表面保護層であって、4はその表面保護層3に形成された開口である。この開口4はランド2の三辺が、表面保護層3で押さえられる様に形成されている。
【0009】
そして、上記ランド2には、各ランド2の外側に位置する三辺であって、表面保護層3の開口4の内側に、表面保護層3に掛からない様に、細長い孔1が形成されている。
【0010】
このようなランド構造によれば、表面保護層3の形成位置ズレが発生しても両ランド2は同形状、同寸法を確保できる。
【0011】
図2は、図1に示す回路基板のランド構造の横断面構成図であって、5は絶縁ベース材を示す。
【0012】
図3は、本発明の他の実施例であって、図1に示すランド形状に対して、図示の上下に位置する孔1を削除した例である。この図3のランド構造では、表面保護層3の左右にズレにのみ対応する場合にはこのランド形状を適宜採用する事が出来る。
【0013】
【発明の効果】
本発明による回路基板のランド構造によれば、表面保護層はランドの最外部を押さえるように張り合わされているから、表面保護層とランドの密着力、および絶縁ベース材に対するランドの押さえ効果を有し、その機械的特性、特にランド剥がれを好適に防止する事が出来る。
【0014】
また、本発明によるランドには孔が形成されているから、カバーフィルム等の表面保護層の張り合わせズレが発生しても、部品搭載部のランドは両ランド共に同形状、同寸法を確保する事が出来る。
【0015】
従って、電子部品搭載の為の半田量が、電子部品の左右端子で均等に形成する事が可能となり、一方のランドに対する過剰な半田供給も防止できると共に、左右のランドに対するリフロー時の熱伝導を均一化できるので、はんだボールの発生、はんだフィレット不足、フィレット過多或いはチップ立ち等の実装関連不良を低減できる。
【図面の簡単な説明】
【図1】本発明の一実施例による回路基板のランド構造の平面構成図。
【図2】図1の横断面構成図。
【図3】本発明の他の実施例による回路基板のランド構造の平面構成図。
【符号の説明】
1 孔
2 ランド
3 表面保護層
4 開口[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a land structure of a circuit board for securely mounting electronic components and the like on the circuit board.
[0002]
[Conventional technology and its problems]
On the circuit board, to form lands for mounting electronic components, etc., copper foil is etched, or copper or other lands are formed by an additive method, and a cover film is opened and bonded to the lands. It is common to form a surface protective layer by the above method.
[0003]
In order to mount electronic components, it is desirable that both lands have the same size such as dimensions and shapes. However, as electronic components and lands are miniaturized, the effect of the displacement of the opening position of the surface protection layer such as a cover film is reduced. Is a serious problem.
[0004]
In addition, when the bonding accuracy of the cover film is insufficient, it is necessary to adopt another method having a higher land forming position accuracy, for example, use of a photo cover or a photoresist, which may cause a cost increase. Has become.
[0005]
Here, cream solder is printed on the land where the opening position of the cover film is misaligned, and after that, when electronic components are mounted and reflowed, defects such as generation of solder balls, insufficient solder fillets, excessive fillets or chip standing Is more likely to occur.
[0006]
In order to solve such a problem, it is possible to attach a cover film having an opening larger than the outer dimensions of the land so that the displacement of the cover film does not affect the land size. In this method, since there are few portions where the land is pressed by the cover film, land peeling is apt to occur, and in particular, environmental resistance is lowered, which is not preferable.
[0007]
[Means for Solving the Problems]
Therefore, in the present invention, a circuit wiring pattern and a land for mounting components are formed on the insulating base material, and a predetermined portion of the land for the land is formed on the circuit wiring pattern. In a circuit board provided with a surface protective layer having an opening, the opening is formed so as to expose a part of the land, and the land is provided with a hole inside the opening. A structure is provided.
[0008]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a view showing a land structure of a circuit board according to one embodiment of the present invention, wherein 2 is a land for mounting components, and a
[0009]
On the
[0010]
According to such a land structure, both
[0011]
FIG. 2 is a cross-sectional configuration view of the land structure of the circuit board shown in FIG. 1, and
[0012]
FIG. 3 shows another embodiment of the present invention, in which
[0013]
【The invention's effect】
According to the land structure of the circuit board according to the present invention, since the surface protective layer is adhered so as to press the outermost portion of the land, it has an effect of adhering the surface protective layer to the land and pressing the land against the insulating base material. However, it is possible to suitably prevent the mechanical properties, particularly the land peeling.
[0014]
In addition, since the lands according to the present invention have holes, even if the surface protective layer such as a cover film is misaligned, the lands on the component mounting portion must have the same shape and the same dimensions on both lands. Can be done.
[0015]
Therefore, the amount of solder for mounting the electronic component can be evenly formed at the left and right terminals of the electronic component, and it is possible to prevent excessive solder supply to one land and to prevent heat conduction during reflow to the left and right lands. Since uniformity can be achieved, mounting-related defects such as generation of solder balls, shortage of solder fillets, excessive fillets, and chip standing can be reduced.
[Brief description of the drawings]
FIG. 1 is a plan view of a land structure of a circuit board according to an embodiment of the present invention.
FIG. 2 is a cross-sectional configuration diagram of FIG.
FIG. 3 is a plan view of a land structure of a circuit board according to another embodiment of the present invention.
[Explanation of symbols]
1
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002158760A JP2004006454A (en) | 2002-05-31 | 2002-05-31 | Land construction of substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002158760A JP2004006454A (en) | 2002-05-31 | 2002-05-31 | Land construction of substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2004006454A true JP2004006454A (en) | 2004-01-08 |
Family
ID=30428834
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2002158760A Pending JP2004006454A (en) | 2002-05-31 | 2002-05-31 | Land construction of substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2004006454A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007019912A (en) * | 2005-07-08 | 2007-01-25 | Hosiden Corp | Mounting substrate and microphone mounted on the same |
JP2008227183A (en) * | 2007-03-13 | 2008-09-25 | Fujitsu Ltd | Printed circuit board unit and printed wiring board |
WO2015087692A1 (en) * | 2013-12-09 | 2015-06-18 | 株式会社 豊田自動織機 | Substrate onto which to mount electronic component |
CN104756614A (en) * | 2012-11-01 | 2015-07-01 | 株式会社丰田自动织机 | Substrate and method for producing substrate |
-
2002
- 2002-05-31 JP JP2002158760A patent/JP2004006454A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007019912A (en) * | 2005-07-08 | 2007-01-25 | Hosiden Corp | Mounting substrate and microphone mounted on the same |
US7687723B2 (en) | 2005-07-08 | 2010-03-30 | Hosiden Corporation | Mounting substrate and microphone mounted thereon |
JP2008227183A (en) * | 2007-03-13 | 2008-09-25 | Fujitsu Ltd | Printed circuit board unit and printed wiring board |
CN104756614A (en) * | 2012-11-01 | 2015-07-01 | 株式会社丰田自动织机 | Substrate and method for producing substrate |
EP2916630A4 (en) * | 2012-11-01 | 2016-07-13 | Toyota Jidoshokki Kk | Substrate and method for producing substrate |
US9655240B2 (en) | 2012-11-01 | 2017-05-16 | Kabushiki Kaisha Toyota Jidoshokki | Substrate |
WO2015087692A1 (en) * | 2013-12-09 | 2015-06-18 | 株式会社 豊田自動織機 | Substrate onto which to mount electronic component |
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