JP2003031654A - Electronic device manufacturing method - Google Patents

Abstract

(57) Abstract: A method for manufacturing an electronic device having a multilayer wiring structure is provided. A metal film (7) forming step on an insulating surface (402) of a substrate (1), and a first masking area (413) and a first exposed area using the metal film with a first mask (42). (4
12) a first masking step, a step of anodizing the first exposed area to form a dense non-porous oxide layer (43), and removing the first mask from the first masked area A first removing step and a second mask (45)
Selectively masking the metal film and the non-porous oxide layer so that the second exposed area (432) is in the non-porous oxide layer and is separated from the first masking area after removing the first mask. A second masking step of forming a second masking area (431), a step of anodizing the non-porous oxide layer and the metal film in the second exposed area to form a porous oxide layer, and a second masking area. And a second removing step of removing the second mask from the second step.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an electronic device, and more particularly to a method for manufacturing an electronic device having a multilayer wiring structure.

[0002]

2. Description of the Related Art In recent years, with the rapid development of miniaturization and high density of electronic devices, a multilayer wiring structure has been increasingly desired. The multi-layer wiring structure is generally formed by sequentially stacking a plurality of conductive pattern layers on a substrate, each conductive path having a plurality of insulating paths isolated from each other and a plurality of interconnections electrically connecting these conductive paths. It means a structure formed by. The formation of the plurality of conductive path interconnections in the plurality of conductive pattern layers on the substrate is conventionally performed by forming a metal film on the substrate by sputtering or vacuum deposition, and selectively forming the metal film. A method of photoetching is known. However, the surface of each conductive pattern layer formed by the above-mentioned conventional method has unevenness to some extent and is not flat, and each conductive path in each conductive pattern layer, the next conductive pattern layer following each conductive pattern layer and each Since it affects the formation of interconnections and the like, there is a drawback that the deterioration becomes worse as the number of layers increases, and the effect cannot be ignored.

In order to solve the drawbacks associated with the formation of the conductive pattern layers, in US Pat. No. 3,988,214, as shown in FIGS. 13A to 13E, a conductive metal film 401 is formed on the semiconductor substrate 101. Forming a metal film (see FIG. 13A), and the conductive metal film 401.
The porous metal oxide layer 404 is formed by selectively subjecting the conductive metal film 401 to a porous anodization treatment, and a plurality of portions of the conductive metal film 401 not subjected to the porous anodization treatment are used as the conductive channels 201. Non-porous metal oxide layer 5 surrounding the conductive channel 201 by performing a selective porous anodizing process (see FIG. 13B) and performing barrier anodizing process on each of the plurality of conductive channels 201.
The barrier anodic oxidation treatment step of forming No. 02 (see FIG. 13C) and the opening 503 formed in the non-porous metal oxide layer 502, so that the conductive channel 201 not subjected to the barrier anodic oxidation treatment. A method of manufacturing a semiconductor device having an opening forming step (see FIG. 13D) for exposing a part of the opening to enable connection to the outside. Further, instead of the barrier anodizing treatment step, a selective barrier anodizing treatment step of forming only the non-porous metal oxide layer 502 on a part of the upper surface of the conductive channel 201 (see (E) of FIG. 13). By adopting, only the rest of the upper surface of the conductive channel 201 is
A method of making it connectable to the outside is also known.

In the above conventional manufacturing method, the problem of the surface irregularities can be alleviated to some extent, but the volume of conversion from the conductive metal film 401 to the porous metal oxide layer 404 in the porous anodizing treatment is large. The expansion is greater than the volume expansion of the conversion from the conductive channel 201 to the non-porous metal oxide layer 502 in the barrier anodization process, and the conductive channel 201 is not all,
Since only a part is anodized, the surface composed of the porous metal oxide layer 404 and the non-porous metal oxide layer 502 is still uneven to some extent and does not become flat.
Therefore, the semiconductor device manufactured by the conventional manufacturing method must further include a planarization step of planarizing the surface of the wiring layer.

In US Pat. No. 5,580,825, as shown in FIGS. 14A to 14F,
A first metal film forming step of forming a first Al metal film 7 on the substrate 1 (see FIG. 14A), and a barrier anodic oxidation treatment is selectively applied to the first Al metal film 7. As a result, a selective barrier anodizing process is performed in which the surface barrier oxide layer 72 is formed and the first Al metal film 7 located under the surface barrier oxide layer 72 is used as the conductive path 2 of the first layer. (See (B) and (C) of FIG. 14; the surface barrier oxide layer 72 is formed according to US Pat. No. 3,988,214.
Second non-porous metal oxide layer 502) and a second metal film forming step of forming a second Al metal film 12 on the first Al metal film 7 (FIG. 1
4 (D)), the second Al metal film 12 and the first Al metal film 7 (not covered by the surface barrier oxide layer 72) directly below the second Al metal film 12. (Portion) and anodization treatment are selectively applied to form a porous metal oxide layer 15 and a plurality of metal oxide layers are formed on the substrate.
An electron of a multi-layer structure having a selective anodizing process (see (E) and (F) of FIG. 14) that defines the contact pads 3 and 5 and the contact via 6 isolated by the porous metal oxide layer 15. A method of manufacturing a wiring device is disclosed.

[0006]

The above conventional manufacturing method has the same drawbacks as the manufacturing method of the semiconductor device of the above-mentioned US Pat. No. 3,988,214, and also the conductive path 2 of the first layer. The plurality of contact pads 3 formed immediately above the conductive path 2 of the first layer for interconnecting with the conductive path 2 have dimensions equal to those of the conductive path 2 of the first layer. Since it must be as described above, it is impossible to provide an electronic wiring device having a high-density multilayer structure.

In view of the above, it is an object of the present invention to provide a method for manufacturing an electronic device having a multi-layer structure, which can solve the conventional problems.

[0008]

To achieve the above object, the present invention provides a step of preparing a substrate having a flat insulating surface, and forming a metal film on the uppermost surface of the flat insulating surface of the substrate. And a first masking area where the metal film is shielded by the first mask by selectively masking the metal film with a first mask, and the first mask. A first masking step to separate the first exposed area unshielded into the non-porous layer, and a non-porous layer which is anodized on the first exposed area of the metal film to form a dense non-porous oxide layer. Anodizing step, a first removing step of removing the first mask from the first masking area, and a second mask selectively masking the metal film and the non-porous oxide layer. By doing the second The second exposed area not covered by the mask is only in the non-porous oxide layer and is spaced from the original first masking area of the metal film which has already removed the first mask. A second masking step to form a second masking area shielded by a second mask, the dense non-porous oxide layer in the second exposed area and directly below the dense non-porous oxide layer; And a second step of removing the second mask from the second masking area by anodizing together with the metal film to form a porous oxide layer. A method for manufacturing an electronic device is provided.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION Preferred embodiments of the method for manufacturing an electronic device of the present invention will be described in detail below. Figure 1
9 is a flowchart showing steps in the case of forming a basic wiring structure on the substrate 40 by the method for manufacturing an electronic device of the present invention, FIGS. 2 to 8 are a series of cross-sectional explanatory views corresponding to the steps, and 9 to 12 are a series of cross-sectional explanatory views showing steps in the case of further stacking a wiring structure on the basic wiring structure. 2 in light of FIG.
With reference to FIGS. 8A to 8C, according to the present invention, first, the first wiring layer 60 is formed on the substrate 40. Regarding the process of forming the first wiring layer, first, the substrate 40 having the flat insulating surface 402 is prepared (see step 1 and FIG. 2 in FIG. 1). After preparing the substrate 40 having the flat insulating surface 402, a first metal film forming step of forming a first metal film 41 on the flat insulating surface 402 of the substrate 40 (step 2 in FIG. 1 and (See FIG. 3) and the first mask 42 (that is, the photoresist).
1 is selectively masked to form a first masking area 413 in which the upper surface of the first metal film 41 is shielded by the plurality of first masks 42 and the first masking area 413.
First masking step (see steps 3 and 4 in FIG. 1) separated by a first exposed area 412 that is isolated by the masking area 413 of FIG.
The first exposed area 4 on the upper surface of the first metal film 41.
12 is subjected to anodizing treatment to form a dense non-porous oxide layer 4
3 to form a non-porous anodizing step (step 4 in FIG.
And FIG. 5), and the plurality of first masking areas 4
By removing the first mask 42 from 13,
The first surface of the first metal film 41 that has not been subjected to the non-porous anodizing process is exposed to form a plurality of conductive surface contact portions 44 isolated by the non-porous oxide layer 43.
By removing the mask (see steps 5 and 5 of FIG. 1) and selectively masking the plurality of conductive surface contact portions 44 and the non-porous oxide layer 43 with the second mask 45. There is a second exposed area 432 that is not shielded by the second mask 45 only in the non-porous oxide layer 43, and the first mask 4 of the first metal film 41 has already been exposed.
A second masking area that shields at least one of the plurality of conductive surface contacts 44 with the second mask 45 so as to be spaced apart from the original first masking area 413 from which 2 was removed. A second masking step to form 431 (see step 6 and FIG. 6 of FIG. 1), and the dense non-porous oxide layer 43 of the second exposed area 432 and the dense non-porous oxide layer 43. The first metal film 41 immediately below
A first porous anodization step (see steps 7 and 7 in FIG. 1) of forming a first porous oxide layer 46 together with the second masking area 431 and the second masking area 431. The second mask 45 is removed to expose the upper surfaces of the conductive surface contact portion 44 and the dense non-porous oxide layer 43 that have not been subjected to the porous anodizing treatment, and the plurality of first Of the first metal film isolated from the porous oxide layer 46 and extending from the conductive surface contact portion 44 to the flat insulating surface 402 of the substrate 40 as second conductive paths 47, respectively. The mask removal process (see process 8 and FIG. 8 in FIG. 1) is performed. The first wiring layer 60 includes the first conductive path 47 and the first conductive path 47 on the flat insulating surface 402 of the substrate 40.
Of the porous oxide layer 46, the conductive surface contact portion 44, and the dense non-porous oxide layer 43.

Next, regarding the process of forming the second wiring layer 80 on the first wiring layer 60, as shown in FIGS. 9 to 12, the upper surface of the first wiring layer 60 (ie, , The uppermost surface of the substrate above the flat insulating surface)
A second metal film forming step of forming a second metal film 51 on the substrate (see FIG. 9), and selectively masking the second metal film 51 with a third mask 52 (ie photoresist). , A third masking area 512, which is shielded by the plurality of third masks 52 from the upper surface of the second metal film 51, and is isolated by the third masking area 512. Third not shielded by 52
A third masking step (see FIG. 10) for dividing the exposed area 511 of the second metal film 51 into an exposed area 511 and anodizing the third exposed area 511 on the upper surface of the second metal film 51 to obtain a second porosity. A second porous anodizing step to form an oxide layer 53 (see FIG. 11) and the third masking area 512.
By removing the third mask 52 from the second metal film 5 that has not been subjected to the porous anodization treatment.
The upper surface of the first conductive path 4 is exposed.
Second metal that is electrically interconnected via 7 and is isolated by the second porous oxide layer 53 and extends from the conductive surface contact portion 44 to the upper surface of the second metal film 51. A third mask removing step (see FIG. 12) using the films as the second conductive paths 54 is performed. In addition, the second wiring layer 80 is formed on the first wiring layer 60 by the second wiring layer 60.
Of the conductive path 54 and the second porous oxide layer 53.

In the embodiment of the present invention, the first
Although only the second wiring layer is formed on the wiring layer, the plurality of wiring layers such as the third wiring layer and the fourth wiring layer can be further formed if necessary. Also, a third wiring layer,
Regarding the process of forming each wiring layer such as the fourth wiring layer, the metal film forming step, the masking step, the non-porous anodizing treatment step, the mask removing step, and the porous anodizing step are performed as necessary. It can be selected from the processing steps and combined.

The substrate 40 having the flat insulating surface 402 is first anodized on one side thereof to
It is preferable to use an aluminum substrate obtained by polishing the surface of the Al oxide layer and then flattening the surface after forming the 1 oxide layer. Then, the first and second metal films (41, 5)
1) In the forming step, it is preferable to form a metal film containing at least one metal selected from the group consisting of Al, Ti, Ta, Nb and Hf, and particularly to form a metal film containing Al and Ta. Is more preferable. Further, the formation of the first and second metal films can be performed by a method of electron beam evaporation. If an Al film is used as the first and second metal films, the thickness is 1.0 to 2.
5 μm is preferable.

The first mask 42 has a pattern of a first photoresist layer corresponding to the pattern of the plurality of conductive surface contact portions 44. Further, the thickness of the first photoresist layer is preferably 1 to 8 μm. The second mask 45 has a pattern of a second photoresist layer corresponding to the pattern of the plurality of first conductive paths 47 of the first wiring layer 60. Further, the thickness of the second photoresist layer is preferably 1 to 8 μm. The third mask 52 has a pattern of a third photoresist layer corresponding to the pattern of the plurality of second conductive paths 54 of the second wiring layer 80. Further, the thickness of the third photoresist layer is preferably 1 to 8 μm.

In the non-porous anodizing process, a voltage of 150 to 2 is applied in a 0.5 to 1% citric acid solution.
It can be done with 00V. The first porous anodizing step can be performed in a 4% oxalate solution with a voltage of less than 70V.

As described above, according to the present invention, before the formation of the first porous oxide layer 46 of the first wiring layer 60, the dense non-porous oxide is first formed on the first metal film 41. Since the layer 43 is formed, the flatness of each wiring layer can be significantly improved as compared with the conventional case. Further, in order to further secure high flatness of the upper surface of the first wiring layer 60, the thickness of the dense non-porous oxide layer 43 is preferably 0.1 to 0.5 μm.

Further, since the plurality of conductive surface contact portions 44 of the first wiring layer 60 are formed before the plurality of first conductive paths 47 are formed, the size of each conductive surface contact portion 44 is different. It is smaller than the dimension of each of the first conductive paths 47.
Therefore, the electronic device manufacturing method of the present invention can provide a high-density multilayered electronic wiring device.

The embodiments described above are intended only to clarify the technical contents of the present invention, and the present invention is not construed in a narrow sense limited to such specific examples. The present invention can be implemented with various modifications within the spirit and scope of the present invention.

[Brief description of drawings]

FIG. 1 is a flowchart showing steps in forming a basic wiring structure on a substrate according to a preferred embodiment of a method for manufacturing an electronic device of the present invention.

FIG. 2 is a cross-sectional explanatory view corresponding to step 1 above.

FIG. 3 is a cross-sectional explanatory view corresponding to step 2.

FIG. 4 is a cross-sectional explanatory view corresponding to step 3.

FIG. 5 is a cross-sectional explanatory view corresponding to step 4 and step 5.

FIG. 6 is a cross-sectional explanatory view corresponding to step 6.

FIG. 7 is a cross-sectional explanatory view corresponding to step 7.

FIG. 8 is a cross-sectional explanatory view corresponding to step 8.

FIG. 9 is a series of cross-sectional explanatory views showing steps in the case of forming a semiconductor device by a conventional manufacturing method.

FIG. 10 is a series of cross-sectional explanatory views showing steps in the case of forming a semiconductor device by a conventional manufacturing method.

FIG. 11 is a series of cross-sectional explanatory views showing steps in the case of forming a semiconductor device by a conventional manufacturing method.

FIG. 12 is a series of cross-sectional explanatory views showing steps in the case of forming a semiconductor device by a conventional manufacturing method.

FIG. 13A to FIG. 13E are a series of cross-sectional explanatory views showing steps in the case of forming a semiconductor device by a conventional manufacturing method.

14A to 14F are a series of cross-sectional explanatory views showing steps in the case of forming an electronic wiring device having a multilayer structure by another conventional manufacturing method.

[Explanation of symbols]

40 ... Substrate, 41 ... Metal film, 42 ... First mask, 43
... Non-polynomial oxide layer, 44 ... Conductive surface contact portion, 45 ... Second
Mask, 46 ... Porous oxide layer, 47 ... Conductive path.

   ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 5F033 HH08 HH10 HH17 HH18 HH21                       JJ08 JJ10 JJ17 JJ18 JJ21                       KK08 KK10 KK17 KK18 KK21                       QQ68 QQ89 RR03 SS26 WW02                 5F058 BA20 BB05 BC03 BE10 BF70                       BJ10

Claims (6)

[Claims] 1. A substrate preparing step of preparing a substrate having a flat insulating surface; a metal film forming step of forming a metal film on an uppermost surface of the substrate above the flat insulating surface; By selectively masking the metal film, the metal film is divided into a first masking area shielded by the first mask and a first exposed area not shielded by the first mask. A first masking step; a non-porous anodizing step of performing anodizing on the first exposed area of the metal film to form a dense non-porous oxide layer; the first masking area A first removing step of removing the first mask from the above, and by selectively masking the metal film and the non-porous oxide layer with a second mask, the second mask is shielded by the second mask. No second exposed area There There is only the non-porous oxide layer, and so as to be separated already first masking area of the original removal of the first mask of the metal film,
A second masking step to form a second masking area that is shielded by the second mask; and the dense non-porous oxide layer and the dense non-porous oxide layer of the second exposed area. A porous anodizing treatment step of forming a porous oxide layer by anodizing together with the metal film immediately below, and a second removing step of removing the second mask from the second masking area. A method for manufacturing an electronic device, which comprises: 2. The metal film forming step comprises: Al, Ti, T
The method for manufacturing an electronic device according to claim 1, wherein a metal film containing at least one metal selected from the group consisting of a, Nb and Hf is formed. 3. The metal film forming step forms a metal film containing Al and Ta.
A method for manufacturing an electronic device according to. 4. The substrate preparing step includes a step of preparing an aluminum substrate and a step of forming an Al oxide layer as the flat insulating surface on the aluminum substrate. A method for manufacturing an electronic device according to. 5. The metal film forming step has a thickness of 1.0 to
An Al film having a thickness of 2.5 μm is formed, and the non-porous anodizing process has a thickness of 0.1 to 0.5.
The method for manufacturing an electronic device according to claim 1, wherein a dense non-porous oxide layer having a thickness of μm is formed. 6. A substrate preparing step of preparing a substrate having a flat insulating surface; a metal film forming step of forming a metal film on an uppermost surface of the substrate above the flat insulating surface; By selectively masking the metal film, the upper surface of the metal film is covered with the first masking areas and the first masking area and the first masking area.
First masking step of dividing the first exposed area not covered by the mask of No. 3 into a dense non-porous oxide layer by anodizing on the first exposed area of the upper surface of the metal film. A non-porous anodizing step of forming a non-porous anodizing step, and removing the first mask from the plurality of first masking areas to remove the non-porous anodizing upper surface of the metal film. A first mask removing step of exposing the conductive surface contact portions to form a plurality of conductive surface contact portions; and a step of selectively masking the conductive surface contact portions and the non-porous oxide layer with a second mask. A second exposed area that is not shielded by a second mask is only in the non-porous oxide layer and is spaced apart from the original first masking area of the metal film which has already removed the first mask. A plurality of the second A second masking step to form a second masking area that shields at least one of the plurality of conductive surface contacts with a mask; and the dense, non-porous oxide layer in the second exposed area, A porous anodizing step of anodizing together with the metal film directly below the dense non-porous oxide layer to form a porous oxide layer; and removing the second mask from the second masking area. By exposing the upper surface of each of the conductive surface contact portion and the dense non-porous oxide layer that have not been subjected to the porous anodizing treatment, are separated by a plurality of the porous oxide layer, and A second mask removing step in which the metal films extending from the conductive surface contact portion to the flat insulating surface of the substrate are used as conductive paths, respectively.