JP2002305196A - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor deviceInfo
- Publication number
- JP2002305196A JP2002305196A JP2001109663A JP2001109663A JP2002305196A JP 2002305196 A JP2002305196 A JP 2002305196A JP 2001109663 A JP2001109663 A JP 2001109663A JP 2001109663 A JP2001109663 A JP 2001109663A JP 2002305196 A JP2002305196 A JP 2002305196A
- Authority
- JP
- Japan
- Prior art keywords
- silicon
- oxynitride film
- film
- nitrogen concentration
- silicon substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Insulated Gate Type Field-Effect Transistor (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】 本発明は、半導体装置の製
造方法に関し、特にMIS型電界効果トランジスタ(M
ISFET)のゲート絶縁膜として用いられる酸窒化膜
の形成方法に関する。[0001] 1. Field of the Invention [0002] The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a MIS field effect transistor (M
The present invention relates to a method for forming an oxynitride film used as a gate insulating film of an ISFET.
【0002】[0002]
【従来の技術】 大規模集積回路(LSI:Large
Scale Integrated circuit
s)の微細化、高集積化が進むにつれ、ゲート絶縁膜と
して使用されているシリコン酸化膜の薄膜化が必要にな
っている。2. Description of the Related Art Large-scale integrated circuits (LSI: Large)
Scale Integrated circuit
With the advance of miniaturization and high integration of s), it is necessary to reduce the thickness of a silicon oxide film used as a gate insulating film.
【0003】しかし、前記シリコン酸化膜の薄膜化に伴
って、ゲートポリシリコン電極中に導入した不純物(例
えば、ボロン)に対するバリア性が失われてしまう。こ
の現象によって、しきい値電圧の変動及び界面準位の増
加を招き、デバイス特性ばらつきの増大という問題が生
じる。However, as the silicon oxide film becomes thinner, the barrier property against impurities (for example, boron) introduced into the gate polysilicon electrode is lost. This phenomenon causes a variation in threshold voltage and an increase in interface state, and causes a problem of an increase in variation in device characteristics.
【0004】また、上記ゲート絶縁膜の薄膜化に伴っ
て、膜厚に依存したゲート電流が増大してしまう。この
現象は理論的に膜厚の減少に対して指数関数的に増大す
ることが知られている。Further, as the gate insulating film becomes thinner, the gate current depending on the film thickness increases. It is known that this phenomenon theoretically increases exponentially with decreasing film thickness.
【0005】そこで、上記の問題点を解決するために、
前記ゲート絶縁膜としてシリコン酸化膜に代わってシリ
コン酸窒化膜の採用があげられる。窒素原子導入によっ
て、ゲート絶縁膜の分子構造が緻密になり、ゲート電極
中の不純物であるボロン原子のシリコン基板への拡散を
防止できる。Therefore, in order to solve the above problems,
As the gate insulating film, a silicon oxynitride film may be used instead of the silicon oxide film. The introduction of nitrogen atoms makes the molecular structure of the gate insulating film dense, and prevents diffusion of boron atoms, which are impurities in the gate electrode, into the silicon substrate.
【0006】また、窒素原子導入によって、ゲート絶縁
膜の平均誘電率が上昇するため、同一の電気的膜厚で前
記シリコン酸化膜と比べて物理膜厚が厚いゲート絶縁膜
の形成が可能となり、上記問題とされているゲート電流
が増大する現象も抑えられるという利点もある。Further, since the average dielectric constant of the gate insulating film is increased by the introduction of nitrogen atoms, it is possible to form a gate insulating film having the same electrical thickness and a larger physical thickness than the silicon oxide film. There is also an advantage that the above-mentioned phenomenon of an increase in gate current can be suppressed.
【0007】上記シリコン酸窒化膜形成には、半導体基
板上にシリコン酸化膜を形成し、その後NO、N2O又
はNH3ガス雰囲気中で熱処理を加える手法が用いられ
ている。For forming the silicon oxynitride film, a method of forming a silicon oxide film on a semiconductor substrate and then performing a heat treatment in a NO, N 2 O or NH 3 gas atmosphere is used.
【0008】[0008]
【発明が解決しようとする課題】 しかし、特に5nm
以下の薄膜のシリコン酸化膜に窒素を導入する場合、N
O又はN2Oガスを用いると、図7(a)に示すように
シリコン基板とシリコン酸窒化膜との界面付近に窒素が
導入される。その結果、固定電荷及び界面準位が増大
し、移動度の低下や1/fノイズの増加等の問題が発生
し、デバイス特性の劣化に繋がる。[Problems to be Solved by the Invention] However, especially 5 nm
When nitrogen is introduced into the following thin silicon oxide film, N
When O or N 2 O gas is used, nitrogen is introduced near the interface between the silicon substrate and the silicon oxynitride film as shown in FIG. As a result, fixed charges and interface states increase, causing problems such as a decrease in mobility and an increase in 1 / f noise, which leads to deterioration of device characteristics.
【0009】また、NH3ガスを用いると、シリコン酸
窒化膜が5nm以下の薄膜の下では図7(b)に示すよ
うに、酸窒化膜中の窒素濃度分布がほぼ均一になるた
め、上記NO又はN2Oガスと同様にシリコン基板と酸
窒化膜との界面付近の窒素濃度が高くなる。したがっ
て、この場合もデバイス特性が劣化してしまう。When NH 3 gas is used, when the silicon oxynitride film is thinner than 5 nm, the nitrogen concentration distribution in the oxynitride film becomes almost uniform as shown in FIG. Like the NO or N 2 O gas, the nitrogen concentration near the interface between the silicon substrate and the oxynitride film increases. Therefore, also in this case, the device characteristics deteriorate.
【0010】そこで、本発明はシリコン酸窒化膜とシリ
コン基板との界面付近の窒素濃度を低く抑え、シリコン
酸窒化膜表面の窒素濃度を高めるような半導体装置の製
造方法を提供する。Accordingly, the present invention provides a method of manufacturing a semiconductor device in which the nitrogen concentration near the interface between the silicon oxynitride film and the silicon substrate is kept low and the nitrogen concentration on the surface of the silicon oxynitride film is increased.
【0011】[0011]
【課題を解決するための手段】 上記課題は、シリコン
基板上に膜厚5nm以下のシリコン酸化膜を形成する工
程と、前記酸化膜を形成したシリコン基板を圧力50T
orr以下のNH3含有ガス雰囲気中1000℃以上の
温度で60秒以内の熱処理を施すことによって前記シリ
コン酸化膜中に窒素を導入してシリコン酸窒化膜を形成
する工程を有することを特徴とする半導体装置の製造方
法により解決する。The object of the present invention is to form a silicon oxide film having a thickness of 5 nm or less on a silicon substrate, and to apply a pressure of 50 T to the silicon substrate on which the oxide film is formed.
forming a silicon oxynitride film by introducing nitrogen into the silicon oxide film by performing a heat treatment at a temperature of not less than 1000 ° C. and at a temperature of not less than 1000 ° C. in an atmosphere of NH 3 or less of orr. The problem is solved by a method for manufacturing a semiconductor device.
【0012】本発明によれば、上記条件の下熱処理する
ことによって、シリコン基板とシリコン酸窒化膜との界
面付近における窒化反応が抑制され、シリコン酸窒化膜
表面近傍の窒素濃度を高くすることができる。According to the present invention, by performing the heat treatment under the above conditions, the nitriding reaction near the interface between the silicon substrate and the silicon oxynitride film is suppressed, and the nitrogen concentration near the surface of the silicon oxynitride film can be increased. it can.
【0013】[0013]
【発明の実施の形態】 [第1の実施例]本発明の第1
の実施例による半導体装置の製造工程を説明する。図1
は本発明の第1の実施例に係るMIS型半導体装置の製
造工程を示す図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment First Embodiment of the Present Invention
The manufacturing process of the semiconductor device according to the embodiment will be described. FIG.
FIG. 3 is a diagram showing a manufacturing process of the MIS semiconductor device according to the first embodiment of the present invention.
【0014】図1(a)を参照するに、シリコン基板1
に素子分離領域2を形成し、熱酸化法によって前記シリ
コン基板1上に2.5nmのシリコン酸化膜3を形成す
る。Referring to FIG. 1A, a silicon substrate 1
An element isolation region 2 is formed, and a 2.5 nm silicon oxide film 3 is formed on the silicon substrate 1 by a thermal oxidation method.
【0015】次に図1(b)に示すように、前記シリコ
ン酸化膜3を圧力10TorrのNH3ガス雰囲気中に
おいて、温度1050℃で60秒間の熱処理を施す。そ
の結果、前記シリコン酸化膜3に窒素が導入されシリコ
ン酸窒化膜4が形成される。Next, as shown in FIG. 1B, the silicon oxide film 3 is subjected to a heat treatment at a temperature of 1050 ° C. for 60 seconds in an NH 3 gas atmosphere at a pressure of 10 Torr. As a result, nitrogen is introduced into the silicon oxide film 3 to form a silicon oxynitride film 4.
【0016】ここで、前記工程によって形成されたシリ
コン酸窒化膜4の表面からシリコン基板界面までの窒素
濃度プロファイルを図2の実線で示す。また、図2の点
線は、前記工程のNH3ガスに代えてNOガス雰囲気中
で熱処理した場合の窒素濃度プロファイルを示してい
る。Here, the nitrogen concentration profile from the surface of the silicon oxynitride film 4 formed by the above process to the interface with the silicon substrate is shown by a solid line in FIG. The dotted line in FIG. 2 shows the nitrogen concentration profile when the heat treatment is performed in the NO gas atmosphere instead of the NH 3 gas in the above step.
【0017】点線はシリコン酸窒化膜表面(以下、「酸
窒化膜表面」という。)の窒素濃度が低く、シリコン基
板とシリコン酸窒化膜との界面(以下、「シリコン基板
界面」という。)付近の窒素濃度が高くなっている。一
方、実線は酸窒化膜表面の窒素濃度が高くなり、逆にシ
リコン基板界面付近の窒素濃度が低くなっていることが
確認できる。The dotted line indicates that the surface of the silicon oxynitride film (hereinafter referred to as “oxynitride film surface”) has a low nitrogen concentration and is near the interface between the silicon substrate and the silicon oxynitride film (hereinafter referred to as “silicon substrate interface”). Nitrogen concentration is high. On the other hand, the solid line indicates that the nitrogen concentration on the surface of the oxynitride film is high, and conversely, the nitrogen concentration near the silicon substrate interface is low.
【0018】したがって図2から明らかなように、NH
3ガス雰囲気中で処理したシリコン酸窒化膜の窒素濃度
は酸窒化膜表面付近が高く、シリコン基板界面付近が低
くなり、固定電荷及び界面準位を低く保つことができ、
移動度の低下、1/fノイズの増加を抑えることが可能
となる。Therefore, as is apparent from FIG.
The nitrogen concentration of the silicon oxynitride film treated in the 3 gas atmosphere is high near the oxynitride film surface, low near the silicon substrate interface, and can keep fixed charges and interface levels low.
It is possible to suppress a decrease in mobility and an increase in 1 / f noise.
【0019】続けて、図1(c)に示すように、前記シ
リコン酸窒化膜4上にゲート電極となるポリシリコンを
堆積し、フォトリソグラフィー及びエッチング技術によ
って加工し、ゲート電極5を形成する。さらに、前記ゲ
ート電極5と素子分離領域2との間の領域に不純物拡散
を施して拡散層6を形成し、MIS型半導体装置が形成
される。ここで、本発明の効果を発揮することができる
発明の実施範囲について説明する。Subsequently, as shown in FIG. 1C, polysilicon serving as a gate electrode is deposited on the silicon oxynitride film 4 and processed by photolithography and etching to form a gate electrode 5. Further, an impurity is diffused in a region between the gate electrode 5 and the element isolation region 2 to form a diffusion layer 6, whereby an MIS type semiconductor device is formed. Here, a description will be given of an embodiment of the present invention in which the effects of the present invention can be exhibited.
【0020】図3は圧力30TorrのNH3含有ガス
雰囲気中における処理時間と酸窒化膜表面の窒素濃度と
の関係を処理温度別に表したグラフである。図3より、
処理温度が高いほど短時間に酸窒化膜表面の窒素濃度を
高めることが可能であり、また、処理時間を長くするほ
ど酸窒化膜表面の窒素濃度が高くなることがわかる。FIG. 3 is a graph showing the relationship between the processing time in an NH 3 -containing gas atmosphere at a pressure of 30 Torr and the nitrogen concentration on the surface of the oxynitride film at different processing temperatures. From FIG.
It can be seen that the higher the processing temperature, the higher the nitrogen concentration on the oxynitride film surface can be increased in a shorter time, and the longer the processing time, the higher the nitrogen concentration on the oxynitride film surface.
【0021】しかし、処理時間を長くすると酸窒化膜表
面の窒素濃度が高くなるが、同時にシリコン基板界面の
窒素濃度も高くなる。この現象を表すグラフを図4に示
す。図4は、圧力30TorrのNH3含有ガス雰囲気
中における処理時間とシリコン基板界面の窒素濃度との
関係を処理温度別に表したグラフである。図4より、処
理時間が長いほどシリコン基板界面の窒素濃度が高くな
ることがわかる。本発明はシリコン基板界面の窒素濃度
を低く抑え、移動度の低下や1/fノイズの増加等の問
題によるデバイス特性の劣化を防ぐことを目的とするこ
とから、シリコン基板界面の窒素濃度は低いほど望まし
い。良好な界面特性を得るためには、シリコン基板界面
の窒素濃度を2atomic%以内に抑えることが必要
である。すなわち、図4より処理温度1000℃におい
ては60秒以内、900℃においては3分以内、800
℃においては10分以内の短時間化を図る必要がある。However, if the treatment time is lengthened, the nitrogen concentration on the surface of the oxynitride film increases, but at the same time, the nitrogen concentration on the interface of the silicon substrate also increases. FIG. 4 is a graph showing this phenomenon. FIG. 4 is a graph showing the relationship between the processing time in an NH 3 -containing gas atmosphere at a pressure of 30 Torr and the nitrogen concentration at the silicon substrate interface for each processing temperature. FIG. 4 shows that the longer the processing time, the higher the nitrogen concentration at the silicon substrate interface. Since the present invention aims at suppressing the nitrogen concentration at the silicon substrate interface low and preventing the deterioration of device characteristics due to problems such as a decrease in mobility and an increase in 1 / f noise, the nitrogen concentration at the silicon substrate interface is low. Is more desirable. In order to obtain good interface characteristics, it is necessary to keep the nitrogen concentration at the silicon substrate interface within 2 atomic%. That is, as shown in FIG.
At ℃, it is necessary to shorten the time within 10 minutes.
【0022】しかし、処理温度900℃や800℃で処
理した場合、上記条件の下シリコン基板界面の窒素濃度
を2atomic%以内に抑えることができるが、その
際の酸窒化膜表面の窒素濃度は約4.5atomic%
までしか高めることができない(図3参照)。一方、処
理温度が1000℃ではシリコン基板界面の窒素濃度2
atomic%に対して酸窒化膜表面の窒素濃度を約
6.6atomic%まで高めることが可能である(図
3参照)。したがって、処理温度を1000℃以上の高
温、かつ、60秒以下の短時間処理を施すことによっ
て、シリコン基板界面の窒化抑制を図った上で酸窒化膜
表面の窒素濃度を高めることができる。However, when the treatment is carried out at a treatment temperature of 900 ° C. or 800 ° C., the nitrogen concentration at the silicon substrate interface can be suppressed within 2 atomic% under the above conditions. 4.5 atomic%
(See FIG. 3). On the other hand, when the processing temperature is 1000 ° C., the nitrogen concentration at the silicon substrate interface is 2%.
The nitrogen concentration on the surface of the oxynitride film can be increased to about 6.6 atomic% with respect to atomic% (see FIG. 3). Therefore, by performing the processing at a high temperature of 1000 ° C. or more and for a short time of 60 seconds or less, it is possible to suppress the nitridation at the silicon substrate interface and increase the nitrogen concentration on the oxynitride film surface.
【0023】次に、圧力との関係について考える。図5
は温度1000℃で60秒熱処理した場合の圧力とシリ
コン基板界面の窒素濃度の関係を表したグラフである。
図5より、シリコン基板界面の窒素濃度を2atomi
c%以内に抑えるためには、圧力を50Torr以下に
しなければいけない。Next, the relationship with the pressure will be considered. FIG.
Is a graph showing the relationship between the pressure and the nitrogen concentration at the interface of the silicon substrate when the heat treatment is performed at a temperature of 1000 ° C. for 60 seconds.
From FIG. 5, the nitrogen concentration at the interface of the silicon substrate was set to 2 atom.
In order to keep the pressure within c%, the pressure must be 50 Torr or less.
【0024】[第2の実施例]次に本発明の第2の実施
例による半導体装置の製造工程を説明する。図6は本発
明の第2の実施例に係るMIS型半導体装置の製造工程
断面図である。但し、図6において、先に説明した部分
には同一の参照符号を付し、説明を省略する。[Second Embodiment] Next, a manufacturing process of a semiconductor device according to a second embodiment of the present invention will be described. FIG. 6 is a sectional view showing the manufacturing process of the MIS semiconductor device according to the second embodiment of the present invention. However, in FIG. 6, the parts described above are denoted by the same reference numerals, and description thereof will be omitted.
【0025】図6(a)を参照するに、シリコン基板1
に素子分離領域2を形成し、熱酸化法によって前記シリ
コン基板上に0.5〜1.5nmのシリコン酸化膜を形
成する。次に実施例1と同様、圧力10TorrのNH
3ガス雰囲気中において温度1050℃で60秒間の熱
処理を施すことによってシリコン酸窒化膜7を形成す
る。Referring to FIG. 6A, the silicon substrate 1
Then, an element isolation region 2 is formed, and a silicon oxide film having a thickness of 0.5 to 1.5 nm is formed on the silicon substrate by a thermal oxidation method. Next, as in the first embodiment, NH at a pressure of 10 Torr was used.
The silicon oxynitride film 7 is formed by performing a heat treatment at a temperature of 1050 ° C. for 60 seconds in a three- gas atmosphere.
【0026】続けて、図6(b)に示すように、前記シ
リコン酸窒化膜7上に高誘電体絶縁膜8としてSi3N4
等を堆積し、さらに前記高誘電体絶縁膜8上にゲート電
極となるポリシリコンを堆積する。Subsequently, as shown in FIG. 6B, a Si 3 N 4 is formed on the silicon oxynitride film 7 as a high dielectric insulating film 8.
And the like, and further, polysilicon serving as a gate electrode is deposited on the high dielectric insulating film 8.
【0027】次に、第1の実施例と同様に、前記シリコ
ン酸窒化膜と、Si3N4と、ポリシリコンをフォトリソ
グラフィーとエッチング技術によって加工し、ゲート電
極9を形成する。さらに、前記ゲート電極9と素子分離
領域2との間の領域に不純物拡散を施して拡散層6を形
成し、MIS型半導体装置が形成される。Next, as in the first embodiment, the gate electrode 9 is formed by processing the silicon oxynitride film, Si 3 N 4 and polysilicon by photolithography and etching techniques. Further, an impurity is diffused in a region between the gate electrode 9 and the element isolation region 2 to form a diffusion layer 6, whereby a MIS type semiconductor device is formed.
【0028】上記シリコン酸窒化膜7とゲート電極9の
間に堆積させたSi3N4は高誘電体であるため、ゲート
絶縁膜をシリコン酸窒化膜のみで構成するよりもさらに
平均誘電率が高くなり、延いては電気的膜厚を保ったま
まゲート絶縁膜の物理膜厚を厚くすることができるので
ゲート電流の増大を抑制することができる。Since the Si 3 N 4 deposited between the silicon oxynitride film 7 and the gate electrode 9 is a high dielectric substance, the average dielectric constant of the gate insulating film is higher than that of the silicon oxynitride film alone. As a result, the physical thickness of the gate insulating film can be increased while maintaining the electrical thickness, so that an increase in gate current can be suppressed.
【0029】また、本発明の実施例で形成されたシリコ
ン酸窒化膜7の表面は窒素濃度が高いため、酸窒化膜の
平均誘電率も高くなっている。したがって、シリコン酸
化膜を高誘電体絶縁膜8との界面層として用いた場合に
比べてゲート絶縁膜全体の平均誘電率が高くなる。Further, since the surface of the silicon oxynitride film 7 formed in the embodiment of the present invention has a high nitrogen concentration, the average dielectric constant of the oxynitride film is also high. Therefore, the average dielectric constant of the entire gate insulating film is higher than when the silicon oxide film is used as an interface layer with the high dielectric insulating film 8.
【0030】また、ゲート電極としてポリシリコン、高
誘電体絶縁膜としてSi3N4を用いたが、ゲート電極を
タングステン、アルミニウム等の電極材料に、高誘電体
絶縁膜をTa2O5、TiO2等の高誘電体絶縁材料で構
成することも可能である。Although polysilicon is used for the gate electrode and Si 3 N 4 is used for the high dielectric insulating film, the gate electrode is made of an electrode material such as tungsten or aluminum, and the high dielectric insulating film is made of Ta 2 O 5 or TiO 2. It is also possible to use a high-dielectric insulating material such as 2 .
【0031】したがって、本発明は、かかる特定の実施
例に限定されるものではなく、特許請求の範囲に記載し
た要旨内において様々な変形・変更が可能である。Therefore, the present invention is not limited to the specific embodiment, and various modifications and changes can be made within the gist of the claims.
【0032】[0032]
【発明の効果】 以上に説明したように本発明によれ
ば、シリコン基板とシリコン酸窒化膜との界面の窒素濃
度を低く抑え、シリコン酸窒化膜の表面の窒素濃度を高
めることができ、その結果、固定電荷及び界面準位を低
く保つことができる。As described above, according to the present invention, the nitrogen concentration at the interface between the silicon substrate and the silicon oxynitride film can be suppressed low, and the nitrogen concentration at the surface of the silicon oxynitride film can be increased. As a result, the fixed charge and the interface state can be kept low.
【図1】 第1の実施例による半導体装置の製造工程を
示す図である。FIG. 1 is a diagram illustrating a manufacturing process of a semiconductor device according to a first embodiment.
【図2】 第1の実施例により製造されたシリコン酸窒
化膜の窒素濃度プロファイル及びNOガス雰囲気中で熱
処理された場合の窒素濃度プロファイルを示す図であ
る。FIG. 2 is a diagram showing a nitrogen concentration profile of a silicon oxynitride film manufactured according to the first embodiment and a nitrogen concentration profile when heat-treated in an NO gas atmosphere.
【図3】 圧力30TorrのNH3ガス雰囲気中にお
ける処理時間とシリコン酸窒化膜表面の窒素濃度との関
係を示す図である。FIG. 3 is a diagram showing a relationship between a processing time in an NH 3 gas atmosphere at a pressure of 30 Torr and a nitrogen concentration on the surface of a silicon oxynitride film.
【図4】 圧力30TorrのNH3ガス雰囲気中にお
ける処理時間とシリコン酸窒化膜とシリコン基板との界
面の窒素濃度との関係を示す図である。FIG. 4 is a diagram showing a relationship between a processing time in an NH 3 gas atmosphere at a pressure of 30 Torr and a nitrogen concentration at an interface between a silicon oxynitride film and a silicon substrate.
【図5】 NH3ガス雰囲気中において温度1000℃
で60秒間熱処理した場合の圧力とシリコン酸窒化膜と
シリコン基板との界面の窒素濃度との関係を示す図であ
る。FIG. 5 shows a temperature of 1000 ° C. in an NH 3 gas atmosphere.
FIG. 4 is a diagram showing a relationship between pressure and a nitrogen concentration at an interface between a silicon oxynitride film and a silicon substrate when heat treatment is performed for 60 seconds.
【図6】 第2の実施例による半導体装置の製造工程を
示す図である。FIG. 6 is a diagram showing a manufacturing process of the semiconductor device according to the second embodiment.
【図7】 従来技術により製造されたシリコン酸窒化膜
の窒素濃度プロファイルである。FIG. 7 is a nitrogen concentration profile of a silicon oxynitride film manufactured by a conventional technique.
1…シリコン基板、2…素子分離領域、3…シリコン酸
化膜、4、7…シリコン酸窒化膜、5、9…ゲート電
極、6…拡散層、8…高誘電体絶縁膜DESCRIPTION OF SYMBOLS 1 ... Silicon substrate, 2 ... Element isolation region, 3 ... Silicon oxide film, 4, 7 ... Silicon oxynitride film, 5, 9 ... Gate electrode, 6 ... Diffusion layer, 8 ... High dielectric insulating film
フロントページの続き Fターム(参考) 5F058 BC11 BD01 BD15 BD18 BF64 BJ01 5F140 AA00 AA01 AA03 AA06 AA24 BD01 BD07 BD09 BD11 BD12 BD15 BE07 BE08 BE19 BF01 BF04 BF05 BF07 BG37 CB04Continued on the front page F term (reference) 5F058 BC11 BD01 BD15 BD18 BF64 BJ01 5F140 AA00 AA01 AA03 AA06 AA24 BD01 BD07 BD09 BD11 BD12 BD15 BE07 BE08 BE19 BF01 BF04 BF05 BF07 BG37 CB04
Claims (2)
コン酸化膜を形成する工程と、 前記シリコン酸化膜を形成したシリコン基板を圧力50
Torr以下のNH3含有ガス雰囲気中1000℃以上
の温度で60秒以内の熱処理を施すことによって前記シ
リコン酸化膜中に窒素を導入してシリコン酸窒化膜を形
成する工程を有することを特徴とする半導体装置の製造
方法。A step of forming a silicon oxide film having a thickness of 5 nm or less on a silicon substrate;
Forming a silicon oxynitride film by introducing nitrogen into the silicon oxide film by performing a heat treatment at a temperature of 1000 ° C. or higher in an atmosphere of an NH 3 -containing gas of Torr or less for 60 seconds or less. A method for manufacturing a semiconductor device.
後、前記シリコン酸窒化膜上に高誘電体絶縁膜を形成す
る工程を含むことを特徴とする請求項1記載の半導体装
置の製造方法。2. The method according to claim 1, further comprising, after the step of forming the silicon oxynitride film, a step of forming a high dielectric insulating film on the silicon oxynitride film. .
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JP2003060198A (en) * | 2001-08-10 | 2003-02-28 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacturing method therefor |
US6909156B2 (en) | 2003-03-31 | 2005-06-21 | Abushiki Kaisha Toshiba | Semiconductor device and manufacturing method therefor |
JP2006066503A (en) * | 2004-08-25 | 2006-03-09 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacturing method thereof |
JP2007515078A (en) * | 2003-12-15 | 2007-06-07 | アプライド マテリアルズ インコーポレイテッド | Method for forming a silicon oxynitride layer |
JP2013149741A (en) * | 2012-01-18 | 2013-08-01 | Canon Inc | Photoelectric conversion device, imaging system, and method for manufacturing photoelectric conversion device |
JP2017118121A (en) * | 2017-01-23 | 2017-06-29 | キヤノン株式会社 | Photoelectric conversion device, imaging system, and manufacturing method of photoelectric conversion device |
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2001
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Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2003060198A (en) * | 2001-08-10 | 2003-02-28 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacturing method therefor |
US6909156B2 (en) | 2003-03-31 | 2005-06-21 | Abushiki Kaisha Toshiba | Semiconductor device and manufacturing method therefor |
JP2007515078A (en) * | 2003-12-15 | 2007-06-07 | アプライド マテリアルズ インコーポレイテッド | Method for forming a silicon oxynitride layer |
JP2006066503A (en) * | 2004-08-25 | 2006-03-09 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacturing method thereof |
JP2013149741A (en) * | 2012-01-18 | 2013-08-01 | Canon Inc | Photoelectric conversion device, imaging system, and method for manufacturing photoelectric conversion device |
US9412773B2 (en) | 2012-01-18 | 2016-08-09 | Canon Kabushiki Kaisha | Photoelectric conversion apparatus, image pickup system, and method for manufacturing photoelectric conversion apparatus |
US10103186B2 (en) | 2012-01-18 | 2018-10-16 | Canon Kabushiki Kaisha | Photoelectric conversion apparatus, image pickup system, and method for manufacturing photoelectric conversion apparatus |
JP2017118121A (en) * | 2017-01-23 | 2017-06-29 | キヤノン株式会社 | Photoelectric conversion device, imaging system, and manufacturing method of photoelectric conversion device |
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