JP2002280293A - Exposure method, original plate for exposure, and substrate - Google Patents

Abstract

(57) Abstract: An exposure method, an original plate for exposure, and a substrate capable of forming a plurality of patterns on a substrate without reducing the number of obtained chips. A first original plate (10) has a circuit pattern (14) formed in a first region (12) for exposure, and a second region (1) for exposure.
3, an alignment pattern 15 is formed. 2nd original plate 2
0 forms the monitoring patterns 26a to 26d in the second region 23 for exposure. First and second original plates 1
The stepper apparatus prepared with 0 and 20 first uses the first original plate 10 and exposes the first original plate 10 on a wafer in a matrix. Next, the stepper device uses the second original plate 20 to expose the second original plate 20 to an exposure position that is set every other exposure position of the first original plate 10 exposed in a matrix.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an exposure method, an original plate for exposure, and a substrate, and more particularly, to an exposure method suitable for forming a plurality of types of patterns on a substrate using a plurality of original plates. The present invention relates to an original plate for exposure and a substrate.

In the manufacture of semiconductor devices represented by LSI, photolithography is indispensable as a basic process technology. Photolithography is a technology for finely processing various objects to be processed such as semiconductors, insulating films, conductive films, and resistive films. After a photosensitive agent (resist) is applied to the object to be processed in advance, a pattern defining a processing region is formed. Exposure is performed using the formed exposure original plate (mask). By this exposure process, the resist is left only in the non-processed region, and the processed region is selectively removed by etching using the resist as a mask. In such photolithography, a pattern (mask pattern) formed on an exposure original plate is repeatedly reduced and projected onto a wafer (substrate) surface using a stepper device. The substrate on which a plurality of circuit elements are formed based on the mask pattern scribes (dices) a scribe area provided around each pattern to separate the chips into individual chips. Such L
In the manufacture of SI, a mask pattern formed on an original plate for exposure is formed with a circuit pattern and a pattern for the purpose of performing characteristic evaluation called a process pattern, and this process pattern is formed on a substrate at the same time as the circuit pattern. It is formed.

[0003]

2. Description of the Related Art Generally, a process pattern is a monitoring pattern formed for the purpose of evaluating characteristics,
And an alignment pattern formed for the purpose of performing alignment.

[0004] When the exposure is performed,
It is formed in order to align a mask pattern formed on the original plate to be exposed with a pattern (base pattern) already formed on a substrate (wafer). That is, when a mask pattern is transferred to a wafer using a stepper device, in the second and subsequent exposures, it is necessary to precisely align the pattern to be exposed with the underlying pattern. The shape of such an alignment pattern differs depending on the model of the stepper device used in performing the exposure.

[0005] In a semiconductor device manufacturing line, stepper devices of a plurality of manufacturers are provided for the purpose of stable operation and the like. Therefore, it is required to form an alignment pattern for each stepper device on the original plate. This is because the original plate of the semiconductor device is commonly used by a plurality of stepper devices, so that the cost for producing the original plate and the production time can be reduced.

[0006] The monitoring patterns are roughly classified into a process monitoring pattern for confirming a process situation and an electric characteristic monitoring pattern for confirming electric characteristics of a plurality of circuit elements formed based on the circuit pattern. The process monitoring pattern is based on CMP (Chemica
This is a pattern for checking the state of a chip for each process, which is created by various process methods such as l mechanical polishing, etc., and this pattern is created according to the process method used.

The electrical characteristic monitoring pattern is a pattern for confirming electrical characteristics in a completed state of a chip (a state before cutting a wafer). In order to suppress the increase in cost due to the confirmation of the chip body, a simplified circuit pattern formed on the chip is separately created and the electrical characteristics of the simplified circuit are monitored. It is common to do. Therefore, the ratio of the electrical characteristic monitoring pattern to the process pattern increases.

Forming these various process patterns together with the circuit patterns in the chip area leads to an increase in the chip area and a reduction in the number of chips obtained per wafer. Therefore, such a process pattern is formed in the scribe region.

Conventionally, in such an exposure step, a desired mask pattern including a circuit pattern and a plurality of process patterns is formed on the same exposure original plate. However, the scribe region is provided as narrow as possible in order not to reduce the number of chips obtained per wafer as described above.

For this reason, the types of process patterns that can be formed in the scribe area are limited, and in such a limited scribe area, desired alignment patterns and monitoring patterns (process monitoring patterns, electrical characteristic monitoring) Pattern) cannot be formed.

As a result, since a plurality of types of alignment patterns cannot be formed on one original plate, only one type of stepper device can be used for one prepared original plate. Therefore, when a plurality of stepper devices are provided on a production line, it is necessary to prepare an exposure original plate corresponding to the stepper devices, which has led to an increase in cost. In addition, when the same transfer original is used in which a process pattern is formed in the surrounding scribe area together with the circuit pattern in the chip area, and the same transfer is repeatedly performed, multiple exposure is performed in the scribe area between adjacent chips. . Therefore, it is necessary to consider where in the scribe area the process pattern is to be formed around the chip area (four sides), thereby similarly limiting the type of the process pattern.

For the above reasons, in order to increase the number of types of process patterns, a part of the process patterns must be formed in the chip region as a result. Will decrease.

Therefore, in order to solve the above-mentioned problems, it has been proposed to increase the kinds of process patterns by using a shielding blade. In this configuration, the same exposure original plate is used, and an unnecessary pattern is shielded by a shielding blade from a plurality of types of process patterns formed in the scribe area at an arbitrary position on the wafer, and the pattern is arbitrarily selected. Thus, the type of the process pattern can be increased without performing multiple exposure.

As described above, by using the same original exposure plate with the shielding blade and separately forming patterns,
Without forming a process pattern in the chip area,
It is possible to increase the types of the patterns. Also, by using the same exposure original plate, it is possible to suppress an increase in cost and to shorten the exposure time.

[0015]

By the way, when shielding an unnecessary process pattern using a shielding blade,
A margin due to the light-shielding band needs to be about 1 mm or more around the process pattern formed in the scribe area. That is, it is necessary to separate the region where the process pattern is formed from the region where the circuit pattern is formed by a margin required for light shielding.

For this reason, in consideration of the margin due to the light-shielding band, the types of process patterns that can be formed in the scribe area are actually limited. That is, in such a case, as a result, it is more practical to form many pattern shapes in the scribe region without using the shielding blade. Therefore, in the method of selectively forming a pattern using a shielding blade, it is difficult to increase the types of process patterns, and it was not possible to solve the various problems of the conventional technique as described above. .

An object of the present invention is to solve the above problems, and an object of the present invention is to provide an exposure method and an exposure method capable of forming a plurality of patterns on a substrate without reducing the number of obtained chips. An object of the present invention is to provide an original plate and a substrate.

[0018]

According to the first aspect of the present invention, a circuit pattern is formed in a first region and at least an alignment pattern is formed in a second region. Exposure is performed using the master plate thus formed and at least one master plate having a monitoring pattern formed in the second region.

According to the second aspect of the present invention, in the first step, the circuit pattern is formed in the first region of the substrate,
A first region in which at least an alignment pattern is formed in the region
Are exposed in a matrix. Next, in a second step, the substrate is exposed such that the original plate on which the monitoring pattern is formed in the second region is not adjacent to the exposure position. These first and second steps are performed by exposing the substrate 1
Times of exposure process.

According to the invention of claim 3, according to claim 2,
In addition to the operation of the invention described in the above, the original plate on which the monitoring pattern is formed in the second region is exposed every other exposure position of the first original plate. Then, the monitoring patterns are arranged on all four sides of the scribe area surrounding the chip area on the substrate.

According to the fourth aspect of the present invention, the exposure original plate for exposing the substrate has a pattern formed in the second area divided into a plurality of original plates. . Claim 5
According to the invention described in (1), the pattern of the scribe area of the substrate is at least 2 out of a plurality of original plates prepared in advance.
It is formed from patterns arranged on one original plate.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment A first embodiment of the present invention will be described below with reference to FIGS.

FIG. 1 is a schematic plan view of a semiconductor substrate.
The semiconductor substrate 1 (hereinafter, referred to as a wafer) is, for example, a silicon single crystal substrate. On the wafer 1, a plurality of chip regions 2 are formed in a matrix, and a pattern of the same shape is formed in each chip region 2. ing. The periphery of each chip area 2 is a scribe area 3, and the wafer 1 is separated as individual chips by scribing (dicing) along a scribe line L indicated by a dashed line in FIG.

In each chip area 2, a circuit pattern 4 is formed. The circuit pattern 4 is doped with impurities after repeated development, etching, etc., so that the circuit pattern 4 includes a plurality of circuit elements. It is formed. Circuit pattern 4 constituted by these plurality of circuit elements
Includes, for example, a logic circuit, a memory circuit, etc.
The pattern shape is omitted).

A process pattern is formed in the scribe area 3, and includes a positioning pattern 5 and monitoring patterns 6a to 6d (each pattern shape is omitted in the figure). The alignment pattern 5 is formed in a pattern shape that can be used in a stepper device used for performing exposure. The monitoring patterns 6a to 6d include a process monitoring pattern for confirming a process status and an electrical characteristic monitoring pattern for confirming electrical characteristics of a plurality of circuit elements formed in the circuit pattern 4 in a completed state of a chip.

The circuit pattern 4, the alignment pattern 5, and the monitoring patterns 6a to 6d are obtained by reducing and projecting a plurality of original plates on which patterns having similar shapes are formed on the wafer 1 using a stepper device. It is formed. In this embodiment, each pattern is formed using two original plates.

FIG. 2A is a schematic plan view of a first original plate (reticle). The first original plate 10 has a first region 12 for exposure and a second region 13 for exposure provided around the first region 12. The first area 12 is a chip area 2
And an exposure pattern for forming (exposing) the circuit pattern 4 of the chip area 2 is formed. The second region 13 has a shape surrounding the first region 12, that is, a shape similar to the scribe region 3 surrounding one chip region 2, and the alignment pattern 5 of the scribe region 3.
An exposure pattern for forming (exposing) is formed.

That is, the first original plate 10 has an exposure circuit pattern 14 (the pattern shape is omitted in the drawing) in the first area 12 and an exposure alignment pattern in the second area 13. 15 (the pattern shape is omitted in the figure). The shape of the alignment pattern 15 differs depending on the stepper device used when performing exposure. For this reason, the alignment pattern 15 is configured to include a plurality of alignment patterns (alignment patterns) so as to be compatible with each stepper device.

In the second area 13, a light-shielding area 16 is formed on a side opposite to the side on which the alignment pattern 15 is formed, at a position corresponding to the position where the alignment pattern 15 is arranged. Thereby, the first original plate 1 described later
At the time of exposure by 0, multiple exposure of the alignment pattern 15 is prevented. The light-shielding region 16 may be all regions in the second region 13 except for the position where the alignment pattern 15 is arranged.

FIG. 2B is a schematic plan view of the second original plate (reticle). The second original plate 20 similarly has a first region 22 for exposure and a second region 23 for exposure, and the shapes of the first region 22 and the second region 23 are the same as those of the first original plate 10. Is the same. That is, the first and second original plates 10 and 20 are formed in the same size.

The second original plate 20 has monitoring patterns 26a to 26d for exposure (pattern shapes are omitted in the drawing) on four sides of a second region 23 surrounding the first region 22. These monitoring patterns 26a to 26d are:
As described above, the configuration includes a desired pattern shape including a process monitoring pattern, an electrical characteristic monitoring pattern, and the like. In the present embodiment, the monitoring patterns 26a to 26d are respectively arranged on the four sides of the second area 23, but may be arranged on at least one of the sides.

As described above, in the present embodiment, when performing one exposure step, patterns are separately formed using two original plates including the first and second original plates 10 and 20.
For this reason, on the first original plate 10, light shielding regions 17a to 17d are formed at positions corresponding to the positions where the monitoring patterns 26a to 26d are arranged on the second original plate 20. still,
The light-shielding regions 17a to 17d correspond to the second original plate 10
The area 13 may be all areas except the position where the alignment pattern 15 is arranged.

Similarly, on the second original plate 20, a light-shielding region 27 is formed in a position corresponding to the position where the circuit pattern 14 is arranged on the first original plate 10, that is, in the first region 22, and the monitoring pattern 26a is formed. The light-shielding region 28 is formed in the second region 23 except for the positions where the positions 26 to 26d are arranged.
Further, the alignment pattern 15 of the first original plate 10 and the second
The monitoring patterns 26a to 26d of the original plate 20 are arranged at different positions in the second regions 13 and 23 for exposure. Thereby, the first and second original plates 1
At the time of exposure by 0 and 20, multiple exposure of each pattern is prevented.

Next, a method of manufacturing a substrate using the first and second original plates will be described. First, the first and second original plates 10 and 20 having the above configuration are prepared, and the first and second original plates 10 and 20 are prepared.
Then, the second original plates 10 and 20 are set on the stepper device. Thus, the stepper apparatus performs exposure by using the first original plate 10 and the second original plate 20 in this order in one exposure process.

At this time, the alignment pattern 15 arranged on the first original plate 10 is selected from a plurality of alignment patterns formed on the first original plate 10 according to the stepper device to be used. Is selected. Therefore, the stepper device transfers the circuit pattern 14 formed on the first original plate 10 onto the wafer 1 while precisely aligning the circuit pattern 14 with the pattern (base pattern) already formed on the wafer 1.

First, the case where exposure is performed using the first original plate 10 will be described. The stepper device includes a first original 1
0 based on the first alignment pattern 15
After the alignment of the circuit pattern 14 of 0 with the underlying pattern of the wafer 1, the shot position (exposure position) S1 is exposed as shown in FIG. As a result, the circuit pattern 14 of the first original plate 10 is reduced and projected on the shot position S1, and the circuit pattern 4 is formed in the chip area 2 on the wafer 1. At this time, the first original 1 is similarly placed in the scribe area 3 (the left end side of the shot position S1).
The alignment pattern 15 of 0 is reduced and projected to form the alignment pattern 5.

At this time, as described above, the light shielding regions 16 and 17a to 17c are formed in the second region 13 of the first original plate 10 (see FIG. 2A). Therefore, when the shot position S1 is exposed, the light shielding area 16
Are formed in the areas corresponding to the light-shielding areas 17a to 17d.
9d is formed.

Next, as shown in FIG. 3B, the stepper device exposes the shot position S2 by shifting the wafer 1 from the shot position S1 by the shift distance x. Here, the shift distance x is, as shown in FIG.
In FIG. 1, the chip area 2 starts from the left end of the scribe area 3.
Is the distance to the right end of the

That is, the stepper device moves the shot position S
Exposure is performed so that the scribe area 3 on the right end side of the shot area 1 and the scribe area 3 on the left end side of the shot position S2 overlap. At this time, an unexposed area 19c formed in the scribe area 3 on the right end side of the shot position S1,
The unexposed area 19a formed in the scribe area 3 on the left end side of the shot position S2 is the same area. Also,
Since the unexposed area 18 is formed in the scribe area 3 on the right end side of the shot position S1, the alignment pattern 5 can be formed in the scribe area 3 on the left end side of the shot position S2.

Similarly, the stepper shifts the wafer 1 from the shot position S2 by the shift distance x to expose the shot position S3, and then shifts the wafer 1 from the shot position S3 as shown in FIG. The shot position S4 is exposed while being shifted by the distance y. Here, the shift distance y is a distance from the upper end of the scribe area 3 to the lower end of the chip area 2 at the shot position S3 as shown in FIG.

That is, the stepper device moves the shot position S
Exposure is performed so that the scribe area 3 on the lower end of the shot area 3 and the scribe area 3 on the upper end of the shot position S4 overlap. At this time, an unexposed area 19d formed in the scribe area 3 on the lower end side of the shot position S3,
The unexposed area 19b formed in the scribe area 3 on the upper end side of the shot position S4 is the same area.

Thereafter, similarly, the stepper device sequentially shifts the wafer 1 by the shift distance x or the shift distance y, and performs exposure so that the scribe areas 3 overlap at each of the shot positions S1 to S9. Then, as shown in FIG. 3C, the shot positions S1 to S9 on the wafer 1
The circuit pattern 4 and the alignment pattern 5 are formed in a matrix.

Next, a case where exposure is performed using the second original plate 20 will be described. The second original 20 is exposed to non-adjacent shot positions among the shot positions S1 to S9 of the first original 10 exposed in a matrix on the wafer 1. That is, the second original plate 20 can be exposed to at least one of the shot positions S1, S3, S5, S7, and S9 with respect to the shot positions S1 to S9 where the first original plate 10 has been exposed.

In this embodiment, the second original plate 20
Are shot positions S1, S3, S5, as shown in FIG.
Exposure is performed at S7 and S9. That is, the second original plate 20
Checkered pattern for shot positions S1 to S9 (every other)
Exposure is performed at a position such that As described above, when the second original plate 20 is exposed at a position where the first original plate 10 is exposed in a checkered pattern with respect to the exposure position of the first original plate 10, the scribe area 3
The types of the monitoring patterns 6a to 6d that can be formed therein are the most.

The stepper device exposes the shot position S1 using the second original plate 20, and thereby exposes the shot position S1.
1 includes a monitoring pattern 26a of the second original plate 20;
To 26d are reduced and projected. Therefore, the monitoring patterns 6a to 6d are formed in the scribe area 3 on the wafer 1.

At this time, as described above, the light shielding region 27 is formed in the first region 22 of the second original plate 20, and the light shielding region 27 is formed in the second region 23 except for the positions where the monitoring patterns 26a to 26d are arranged. A region 28 is formed (see FIG. 2B). Therefore, when the stepper device exposes the shot position S1, the regions corresponding to the light shielding regions 27 and 28 are not exposed. As a result, the circuit pattern 4 and the alignment pattern 5 already formed on the wafer 1 are not subjected to multiple exposure.

Thereafter, similarly, the stepper device exposes the shot positions S3, S5, S7 and S9. Thereby, monitoring patterns 6a to 6d are formed in the scribe area 3 surrounding each chip area 2 on the wafer 1.

As described above, the second original plate 20 is put in a checkered pattern (1
The monitoring patterns 6a to 6d arranged on the four sides of the scribe area 3 surrounding one chip area 2 as shown in FIG. They are arranged at different positions (sides).

As described above, the present embodiment has the following advantages. (1) In the first original plate 10, a circuit pattern 14 is formed in a first area 12 for exposure, and an alignment pattern 15 is formed in a second area 13 for exposure. The second original plate 20
A monitoring pattern 26 is formed in the second region 23 for exposure.
a to 26d are formed. First and second original plates 10 and 20
The stepper device prepared for the first step first exposes the shot positions S1 to S9 using the first original plate 10. Next, the stepper device exposes the shot positions S1, S3, S5, S7, S9 using the second original plate 20. That is, the second original plate 20 is exposed at a position where a checkered pattern (every other one) is formed with respect to the position where the first original plate 10 is exposed. Therefore, the area of the process pattern (the alignment pattern 5 and the monitoring patterns 6a to 6d) that can be formed in the scribe region 3 of the wafer 1 can be increased. Therefore, the type of the pattern can be increased in the scribe area 3 without forming a process pattern in the chip area 2, thereby suppressing an increase in the chip area and increasing the number of chips obtained per wafer. Can be done.

(2) The second original plate 20 is used as the first original plate 10
Shot positions S1, S3, S5, S that form a checkered pattern with respect to shot positions S1 to S9 exposed by
7 and S9. As a result, the monitoring patterns 6a to 6d are located at different positions (sides) on the four sides of the scribe area 3 surrounding each chip area 2 on the wafer 1.
It is arranged in. Therefore, the types of process patterns can be increased.

(3) The area of a process pattern that can be formed in the scribe region 3 of the wafer 1 can be increased. Therefore, a plurality of types (shapes) of alignment patterns 15 can be formed on the first original plate 10,
As a result, it is possible to provide an original plate capable of supporting a plurality of stepper models when performing exposure.

(4) The area of a process pattern that can be formed in the scribe region 3 of the wafer 1 can be increased. Therefore, the second original plate 20 includes an electrical property monitoring pattern (in the present embodiment, the monitoring pattern 2) for measuring the electrical property of each chip.
6a to 26d) can be increased, whereby the measurement accuracy can be improved. By improving the accuracy of electrical characteristic monitoring in this way, it is possible to contribute to a reduction in test cost.

(5) The first original plate 10 has the second original plate 2
At 0, the light shielding areas 17a to 17d are arranged corresponding to the positions where the monitoring patterns 26a to 26d are arranged.
As described above, the light shielding areas 17a to 17a
By providing 7d, a shielding means for preventing multiple exposure is not required. Therefore, since it is not necessary to provide a light-shielding band margin at the time of shielding, the types of process patterns can be increased.

(Second Embodiment) Hereinafter, a second embodiment of the present invention will be described with reference to FIGS. In this embodiment, three original plates are used, and the first original plate is the same as the first original plate 10 of the first embodiment (see FIG. 2A), and the circuit pattern 14 and the alignment plate are aligned. The pattern 15 is formed. The second and third original plates are formed by dividing the arrangement of the monitoring patterns 26a to 26d formed on the second original plate 20 (see FIG. 2B) of the first embodiment. Therefore, in this embodiment,
The same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

As shown in FIG. 5A, the first original plate 30
Is a first region 32 for exposure similar to the first original plate 10.
The circuit pattern 14 is formed in the second region 33 for exposure.
, An alignment pattern 15 is formed. Second area 33
Include monitoring patterns 26a-26 formed on the alignment pattern 15 and second and third original plates described later.
d, light-shielding regions 16, 17a to 17d for preventing multiple exposure
Are formed in the same manner as in the first embodiment. On this occasion,
The light-shielding regions 16 and 17a to 17d may be all regions of the second region 33 except for the position where the alignment pattern 15 is arranged in the same manner.

As shown in FIG. 5B, the second original plate 40
The monitoring patterns 26a and 26d are formed in the second region 43 for exposure along two sides sandwiching one corner (lower left corner in the figure). In the second original plate 40, a light-shielding region 44 is formed in a first region 42 for exposure, and a light-shielding region 45 is formed in a second region 43 excluding a position where the monitoring patterns 26a and 26d are arranged.

As shown in FIG. 5C, the third original plate 50
The monitoring patterns 26b and 26c are formed in the second region 53 for exposure along two sides sandwiching the diagonal (upper right corner) of the corner of the second original plate 40. In the third original plate 50, a light-shielding region 54 is formed in a first region 52 for exposure, and a light-shielding region 55 is formed in a second region 53 except for a position where the monitoring patterns 26b and 26c are arranged.

As described above, the monitoring patterns 26a-26 formed on the second original plate 20 of the first embodiment described above.
d, the monitoring patterns 26a and 26d are the second
Of the monitoring pattern 26b,
26c is formed on the third original plate 50.

In this embodiment, the second and third original plates 4
Monitoring patterns 26a to 26 arranged at 0,50
d was split as described above, but these
The monitoring patterns 26a and 26b may be arranged at 0, and the monitoring patterns 26c and 26d may be arranged at the third original plate 50. That is, each monitoring pattern 26
a to 26d are divided and arranged on the second and third original plates 40 and 50, and they are arranged on two sides (an L-shaped shape) sandwiching any corner in each of the second regions 43 and 53 for exposure. Become 2
Side).

Now, for example, the first to third original plates 30, 40,
50, the first regions 32, 42 and 52 are formed in a square shape, and the first region 32 of the first original plate 30 (see FIG.
The length L1 of one side shown in FIG. 5A is the first area 42, 52 of the second and third original plates 40, 50 (FIG. 5B and FIG. 5).
It is formed larger than one side length L2 shown in (c) (L1> L2). That is, the first original plate 30 is formed in a larger size than the second and third original plates 40 and 50.

Next, a method of manufacturing a substrate using the first to third original plates will be described. First, the first to third original plates 30, 40, and 50 having the above configuration are prepared, and these first to third original plates 30, 40, and 50 are set on a stepper device. Thus, the stepper apparatus performs exposure using three original plates in the order of the first original plate 30, the second original plate 40, and the third original plate 50 in one exposure step. The order of exposure of the second and third original plates 40 and 50 may be reversed.

At this time, the alignment pattern 15 arranged on the first original plate 30 is selected from a plurality of alignment patterns formed on the first original plate 30 according to the stepper device to be used. Is selected. Therefore, the stepper device transfers the circuit pattern 14 formed on the first original plate 30 onto the wafer 1 while precisely aligning the circuit pattern 14 with the base pattern formed on the wafer 1.

First, the case of performing exposure using the first original plate 30 will be described. The stepper device exposes the first original plate 10 of the first embodiment (see FIGS. 3A to 3C).
(See (c))), all shot positions S1 to S
9 is exposed. That is, the stepper device exposes the scribe area 3 at each of the shot positions S1 to S9 so as to overlap with each other,
The circuit pattern 14 and the alignment pattern 15 of the first original plate 30 are reduced and projected to form the circuit pattern 4 and the alignment pattern 5 on the wafer 1. At this time, the scribe area 3 at each of the shot positions S1 to S9 is similarly set.
, Unexposed areas 18, 19a to 19d are formed.

Next, the case of performing exposure using the second original plate 40 will be described. As shown in FIG. 6, the stepper device exposes the shot position S1 using the second original plate 40. At this time, since the second original plate 40 is smaller than the size of the first original plate 30 (the size of each of the first regions 32 and 42 for exposure), the stepper device adjusts the center when the first original plate 30 is exposed. The center position C2 when exposing the second original plate 40 is offset from the position C1 by a distance of (L1−L2) / 2 in the lower left direction shown in FIG. As a result, exposure alignment is performed at the lower left corner of the scribe area 3 at the shot position S1.

Therefore, on the wafer 1, the shot position S
The monitoring patterns 6a, 6
d is formed. At this time, similarly to the first embodiment, the second original plate 40 includes the first area 42 and the second area 4 excluding the positions where the monitoring patterns 26a and 26d are arranged.
3, light-shielding regions 44 and 45 are formed. Therefore, when the exposure of the second original plate 40 is performed, the circuit pattern 4 and the alignment pattern 5 on the wafer 1 are not subjected to multiple exposure.

As described above, the stepper device performs the shot position S exposure of the first original plate 30 in the same manner as in the case of exposing the second original plate 20 of the first embodiment (see FIG. 4).
With respect to 1 to S9, the shot positions S1, S3, S5, S7, and S9 are exposed using the second original plate 40.

Next, the case of exposing using the third original plate 50 will be described. As shown in FIG. 7, the stepper device exposes the shot position S1 using the third original plate 50. At this time, the stepper device adjusts the center position C3 at the time of exposing the third original 50 to the center position C3 at the time of exposing the first original 30 in the same manner as at the time of exposure with the second original 40. Is offset by a distance of (L1−L2) / 2 in the upper right direction shown in FIG. As a result, the exposure position is adjusted at the upper right corner of the scribe area 3 at the shot position S1, and the monitoring pattern 6 is placed on the wafer 1.
b, 6c are formed. Incidentally, even when the third original 50 is exposed, the circuit pattern 4 and the alignment pattern 5 formed by exposing the first original 30 are not subjected to multiple exposure.

As described above, the stepper apparatus uses the third original plate 50 for the shot positions S1, S3, S5, S5 with respect to the shot positions S1 to S9 where the first original plate 30 has been exposed.
7, S9 is exposed.

That is, the second and third original plates 40 and 50
Are exposed to the check positions (every other) with respect to the shot positions S1 to S9 of the first original plate 30 in the same manner as in the first embodiment (see FIG. 4).

As described above, according to the present embodiment, the following effects are obtained in addition to the effects obtained in the first embodiment. (1) The monitoring patterns 26a to 26d are separately arranged on the second and third original plates 40 and 50. Therefore, when the size is different from that of the first original plate 30 on which the circuit patterns 14 are arranged, exposure is performed in consideration of an offset for exposure position alignment. That is, when a plurality of first original plates 30 on which circuit patterns are arranged are prepared, and even when their sizes are different, the second and third original plates 40,
50 can be applied as a template. This allows
An increase in the manufacturing cost of the original plate for exposure is suppressed.

(Third Embodiment) Hereinafter, a third embodiment of the present invention will be described with reference to FIG. This embodiment is similar to the first and second original plates 10 and 2 of the first embodiment.
The case where the exposure is performed by the stepper device using 0 and the exposure position (shot position) of the second original plate 20 is only the specific position will be described. Therefore, the same components as those of the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

As shown in FIG. 8, the stepper device first exposes the shot positions S1 to S25 using the first original plate 10 and exposes the circuit pattern 4 on the wafer 1 in the same manner as in the first embodiment. And an alignment pattern 5 is formed.

Next, the stepper device moves the second original plate 20
Is used to expose the shot positions S1 to S25 only at specific positions such as, for example, the shot positions S1, S5, S13, S21, and S25, to form monitoring patterns 6a to 6d on the wafer 1. Here, the specific position refers to a position at which monitoring of the process status or the electrical characteristics of the wafer 1 is required at a minimum, or a characteristic evaluation is performed by the monitoring patterns 26a to 26d arranged on the second original plate 20. Is a desirable position.

That is, the monitoring patterns 6a to 6d
Are arranged for the purpose of confirming the variation of the characteristic distribution in each chip region 2 with respect to the circuit pattern 4 formed in each chip region 2 of the wafer 1. Typically,
Such a variation in the characteristic distribution is caused by the circuit pattern 4 formed near the center of the wafer 1 (in the vicinity of the shot position S13 in the figure) and the vicinity of the end of the wafer 1 (the shot positions S1, S5, S21 in the figure). , And S25). Therefore, the measurement of the characteristic distribution
All circuit patterns 4 formed at a plurality of locations on the wafer 1
Is performed for a specific position on the wafer 1 without performing the above.

Therefore, the monitoring patterns 6a to 6d
Are formed only at the minimum shot positions (in the present embodiment, for example, the shot positions S1, S5, S13, S21, and S25) at which variations in the characteristic distribution can be confirmed.

Note that, in this embodiment, the first embodiment
Although the first and third original plates 10 and 20 are used, the first to third original plates 30, 40 and 50 of the second embodiment may be used. As described above, according to the present embodiment, the following effects are obtained in addition to the effects obtained in the first embodiment.

(1) Monitoring patterns 6a to 6d
Are shot positions S1 to S where the circuit pattern 4 is transferred
In contrast to 25, it is arranged only at a specific position where characteristic distribution measurement is performed (for example, shot positions S1, S5, S13, S21, S25). Therefore, the test cost can be reduced.

(2) Monitoring patterns 6a to 6d
Is the number of exposures (the number of shots) by the second original plate 20 by being arranged only at a specific position where characteristic distribution measurement is performed.
Is reduced. Therefore, even when a plurality of original plates are used for one exposure, the exposure time can be reduced.

The present invention is not limited to the above embodiments, but may be implemented as follows. In the above embodiments, the alignment pattern 15
When one type of stepper device is used in performing the exposure process, it is not always necessary to provide a plurality of pattern shapes, and only one type of pattern shape that can correspond to the stepper device is formed. Is also good.

The positions where the alignment patterns 15 are arranged and the positions where the monitoring patterns 26a to 26d are arranged are not limited to the positions described in the above embodiments. The number of shots for exposing the wafer 1 is not limited to the number in each of the above embodiments. That is, the number of chips formed on the wafer 1 is not limited to the number in each embodiment.

In the first embodiment, the second original plate 20
May be exposed at the shot positions S2, S4, S6, and S8 (the position where a checkered pattern (every other one is obtained even when exposed in this way)).

In the second embodiment, the second original plate 40
The monitoring patterns 26a and 26b are formed on the third
The monitoring patterns 26c and 26d may be formed on the original plate 50.

In the second embodiment, the monitoring patterns 26a to 26d are divided and arranged on the second and third original plates 40 and 50, but may be divided and arranged on three or more original plates.

In the third embodiment, the monitoring patterns 6 for the shot positions S1 to S25 on the wafer 1
The positions (specific positions) for exposing a to 6d may be other positions.

The above embodiments are summarized as follows. (Supplementary Note 1) An exposure method for exposing a desired pattern on a substrate using a plurality of original plates having a first region for exposure and a second region for exposure provided around the first region. A substrate having a circuit pattern formed in the first region and at least an alignment pattern formed in the second region, and at least one substrate having a monitoring pattern formed in the second region. An exposure method, which comprises exposing an arbitrary portion of (1). (Supplementary Note 2) An exposure method for exposing a substrate to a desired pattern by using a plurality of original plates having a first region for exposure and a second region for exposure provided around the first region. Forming a circuit pattern in the first region and forming at least an alignment pattern in the second region.
A first step of exposing the first original plate in a matrix on the substrate using the original plate, and using the at least one original plate having a monitoring pattern formed in the second region, A second exposing step of exposing non-adjacent exposing positions among a plurality of exposing positions of the first original plate exposed in the matrix form in one exposure step. (Supplementary Note 3) In the first step, exposure is performed so that a second region of the first original plate overlaps at an adjacent exposure position among a plurality of exposure positions of the first original plate exposed in the matrix shape. 3. The exposure method according to claim 2, wherein (Supplementary Note 4) In the second step, every other original plate on which a monitoring pattern is formed in the second region is exposed to a plurality of exposure positions of the first original plate exposed in the matrix shape, The monitoring pattern is transferred to all four sides of a scribe region surrounding the chip region around a plurality of chip regions on the substrate on which the circuit pattern is transferred, wherein the monitoring pattern is transferred to all four sides of the scribe region surrounding the chip region.
Exposure method according to 1. (Supplementary note 5) Any one of supplementary notes 1 to 4, wherein the original plate on which the monitoring pattern is formed in the second area is exposed at a position offset from an exposure position where the first original plate is exposed. Exposure method according to 1. (Supplementary Note 6) The original plate on which the monitoring pattern is formed in the second region includes: a first auxiliary original plate on which the monitoring pattern is formed along two sides sandwiching one corner of the second region; 6. The exposure method according to claim 5, further comprising a second auxiliary original plate on which the monitoring pattern is formed along two sides sandwiching the diagonal of the corner. (Supplementary Note 7) In an original plate for exposure having a first region for exposure and a second region for exposure provided around the first region, a pattern to be formed in the second region may be formed on a plurality of original plates. An original plate for exposure, which is divided into two regions and arranged. (Supplementary Note 8) In the plurality of original plates, a circuit pattern is formed in the first region, a first original plate in which at least an alignment pattern is formed in the second region, and a monitoring pattern is formed in the second region. 8. The original plate for exposure according to claim 7, comprising at least one original plate. (Supplementary Note 9) In a substrate in which a circuit pattern is formed in a chip region provided in a plurality of locations and a plurality of types of patterns are formed in a scribe region provided in a grid around each of the chip regions, A substrate, wherein a pattern arranged on at least two of a plurality of prepared original plates is formed. (Supplementary Note 10) The substrate according to Supplementary Note 9, wherein the substrate is made of a semiconductor material or an insulating material.

[0086]

As described above, the present invention can provide an exposure method, an exposure original plate, and a substrate that can form a plurality of patterns on a substrate without reducing the number of chips obtained. .

[Brief description of the drawings]

FIG. 1 is a schematic plan view showing a substrate according to a first embodiment.

FIG. 2 is a schematic plan view showing first and second original plates.

FIG. 3 is a schematic plan view illustrating a method for manufacturing a substrate.

FIG. 4 is a schematic plan view illustrating a method for manufacturing a substrate.

FIG. 5 is a schematic plan view showing first to third original plates of the second embodiment.

FIG. 6 is a schematic plan view illustrating a method for manufacturing a substrate.

FIG. 7 is a schematic plan view illustrating a method for manufacturing a substrate.

FIG. 8 is a schematic plan view showing a substrate according to a third embodiment.

[Explanation of symbols]

 Reference Signs List 1 wafer as substrate 10 first original plate as plural original plates 12 first region for exposure 13 second region for exposure 14 circuit pattern 15 alignment pattern 20 second original plate as plural original plates 26a- 26d Monitoring pattern 30 First original plate as a plurality of original plates 32 First region for exposure 33 Second region for exposure 40 Second original plate as a plurality of original plates 42 First region for exposure 43 For exposure Second region 50 Third original plate as a plurality of original plates 52 First region for exposure 53 Second region for exposure

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Yoji Shibata 2-1844-2 Kozoji-cho, Kasugai-shi, Aichi F-term in Fujitsu VSI Ltd. (reference) 2H095 BB02 BC09 BE08 BE09 5F046 AA11 AA25 BA04 CB17 EB07

Claims (5)

[Claims] 1. An exposure method for exposing a substrate to a desired pattern using a plurality of original plates having a first region for exposure and a second region for exposure provided around the first region. A circuit board is formed in the first region, and an original plate having at least an alignment pattern formed in the second region; and at least one original plate having a monitoring pattern formed in the second region. An exposure method, which comprises exposing an arbitrary portion of a substrate. 2. An exposure method for exposing a desired pattern on a substrate using a plurality of original plates having a first region for exposure and a second region for exposure provided around the first region. Using a first original plate having a circuit pattern formed in the first region and at least an alignment pattern formed in the second region, exposing the first original plate in a matrix on the substrate; A first step, using at least one original having a monitoring pattern formed in the second region, exposing the original to a non-adjacent one of a plurality of exposure positions of the first original exposed in the matrix form; A second step of exposing the position
An exposure method, wherein the exposure method is included in the first exposure step. 3. In the second step, every other original plate on which a monitoring pattern is formed in the second region is exposed to a plurality of exposure positions of the first original plate exposed in the matrix form. The method according to claim 2, wherein the monitoring pattern is transferred to all four sides of a scribe region surrounding the chip region around a plurality of chip regions on the substrate to which the circuit pattern is transferred. Exposure method. 4. An original plate for exposure having a first region for exposure and a second region for exposure provided around the first region, wherein a pattern to be formed in the second region is formed by a plurality of original plates. Second
An original plate for exposure, which is divided into regions and arranged. 5. A substrate in which a circuit pattern is formed in a chip region provided at a plurality of locations and a plurality of types of patterns are formed in a scribe region provided in a grid around each of the chip regions, A substrate, wherein a pattern arranged on at least two of a plurality of prepared original plates is formed.