JP2002258812A - Liquid crystal display and image display application equipment - Google Patents

Abstract

(57) [PROBLEMS] To suppress a deterioration in image quality due to flicker, flicker and display unevenness in a liquid crystal display device using dot inversion driving by generating a high-precision γ correction voltage with a small tracking error. With the goal. SOLUTION: A reference voltage output circuit 22 outputs a tracked first reference voltage Vr1, second reference voltage Vr2, third reference voltage Vr3, and fourth reference voltage Vr4. The gamma correction voltage generating circuit 23 outputs a first gamma correction voltage group Vγ1 based on the first and second reference voltages. Further, a second γ correction voltage group Vγ2 is generated based on the third and fourth reference voltages. The configuration is such that these are input to the signal line drive circuit 16 by the γ correction voltage group Vr1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a liquid crystal display device used for a display of an information device such as a video device or a computer, and an image display application device using the same.

[0002]

2. Description of the Related Art Liquid crystal display devices have become indispensable devices for displays such as mobile phones and personal computers, and have begun to be used for displays requiring high-quality display such as DVDs and digital televisions.

As a technique for responding to the demand for high-quality display, a driving method of applying voltages of opposite polarities to adjacent pixels of a liquid crystal panel is known as a TF for high-quality display with a large screen size.
It is used in T-type liquid crystal display devices. This driving method is called dot inversion driving.

On the other hand, driving in which a driving voltage of the same polarity is applied to pixels arranged on the same scanning line and voltages of opposite polarities are applied to pixels on adjacent scanning lines is generally called line inversion driving. Is done.

The voltage applied to each pixel (referred to as pixel voltage) differs depending on the position of the pixel because an unbalanced voltage due to the influence of wiring capacitance and wiring resistance of the liquid crystal panel is superimposed on the pixel voltage. In the line inversion driving method, as the screen size increases, flicker and flicker unevenness due to the unbalanced voltage become more conspicuous, and the display quality deteriorates.

In the dot inversion driving method in which the pixel voltages of adjacent pixels invert the polarity of each other, flicker, flicker, unevenness, and the like due to an unbalanced voltage component are not so noticeable, and a higher quality image can be obtained than in the line inversion driving method. It is adopted for a TFT type liquid crystal display device having a large screen size and high quality display.

FIG. 14 is a configuration diagram of a conventional TFT type liquid crystal display device using a dot inversion driving method. In FIG. 14, a liquid crystal panel 15 includes a scanning line 11, a signal line 12, a pixel 13 and a common electrode 10 at an intersection of the scanning line 11 and the signal line 12.
Is arranged. Each pixel 13 is formed with a TFT and a liquid crystal cell. In FIG. 14, the number of the scanning lines 11 and the number of the signal lines 12 are XN and YM, respectively. Xn is the n-th scanning line from the upper end of the liquid crystal panel 15, and Ym is the m-th signal line from the left end of the liquid crystal panel 15. And the pixel at the intersection is (Xn, Y
m).

FIG. 15 shows an equivalent circuit of the pixel 13. The source S of the TFT is connected to the signal line 12, and TF
The gate G of T is connected to the scanning line 11, and the drain D of the TFT is connected to the liquid crystal cell LC. Clc is a pixel capacitance including a liquid crystal capacitance and a storage capacitance. The other terminal of the liquid crystal cell and Clc is connected to the common electrode 10.

The scanning line driving circuit 17 sequentially outputs a scanning pulse to the scanning line 11, and the signal line driving circuit 16 outputs a signal line driving voltage corresponding to an image signal to the signal line 12 in synchronization with the scanning pulse. The liquid crystal panel 15 is driven by line sequential driving. The Hi level of the scanning pulse is a gate voltage Von for turning on the TFT, and the Lo level is a gate voltage for turning off the TFT.

The power supply circuit 18 has voltages Von, Voff, Vc,
Vad is output to each circuit. Vc is a voltage that determines the operating point of the liquid crystal panel 15 and is applied to the common electrode 10. Vad is a signal line drive power supply voltage, which is supplied to the signal line drive circuit 16 and the gamma correction voltage generation circuit 101.

FIG. 16 is a schematic diagram showing transmittance characteristics of a liquid crystal panel with respect to drive voltage. In FIG. 16, the drive voltage is the absolute value of the amplitude of the drive pulse, and the transmittance characteristics are normally white (NW) type in FIG. 16A and normally black (NB) in FIG. 16B depending on the configuration of the liquid crystal panel. Classified into types. The NW type and the NB type are almost the same except that the change in the transmittance with respect to the drive voltage is reversed. Therefore, the drive voltage (pixel voltage) of the pixel 13 for the NW type will be described.

The minimum practical transmittance T2H (NB
Drive voltage corresponding to T1B for the NB type is V2H (V1B for the NB type), and the maximum transmittance T1H (T2B for the NB type)
(The NB type is V2B).
V2H (V1B for NB type) is the ON voltage of the liquid crystal panel,
V1H (V2B in the case of the NB type) is set to the off voltage. Note that the driving of the liquid crystal is based on AC driving in which pulses whose polarity is alternately applied are alternately driven, so that the driving voltages V1H and V2H have the pulse amplitude. The polarity is based on the DC voltage common electrode voltage Vc. Assuming that the ideal reference voltage of the liquid crystal panel 15 is Vr, the voltages V1H, V2H, V1B, and V2B are expressed by Equation 1. V1H = Vr ± Δ1 V2H = Vr ± (Δ1 + Δ2) V2B = Vr ± Δ1 V1B = Vr ± (Δ1 + Δ2) (1) Δ2 represents a voltage area in which an image can be displayed. Is called a non-display voltage. Note that the ideal reference voltage is a theoretical value, and indicates an ideal operation reference voltage of a liquid crystal panel having no wiring capacitance or wiring resistance.

In the image signal (FIG. 14), a horizontal synchronizing signal,
Signals, including control signals such as clock signals, are input to the control circuit 19. The control circuit 19 outputs a control signal 21 for a signal line drive circuit and a control signal 20 for a scan line drive circuit including an image signal to the signal line drive circuit 16 and the scan line drive circuit 17, respectively.

An image signal input to the signal line driving circuit 16 is converted into a signal line driving voltage suitable for displaying an image. The image signal is a digital signal, whereas the signal line drive voltage is a pulse, and the amplitude of the signal line corresponds to the image signal and satisfies Equation 1 in which the polarity is inverted every horizontal scanning period with respect to the ideal reference voltage Vr. It becomes an analog value. The transmittance characteristic of the liquid crystal panel 15 is non-linear with respect to the driving voltage as shown in FIG. 16, and in order to display an appropriate image, it is necessary to convert the image signal into a signal line driving voltage. It is converted into a signal line drive voltage for correcting the transmittance characteristics. This correction is called gamma correction.

In order to convert an image signal into a signal line driving voltage, each output circuit of the signal line driving circuit 16 is provided with a digital signal.
An analog conversion circuit (hereinafter referred to as an A / D converter) is built in, and γ correction is performed using a reference voltage of the A / D converter. A plurality of γ correction voltages are used as the reference voltage. A signal line drive voltage whose polarity is inverted with respect to the ideal reference voltage Vr is required, and two sets of γ correction voltage groups of a first γ correction voltage group Vγ1 and a second γ correction voltage group Vγ2 corresponding to ± polarity are required. In the line inversion drive, only one set of the γ correction voltage group is required.

The gamma correction voltage generation circuit 101 shown in FIG. 14 calculates the first and second gamma correction voltage groups V from the signal line driving power supply voltage Vad.
γ1 and Vγ2 are output to the signal line drive circuit 16.

FIG. 17 is a schematic diagram showing the relationship between an image signal and a signal line driving voltage. FIG.
FIG. 17B illustrates the case where the signal line driving voltage is a negative polarity pulse when the pulse is a negative polarity pulse. In FIG. 17, 6
An example is a 64-bit image signal which is a bit digital signal. The A / D converter has the first γ in the case of the positive polarity.
In the case of the correction voltage group Vγ1 and the negative polarity, the image signal is converted into the signal line driving voltage using the second γ correction voltage group Vγ2 as the reference voltage.

Vγ1 is five values of Vcp1 to Vcp5, and Vγ2 is Vcm1
The case of taking five values of .about.Vcm5 is taken as an example, but it goes without saying that the number of .gamma. Correction voltages varies depending on the required image quality.

FIG. 18 shows the gamma correction voltage group generation circuit 101. The γ-correction voltage groups Vγ1 and Vγ2 are obtained from a voltage divider circuit using a series resistor as shown in the figure, but each γ-correction voltage value is calculated using Expression 2. Equation 2 is derived from Equation 1. Vcp1-Vr = Vr-Vcm1 Vcp2-Vr = Vr-Vcm2 Vcp3-Vr = Vr-Vcm3 Vcp4-Vr = Vr-Vcm4 Vcp5-Vr = Vr-Vcm5 (2)

Here, Vcpx and Vcmx of the equation (2) (x = 1 to 5)
Is referred to as a complementary relationship. In dot inversion drive,
The γ correction is performed by the γ correction voltage that satisfies the complementary relationship between Vγ1 and Vγ2.

The relationship between the ideal reference voltage Vr and the common electrode voltage Vc is such that Vr = Vc in an ideal liquid crystal panel in which the pixel voltage of each pixel 13 of the liquid crystal panel 15 is not superimposed on the unbalanced voltage due to the influence of wiring capacitance and the like. Becomes Actually, an unbalanced voltage is generated and Vr ≠ Vc, and the common electrode voltage Vc is set so as to cancel the unbalanced voltage. This is called flicker adjustment, which is performed by a semi-fixed resistor VR added to the Vc output circuit shown in FIG. Assuming that the voltage that cancels out the unbalanced voltage due to the wiring capacitance of the pixel 13 is the flicker correction voltage Vf, Equation 3 is established between the ideal reference voltage Vr and the common electrode voltage Vc. Vr = Vc ± Vf (3)

It goes without saying that Expression 2 is sufficient if it is satisfied within a range that does not cause any practical problems, and an error voltage is generated in the complementary γ correction voltage due to variations in circuit components and the like. Taking Vcp3 and Vcm3 as an example, Vcp3
−Vr = Vr−Vcm3 + δ33. δ33 to γ correction voltage Vc
This is called the tracking error between p3 and Vcm3.

Since the tracking error generates an unbalanced voltage superimposed on the liquid crystal cell, if the tracking error becomes large, flicker, flicker or display unevenness appears to degrade the image quality. In the dot inversion drive, it is important to set the tracking error of the gamma correction voltages complementary to each other to a level that does not cause any practical problem, and a highly accurate gamma correction voltage is required.

FIG. 19 is a diagram schematically showing the pixel voltages of adjacent pixels. In the case of displaying a white or black screen, the signal line Y
The pixels (Xn, Ym-1), (Xn, Ym), (Xn) disposed at the intersections of the scanning lines Xn with m-1, Ym, Ym + 1.
n, Ym + 1). Vlc1 and Vlc2 are signal line drive voltage levels, and the common pixel voltage Vc is applied to adjacent pixels.
, A pulse having an amplitude whose polarity is inverted is applied, and the pixel line pressures of the adjacent pixels are inverted in polarity. As a result, flicker, flicker, unevenness, and the like due to the unbalanced voltage are less visible than line inversion.

[0025]

As described above,
If the tracking error of the γ correction voltage is large, an unbalanced voltage is generated in the liquid crystal cell due to the γ correction, and flicker, flicker, display unevenness, etc. appear on the image, thereby deteriorating the display quality. Since the tracking error of the γ correction voltage varies depending on the γ correction voltage level, the unbalanced voltage changes depending on the level of the image signal, and cannot be canceled by flicker adjustment.

In a liquid crystal display device of 256 gradation display, Δ
Under the condition of 2 = 3.5 V (Δ2 of a general TFT type liquid crystal panel is around 3.5 V), the allowable tracking error level is the resolution of the liquid crystal display device of 3.5 V /
At least ± 13.7 mV from 256 ≒ 13.7 mV
The following are required: Therefore, unless a high-precision voltage-dividing resistor (for example, a resistor having a tolerance of 0.3% or less as described later) is used, a high-precision γ correction voltage with a small tracking error cannot be obtained. Even when the pixel voltage fluctuates by about 8 mV, the pixel voltage may be visually observed. Therefore, in order to realize high display quality, a more accurate γ correction voltage is required.

Since the γ-correction voltage generating circuit 101 connects a large number of resistors in series, a cumulative error of the resistors occurs, and a relatively complicated calculation is required for the simulation of the γ-correction voltage. γ
The correction voltage value is often determined by checking the image, and the simulation of the γ correction voltage in consideration of the accumulated error of the resistance is repeatedly performed, which takes time and effort. The larger the screen size, the higher the gradation display, and the greater the number of γ correction voltages, in other words, a liquid crystal display device of high quality display requires a high precision γ correction voltage.

The present invention has been made in view of such a conventional problem, and generates a high-precision γ-correction voltage required for dot inversion driving by relatively simple means, so that flicker, unevenness, etc. It is an object of the present invention to provide a liquid crystal display device capable of displaying high quality image at low cost by remarkably reducing image quality deterioration.

[0029]

According to the first aspect of the present invention, a plurality of signal lines and scanning lines are provided to cross each other, and TFTs are arranged in a matrix at each intersection of the signal lines and the scanning lines. A liquid crystal panel, a scanning line driving circuit for driving a scanning line of the liquid crystal panel, a reference voltage output circuit for outputting a reference voltage based on an ideal operation reference voltage Vr of the liquid crystal panel, and an output from the reference voltage output circuit. First and second correction voltage groups Vγ for positive and negative polarities based on a reference voltage
1, a γ-correction voltage generating circuit for generating Vγ2, and the correction voltages of the first and second γ-correction voltage groups as reference voltages.
A signal line drive circuit that includes a digital-to-analog converter that converts a digital image signal into a signal line drive voltage, and drives a signal line of the liquid crystal panel with the signal line drive voltage;
It is characterized by having.

According to a second aspect of the present invention, there is provided a liquid crystal panel in which a plurality of signal lines and scanning lines are provided to intersect with each other, and TFTs are arranged in a matrix at each intersection of the signal lines and the scanning lines. A scanning line driving circuit for driving a scanning line of the panel; a reference voltage output circuit for outputting first to fourth reference voltages Vr1 to Vr4 tracked with reference to an ideal operation reference voltage Vr of the liquid crystal panel; A first gamma correction voltage group determined by first and second reference voltages output from the voltage output circuit, and a gamma correction voltage that generates a second gamma correction voltage group determined by the third and fourth reference voltages A generating circuit; and a digital-to-analog converter for converting a digital image signal into a signal line driving voltage using the correction voltages of the first and second γ correction voltage groups as a reference voltage. Characterized by a signal line driver circuit for driving the signal lines, the equipped.

According to a third aspect of the present invention, in the liquid crystal display device according to the second aspect, the reference voltage output circuit uses the following equation assuming that Δ1 is a non-display voltage and Δ2 is a display effective voltage: Vr1 = Vr + Δ1 Vr2 = Vr1 + Δ2 Vr3 = Vr−Δ1 Vr4 = Vr3−Δ2 Vr2>Vr1>Vr>Vr3> Vr4 Vr = (Vr2−Vr4) / 2 = Δ1 + Δ2 Δ = Δ1 + Δ2 The first to fourth reference voltages V that are tracked are satisfied.
r1 to Vr4 are output.

The invention of claim 4 of the present application is directed to claim 2 or 3
Wherein the reference voltage output circuit includes a second and a third reference voltage output circuit for generating a second and a third reference voltage, and a display effective voltage generation circuit for generating a display effective voltage for a liquid crystal panel. And first and fourth reference voltage output circuits for outputting a first reference voltage and a fourth reference voltage based on the second and third reference voltages and the display effective voltage. I do.

The invention of claim 5 of the present application is directed to claim 2 or 3
In the liquid crystal display device, the reference voltage output circuit includes first and fourth reference voltage output circuits for generating first and fourth reference voltages, and a display effective voltage generation circuit for generating a display effective voltage for a liquid crystal panel. And a second and third reference voltage output circuit for outputting a second reference voltage and a third reference voltage based on the first and fourth reference voltages and the display effective voltage. I do.

The invention of claim 6 of the present application is directed to claim 2 or 3
In the liquid crystal display device, the reference voltage output circuit includes an ideal reference voltage generation circuit that generates a reason reference voltage of the liquid crystal panel, a non-display voltage generation circuit that generates a non-display voltage of the liquid crystal panel, and a display effective voltage generation circuit. A first to a fourth reference voltage generation output circuit for generating first to fourth reference voltages from an ideal reference voltage, a non-display voltage, and a display effective voltage;
It is characterized by having.

According to a seventh aspect of the present invention, in the liquid crystal display device of the first aspect, the reference voltage output circuit includes the first voltage output circuit.
And a third reference voltage, and a center voltage output circuit that outputs a center voltage substantially matching an ideal reference voltage; and the second and fourth reference voltage output circuits. And

According to an eighth aspect of the present invention, in the liquid crystal display device of the seventh aspect, a signal line drive power supply voltage of the signal line drive circuit is the second reference voltage, and the fourth reference voltage is a ground potential. It is characterized by the following.

According to a ninth aspect of the present invention, there is provided a liquid crystal display device according to any one of the first to eighth aspects.

[0038]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a liquid crystal display device in a liquid crystal display device according to each embodiment of the present invention will be described with reference to the drawings. The same parts as those of the configuration of the conventional liquid crystal display device are denoted by the same reference numerals, and description thereof will be omitted.

(Embodiment 1) FIG. 1 shows a configuration diagram of a liquid crystal display device according to Embodiment 1. The liquid crystal display device of FIG. 1 is a liquid crystal display device using dot inversion driving based on line-sequential driving, like the conventional liquid crystal display device shown in FIG. 1, a liquid crystal panel 15, a signal line driving circuit 16, a scanning line driving circuit 17, a power supply circuit 18, a control circuit 1
9 operates with basically the same function as the liquid crystal display device of FIG. In the figure, a reference voltage output circuit 22 is a reference voltage output circuit that outputs a reference voltage based on the voltage Vad of the Vad output circuit.
3 is based on the reference voltage generated by the reference voltage,
This is a Vγ voltage generation circuit that generates the group γ correction voltages Vγ1 and Vγ2.

The reference voltage output circuit 22 includes, for example, first to fourth reference voltage output circuits 30, 31, 32, and 33 for generating first to fourth reference voltages Vr2, Vr3, and Vr4, respectively. The following equation 4 is a theoretical equation that determines the first to fourth reference voltages Vr1 to Vr4. Vr1 = Vr + Δ1 Vr2 = Vr1 + Δ2 Vr3 = Vr−Δ1 Vr4 = Vr3−Δ2 Vr2>Vr1>Vr>Vr3> Vr4 Vr = (Vr2−Vr4) / 2 = Δ1 + Δ2 Δ = Δ1 + Δ2... Where Δ1 is the non-display voltage and Δ2 is the display effective voltage (see FIG. 16). Equation 4 does not include variations in circuit components and fluctuations in voltage due to the operating environment.
In the case where the voltage fluctuation is included, the following equation 5 is applied. Vr1 + Vr3 = 2 · Vr ± δ1 Vr2 + Vr4 = 2 · Vr ± δ2 (Vr2-Vr1) + (Vr4-Vr3) = ± δ3 (5)

Δ1 is a tracking error between the first and third reference voltages, δ2 is a tracking error between the second and fourth reference voltages, and the display effective voltage Δ2 is Vr2-Vr1 or Vr3-.
Vr4, and δ3 is defined as a tracking error with respect to the display effective voltage of the liquid crystal panel. If a tracking error exceeding a practical level occurs, flicker and display unevenness are visually recognized, and the image quality deteriorates.

The tracking error value at a practical level is
Although it depends on the display performance of the liquid crystal display device, at least the resolution of the signal line drive voltage (Δ2 / the number of displayable gradations) is required, and it is required to be at least 10 mV or less (8 mV as described above).
Is sometimes visually observed as display unevenness). Tracking of the first to fourth reference voltages means that the tracking errors δ1, δ2, and δ3 are tracking error values equal to or lower than a practical level. Equation 6 summarizes Equations 2 and 4. Vr1 + Vr3 = Vcp5 + Vcm5 = 2.Vr + .delta.1 Vr2 + Vr4 = Vcp1 + Vcm1 = 2.Vr + .delta.2 Vr2-Vr1 + (Vr4-Vr3) =. Delta.3 Vcp2 + Vcm2 = 2.Vr + .delta.

The first to fourth reference voltages satisfying Expression 6 are given by
It is assumed that tracking is performed with reference to the ideal reference voltage Vr. Naturally, the tracking errors δ1, δ2, δ3,
Δ22, Δ33, and Δ44 are below the practical level. Note that δ
22, δ33 and δ44 are also called tracking errors of the γ correction voltage.

FIG. 2A shows a reference voltage generating circuit 22A having a simple configuration. Reference numerals 30 to 33 denote first to fourth reference voltage output circuits, which output the first to fourth reference voltages obtained by the voltage dividing resistors R1a to R4b via buffers (voltage followers) of operational amplifiers Op1 to Op4. Is what you do.

The tracking errors of the first to fourth reference voltages shown in FIG. 2 are substantially caused by the output voltage deviation of the operational amplifier and the errors of the resistors R1a to R4b. Even an inexpensive standard operational amplifier IC in which two to six operational amplifiers are formed on the same chip has a performance with an output deviation of several mV or less and the output voltage deviation of each operational amplifier shows similar characteristics. The occurrence of errors is suppressed. Therefore, the tracking error of the first to fourth reference voltages is determined by the voltage dividing resistor R1.
It depends on the precision of a to R4b. The first to fourth reference voltages may be generated by a reference voltage generation circuit 22B by a voltage dividing circuit 3 using a series resistor, as shown in FIG. 2B.

In many cases, the γ correction voltage is changed for each model in order to obtain the display characteristics of an image suitable for the user's preference. However, the first to fourth reference voltages Vr1 to Vr4 are determined by the liquid crystal material, and Not changed much except when changing the material. Therefore, the voltage dividing resistor of FIG. 2 can be shared with other types of liquid crystal display devices, and even if a high-precision (0.1% class) custom resistor is used, the effect of cost increase is small.

FIG. 3 shows an example of a circuit diagram of the gamma correction voltage generation circuit 23. The γ-correction voltage generation circuit 23A includes voltage dividing resistors Rcp2 to Rcp5 inserted between the first and second reference voltages Vr1 and Vr2.
Generates a first γ correction voltage group Vγ1 and a voltage dividing resistor Rcm2 inserted between the third and fourth reference voltages Vr3 and Vr4.
RRcm5 generates a second γ correction voltage group Vγ2. The correction voltages Vcp1 to Vcp5 and Vcm1 to Vcm5 are set so as to satisfy Expression 5.

Since Vγ1 and Vγ2 are determined independently of each other, the cumulative resistance error due to the voltage dividing resistor is halved from the γ correction voltage of the conventional liquid crystal display device (5/5 in the first embodiment).
12) The simulation of the γ correction voltage is facilitated.

FIG. 4 shows a simulation result of the γ correction voltage performed on the conventional liquid crystal display device (FIG. 14), and FIG. 5 shows a simulation result of the γ correction voltage performed on the liquid crystal display device of the first embodiment (FIG. 1). In this simulation and the simulation described below, 25
A liquid crystal display device having six gradations is taken as an example, and the following conditions are used. The tolerance of the voltage dividing resistor excluding Rcp5 and Rcm5 was 1%, and the tolerance of Rcp5 and Rcm5 was 0.5%.
The same error was applied to the voltage dividing resistors of the same sign shown in FIG.
(Conditions) 1. Voltage: Vad = 9.40V, Vr = 4.7V, Δ1 = 0.817
V, Δ2 = 3.684 V2. Divided resistance value (theoretical value): The resistance value of the conventional example is Rcp1 = Rcm
1 = 100Ω, Rcp2 = Rcm2 = 750Ω, Rcp3 = Rcm3 = 265Ω, Rcp4
= Rcm4 = 225 Ω, Rcp5 = Rcm5 = 610 Ω, Rc = 820 Ω, and the resistance values of the first embodiment are Rcp1, Rcm1, Rcp5,
Except for Rcm5 and Rc, the resistance is the same as the conventional resistance value. 3. First to fourth reference voltage values: Vr1 = Vcp5 = 5.869V,
Vr2 = 9.788 V, Vr3 = Vcm5 = 4.131 V, Vr4 = Vcm1 =
The tracking error is set to 0 at 0.212 V. 4. Resolution required for liquid crystal display device: ± 3.684 / 256 =
± 14.3mV

FIG. 4 shows a tracking error of the γ correction voltage generated in the conventional liquid crystal display device, and FIG. 5 shows a tracking error of the γ correction voltage generated in the liquid crystal display device of the first embodiment. The theoretical values in FIGS. 4 and 5 are obtained by setting the error of the voltage dividing resistor to 0.
In the correction voltage, the calculated value indicates a γ correction voltage including a voltage dividing resistance error (indicated by a resistance error in the table) and its tracking error. In FIG. 4, when the resistance error is 0.3%, δ
1 = 1.19 mV, δ2 = 10.93 mV, δ3 = 1
2.1mV, δ22 = 10.93mV, δ33 = δ44
= 10.93 mV. Further, in FIG. 5, when the resistance error is 0.5%, δ1 = δ2 = 0.0 mV, δ22 =
1.0 mV, δ33 = δ44 = −6.27 mV.

FIGS. 4 and 5 show that the tracking error of the liquid crystal display device according to the first embodiment is about half or less of that of the conventional liquid crystal display device. In a conventional liquid crystal display device, a tracking error of a practical level cannot be obtained unless resistors having a tolerance of ± 0.3% class or less are used, and 64 gradation display (± 3.684 / 64 = ± 28.6 mV resolution) is not possible. This is not a practical level of tracking error for a liquid crystal display device.

On the other hand, the tracking error of the first embodiment is almost within the practical level, and is a value that does not cause any trouble in the 64-gradation display. If a resistor having a tolerance of ± 0.5% class is used, the tracking error becomes practically negligible.

FIG. 6 shows a simulation result of the γ correction voltage including the tracking error of the first to fourth reference voltages. In the calculation, the allowable error range of Rcp2 to Rcp5 and Rcm2 to Rcm5 is ± 0.5%, the allowable error range of the resistors R1a, R1b, R3a, R3b in FIG. 2 is ± 0.1%, and the allowable error range of R2a, R2b, R4a, R4b is The range was ± 0.5%. FIG. 6 shows that a tracking error of the γ correction voltage at a practical level can be obtained. Rcp2 ~
Even when the allowable error range of Rcp5, Rcm2 to Rcm5 and resistors R1a, R1b, R3a, R3b is ± 1%, δ1 = −9.1 mV, δ2 = 7.8
mV, δ3 = 16.9mV, δ22 = -7.1mV, δ33 = -20.1mV, δ44
It takes a value of −22.1 mV and can be practically used for a liquid crystal display device of 64 gradation display.

As described above, in the present embodiment,
Using a low-cost and simple configuration of a reference voltage output circuit and a γ correction voltage generation circuit, a γ correction voltage group Vγ1 from the first and second reference voltages and a γ correction voltage group Vγ from the third and fourth reference voltages
With the configuration for obtaining γ2, a highly accurate γ correction voltage can be obtained, and a liquid crystal display device with high display quality can be realized.

(Embodiment 2) Embodiment 2 of the present invention will be described. The overall configuration of the present embodiment is the same as that of the first embodiment shown in FIG. 1, except for the configuration of the reference voltage output circuit. FIG. 7 shows a first block diagram of reference voltage output circuit 22C of the liquid crystal display device according to the second embodiment. The reference voltage output circuit 22C of FIG. 7 includes a display effective voltage Δ in addition to the second and third reference voltage output circuits 31 and 32.
2 and a first and fourth reference voltage output circuits 30b and 33b. The first and fourth reference voltage output circuits 30b and 33b are composed of differential amplifier circuits. First and fourth reference voltage output circuits 30b, 33
b is the second and third reference voltages Vr2, Vr3 and the display effective voltage Δ
2 to obtain the first and fourth reference voltages by a differential amplifier circuit. The circuit shown in FIG. 3 is used as the gamma correction voltage generation circuit 23.

FIG. 9 is a circuit diagram of the reference voltage output circuit 22C of FIG. The first and fourth reference voltage output circuits 30b and 33b are differential amplifier circuits having an amplification degree of 1. If the output deviation of the differential amplifier circuit is ignored, 30b becomes Vr1 = Vr2-Δ2,
Since 33b outputs Vr4 = Vr3-Δ2, there is an advantage that the tracking error δ3 (Vr2-Vr1 + (Vr4-Vr3)) can be made smaller than in the first embodiment (FIG. 5).
Δ3 takes the largest value among the tracking errors as shown in FIG.

The tracking error shown in FIG.
It is determined by R2b, R3a, R3b, R5a, R5b, R7, R8, R10, and R11, and the accuracy and effect of the gamma correction voltage are the same as in the first embodiment.

FIG. 9 is a block diagram of a reference voltage output circuit 22D according to a second example of the liquid crystal display device according to the second embodiment. The reference voltage output circuit 22D shown in FIG. 9 includes first and fourth reference voltage output circuits 30, 31, a Δ2 generation circuit 35, and second and third reference voltage output circuits 31b, 32b. The first and third reference voltage output circuits 31b,
Reference numeral 32b denotes an addition circuit for obtaining first and third reference voltages by adding the first and fourth reference voltages and the display effective voltage Δ2. If the output deviation of the adder circuit is ignored,
Vr3 = Vr1 + Δ
Since 2 and Vr3 = Vr4 + Δ2 are output, there is an advantage that the tracking error δ3 can be made smaller than in the first embodiment, as in the reference voltage output circuit of FIG.

(Embodiment 3) Embodiment 3 of the present invention will be described. FIG. 10 is a block diagram of a reference voltage output circuit 22E of the liquid crystal display device according to the third embodiment.
The reference voltage output circuit 22E of FIG.
6, Δ1 output circuit 37, Δ2 output circuit 35, Vc output circuit 38, and first to fourth reference voltage output circuits 30c, 31
c, 32c, and 33c. This reference voltage output circuit 22E has an ideal reference voltage Vr and a display effective voltage Δ2.
And the non-display voltage Δ1 are generated from the Vr output circuit 36, Δ2 output circuit 35, and Δ1 output circuit 37, respectively, and the first to fourth reference voltages are output based on Equation 3. The first reference voltage output circuit 30c is an addition circuit that adds Vr and Δ1, and the second reference voltage output circuit 31c is a circuit that adds Vr1 and Δ1.
Addition circuit for adding 2, third reference voltage output circuit 32c
Is a subtraction circuit for subtracting Δ1 from Vr, and the fourth reference voltage output circuit 33c is a subtraction circuit for subtracting Δ2 from Vr3. The addition circuit and the subtraction circuit (differential amplification circuit) can be easily realized by an operational amplifier.

The reference voltage output circuit shown in FIG.
Since the first to fourth reference voltages are generated from Δ2 and Δ2, an excellent effect that tracking errors δ1, δ2, and δ3 can be made smaller than in the first and second embodiments can be obtained. Therefore, it is suitable for a power supply such as a liquid crystal display device that requires extremely high image quality and an evaluation tester for a liquid crystal panel.

(Fourth Embodiment) A fourth embodiment of the present invention will be described. FIG. 11 shows a configuration diagram of a reference voltage output circuit 22F of the liquid crystal display device according to the fourth embodiment. Figure 1
The one reference voltage output circuit 22E includes a second reference voltage output circuit 31d, a fourth reference voltage output circuit 33d, and a center voltage output circuit 39. The center voltage output circuit 39 of the fourth embodiment outputs the center voltage Vrc obtained by integrating the first and third reference voltages of the first embodiment as a reference voltage. If the error due to the electronic circuit is ignored, the center voltage Vrc matches the ideal reference voltage Vr as shown in Expression 8.

FIG. 12 shows a first circuit diagram of a gamma correction voltage generation circuit 23B used in the liquid crystal display device according to the fourth embodiment. FIG. 12 shows a center voltage (Vrc) output circuit 4.
1 is also described. The second and fourth reference voltages Vr2 and Vr4 and the center voltage Vrc are used. The γ-correction voltage generation circuit 23B of FIG. 12 includes resistors Rc1 to Rcp5 shown in FIG.
Is a circuit in which the resistor Rc2 is inserted into the voltage dividing resistors Rcm1 to Rcm5.

The tracking error of the fourth embodiment is expressed by the following equation (6).
The reference voltage Vrc which is expressed by Expression 9 and satisfies Expression 9 instead of
It is assumed that Vr2 and Vr4 are tracked with reference to the ideal reference voltage Vr. Vrc-Vr = .delta.1a Vr2 + Vr4 = Vcp1 + Vcm1 = 2.Vr + .delta.2 Vr2-Vr + (Vr4-Vr) =. Delta.3b Vcp2 + Vcm2 = 2.Vr + .delta.22 Vcp3 + Vcm3 = 2.Vr + .delta. Of course, the tracking errors δ1a, δ2, δ3b, δ
22 to δ55 must be below the practical level.

In the fourth embodiment, the accumulated error due to the voltage dividing resistor is slightly increased, and a high-accuracy center voltage Vrc is required to match the ideal reference voltage. Although the tolerance between the voltage dividing resistors R6a and R6b is required to be 0.1% or less (in the case of 256 gradation display), the number of reference voltages is small, and the reference voltage output circuit can be simplified.

In FIG. 12, signal line drive power supply voltage Vad
Is the second reference voltage, and the fourth reference voltage is the ground potential (0
V). In this case, the reference voltage output circuit can be constituted only by the center voltage output circuit, and the reference voltage output circuit can be further simplified.
Needless to say, ad is required.

The above description is based on the first γ correction voltage group V
The case where the number of γ-correction voltages of γ1 and the second γ-correction voltage group Vγ2 is 5 has been described as an example. However, even if the number of γ-voltages changes, only the tracking error of the complementary γ-correction voltages increases. Demonstrate the effect of.

The invention described above is also applicable to a capacitively coupled liquid crystal panel. FIG. 13 shows a schematic equivalent circuit of a capacitively coupled liquid crystal panel. As shown in FIG. 13, an image electrode and a drain are provided at each intersection of a liquid crystal panel with a plurality of signal lines and a scanning line except one of the first stage or the last stage (X0 shown in FIG. 13) which does not contribute to image display. A TFT connected to the pixel electrode is arranged, and a scanning line in a preceding or subsequent stage is connected to the TF.
A liquid crystal using a capacitively-coupled liquid crystal panel which is coupled to a drain of T with a predetermined capacitance (Cst), provided with a counter electrode facing the pixel electrode, and encapsulates liquid crystal between the pixel electrode and the counter electrode to form a pixel. It is added that the present invention can be applied to a display device. The reference numerals used in FIG. 13 are the same as those in FIG. X1 to X3 are scanning lines that contribute to display, and Y1 is a signal line. It should be noted that the common electrode 10 shown includes a counter electrode. FIG. 13B is a drive voltage waveform diagram illustrating an example of capacitively coupled liquid crystal panel line inversion driving. Sy indicates a signal line driving voltage, and Sx1, Sx2, and Sx3 indicate scanning line driving voltages. Va and Vb are voltage levels of the signal line driving voltage, and Vgon, Vgoff, Vg1, and Vg2 are voltage levels of the scanning line driving voltage.

A number of documents relating to capacitively-coupled liquid crystal panels (for example, Patent Nos. 2883291 and 30
No. 64702), which is described in detail.
The capacitively coupled liquid crystal panel is driven by applying a driving voltage to the liquid crystal cell (LC) from the scanning line at the preceding stage (FIG. 13) or the subsequent stage (not shown) by the coupling capacitance (Cst). There is a feature that the amplitude of the output voltage of the drive circuit can be reduced.

In the TFT type liquid crystal panel having the structure shown in FIG. 15, the dot inversion driving can be realized relatively easily.
In a capacitively coupled liquid crystal panel, performing a dot inversion drive requires a complicated drive circuit, and the liquid crystal panel is generally driven by a line inversion drive taking advantage of its features.

However, as the screen size (15-inch diagonal class or larger) increases, flicker and unevenness due to unbalanced voltage become noticeable and the image quality deteriorates. Therefore, a driving method (pseudo dot) in which pixel voltages having different polarities are applied to adjacent pixels. Inversion drive) is being used. Capacitively-coupled liquid crystal panels can be realized by changing the polarity of the signal line drive voltage and the scan line drive voltage so that the voltage levels of the signal line drive voltage and the scan line drive voltage are applied to adjacent pixels with pixel voltages of different polarities. When this is done, it is easily inferred (based on the driving voltage waveform in FIG. 13B). However, since there are a large number of documents relating to a driving method of a liquid crystal display device and a liquid crystal panel using this driving method, a detailed description is given. Description is omitted. When the pseudo dot inversion drive is used, the first and second correction voltage groups Vγ1 and Vγ2
A gamma correction circuit that generates
The contents described in can be similarly applied.

[0071]

As is apparent from the above, according to the present invention, a liquid crystal display device with high display quality can be realized by a high-precision gamma correction voltage having a small tracking error by the reference voltage output circuit and the gamma correction voltage generation circuit. it can. Further, the simulation of the γ correction voltage can be easily performed.

According to the first to fifth, seventh and eighth aspects of the present invention,
By using a reference voltage output circuit with a relatively simple configuration, a low-cost and high-quality liquid crystal display device can be realized. According to the invention of claim 6, it can be used for an evaluation test or the like of a liquid crystal display device or a liquid crystal panel which requires particularly high image quality.

Also, large screen size, high gradation display, and γ
The effect is even greater for a liquid crystal display device having a large number of correction voltages.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a liquid crystal display device according to Embodiment 1 of the present invention.

FIG. 2 is an example of a reference voltage output circuit diagram of the liquid crystal display device in Embodiment 1 of the present invention.

FIG. 3 is a gamma correction voltage generation circuit of the liquid crystal display device according to the first embodiment of the present invention.

FIG. 4 is a simulation result of a γ correction voltage for a conventional liquid crystal display device.

FIG. 5 is a simulation result of a γ correction voltage for the liquid crystal display device of Embodiment 1.

FIG. 6 is a simulation result of a γ correction voltage including tracking errors of first to fourth reference voltages.

FIG. 7 is a first block diagram of a reference voltage output circuit of a liquid crystal display device according to Embodiment 2 of the present invention.

FIG. 8 is a reference voltage output circuit diagram of a liquid crystal display device according to Embodiment 2 of the present invention.

FIG. 9 is a second block diagram of a reference voltage output circuit of the liquid crystal display device in Embodiment 2 of the present invention.

FIG. 10 is a block diagram of a reference voltage output circuit of a liquid crystal display device according to Embodiment 3 of the present invention.

FIG. 11 is a first configuration diagram illustrating a reference voltage output circuit of a liquid crystal display device in Embodiment 4 of the present invention.

FIG. 12 is a circuit diagram showing a reference voltage output circuit and a gamma correction voltage generation circuit of a liquid crystal display device according to a fourth embodiment of the present invention.

FIG. 13 is a diagram schematically illustrating a configuration of a capacitively coupled liquid crystal panel and an example of a driving waveform thereof.

FIG. 14 is a configuration diagram of a conventional liquid crystal display device.

FIG. 15 is a diagram showing an equivalent circuit of a pixel of a conventional liquid crystal display device.

FIG. 16 is a schematic diagram showing transmittance characteristics of a liquid crystal panel.

FIG. 17 is a schematic diagram illustrating a relationship between an image signal and a signal line driving voltage.

FIG. 18 shows a gamma correction voltage generation circuit used in a conventional liquid crystal display device.

FIG. 19 is a schematic diagram illustrating pixel voltages of adjacent pixels.

[Explanation of symbols]

Reference Signs List 10 common electrode 11 scanning line 12 signal line 13 pixel 15 liquid crystal panel 16 signal line driving circuit 17 scanning line driving circuit 18 power supply circuit 19 control circuit 20 control signal of scanning line driving circuit 21 control signal of signal line driving circuit 22 reference voltage output Circuit 23 γ correction voltage generation circuit 30, 30b, 30c First reference voltage output circuit 31, 31b, 31c Second reference voltage output circuit 32, 32b, 32c Third reference voltage output circuit 33, 33b, 33c Fourth Reference voltage output circuit 34 Second voltage divider circuit of the first embodiment 35 Δ2 generation circuit 36 Vr output circuit 37 Δ1 generation circuit 39, 41 Center voltage output circuit 101 γ correction voltage generation circuit VR Semi-fixed resistor D TFT gate G TFT gate S TFT source LC Liquid crystal cell Clc Pixel capacitance Voff TFT gate-off voltage Von TFT gate-on voltage Vc Common electrode voltage Vr1 to Vr4 First to fourth reference voltage Vrc Center voltage Vγ1 First correction voltage group Vγ2 Second correction voltage group Δ1 Non-display voltage Δ2 Display effective voltage Vcp1 to Vcp5, Vcm1 To Vcm5 γ correction voltage 1V Vertical scanning period Vf Flicker correction voltage Vad Signal line drive power supply voltage Rcp1 to Rcp5, Rcm1 to Rcm5, Rc, Rc1, Rc2, R1a to R6b
, Rr1 to Rr4, R1 to R12 Resistance Op1 to Op6 Operational amplifier C1 to C6 Capacitor 1H Horizontal scanning period Cst Coupling capacitance Va, Vb Signal line driving voltage level Vgon, Vgoff, Vg1, Vg2 Scanning line driving voltage level GND Ground potential

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H093 NA16 NA31 NA58 NC34 ND10 5C006 AC21 AC26 AF46 AF83 BB16 BC06 BC12 BC16 BF43 EC05 EC13 FA23 FA56 5C080 AA10 BB05 DD06 DD30 FF07 JJ02 JJ03 JJ04 JJ05 KK02 KK07

Claims (9)

[Claims] 1. A liquid crystal panel having a plurality of signal lines and scanning lines intersecting each other, and TFTs arranged in a matrix at each intersection of the signal lines and scanning lines; and driving the scanning lines of the liquid crystal panel. A scanning line driving circuit, a reference voltage output circuit that outputs a reference voltage based on an ideal operation reference voltage Vr of the liquid crystal panel, and a positive and negative polarity based on the reference voltage output from the reference voltage output circuit. 1st and 2nd correction voltage group V
a γ-correction voltage generation circuit that generates γ1 and Vγ2; and a digital-to-analog converter that converts a digital image signal into a signal line drive voltage using the correction voltages of the first and second γ-correction voltage groups as reference voltages, A signal line driving circuit for driving signal lines of the liquid crystal panel with a signal line driving voltage. 2. A liquid crystal panel in which a plurality of signal lines and scanning lines are provided so as to intersect with each other, and TFTs are arranged in a matrix at each intersection of the signal lines and the scanning lines; and the scanning lines of the liquid crystal panel are driven. A scanning line driving circuit, a reference voltage output circuit that outputs first to fourth reference voltages Vr1 to Vr4 tracked with reference to an ideal operation reference voltage Vr of the liquid crystal panel, and an output from the reference voltage output circuit. A γ-correction voltage generation circuit that generates a first γ-correction voltage group determined by first and second reference voltages, and a second γ-correction voltage group determined by the third and fourth reference voltages; A digital-to-analog converter for converting a digital image signal into a signal line drive voltage using the correction voltage of the second γ correction voltage group as a reference voltage, and a signal for driving a signal line of the liquid crystal panel by the signal line drive voltage. A liquid crystal display device comprising: a line driving circuit. 3. The reference voltage output circuit, wherein Δ1 is a non-display voltage and Δ2 is a display effective voltage: Vr1 = Vr + Δ1 Vr2 = Vr1 + Δ2 Vr3 = Vr−Δ1 Vr4 = Vr3−Δ2 Vr4 Vr = (Vr2−Vr4) / 2 = Δ1 + Δ2 Δ = Δ1 + Δ2, and the tracked first to fourth reference voltages V
3. The liquid crystal display device according to claim 2, wherein the liquid crystal display device outputs r1 to Vr4. 4. A reference voltage output circuit comprising: a second and a third reference voltage output circuit for generating a second and a third reference voltage; and a display effective voltage generation circuit for generating a display effective voltage of a liquid crystal panel. , The second and third reference voltages and the display effective voltage,
4. The liquid crystal display device according to claim 2, further comprising: a first and a fourth reference voltage output circuit that outputs a reference voltage and a fourth reference voltage. 5. A reference voltage output circuit comprising: first and fourth reference voltage output circuits for generating first and fourth reference voltages; and a display effective voltage generation circuit for generating a display effective voltage for a liquid crystal panel. The first and fourth reference voltages and the display effective voltage,
4. The liquid crystal display device according to claim 2, further comprising a second and a third reference voltage output circuit for outputting a reference voltage and a third reference voltage. 6. A reference voltage output circuit, comprising: an ideal reference voltage generation circuit for generating a reason reference voltage of a liquid crystal panel; a non-display voltage generation circuit for generating a non-display voltage of the liquid crystal panel; and a display effective voltage generation circuit. From the ideal reference voltage, non-display voltage and display effective voltage,
And a first to fourth reference voltage generation output circuit for generating a fourth reference voltage from the first to fourth reference voltages.
Or the liquid crystal display device according to 3. 7. A reference voltage output circuit, comprising: a center voltage output circuit that outputs a center voltage substantially equal to an ideal reference voltage by using the first and third reference voltages as one; The liquid crystal display device according to claim 1, further comprising a fourth reference voltage output circuit. 8. The liquid crystal display device according to claim 7, wherein a signal line drive power supply voltage of the signal line drive circuit is the second reference voltage, and the fourth reference voltage is a ground potential. 9. An image display application device comprising the liquid crystal display device according to claim 1. Description: