CN109979406B - Driving circuit, display device and voltage compensation control method - Google Patents
Driving circuit, display device and voltage compensation control method Download PDFInfo
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- CN109979406B CN109979406B CN201910241129.4A CN201910241129A CN109979406B CN 109979406 B CN109979406 B CN 109979406B CN 201910241129 A CN201910241129 A CN 201910241129A CN 109979406 B CN109979406 B CN 109979406B
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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Abstract
The application relates to a driving circuit, a display device and a voltage compensation control method. Wherein, drive circuit includes: the device comprises a compensation voltage generating circuit, a digital-to-analog conversion circuit, an operational amplification circuit and a buffer; the digital-to-analog conversion circuit is used for acquiring an original driving signal output by the time schedule controller, performing digital-to-analog conversion on the original driving signal and outputting the converted driving signal to the in-phase input end of the operational amplification circuit; the compensation voltage generating circuit is used for generating compensation voltage according to the polarity and the gray-scale value of the original driving signal and outputting the compensation voltage to the non-inverting input end of the operational amplifying circuit, and the compensation voltage is used for compensating pixel electrode voltage drop caused by high-low level change of a scanning voltage signal of the display panel; the output end of the operational amplification circuit is connected with the non-inverting input end of the buffer, the inverting input end of the buffer is connected with the output end of the buffer, and the output end of the buffer is used for being connected with a data line of the display panel. When the display is driven by the driving signal provided by the driving circuit, the display does not flicker.
Description
Technical Field
The present invention relates to the field of display driving technologies, and in particular, to a driving circuit, a display device, and a voltage compensation control method.
Background
The statements herein merely provide background information related to the present application and may not necessarily constitute prior art.
A TFT-LCD (Thin Film Transistor Liquid Crystal Display) is one of the major types of flat panel displays, and has become an important Display platform in modern IT and video products. The TFT-LCD Panel 1 is formed by connecting a Printed Circuit Board (PCB) 3, a Source Driver IC 2 and a liquid crystal CELL (LCD CELL) by a bonding technique to form a TFT-LCD display system (as shown in fig. 1); the TFT-LCD uses the data driving chip 2 as data driving to supply data voltage signals to data lines of the display panel 1, and uses the scanning chip to supply scanning voltage signals to scanning lines of the display panel 1. Due to the effect of the gate-source parasitic capacitance Cgs, when the scanning voltage signal is converted from a high level to a low level, the pixel electrode voltage Vs corresponding to the source electrode is reduced to a certain extent compared with the pixel electrode voltage Vs when the transistor is turned on, so that the pixel voltage loaded at two ends of the liquid crystal is unstable, and the display panel flickers when displaying. In order to solve the problem, at present, the common voltage Vcom is lowered by adjustment, so that the pixel voltages Vs-Vcom at both ends of the liquid crystal can be kept consistent when the scanning voltage signal is lowered from high level to low level, but with this design of lowering the common voltage by a certain value, when the pixel electrode voltage Vs is changed, since the magnitude of the parasitic capacitance Clc is influenced by the pixel voltages Vs-Vcom at both ends of the liquid crystal, Δ V will change, and Vs-Vcom will cause that the synchronous adjustment cannot be kept consistent, and the display will flicker.
Disclosure of Invention
Based on this, it is necessary to provide a driving circuit, a display device, and a voltage compensation control method for solving the problem of flicker in display due to the fact that the pixel voltage Vs-Vcom cannot be synchronously adjusted with Vs variation in the exemplary technique.
In one aspect, an embodiment of the present invention provides a driving circuit, including: the device comprises a compensation voltage generating circuit, a digital-to-analog conversion circuit, an operational amplification circuit and a buffer;
the digital-to-analog conversion circuit is used for acquiring an original driving signal output by the time schedule controller, performing digital-to-analog conversion on the original driving signal and outputting the converted driving signal to the in-phase input end of the operational amplification circuit;
the compensation voltage generating circuit is used for generating compensation voltage according to the polarity and the gray-scale value of the original driving signal and outputting the compensation voltage to the non-inverting input end of the operational amplifying circuit, wherein the compensation voltage is used for compensating pixel electrode voltage drop caused by high-low level change of a scanning voltage signal of the display panel;
the output end of the operational amplification circuit is respectively connected with the inverting input end of the operational amplification circuit and the non-inverting input end of the buffer;
the inverting input end of the buffer is connected with the output end of the buffer, and the output end of the buffer is used for being connected with the data line of the display panel.
In one embodiment, the compensation voltage generation circuit is configured to look up a first relation table according to the polarity and the gray scale value of the original driving signal to generate the compensation voltage when the gray scale value of the original driving signal is in a preset first relation table, where the first relation table is used to represent the relationship between the polarity, the gray scale value, and the compensation voltage of the original driving signal.
In one embodiment, the gray scale values in the first relation table are arranged according to an increasing order, and every two adjacent gray scale values form a gray scale interval;
the compensation voltage generating circuit is used for determining a first compensation voltage and a second compensation voltage corresponding to gray scale values at two ends of a gray scale interval where the gray scale value of the original driving signal is located in the first relation table according to the polarity of the original driving signal when the gray scale value of the original driving signal is not located in the first relation table, and generating the compensation voltage according to the gray scale value of the original driving signal, the first compensation voltage and the second compensation voltage according to a linear inner difference model.
In one embodiment, the compensation voltage generation circuit includes: a processor and a memory;
the memory is used for storing the first relation table and the linear interpolation model;
the first end of the processor is used for connecting the time sequence controller, the second end of the processor is connected with the memory, the third end of the processor is connected with the non-inverting input end of the operational amplification circuit, and the processor is used for checking the first relation table according to the polarity and the gray scale value of the original driving signal to generate the compensation voltage when judging that the gray scale value of the original driving signal is in the preset first relation table;
the processor is further configured to determine, when the gray scale value is not in the first relation table, a first compensation voltage and a second compensation voltage corresponding to the gray scale values at two ends of a gray scale interval in which the gray scale value of the original driving signal is located in the first relation table according to the polarity of the original driving signal, and generate the compensation voltage according to the gray scale value of the original driving signal, the gray scale values at two ends of the gray scale interval, the first compensation voltage and the second compensation voltage according to a linear inner difference model.
In one embodiment, the driving circuit further includes:
the first resistor is connected between the non-inverting input end of the operational amplification circuit and the output end of the digital-to-analog conversion circuit in series;
the second resistor is connected between the non-inverting input end of the operational amplification circuit and the output end of the compensation voltage generation circuit in series;
the third resistor is connected between the inverting input end of the operational amplification circuit and the ground in series;
the fourth resistor is connected between the inverting input end of the operational amplification circuit and the output end of the operational amplification circuit in series;
the first resistor, the second resistor, the third resistor and the fourth resistor are equal in resistance value.
On the other hand, the embodiment of the invention also provides a display device, which comprises a time schedule controller, a display panel and the driving circuit, wherein the time schedule controller is used for providing an original driving signal.
In one embodiment, a display panel includes a glass substrate; the drive circuit is arranged on the glass substrate and is electrically connected with the glass substrate.
A voltage compensation control method, comprising:
acquiring an original driving signal output by a time schedule controller;
performing digital-to-analog conversion on the original driving signal;
generating a compensation voltage according to the polarity and the gray-scale value of the original driving signal;
performing addition and subtraction operation on the original driving signal and the compensation voltage after the digital-to-analog conversion to obtain a compensated driving signal;
the compensation voltage is used for compensating the voltage drop of the pixel electrode caused by the high-low level change of the scanning voltage signal of the display panel.
In one embodiment, the step of generating the compensation voltage according to the polarity of the original driving signal and the gray scale value comprises:
and if the gray-scale value of the original driving signal is in the first relation table, looking up the first relation table according to the polarity and the gray-scale value of the original driving signal to generate the compensation voltage, wherein the first relation table is used for representing the relationship among the polarity, the gray-scale value and the compensation voltage of the original driving signal.
In one embodiment, the step of generating the compensation voltage according to the polarity of the original driving signal and the gray scale value comprises:
if the gray scale value of the original driving signal is not in the first relation table, determining a first compensation voltage and a second compensation voltage corresponding to the gray scale values at two ends of a gray scale interval in which the gray scale value of the original driving signal is located in the first relation table, and generating the compensation voltage according to the gray scale value of the original driving signal, the gray scale values at two ends of the gray scale interval, the first compensation voltage and the second compensation voltage according to a linear inner difference model.
One or more embodiments provided by the invention have at least the following beneficial effects: a digital-to-analog conversion circuit in the driving circuit acquires an original driving signal output by the time schedule controller, the original driving signal is subjected to digital-to-analog conversion and then output to a non-inverting input end of the operational amplifying circuit, meanwhile, a compensation voltage generating circuit generates compensation voltage according to the polarity and the gray scale value of the original driving signal and outputs the compensation voltage to an inverting input end of the operational amplifying circuit, a compensated driving signal is obtained through operation of the operational amplifying circuit, and the compensated driving signal is transmitted to a data line of the display panel through a buffer. According to the driving circuit provided by the embodiment of the invention, the original driving signal is dynamically adjusted at the front end to make up the voltage drop of the pixel electrode caused by the low level of the high level of the scanning voltage signal, so that the pixel voltages at two ends of the liquid crystal can be kept consistent, and the display quality is improved.
Drawings
FIG. 1 is a schematic diagram of an exemplary LCD driving system;
FIG. 2 is a diagram illustrating the connection between the internal structure of the driving circuit and the display panel in an exemplary technique;
FIG. 3 is a diagram illustrating the relationship between data lines, scan lines, pixels, and parasitic capacitances in an exemplary technique;
FIG. 4 is a schematic diagram of an embodiment of a driving circuit;
FIG. 5 is a diagram of a first relationship table in one embodiment;
FIG. 6 is a schematic diagram of the structure of a driver circuit and a controller in one embodiment;
FIG. 7 is a schematic diagram showing a structure of a display device according to an embodiment;
FIG. 8 is a flow chart illustrating a voltage compensation control method according to an embodiment;
FIG. 9 is a flowchart illustrating a voltage compensation control method according to another embodiment.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element and be integral therewith, or intervening elements may also be present. The terms "mounted," "one end," "the other end," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
In an exemplary technique, the internal structure of the driving circuit is generally as shown in fig. 2, and the data voltage signal is provided to the data line by a structure of connecting a digital-to-analog conversion 21 to a buffer 22.
When the scan voltage signal is high, the transistor is turned on, and the corresponding data voltage signal is addedThe pixel electrode 23 loaded on the transistor affects the display of each sub-pixel, and has capacitances Cst, Clc and Cgs as shown in fig. 3, in addition to the pixel voltage Vs-Vcom (Vcom is a common voltage applied to the common electrode) for driving the display. When the scan voltage signal jumps from the high level to the low level of the previous frame, the pixel electrode voltage Vs decreases when the scan voltage signal is at the low level (when the transistor is turned off) compared to when the scan voltage signal is at the high level due to the conservation of charge and the effect of parasitic capacitance Cgs and feed-through effect (feed-through effect)
This portion of the voltage droop is compensated for by lowering the common voltage Vcom in the exemplary technique. However, in the design of reducing the common voltage Vcom by a certain value, when the pixel electrode voltage Vs changes, since the magnitude of the parasitic capacitance Clc is affected by the pixel voltage Vs-Vcom at both ends of the liquid crystal, Δ V will change, and Vs-Vcom will cause the non-synchronous adjustment to be consistent, and the display will generate flicker.
An embodiment of the present invention provides a driving circuit as shown in fig. 4, including: a compensation voltage generation circuit 43, a digital-to-analog conversion circuit 42, an operational amplification circuit 44, and a buffer 45; the digital-to-analog conversion circuit 42 is configured to obtain an original driving signal output by the timing controller 41, perform digital-to-analog conversion on the original driving signal, and output the converted driving signal to the non-inverting input terminal of the operational amplifier circuit 44; the compensation voltage generating circuit 43 is configured to generate a compensation voltage according to the polarity and the gray scale value of the original driving signal, and output the compensation voltage to the non-inverting input terminal of the operational amplifier circuit 44, where the compensation voltage is used to compensate for a voltage drop of the pixel electrode 46 caused by a high-low level change of a scanning voltage signal of the display panel; the output end of the operational amplifier circuit 44 is connected to the inverting input end of the operational amplifier circuit 44 and the non-inverting input end of the buffer 45, the inverting input end of the buffer 45 is connected to the output end of the buffer 45, and the output end of the buffer 45 is used for connecting to the data line of the display panel.
The compensation voltage generation circuit 43 is a circuit capable of generating a compensation voltage to compensate for a drop in the voltage Vs of the pixel electrode 46 due to the capacitance (capacitances Cst, Cgs, and Clc) when the scanning voltage signal changes from high to low (high Vgh changes to low Vgl). A Digital-to-Analog Converter circuit 42 (D/a Converter or DAC) refers to a circuit that converts discrete Digital quantities into Analog quantities that vary in connection. The buffer 45 is used to temporarily store data to be transmitted to the display panel, and can coordinate and buffer the data processing speed between the inside of the driving circuit and the external devices such as the display panel, thereby realizing the synchronization of data transmission.
Specifically, in the conventional technique, in a manner of reducing the common voltage to a certain fixed value, when the voltage of the pixel electrode 46 changes, the pixel voltage loaded at the two ends of the liquid crystal cannot be adjusted, so that the flicker phenomenon still occurs during the display. In the driving circuit according to the embodiment of the present invention, the internal compensation voltage generating circuit 43 receives the polarity and the gray level value of the original driving signal from the timing controller 41 to generate the corresponding compensation voltage. In addition, an operational amplifier circuit 44 is integrated in the driving circuit, and the operational amplifier circuit 44 performs an operation on the original driving signal converted by the data conversion circuit and the compensation voltage received by the non-inverting input terminal thereof, and outputs a corrected data driving signal to the buffer 45, and outputs the corrected data driving signal to the data line of the display panel after the coordination action of the buffer 45, so as to drive the display of each sub-pixel on the display panel. By adopting the driving circuit provided by the embodiment of the invention, the drop degree of the voltage Vs of the pixel electrode 46 brought by the driving circuit can be evaluated at the front end according to the characteristics of the original driving signal of the current frame so as to generate a corresponding compensation voltage, the voltage Delta V of the pixel electrode 46 which is possibly dropped is compensated, the consistency of the pixel voltage Vs-Vcom at two ends of the liquid crystal is kept, and the display quality is improved.
In one embodiment, the compensation voltage generating circuit 43 is configured to look up a first relation table according to the polarity and the gray scale value of the original driving signal to generate the compensation voltage when the gray scale value of the original driving signal is in a preset first relation table, where the first relation table is used to represent the relationship between the polarity, the gray scale value, and the compensation voltage of the original driving signal.
Specifically, the compensation voltage generating circuit 43 may generate the compensation voltage according to the original driving signal by measuring some gray-scale values and the falling value Δ V of the voltage Vs of the pixel electrode 46 of the display panel under the action of the polarity through an experiment or the like, so as to obtain the first relation table shown in fig. 5. Then, in the operation process, the compensation voltage generating circuit 43 determines whether the gray-scale value of the original driving signal sent by the timing controller 41 is in the stored relation table, and if the gray-scale value is in the first relation table, the corresponding compensation voltage Δ V is determined by table lookup. The compensation voltage generation circuit 43 sends the compensation voltage Δ V to the inverting input terminal of the operational amplifier circuit 44, and performs an operation with the original driving signal after digital-to-analog conversion received by the non-inverting input terminal to obtain Vs + Δ V (here, the voltage is superimposed, and if the polarity of the original driving signal is negative, the polarity of Vs + Δ V is negative, so as to compensate the voltage drop of the pixel electrode 46 caused by the capacitance inside the display panel, and the pixel voltage at both ends of the compensated liquid crystal is maintained at Vs-Vcom, so that no flicker is generated during display, and the display effect is good.
In one embodiment, the gray scale values in the first relation table are arranged according to an increasing order, and every two adjacent gray scale values form a gray scale interval; the compensation voltage generating circuit 43 is configured to determine a first compensation voltage and a second compensation voltage corresponding to gray scale values at two ends of a gray scale interval where the gray scale value of the original driving signal is located in the first relation table when the gray scale value of the original driving signal is not in the first relation table, and generate the compensation voltage according to a linear inner difference model according to the gray scale value of the original driving signal, the gray scale values at two ends of the gray scale interval, the first compensation voltage and the second compensation voltage.
In the case that the gray scale value of the original driving signal is not in the relationship table, it can be determined which gray scale interval is in the first relationship table, and it is considered that a certain linear relationship exists between the gray scale value of the original driving signal and the compensation voltage in the interval, and the linear relationship expression is a linear inner difference model. Specifically, when the gray scale value of the original driving signal is not in the first relation table, the first compensation voltage and the second compensation voltage corresponding to the gray scale values at two ends of the corresponding gray scale interval are found according to the gray scale value of the original driving signal, and then the original driving signal is used for driving the display panel to display the gray scale values of the original driving signalThe gray scale value of the sign, the gray scale values at both ends of the gray scale interval, the first compensation voltage and the second compensation voltage are substituted into the linear inner difference model to obtain the compensation voltage, and the compensation voltage is output to the inverting input terminal of the operational amplifier circuit 44. For example, if the gray level n of the original driving signal is greater than 0 (the first compensation voltage) and less than 31 (the second compensation voltage), the corresponding compensation voltage is obtained, and if the gray level n is greater than 0 (the first compensation voltage) and less than 31 (the second compensation voltage), the corresponding compensation voltage is obtained
The gray level value n is greater than 31 (the first compensation voltage) and less than 60 (the second compensation voltage), and the corresponding compensation voltage is obtained
In one embodiment, as shown in fig. 6, the compensation voltage generation circuit 43 includes: a processor 431 and a memory 432; the memory 432 is used for storing a first relation table and a linear inner difference model; the first end of the processor 431 is used for connecting the timing controller 41, the second end of the processor 431 is connected with the memory 432, the third end of the processor 431 is connected with the non-inverting input end of the operational amplification circuit 44, and the processor 431 is used for checking the first relation table according to the polarity and the gray-scale value of the original driving signal when judging that the gray-scale value of the original driving signal is in the preset first relation table, so as to generate the compensation voltage; the processor 431 is further configured to determine a first compensation voltage and a second compensation voltage corresponding to gray scale values at two ends of a gray scale interval where the gray scale value of the original driving signal is located in the first relation table when the gray scale value is not in the first relation table, and generate the compensation voltage according to the gray scale value of the original driving signal, the gray scale values at two ends of the gray scale interval, the first compensation voltage, and the second compensation voltage according to a linear inner difference model.
The processor 431 is a device capable of reading and calculating data. Specifically, the processor 431 is communicatively connected to the timing controller 41, and receives the original driving signal generated by the timing controller 41. The processor 431 also retrieves the data in the first relation table from the memory 432, and then compares the polarity and the gray level of the original driving signal with the data in the first relation table, where the gray level is at the second relation tableWhen the compensation voltage is in the relation table, the corresponding compensation voltage can be obtained by looking up the table, and then the processor 431 outputs the compensation voltage to the non-inverting input terminal of the operational amplifier circuit 44 to compensate the electric quantity of the voltage drop of the pixel electrode 46 when the scanning voltage signal of the display panel changes from high level to low level, so as to ensure that the pixel voltage loaded at two ends of the liquid crystal is not changed, the display is stable, and the flicker is not generated. If the processor 431 does not find the data corresponding to the gray scale value of the original driving signal in the first relation table, the processor 431 determines which gray scale interval the gray scale value of the original driving signal falls in the first relation table, and obtains compensation voltages corresponding to the gray scale values of two end points of the gray scale interval corresponding to the gray scale value of the original driving signal and respectively marked as a first compensation voltage and a second compensation voltage, wherein the first compensation voltage is smaller than the second compensation voltage. Then substituting the gray scale value n of the original driving signal, the gray scale values a and b at two ends of the gray scale interval, the first compensation voltage Pa and the second compensation voltage Pb into the linear inner difference model
Wherein, a<And b, Pa is a first compensation voltage corresponding to the gray scale value a, and Pb is a second compensation voltage corresponding to the gray scale value b. The processor 431 and the timing controller 41 may be connected by COF (Chip On Flex, or, Chip On Film, or the like).
In one embodiment, as shown in fig. 4 and 6, the driving circuit further includes: a first resistor R1 connected in series between the non-inverting input terminal of the operational amplifier circuit 44 and the output terminal of the digital-to-analog converter circuit 42; a second resistor R2 connected in series between the non-inverting input terminal of the operational amplifier circuit 44 and the output terminal of the compensation voltage generating circuit 43; a third resistor R3 connected in series between the inverting input terminal of the operational amplifier circuit 44 and ground; and a fourth resistor R4 connected in series between the inverting input terminal of the operational amplifier circuit 44 and the output terminal of the operational amplifier circuit, wherein the first resistor, the second resistor, the third resistor and the fourth resistor have the same resistance. As shown in FIGS. 4 and 6, the voltage at node a is
And the first resistor and the second resistorThe resistance, the third resistance and the fourth resistance are equal in value, so that the voltage of the node c is twice the voltage of the node a:
it should be noted that, in addition to the resistance distribution and connection manner of the resistors provided in this embodiment, other manners of changing the adjustment and connection relationship between the resistors to make the output voltage of the operational amplifier circuit be Vs + Δ V all belong to the protection scope of the present invention.
A controller, as shown in fig. 6, comprising: a timing controller 41 and the above-mentioned driving circuit 40, the timing controller 41 being used to provide the original driving signal. As described in the above embodiments, the timing controller 41 outputs the original driving signal to the driving circuit 40, and the driving circuit 40 performs compensation adjustment on the original driving signal according to the polarity and the gray level of the received original driving signal, and loads a compensation voltage, so that when outputting to the data line, the pixel voltage at both ends of the liquid crystal can be kept unchanged, so that the display panel stably displays without flickering, and the display quality is improved. It should be noted that the controller provided in the embodiment of the present invention may adopt the structure of the driving circuit 40 in any of the above embodiments to implement compensation of the pixel electrode signal.
A display device, as shown in FIG. 7, includes a timing controller 41, a display panel 10 and the driving circuit 40, wherein the timing controller 41 is used for providing original driving signals. In the display device provided in the embodiment of the present application, the original driving signal is generated by the timing controller 41, and the driving circuit 40 performs compensation operation on the original driving signal, and outputs the compensated driving signal to the data lines on the display panel 10. The timing controller 41 can also output a scanning voltage signal to the scanning lines on the display panel 10 through a shift register and the like, when the scanning voltage signal is at a high point, the transistor is turned on, the driving circuit 40 provides a driving signal to the data lines for driving the liquid crystal to deflect, and display is realized.
In one embodiment, the display panel 10 includes a glass substrate; the drive circuit 40 is disposed on the glass substrate, and the drive circuit 40 is electrically connected to the glass substrate. By disposing the driving circuit 40 on the glass substrate, an ultra-narrow bezel design of the display device can be realized.
A voltage compensation control method, as shown in fig. 8, includes:
s10: acquiring an original driving signal output by a time schedule controller;
s20: performing digital-to-analog conversion on the original driving signal;
s30: generating a compensation voltage according to the polarity and the gray-scale value of the original driving signal;
s40: performing addition and subtraction operation on the original driving signal and the compensation voltage after the digital-to-analog conversion to obtain a compensated driving signal;
the compensation voltage is used for compensating the voltage drop of the pixel electrode caused by the high-low level change of the scanning voltage signal of the display panel.
Specifically, in order to compensate for the pixel electrode voltage drop caused by the parasitic capacitance Cgs when the transistor of the display panel is turned off from on, the voltage compensation control method provided by the application obtains the original driving signal output by the timing controller, then performs digital-to-analog conversion on the original driving signal, generates the compensation voltage according to the polarity and the gray-scale value of the original driving signal, performs addition and subtraction operation on the original driving signal and the compensation voltage after the digital-to-analog conversion to obtain the compensated driving signal, and outputs the compensated driving signal to the data line of the display panel, so as to compensate the pixel electrode voltage drop caused by the feed-through phenomenon. The hardware configuration for implementing the voltage compensation control method may be the driving circuit described in the above embodiments, but is not limited to the configuration of the driving circuit.
In one embodiment, as shown in fig. 9, the step of generating the compensation voltage according to the polarity of the original driving signal and the gray-scale value includes:
s31: and if the gray-scale value of the original driving signal is in the first relation table, looking up the first relation table according to the polarity and the gray-scale value of the original driving signal to generate the compensation voltage, wherein the first relation table is used for representing the relationship among the polarity, the gray-scale value and the compensation voltage of the original driving signal.
In one embodiment, the step of generating the compensation voltage according to the polarity of the original driving signal and the gray scale value comprises:
s32: if the gray scale value of the original driving signal is not in the first relation table, determining a first compensation voltage and a second compensation voltage corresponding to the gray scale values at two ends of a gray scale interval in which the gray scale value of the original driving signal is located in the first relation table according to the polarity of the original driving signal, and generating the compensation voltage according to the gray scale value of the original driving signal, the gray scale values at two ends of the gray scale interval, the first compensation voltage and the second compensation voltage according to a linear inner difference model.
For the process of generating the compensation voltage and the hardware structure that may be supported by the process, reference may be made to the descriptions in the embodiments of the driving circuit, the display device, and the like, which are not described herein again.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A driver circuit, comprising: the device comprises a compensation voltage generating circuit, a digital-to-analog conversion circuit, an operational amplification circuit and a buffer;
the digital-to-analog conversion circuit is used for acquiring an original driving signal output by the time schedule controller, performing digital-to-analog conversion on the original driving signal and outputting the converted driving signal to the non-inverting input end of the operational amplification circuit;
the compensation voltage generation circuit is used for generating compensation voltage according to the polarity and the gray scale value of the original driving signal and outputting the compensation voltage to the non-inverting input end of the operational amplification circuit, wherein the compensation voltage is obtained by measuring the voltage drop of the pixel electrode of the display panel under the action of different gray scale values and polarities to obtain a first relation table, and the compensation voltage is used for compensating the voltage drop of the pixel electrode caused by the change of the high level and the low level of the scanning voltage signal of the display panel so as to keep the same control voltage of the display panel when the scanning voltage signal is at the high level and when the scanning voltage signal is at the low level;
the output end of the operational amplification circuit is respectively connected with the inverting input end of the operational amplification circuit and the non-inverting input end of the buffer;
the inverting input end of the buffer is connected with the output end of the buffer, and the output end of the buffer is used for being connected with the data line of the display panel.
2. The driving circuit according to claim 1, wherein the compensation voltage generating circuit is configured to look up the first relation table according to the polarity and the gray scale value of the original driving signal to generate the compensation voltage when the gray scale value of the original driving signal is in the preset first relation table, and wherein the first relation table is used for representing the relationship between the polarity, the gray scale value and the compensation voltage of the original driving signal.
3. The driving circuit according to claim 2, wherein the gray scale values in the first relational table are arranged in an increasing order, and every two adjacent gray scale values form a gray scale interval;
the compensation voltage generation circuit is used for determining a first compensation voltage and a second compensation voltage corresponding to gray scale values at two ends of a gray scale interval where the gray scale value of the original driving signal is located in the first relation table according to the polarity of the original driving signal when the gray scale value of the original driving signal is not located in the first relation table, and generating the compensation voltage according to a linear inner difference model according to the gray scale value of the original driving signal, the gray scale values at two ends of the gray scale interval, the first compensation voltage and the second compensation voltage.
4. The drive circuit according to claim 3, wherein the compensation voltage generation circuit comprises: a processor and a memory;
the memory is used for storing the first relation table and the linear inner difference model;
the first end of the processor is used for being connected with the time schedule controller, the second end of the processor is connected with the memory, the third end of the processor is connected with the non-inverting input end of the operational amplification circuit, and the processor is used for checking a first relation table according to the polarity and the gray scale value of the original driving signal to generate the compensation voltage when judging that the gray scale value of the original driving signal is in a preset first relation table;
the processor is further configured to determine, when it is determined that the gray scale value is not in the first relation table, a first compensation voltage and a second compensation voltage corresponding to gray scale values at two ends of a gray scale interval in which the gray scale value of the original driving signal is located in the first relation table according to the polarity of the original driving signal, and generate a compensation voltage according to the linear inner difference model according to the gray scale value of the original driving signal, the gray scale values at two ends of the gray scale interval, the first compensation voltage, and the second compensation voltage.
5. The drive circuit according to any one of claims 1 to 4, further comprising:
the first resistor is connected between the non-inverting input end of the operational amplification circuit and the output end of the digital-to-analog conversion circuit in series;
the second resistor is connected between the non-inverting input end of the operational amplification circuit and the output end of the compensation voltage generation circuit in series;
the third resistor is connected between the inverting input end of the operational amplification circuit and the ground in series;
the fourth resistor is connected between the inverting input end of the operational amplification circuit and the output end of the operational amplification circuit in series;
the first resistor, the second resistor, the third resistor and the fourth resistor are equal in resistance value.
6. A display device comprising a timing controller for providing the original driving signals, a display panel and the driving circuit of any one of claims 1 to 5.
7. The display device according to claim 6, wherein the display panel comprises a glass substrate; the drive circuit is arranged on the glass substrate and is electrically connected with the glass substrate.
8. A voltage compensation control method, comprising:
acquiring an original driving signal output by a time schedule controller;
performing digital-to-analog conversion on the original driving signal;
generating a compensation voltage according to the polarity and the gray-scale value of the original driving signal;
performing addition and subtraction operation on the original driving signal subjected to digital-to-analog conversion and the compensation voltage to obtain a compensated driving signal;
the compensation voltage is obtained by measuring the voltage drop of the pixel electrode of the display panel under the action of different gray scale values and polarities, so as to obtain a first relation table, and the compensation voltage is used for compensating the voltage drop of the pixel electrode caused when the high and low levels of the scanning voltage signal of the display panel are changed, so that the control voltage of the display panel is kept consistent when the scanning voltage signal is at the high level and when the scanning voltage signal is at the low level.
9. The voltage compensation control method of claim 8, wherein the step of generating the compensation voltage according to the polarity and the gray-scale value of the original driving signal comprises:
and if the gray scale value of the original driving signal is in the first relation table, looking up the first relation table according to the polarity and the gray scale value of the original driving signal to generate the compensation voltage, wherein the first relation table is used for representing the relationship among the polarity, the gray scale value and the compensation voltage of the original driving signal.
10. The voltage compensation control method of claim 9, wherein the step of generating the compensation voltage according to the polarity and the gray-scale value of the original driving signal comprises:
if the gray scale value of the original driving signal is not in the first relation table, determining a first compensation voltage and a second compensation voltage corresponding to the gray scale values of the gray scale value of the original driving signal at two ends of a gray scale interval in which the gray scale value of the original driving signal is located in the first relation table according to the polarity of the original driving signal, and generating the compensation voltage according to a linear inner difference model according to the gray scale value of the original driving signal, the gray scale values at two ends of the gray scale interval, the first compensation voltage and the second compensation voltage.
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| CN112669762A (en) * | 2020-12-23 | 2021-04-16 | Tcl华星光电技术有限公司 | Driving chip, display panel and driving method thereof |
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| CN101615382B (en) * | 2008-06-27 | 2012-07-04 | 群康科技(深圳)有限公司 | LCD device |
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