JP2002231705A - Etching method and method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a working method using wet etching which does not deteriorate element characteristics, because when working of a nitride based compound semiconductor layer is performed by dry etching, etching damage is left, which becomes a cause of deterioration of element characteristics. SOLUTION: This etching method is provided with a process wherein ion implantation is performed to a nitride based compound semiconductor layer 2 to form a region 4 to be etched by deteriorating crystallinity, and a process wherein the region 4 where crystallinity is deteriorated is removed selectively with respect to a region where crystallinity is not deteriorated by wet etching.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to an etching method,
And semiconductor optical element, field effect transistor (FET)
More specifically, the present invention relates to an etching method for selectively wet-etching a nitride-based compound semiconductor layer and a method for manufacturing a semiconductor device using the etching method.

[0002]

2. Description of the Related Art In a semiconductor optical device such as a semiconductor laser device and a semiconductor light emitting diode and a semiconductor device such as an FET, plasma CVD (Chemical Vapor Deposit) is used.
The abbreviation of ion (chemical vapor deposition) is used to modify the surface of a semiconductor layer using a method such as a chemical vapor deposition method, an ion implantation method, or a diffusion method to partially impart new properties or improve the properties. That is common. Such a method can be applied irrespective of the material of the semiconductor. The nitride-based compound semiconductor is also, for example, gallium arsenide (GaAs) -based or indium phosphide (I
It can be handled almost in the same manner as compound semiconductors such as III-V group compound semiconductors such as nP) and II-VI group compound semiconductors such as zinc selenium (ZnSe) and cadmium tellurium (CdTe).

[0003]

However, the material properties of nitride semiconductors are often unique. That is, p-type conductivity is hardly obtained, and chemical etching is very strong, so that wet etching cannot be easily performed. Gallium nitride (GaN), which is a typical nitride-based compound semiconductor, is still difficult to produce a good quality bulk substrate. Therefore, a sapphire substrate is used for forming a GaN semiconductor device.

Since the sapphire substrate has a high resistance,
In a conventional GaN-type semiconductor element, an electrode cannot be formed on the back surface of the substrate, and both the p-type electrode and the n-type electrode are formed on one surface of the substrate. Therefore, usually, etching is performed so that the p-type contact layer provided with the p-type electrode is exposed on the element surface. The etching at this time is not wet etching but dry etching for the above-mentioned reason. Specifically, reactive ion etching (R
Sputter etching such as IE (Reactive Ion Etching) is common. In this method, the reactive species contained in the etching gas dissociates into active radicals and ions,
Etching proceeds by these chemical reactions and collision with the substrate. For this reason, it has been feared that the damage may cause deterioration of the element characteristics.

A semiconductor device using such a nitride-based compound semiconductor can be designed as an optical device in a wide wavelength range from ultraviolet rays to infrared rays, and has a large band gap as an electronic device. Since the saturation drift speed is high and the electrostatic breakdown electric field is large, it is excellent in high-speed operation, high-speed switching, high-current operation, and the like, and various applications are expected. However, a semiconductor device using a nitride-based compound semiconductor such as a semiconductor laser device is required to have further improved characteristics, and an etching method therefor is required.

[0006]

SUMMARY OF THE INVENTION The present invention provides an etching method and a method for manufacturing a semiconductor light emitting device which have been made to solve the above problems.

The etching method of the present invention includes a step of forming a region to be etched by ion implantation into a nitride-based compound semiconductor layer, and a step of selectively removing the region to be etched by wet etching. .

In the above etching method, the crystallinity of the nitride-based compound semiconductor layer is deteriorated by implanting at least one kind of ion such as nitrogen, boron, and proton into the nitride-based compound semiconductor layer. As a result, a region to be etched which is easily wet-etched is formed. In such a state, since the nitride-based compound semiconductor layer is wet-etched, the region to be etched is selectively etched as compared with the region not ion-implanted. Further, since etching can be performed by wet etching, etching damage does not occur.

In general, the depth of ion implantation can be controlled by the acceleration voltage for ion implantation. Therefore, for example, by controlling the ion implantation depth by the acceleration voltage, it is possible to leave a region not ion-implanted below the region to be etched, and the region not ion-implanted becomes an etching stop layer. Therefore, it is easy to form an etching stop layer for wet etching, which has been difficult in the past.

The method of manufacturing a semiconductor light emitting device according to the present invention includes the step of etching a nitride-based compound semiconductor layer, wherein the etching is performed by adding an ion to the nitride-based compound semiconductor layer. Forming a region to be etched by implantation; and selectively removing the region to be etched by wet etching.

In the method of manufacturing a semiconductor light emitting device, similarly to the above-described etching method, the region to be etched formed by ion implantation is selectively removed by wet etching. Further, since etching can be performed by wet etching, no etching damage occurs. Further, by controlling the ion implantation depth, a non-ion implantation region is formed below the ion implantation region, and etching is performed using the non-ion implantation region as an etching stop layer.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An example of an embodiment according to the etching method of the present invention will be described with reference to a sectional view of a manufacturing process shown in FIG.

As shown in FIG. 1A, a nitride compound semiconductor layer 2 is formed on a substrate 1. Substrate 1
For this, a compound semiconductor substrate such as a gallium nitride substrate or an insulating substrate such as a sapphire substrate can be used. Further, the nitride-based compound semiconductor layer 2 includes, for example, a GaN layer, an AlGaN layer, a GaInN layer, an AlG layer.
It is composed of one or more of an aInN layer, a GaInNAs layer, and a GaNAs layer.

Subsequently, by a usual resist coating technique,
After applying a resist on the nitride-based compound semiconductor layer 2 to form a resist film, the resist film is patterned by a usual lithography technique (exposure, development, baking, etc.) to form a resist pattern 3.
Next, using the resist pattern 3 as an ion implantation mask, ions are implanted into the nitride-based compound semiconductor layer 2 to form an etched region 4 in which the crystallinity of the nitride-based compound semiconductor layer 2 is deteriorated. In this ion implantation, for example, at least one of nitrogen, boron, protons and the like is ion-implanted. Here, as an example, boron was used as an ion species, and the dose amount and the acceleration voltage were adjusted so that ions were implanted into, for example, the middle layer of the nitride-based compound semiconductor layer 2.

Although a resist mask is used as the ion implantation mask, an inorganic mask made of a material having the function of an ion implantation mask and capable of being selectively removed from the nitride-based compound semiconductor layer 2 can also be used. .

Next, as shown in FIG. 1 (2), the region to be etched 4 (a portion shown by a two-dot chain line in the drawing) is selectively removed by wet etching using the resist pattern 3 as an etching mask. This wet etching is performed, for example, by heating potassium hydroxide (K
OH) using an aqueous solution (for example, 1 mol) to selectively remove the region 4 to be etched. The etching rate in this wet etching is 200 nm / m
became in. After that, the resist pattern 3 is removed.

Next, as shown in FIG. 1C, after the etching, the nitride-based compound semiconductor layer 2 is heat-treated. This heat treatment is performed, for example, by heating the nitride-based compound semiconductor layer 2 at 600 ° C. for 20 minutes in an inert atmosphere such as a nitrogen atmosphere.

In the above etching method, the crystallinity of the nitride-based compound semiconductor layer 2 is deteriorated by implanting at least one ion of nitrogen, boron, protons and the like into the nitride-based compound semiconductor layer 2. As a result, the etched region 4 which is easily wet-etched is formed. Single crystals can be polycrystallized by ion implantation,
It becomes a crystal having a large density of lattice defects having many interstitial atoms.
In such a state, since the nitride-based compound semiconductor layer 2 is wet-etched, the region to be etched 4 is selectively etched away as compared with the region where no ion is implanted. Further, since the resist pattern 3 is formed by the lithography technique, a fine desired region can be selectively ion-implanted, so that a fine desired region can be selectively etched.

Since the ion implantation depth can be controlled by the ion implantation acceleration voltage, by controlling the ion implantation depth, a region not ion-implanted can be left below the region 4 to be etched. Becomes possible,
The region where the ions are not implanted becomes an etching stop layer. Therefore, it becomes easy to provide an etching stop layer in wet etching, which has been difficult in the past.

Further, since the heat treatment is performed after the wet etching, it is possible to recover the crystallinity of the ion-implanted damage layer (not shown) formed in the ion-implanted region that has not been removed by the etching.
Therefore, the region whose crystallinity has been deteriorated by the ion implantation is removed by etching, and the remaining region has its crystallinity recovered by the heat treatment, so that the device performance is deteriorated due to the deterioration of the crystallinity. Absent.

The above etching method comprises the steps of:
Field Effect Transistor (FET)
The method can be applied to etching of a nitride-based compound semiconductor layer in a method of manufacturing a semiconductor device such as tor). Hereinafter, a method for manufacturing a semiconductor device of the present invention to which the etching method of the present invention is applied will be described.

The first aspect of the method for manufacturing a semiconductor device of the present invention is as follows.
As an embodiment of the present invention, a method for manufacturing a GaN-based semiconductor laser device will be described with reference to a manufacturing process sectional view in FIG.

As shown in FIG. 2A, for example, a metal organic chemical vapor deposition (MOCVD) is formed on a substrate (for example, a c-plane sapphire substrate) 11.
or Deposition) method to form a nitride-based compound semiconductor layer. This nitride-based compound semiconductor layer is, for example, 55
At a low temperature of about 0 ° C., the GaN buffer layer 12 is
grow to a thickness of m. Subsequently, on the GaN buffer layer 12, an n-type GaN contact layer 13, an n-type Al
The GaN cladding layer 14, the n-type GaN optical waveguide layer 15, the active layer 16, the p-type GaN optical waveguide layer 17, the p-type AlGaN cladding layer 18, and the p-type GaN contact layer 19 are sequentially epitaxially grown.

The n-type GaN contact layer 13 has a thickness of, for example, 3 μm, the n-type AlGaN cladding layer has a thickness of, for example, 0.5 μm, and the n-type GaN optical waveguide layer 1 has a thickness of, for example, 0.5 μm.
5 has a thickness of, for example, 0.1 μm, the p-type GaN optical waveguide layer 17 has a thickness of, for example, 0.1 μm, and the p-type AlGa
The N cladding layer 18 has a thickness of, for example, 0.5 μm,
The type GaN contact layer 19 is formed, for example, by epitaxial growth at a temperature of about 1000 ° C. to a thickness of, for example, 0.5 μm. The active layer 1
6 is, for example, Ga _1-x In _x N well layer / Ga _1-y In _y
It is composed of an N barrier layer (for example, x = 0.15, y = 0.02) and is formed by epitaxial growth at a temperature of about 800 ° C. as an example.

Next, an SiN _x film (not shown) is formed on the p-type contact layer 19 by, for example, a CVD method.
After that, a resist is applied on the SiN _x film to form a resist film, and then a normal lithography technique (exposure,
The resist film is patterned by, for example, development and baking to form a stripe-shaped resist pattern (ion implantation mask) 31 extending in one direction.

Next, the resist pattern 31 is
As an implantation mask, for example, nitrogen, boron, proton, etc.
At least one of the ions is implanted. here,
The p-type contact layer 19 to the n-type GaN contact layer
13 to the upper layer, for example,
The etched region 41 whose crystallinity has been deteriorated by
To achieve. The ion implantation conditions include, for example, a dose
5 × 10¹⁴/ Cm ^Two, Set the acceleration voltage to 50 keV
did.

Next, as shown in FIG. 2 (2), using the resist pattern 31 as an etching mask, the to-be-etched region 41 (portion shown by a two-dot chain line in the drawing) is selectively etched by wet etching. Remove. This wet etching is performed using, for example, an aqueous solution of potassium hydroxide (KOH) (eg, 1 mol) warmed to 60 ° C.
The region 41 to be etched is selectively removed. The etching rate in this etching is 200 nm / m
became in. After that, the resist pattern 31 is removed.

Thus, the n-type GaN contact layer 13
Upper layer, n-type AlGaN cladding layer 14, n-type GaN
Optical waveguide layer 15, active layer 16, p-type GaN optical waveguide layer 17,
The p-type AlGaN cladding layer 18 and the p-type GaN contact layer 19 are patterned in a stripe shape.
Width (stripe width) of this p-type GaN contact layer 19
Is, for example, about 2.5 μm. The upper layer of the n-type GaN contact layer 13 and the n-type AlGaN cladding layer 1
4, n-type GaN optical waveguide layer 15, active layer 16, p-type GaN
The optical waveguide layer 17 and the p-type AlGaN cladding layer 18 have a stripe shape extending in a direction parallel to the direction in which the p-type GaN contact layer 19 extends. It may be slightly larger.

Next, as shown in FIG. 2C, a resist coating and a lithography technique are applied on the p-type GaN contact layer 19 in a direction parallel to the stripe shape as described above. An extended stripe-shaped resist pattern 33 is formed. In this lithography technique, the resist remains in the groove formed by the etching.

Next, ions of at least one of, for example, nitrogen, boron, and protons are implanted using the resist pattern 33 as ion implantation. Here, the region to be etched 43 is formed by performing ion implantation from the p-type contact layer 19 to the upper layer of the p-type AlGaN cladding layer 18 to deteriorate the crystallinity. The conditions for this ion implantation are, for example, a dose amount of 5 × 10 ¹⁴ / c.
m ² and the acceleration voltage were set to 50 keV. In this ion implantation, since the resist remains in the groove formed by the above-described etching, the remaining resist serves as an ion implantation mask and is not implanted into the layers below the n-type GaN contact layer 13.

Next, as shown in FIG. 2D, using the resist pattern 33 as an etching mask, the region 43 to be etched (a portion shown by a two-dot chain line in the drawing) is selectively removed by etching. I do. This etching is performed by, for example, wet etching using a potassium hydroxide (KOH) aqueous solution (for example, 1 mol) warmed to 60 ° C. to selectively remove the region 43 to be etched. The etching rate in this etching is 20
It was 0 nm / min.

Next, insulator silicon oxide (SiO ₂ )
(Not shown) is deposited. After that, the ion implantation mask 33 is removed. Next, as shown in (5) of FIG.
An ohmic contact p-side electrode 21 is formed on the p-type contact layer 19, and an ohmic contact n-side electrode 22 is formed on the n-type contact layer 13. The p-side electrode 21 is, for example, nickel / gold (Ni / Au).
For example, a titanium / aluminum (Ti / Al) film is used for the n-type electrode 22.

Thereafter, although not shown, the substrate 11 on which the laser structure is formed is thinned and cleaved into a bar along a direction perpendicular to the direction in which the stripe extends, or by dry etching. Form resonator end faces. Further, the rod is separated into chips by a technique such as dicing or slicing. Thus, the intended GaN-based semiconductor laser device is manufactured.

In the method of manufacturing a semiconductor device described with reference to FIG. 2, the n-type Ga
By implanting, for example, at least one ion of nitrogen, boron, protons and the like into the nitride-based compound semiconductor layer up to the upper layer of the N-contact layer 13, the crystallinity of the nitride-based compound semiconductor layer is deteriorated. An etched region 41 which is easily wet-etched is formed. In such a state, since the nitride-based compound semiconductor layer is wet-etched, the region to be etched is selectively wet-etched as compared with the region not ion-implanted. In addition, since the resist patterns 31 and 33 are formed by lithography, fine desired regions can be selectively ion-implanted, so that fine desired regions can be selectively etched.

The p-type GaN contact layer 19
By implanting, for example, at least one ion of nitrogen, boron, protons, etc. into the nitride-based compound semiconductor layer up to the upper layer of the type AlGaN cladding layer 18, the crystallinity of the nitride-based compound semiconductor layer is deteriorated. The region 43 to be etched which is easily wet-etched is formed. In such a state, since the nitride-based compound semiconductor layer is wet-etched, the region to be etched is selectively wet-etched as compared with the region not ion-implanted.

In general, the ion implantation depth can be controlled by the ion implantation acceleration voltage. Therefore, for example, by controlling the ion implantation depth by the acceleration voltage, it becomes possible to leave a region that is not ion-implanted below the regions 41 and 43 to be etched.
The region where the ions are not implanted becomes an etching stop layer. Accordingly, it becomes easy to provide an etching stop layer for wet etching, which has been difficult in the past.

By performing a heat treatment after the wet etching, it becomes possible to recover the crystallinity of the ion-implanted damage layer (not shown) formed in the ion-implanted region that has not been removed by the etching.
As an example of this heat treatment condition, the heating time is set to 20 minutes in an inert atmosphere (for example, a nitrogen atmosphere) at 600 ° C. Therefore, the region whose crystallinity has been deteriorated by the ion implantation is removed by etching, and the remaining region has its crystallinity recovered by the heat treatment, so that the device performance is deteriorated due to the deterioration of the crystallinity. Absent.

Next, as a second embodiment of the method for manufacturing a semiconductor device of the present invention, a method for manufacturing a GaN-based heterojunction bipolar phototransistor light receiving element will be described with reference to the schematic sectional view of FIG.

As shown in FIG. 3A, a substrate (for example, a c-plane sapphire substrate) 111 is formed on a substrate 111 by, for example, MOCVD.
AlN on the substrate 111 at a low temperature of about 550 ° C.
The buffer layer 112 is grown. Subsequently, this Al
On the N buffer layer 112, an n ⁺ -type AlGaN layer 113, n
-Type AlGaN layer 114, p-type GaN layer 115, n ⁺ -type G
The aN layer 116 is formed by epitaxial growth at a temperature of, for example, about 1000 ° C.

Next, a SiN _x film (not shown) is formed by, for example, a CVD method. Thereafter, as in the first embodiment, a stripe-shaped resist pattern 131 extending in one direction is formed on the n ⁺ -type GaN layer 116 by resist coating and lithography.
Using this resist pattern 131 as an ion implantation mask, one or more of nitrogen, boron, protons, and the like are added to the n ⁺ -type GaN layer 116, the p-type GaN layer 115,
Ions are implanted into the nitride-based compound semiconductor layer of the AlGaN layer 114 to form an etched region 121 having deteriorated crystallinity. In this ion implantation, n ⁺ type AlG
Ions may be implanted up to the upper layer of the aN layer 113.

Thereafter, as shown in FIG. 3B, wet etching is performed using, for example, a potassium hydroxide (KOH) aqueous solution (eg, 1 mol) heated to 60 ° C. using the resist pattern 131 as an etching mask. n
Region 121 to be etched from ⁺ -type GaN layer 116 to n-type AlGaN layer 114 (portion indicated by a two-dot chain line in the drawing)
Is removed by etching to form a ridge 123. The region to be etched 121 is n ⁺ -type AlGa
When the upper layer of the N layer 113 is formed, the upper layer of the n ⁺ -type AlGaN layer 113 is removed by etching.
After that, the resist pattern 131 is removed.

Next, as shown in FIG. 3C, an electrode 117 is formed on the n ⁺ -type GaN layer 116 and the n ⁺ -type AlGaN layer 113 by an electrode forming technique using, for example, a vacuum evaporation method or a sputtering method. 118 and 119 are formed.

In the GaN-based heterojunction bipolar phototransistor light receiving element 101 formed as described above, the substrate 111 side serves as a light receiving surface.

[0044] In the method of manufacturing a semiconductor device described by FIG 3, the n ⁺ -type AlGa from n ⁺ -type GaN layer 116
For example, at least one of nitrogen, boron, protons, and the like is provided on the nitride-based compound semiconductor layer up to the upper layer of the N layer 113.
The region to be etched 121 is formed by implanting seed ions and deteriorating the crystallinity of the nitride-based compound semiconductor layer so that wet etching is easily performed. In this state, the region to be etched 121 is wet-etched.
Is selectively wet etched as compared with the region where the ions are not implanted. In addition, the resist pattern 131
Is formed by a lithography technique, so that a fine desired region can be selectively ion-implanted, so that a fine desired region can be selectively etched.

In general, the ion implantation depth can be controlled by the ion implantation acceleration voltage. Therefore, for example, by controlling the ion implantation depth by the acceleration voltage, it is possible to leave a region not ion-implanted below the region to be etched 121, and the region not ion-implanted becomes an etching stop layer. Accordingly, it becomes easy to provide an etching stop layer for wet etching, which has been difficult in the past.

By performing the heat treatment after the wet etching, it is possible to recover the crystallinity of the ion-implanted damage layer (not shown) formed in the ion-implanted region that has not been removed by the etching.
As an example of this heat treatment condition, the heating time is set to 20 minutes in an inert atmosphere (for example, a nitrogen atmosphere) at 600 ° C. Therefore, the region whose crystallinity has been deteriorated by the ion implantation is removed by etching, and the remaining region has its crystallinity recovered by the heat treatment, so that the device performance is deteriorated due to the deterioration of the crystallinity. Absent.

Next, as a third embodiment of the method of manufacturing a semiconductor device according to the present invention, a GaN-based heterojunction FET will be described.
A method for manufacturing (Field Effect Transistor) will be described with reference to the schematic cross-sectional view of FIG.

As shown in FIG. 4A, a substrate (for example, a sapphire substrate of a c-plane) 211 is
GaN on the substrate 211 at a low temperature of about 550 ° C.
A buffer layer 212 is grown. Subsequently, this Ga
An n ⁻ -type GaN layer 213, a p ⁺ -type AlGaN layer 214, and a p ⁺ -type GaN layer 215 are epitaxially grown on the N buffer layer 212 at a temperature of, for example, about 1000 ° C.

Next, as in the first embodiment, a stripe-shaped resist pattern 231 extending in one direction is formed on the p ⁺ -type GaN layer 215 by resist coating and lithography techniques. The resist pattern 231 as an ion implantation mask, nitrogen, boron, one or more of a proton, such as, p ⁺ -type G
Ions are implanted into the aN layer 215 and the p ⁺ -type AlGaN layer 214 to form a region to be etched 221.

Thereafter, as shown in FIG.
Using the resist pattern 231 as an etching mask,
Potassium hydroxide (KOH) aqueous solution warmed to 60 ° C (eg
Wet etching using, for example, 1 mol), and p
⁺-Type GaN layer 215 and p ⁺Type AlGaN layer 214
Region to be etched 221 (portion indicated by a two-dot chain line in the drawing)
Is selectively removed by etching to obtain the resist pattern.
231 [see (1) in FIG. 4].⁺Type GaN layer 2
15 and p⁺Ridge 2 composed of AlGaN layer 214
23 are formed. Although not shown, the etching target
Area 221 is n ^-Up to the upper layer of the type GaN layer 213
If n^-Upper layer of GaN layer 213 is also etched
Removed. After that, the resist pattern 231 is removed.
I do.

Next, as shown in FIG. 4 (3), the p ⁺ -type GaN layer 215 and the n ^-- type GaN layer
13, gold germanium / nickel (AuGe)
/ Ni) electrodes 216, 217 and 218 are formed.

In the method of manufacturing a semiconductor device described with reference to FIG. 4, the p ⁺ -type GaN layer 215 and the p ⁺ -type AlG
For example, by implanting at least one kind of ion such as nitrogen, boron, and proton into the aN layer 214, the region to be etched 221 is formed by deteriorating the crystallinity of the nitride-based compound semiconductor layer. The region to be etched 221 is easily wet-etched. In such a state, the region to be etched 221 is wet-etched, so that the region to be etched 221 is selectively wet-etched as compared with a region not ion-implanted. Further, since the resist pattern 231 is formed by the lithography technique, a fine desired region can be selectively ion-implanted, so that a fine desired region can be selectively etched.

In general, the ion implantation depth can be controlled by the ion implantation acceleration voltage. Therefore, for example, by controlling the ion implantation depth with an acceleration voltage, it is possible to leave a region not ion-implanted below the region to be etched 221, and the region not ion-implanted becomes an etching stop layer. Accordingly, it becomes easy to provide an etching stop layer for wet etching, which has been difficult in the past.

By performing the heat treatment after the wet etching, the crystallinity of the ion-implanted damage layer (not shown) formed in the ion-implanted region that has not been removed by the etching can be recovered.
As an example of this heat treatment condition, the heating time is set to 20 minutes in an inert atmosphere (for example, a nitrogen atmosphere) at 600 ° C. Therefore, the region whose crystallinity has been deteriorated by the ion implantation is removed by etching, and the remaining region has its crystallinity recovered by the heat treatment, so that the device performance is deteriorated due to the deterioration of the crystallinity. Absent.

Although one embodiment of the present invention has been specifically described above, the present invention is not limited to the above embodiments, and various modifications based on the technical idea of the present invention are possible. It is.

For example, the numerical values, structures, materials, processes, and the like described in the above-described embodiments are merely examples, and different numerical values, structures, materials, processes, and the like may be used as necessary.

As an example, in each of the above embodiments, Ga
Although an N layer is used, aluminum (A
l), a nitride-based compound semiconductor mixed crystal containing indium (In) or the like can also be used. In addition, the thickness and material of each nitride-based compound semiconductor layer, the concentration of aqueous potassium hydroxide solution as a wet etching solution, the temperature, and the like can be appropriately changed.

In each of the above embodiments, a sapphire substrate is used. However, if necessary, a GaN substrate, a SiC substrate, a ZnO substrate may be used instead of the sapphire substrate.
A substrate, a spinel substrate, or the like can also be used. When a conductive substrate such as a GaN substrate or a SiC substrate is used, an electrode can be formed on the substrate.

[0059]

As described above, according to the etching method of the present invention, since ions are implanted into the nitride-based compound semiconductor layer, the crystallinity of the ion-implanted region is deteriorated, and the region is selectively removed by wet etching. Thus, a region to be etched can be formed. In this state, the region to be etched is selectively removed by etching, so that the nitride-based compound semiconductor layer can be easily processed by wet etching.

Further, since a region not ion-implanted can be left below the region to be etched, the region not ion-implanted can be used as an etching stop layer. Therefore, an etching stop layer for wet etching, which was conventionally difficult, can be easily formed.

Therefore, the nitride-based compound semiconductor layer can be finely processed by wet etching.
It is possible to eliminate the occurrence of etching damage that has been concerned about in dry etching. Therefore, if the etching method of the present invention is used for etching in a method of manufacturing a semiconductor device, deterioration of element performance due to etching can be eliminated, and element performance can be improved, and yield can be improved.

According to the method of manufacturing a semiconductor device of the present invention,
Since the same effect can be obtained for the same reason as the above etching method, deterioration of the element performance due to etching can be eliminated, and the element performance can be improved, and the yield can be improved.

[Brief description of the drawings]

FIG. 1 is a sectional view of a manufacturing process showing an example of an embodiment according to an etching method of the present invention.

FIG. 2 is a cross-sectional view illustrating a manufacturing process of the first embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 3 is a cross-sectional view of a manufacturing process showing a second embodiment of the method of manufacturing a semiconductor device according to the present invention.

FIG. 4 is a manufacturing process sectional view showing a second embodiment of the method for manufacturing a semiconductor device according to the present invention.

[Explanation of symbols]

 2 ... nitride-based compound semiconductor layer, 4 ... region to be etched

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F043 AA05 BB10 DD17 FF05 GG05 5F049 MA13 MB07 PA04 PA14 PA20 SS01 5F073 CA07 CB03 CB05 DA05 DA15 DA16 DA23

Claims (6)

[Claims] 1. An etching method comprising the steps of: performing ion implantation on a nitride-based compound semiconductor layer to form a region to be etched; and selectively removing the region to be etched by wet etching. Method. 2. The method according to claim 1, further comprising a step of heat-treating said nitride-based compound semiconductor layer after said etching. 3. The etching method according to claim 1, wherein said ion implantation is performed by implanting ions of at least one of nitrogen, boron and protons into said region to be etched. 4. A method for manufacturing a semiconductor device comprising a step of etching a nitride-based compound semiconductor layer, wherein the etching step comprises ion-implanting the nitride-based compound semiconductor layer to form a region to be etched. And a step of selectively removing the region to be etched by wet etching. 5. The method for manufacturing a semiconductor device according to claim 4, further comprising a step of heat-treating said nitride-based compound semiconductor layer after said etching. 6. The method according to claim 4, wherein the ion implantation is performed by implanting at least one of nitrogen, boron, and protons into the region to be etched.