JP2002164362A - Chip size semiconductor device and method of manufacturing the same - Google Patents

Abstract

(57) [Summary] [PROBLEMS] A highly reliable chip-size semiconductor device that does not damage an integrated circuit due to chipping or internal penetration damage of a semiconductor chip even when subjected to an external force during handling such as mounting. Get. SOLUTION: On the side surface of a semiconductor chip 2 provided with an electrode pad 3 on the surface, a thermosetting epoxy resin material having a height of about 200 to 250 μm from the surface and a thickness of about 80 to 110 μm is used. A chip protection layer for protecting the chip 2 is fixed to form a chip size semiconductor device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip size semiconductor device in which a chip protection layer is fixed to a side surface of a semiconductor chip to prevent damage to an integrated circuit due to chip breakage during handling and to improve reliability during mounting. And a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, there has been an abundance of customer needs for higher functionality, smaller size, lighter weight, and lower cost of electronic devices such as mobile phones and notebook personal computers. There is also a demand for semiconductor devices that can be mounted with high reliability in a limited space.
As a semiconductor device meeting this demand, CSP (C
Although a resin-sealed semiconductor device of a chip size package (hip size package) type is used, a bare semiconductor chip that is not package-sealed (hereinafter, referred to as a bare chip) with the aim of further reducing the mounting area and making it thinner. Are connected to an electrode of a printed circuit board or the like via bumps with the integrated circuit surface facing down, so-called "flip-chip mounting" is increasingly used.

As a semiconductor device to be flip-chip mounted, for example, Japanese Unexamined Patent Application Publication No. 2000-260811 discloses that a solder bump is provided on an electrode on the surface of a chip, and a slit is formed on the back surface of the chip in a matrix or perpendicular to the long side of the chip. Discloses a semiconductor device in which the above-mentioned solder bumps of a semiconductor chip are connected face-down bonding to electrode pads provided on a circuit board, and states that stress relaxation after melting of the solder bumps, which are connection points, can be realized. .
Here, the semiconductor chip is formed by forming a solder bump and a slit in a wafer state, and then cutting it by a dicing device.

[0004]

Since the conventional flip-chip mounted semiconductor device is constructed as described above, the side surface of the cut semiconductor chip is shown in the end shape diagram of the semiconductor chip in FIG. Thus, when viewed microscopically, the myriad cutting marks 2c at the time of dicing are formed on the side surfaces of the semiconductor chip 2.
Are engraved (see the enlarged side view of the semiconductor chip in FIG. 9A), and the unevenness 2d is formed by the cutting marks 2c (see the enlarged sectional side view of the semiconductor chip in FIG. 9B).
For this reason, when the semiconductor chip 2 comes into contact with another member during transportation, or when the semiconductor chip 2 is mounted on a circuit board by a mounting device, the semiconductor chip 2 may be used.
When a force is applied to the semiconductor chip, there may be a case where the unevenness 2d on the side surface of the semiconductor chip serves as a starting point to cause chipping 2e. Since silicon itself is hard and brittle like glass, the edge portion of the semiconductor chip 2 is scratched when pinched with tweezers or the like, and the scratch reaches the inside of the semiconductor chip 2 and may cause an internal penetration scratch 2f. (Refer to the enlarged view of the front end of the semiconductor chip in FIG. 9). Chip chip 2e of semiconductor chip
And the internal penetration damage 2f not only damages the integrated circuit formation portion and may result in a defective product, but also leads to a stagnation in a continuous semiconductor device manufacturing process, which may cause damage during handling. There has been a demand for a highly reliable chip size semiconductor device.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and has been described in connection with the handling of a semiconductor device at the time of transportation or mounting, without causing chip breakage or the like to damage an integrated circuit. It is an object of the present invention to provide a high-priced and inexpensive chip size semiconductor device and a method of manufacturing the same.

[0006]

According to the present invention, there is provided a chip-size semiconductor device, comprising: a semiconductor chip having an integrated circuit and external electrodes provided on a surface thereof; And a chip protection layer for protecting the semiconductor chip from external force.
Further, the chip protection layer is made of an insulating resin material. Further, the external electrodes of the semiconductor chip are electrode pads for wire bonding. Further, the external electrodes of the semiconductor chip are bump electrodes for face-up bonding or face-down bonding.

A method of manufacturing a chip-size semiconductor device according to the present invention is a method of dicing and forming a semiconductor wafer provided with an integrated circuit and its external electrodes. Providing a notch of a first width in the semiconductor wafer along the
A step of filling the cut portion with the insulating resin, attaching the cut portion to the wall surface of the cut portion, and solidifying the cut portion; and making a cut of a second width smaller than the first width along the center of the width of the solidified insulating resin. And a step of separating each semiconductor chip forming portion.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG.
1 is a perspective view of a chip-size semiconductor device according to a first embodiment of the present invention. FIG. 2 is a cross-sectional view taken along the line II-II of FIG. In the figure, 1 is a chip size semiconductor device,
Reference numeral 2 denotes a semiconductor chip in which an integrated circuit (not shown) and an external electrode electrode pad 3 are formed in the vicinity of the surface 2a, and the electrode pad 3 is formed by an aluminum layer for wire bonding by a known method. It is. 4
Is a chip protection layer made of a thermosetting epoxy resin adhered to the side surface of the semiconductor chip 2 including the end on the side of the surface 2a in order to prevent chipping due to external force on the semiconductor chip 2. It is provided on the side surface with a thickness of about 80 to 110 μm and a height of about 200 to 250 μm from the end of the surface 2a. However, this height varies depending on the thickness of the semiconductor wafer.

The chip size semiconductor device 1 includes a semiconductor chip 2, an electrode pad 3, and a chip protection layer 4. The back surface 2b is bonded to a die pad, and the electrode pad 3 and the inner lead are connected by wire bonding with a thin metal wire. So-called COB, which is a resin-sealed semiconductor device in which the back surface 2b is joined to a printed wiring board and the electrode pads 3 and the electrode pads of the printed wiring board are wire-bonded and connected by thin metal wires. (Chip
In the case of application to On Board, etc., since the semiconductor chip 2 is protected on the side surface by the chip protection layer 4 and is resistant to mechanical shock due to external force, occurrence of defective products due to chip chipping or the like at the time of mounting is prevented, and the yield is improved. There is an advantage that a semiconductor device can be manufactured. In the mounting, even if a thin metal wire connected by wire bonding hangs down and comes into contact with the edge portion of the chip-size semiconductor device 1, the semiconductor chip 2 is short-circuited because it is insulated by the chip protection layer 4 which is an insulator. There is also a side effect of not being able to do so.

Next, a description will be given of a method of manufacturing the chip-size semiconductor device configured as described above. FIG. 3 is a plan view of a semiconductor wafer, and FIG. 4 is a diagram showing a manufacturing process of a chip size semiconductor device in the order of processes. In FIG.
Reference numeral 5 denotes a semiconductor wafer formed of a single crystal silicon plate having a thickness of about 400 to 450 μm, and a semiconductor chip forming portion 5a
Is a section defined and surrounded by the dicing line 5b. An integrated circuit (not shown) and an electrode pad 3 as an external electrode are formed on the surface of the semiconductor chip forming portion 5a.

The manufacturing process of the chip size semiconductor device 1 using the semiconductor wafer of FIG. 3 includes the following steps. A. Wafer sheet bonding step (FIG. 4A);
An adhesive is applied to one surface of a wafer sheet 6 made of a soft vinyl chloride tape having a thickness of about 0 μm to form a semiconductor wafer 5.
Thermo-compression bonding or sticking. I. Step of forming notch (FIG. 4B); semi-full-cut semiconductor wafer 5 with a dicing blade along dicing line 5b, and width (also referred to as first width)
In addition, the cut portion 7 having a depth of about 200 to 250 μm is formed. C. Step of filling notch (FIG. 4 (c)): A thermosetting epoxy resin is filled in notch 7 by a method using a known dispenser and adhered to the wall surface of notch 7, and then a dryer or The filled thermosetting epoxy resin is dried and solidified, for example, at a temperature of about 100 ° C. using a heating furnace or the like (neither is shown), and the insulating filler 8 fixed to the wall surface of the cut portion 7 is formed. To form Note that the ultraviolet curable resin or the quick-drying resin may be dried and solidified at room temperature using an ultraviolet lamp. D. Wafer dicing step (FIG. 4D): A width of about 20 to 40 μm (also referred to as a second width) is applied along the center of the width of the insulating filler 8 to the insulating filler 8 and the semiconductor wafer 5 by a dicing blade. ) Is cut and full-cut, and a chip protective layer made of a thermosetting epoxy resin material and having a thickness of about 80 to 110 μm and a height of about 200 to 250 μm, which is made of a thermosetting epoxy resin material while leaving the wafer sheet 6 to a thickness of about 30 μm. 4
Is formed on the side surface of the semiconductor chip 2 to form a chip-size semiconductor device 1. In this case, the wafer sheet 6 is conveyed without being cut or cut into an appropriate width, and the chip size semiconductor device 1 is adhered thereto. Thereafter, the chip size semiconductor device 1 separated by a known method is
Implemented in various forms.

In the first embodiment, the semiconductor chip 2 has an electrode pad 3 made of an aluminum layer as an external electrode. However, the present invention is not limited to this.
For example, Ti, Cr is used as a joining metal on an aluminum layer.
And Pt, Ag, Cu, W, N
i and the like are used to form a well-known bump electrode for face-up bonding formed by laminating (not shown) by appropriately combining Au, Cu, Pb / Sn or the like as a bump metal, and TAB (Tape) using a carrier tape.
The present invention may be applied to a semiconductor device having an Automated Bonding structure.

Embodiment 2 FIG. FIG. 5 is a perspective view of a chip size semiconductor device according to a second embodiment of the present invention.
Is a cross-sectional view taken along the line VI-VI of FIG. 5, and FIG. 7 is a view showing a manufacturing process of the chip-size semiconductor device according to the second embodiment of the present invention in the order of steps. In each drawing, the same reference numerals indicate the same or equivalent components as those in the first embodiment. same as below.

In FIG. 1, reference numeral 11 denotes a chip-size semiconductor device, which is 80 to 110 μm on all side surfaces of the semiconductor chip 2.
The point that the chip protection layer 14 made of a thermosetting epoxy resin having a thickness of about 3 mm is fixed to further protect the semiconductor chip 2 against external force, the point of the chip size semiconductor device 1 in the first embodiment. Although different from the configuration, the same effects as in the first embodiment can be obtained.

Next, a method of manufacturing the chip size semiconductor device 11 using the semiconductor wafer of FIG. 3 will be described with reference to FIG. A. Wafer sheet bonding step (FIG. 7A);
An adhesive is applied to one surface of a wafer sheet 6 made of a soft vinyl chloride tape having a thickness of about 0 μm to form a semiconductor wafer 5.
Thermo-compression bonding or sticking. I. Step of forming notches (FIG. 7B); dicing line 5b of semiconductor wafer 5 with dicing blade
To form a cut portion 17 having a width of about 200 to 250 μm (also referred to as a first width). In this case, the wafer sheet 6 is not cut. C. Step of filling notch (FIG. 7 (c)): A thermosetting epoxy resin is filled into notch 17 by a method using a known dispenser and adheres to the wall surface of notch 17, and thereafter, a drier or The filled thermosetting epoxy resin is dried and solidified at a temperature of, for example, about 100 ° C. by using a heating furnace or the like (neither is shown), and the insulating filler 18 adhered to the wall surface of the cutout 17. To form In addition, you may dry and solidify at normal temperature using an ultraviolet lamp. D. Wafer dicing step (FIG. 7D); a cut 19 having a width of about 20 to 40 μm (also referred to as a second width) is formed in the insulating filler 18 along the center of the width of the insulating filler 18 by a dicing blade. To form a chip-sized semiconductor device 11 in which a chip protection layer 14 made of a thermosetting epoxy resin material and having a thickness of about 80 to 110 μm is fixed to all side surfaces of the semiconductor chip 2. In this case, the wafer sheet 6 is not cut except for a thickness of about 30 μm.

Thereafter, the chip size semiconductor device 11 is separated and mounted in various forms in the same manner as in the first embodiment. In the second embodiment as well, the external electrodes of the chip-size semiconductor device 11 are not limited to the electrode pads 3 made of an aluminum layer, and as in the first embodiment, bump electrodes for face-up bonding are formed. Needless to say, it is good.

Embodiment 3 FIG. 8 is a perspective view of a chip-size semiconductor device according to Embodiment 3 of the present invention.
In FIG. 8, reference numeral 21 denotes a chip size semiconductor device;
Electrode pad 3 made of aluminum layer of semiconductor chip 2
For example, a well-known layer (not shown) is formed by appropriately combining, for example, Ti, Cr or the like as a bonding metal, Pt, Ag, Cu, W, Ni, or the like as a barrier metal and Pb / Sn or the like as a bump metal. A bump electrode 13 for face-down bonding is formed by a method.
Flip chip mounting is performed directly on an electrode of a printed wiring board or the like with 3 facing downward. The chip-size semiconductor device 21 includes the semiconductor chip 2, the electrode pads 3, the chip protection layer 4, and the bump electrodes 13 for face-down bonding, and is manufactured through the same steps as in the first embodiment. Thus, the same effect as in the first embodiment can be obtained.

In the first to third embodiments, the chip protection layers 4 and 14 are both formed of a thermosetting epoxy resin. However, the present invention is not limited to this. It may be similarly formed of a conductive resin material. For dicing semiconductor wafers,
Although the dicing with a dicing blade has been described, dicing may be performed with a laser.

[0019]

The present invention is configured as described above.
The following effects are obtained. A chip protection layer that protects the semiconductor chip from external force is fixed to the side surface of the semiconductor chip, including the front end, to form a chip-size semiconductor device. Even if the chip protection layer is damaged, damage to the integrated circuit formation portion due to chipping of the semiconductor chip or occurrence of internal penetration damage is prevented by the bumper effect of the chip protection layer, and a highly reliable chip size semiconductor device can be obtained. In addition, since the chip protection layer is made of an insulating resin material, even if a thin metal wire hangs down and comes into contact with the edge of the semiconductor chip when the chip size semiconductor device is mounted by wire bonding, the chip protection layer is insulated. Therefore, the semiconductor chip is not short-circuited.

[Brief description of the drawings]

FIG. 1 is a perspective view of a chip size semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line II-II of FIG.

FIG. 3 is a plan view of a semiconductor wafer.

FIG. 4 is a diagram illustrating a manufacturing process of the chip-size semiconductor device according to the first embodiment of the present invention in a process order;

FIG. 5 is a perspective view of a chip-size semiconductor device according to a second embodiment of the present invention;

FIG. 6 is a cross-sectional view taken along the line VI-VI of FIG.

FIG. 7 is a diagram showing a manufacturing step of a chip-size semiconductor device according to a second embodiment of the present invention in the order of steps;

FIG. 8 is a sectional view of a chip-size semiconductor device according to a third embodiment of the present invention;

9A and 9B are diagrams showing an end shape of a conventional semiconductor chip, wherein FIG. 9A is an enlarged side view of the semiconductor chip, FIG. 9B is an enlarged side sectional view of the semiconductor chip, and FIG. FIG.

DESCRIPTION OF SYMBOLS 1,11,21; Chip size semiconductor device 2: Semiconductor chip 3: Electrode pad 4, 14; Chip protective layer 5; Semiconductor wafer 7, 17; Cut portion 8, 18; Insulating filler 9,
19; break 13; bump electrode

Claims (5)

[Claims] 1. A semiconductor chip having an integrated circuit and external electrodes provided on a surface thereof, and a chip protection layer which is fixed to a side surface of the semiconductor chip including the surface side end portion and protects the semiconductor chip from external force. A chip-size semiconductor device characterized by the above-mentioned. 2. The chip size semiconductor device according to claim 1, wherein the chip protection layer is made of an insulating resin material. 3. The chip-size semiconductor device according to claim 1, wherein the external electrodes of the semiconductor chip are electrode pads for wire bonding. 4. The chip size semiconductor device according to claim 1, wherein the external electrodes of the semiconductor chip are face-up bonding or face-down bonding bump electrodes. 5. A method of manufacturing a chip-size semiconductor device, which is formed by dicing a semiconductor wafer having an integrated circuit and external electrodes provided on a surface thereof, wherein said semiconductor wafer is formed along a dicing line dividing each semiconductor chip forming portion. Providing a cut portion of a first width in the semiconductor wafer, filling the cut portion with an insulating resin, attaching the cut portion to a wall surface of the cut portion, and solidifying the cut portion; A method for manufacturing a chip-size semiconductor device, comprising a step of separating each semiconductor chip forming portion by making a cut of a second width smaller than the first width.