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JP2002141201A - Thin-film resistor and its manufacturing method - Google Patents

Thin-film resistor and its manufacturing method

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Publication number
JP2002141201A
JP2002141201A JP2000336000A JP2000336000A JP2002141201A JP 2002141201 A JP2002141201 A JP 2002141201A JP 2000336000 A JP2000336000 A JP 2000336000A JP 2000336000 A JP2000336000 A JP 2000336000A JP 2002141201 A JP2002141201 A JP 2002141201A
Authority
JP
Japan
Prior art keywords
film resistor
thin film
sputtering
thin
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000336000A
Other languages
Japanese (ja)
Inventor
Kyoji Kobayashi
恭司 小林
Shuichi Horio
修一 堀尾
Tomonori Oguchi
友規 小口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koa Corp
Original Assignee
Koa Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koa Corp filed Critical Koa Corp
Priority to JP2000336000A priority Critical patent/JP2002141201A/en
Publication of JP2002141201A publication Critical patent/JP2002141201A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a thin-film resistor, which is high in stability of properties related to temperature such as temperature coefficient or the like, easily increased in resistance, and manufactured by a low cost apparatus, and to provide a method of manufacturing the same. SOLUTION: A metal thin-film resistor 21a is arranged on the surface of a board 11 for the formation of a thin-film resistor, in which the metal thin-film resistor 21a is formed of material composed of chrome, silicon, and valve metal or transition metal.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は薄膜抵抗器及びその
製造方法に係り、特に高い比抵抗領域において安定した
温度係数等の特性を低コストで得ることができる薄膜抵
抗体の形成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film resistor and a method of manufacturing the same, and more particularly to a method of forming a thin film resistor capable of obtaining stable characteristics such as a temperature coefficient in a high resistivity region at low cost.

【0002】[0002]

【従来の技術】金属薄膜抵抗体は、薄膜チップ抵抗器等
に広く用いられている。この薄膜チップ抵抗器に用いら
れる薄膜抵抗体は、例えばクロム(Cr)とシリコン
(Si)、又はニッケル(Ni)とクロム(Cr)等の
金属をセラミック基板上にスパッタリング又は真空蒸着
により着膜し合金化して、これをフォトリソグラフィ等
により所要の形状に加工して抵抗器としたものである。
係るチップ抵抗器においては、特に例えば500μΩc
m以下の比抵抗を用いて形成された抵抗器において良好
な抵抗値精度と共に良好な温度係数等の特性が得られ、
高精度チップ抵抗器として広く各種電子機器に用いられ
ている。
2. Description of the Related Art Metal thin film resistors are widely used for thin film chip resistors and the like. A thin film resistor used in this thin film chip resistor is formed by depositing a metal such as chromium (Cr) and silicon (Si) or nickel (Ni) and chromium (Cr) on a ceramic substrate by sputtering or vacuum evaporation. It is alloyed and processed into a required shape by photolithography or the like to form a resistor.
In such a chip resistor, particularly, for example, 500 μΩc
m, a resistor formed using a specific resistance of not more than m can obtain characteristics such as a good temperature coefficient and a good resistance value accuracy,
Widely used in various electronic devices as high precision chip resistors.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、係る薄
膜抵抗体においては、高比抵抗領域で小さな温度係数等
の商業的に利用可能な十分に安定した特性を有する抵抗
体を形成することが難しい。即ち、例えば抵抗温度係数
が±25ppm/℃以下で200μΩcm以上の抵抗体
皮膜を形成することは薄膜抵抗体材料としてニッケル・
クロム材を用いては困難であった。同様に、クロム・シ
リコン材を用いた場合にも、抵抗体皮膜としては例えば
500μΩcm程度を形成することができるが、この場
合にも温度係数は上述した、例えば±25ppm/℃以
下のものを安定に得ることが難しく、一般に高比抵抗領
域の温度係数等の温度に関する特性の安定性がよくなか
った。又、一般的に高比抵抗皮膜の形成は絶縁物の含有
量が多くなるため、そのスパッタリングは高価な高周波
電源が必要となっている。
However, in such a thin film resistor, it is difficult to form a resistor having sufficiently stable characteristics that can be used commercially, such as a small temperature coefficient in a high resistivity region. That is, for example, forming a resistor film having a resistance temperature coefficient of ± 25 ppm / ° C. or less and a resistance film of 200 μΩcm or more requires nickel thin film as a thin film resistor material.
It was difficult to use chromium. Similarly, when a chromium-silicon material is used, a resistor film of, for example, about 500 μΩcm can be formed. It is generally difficult to obtain such characteristics, and generally the stability of characteristics relating to temperature, such as the temperature coefficient of the high resistivity region, is not good. In general, the formation of a high specific resistance film requires a high-frequency power source, which is expensive, because the content of the insulator increases.

【0004】本発明は上記事情に鑑み為されたもので、
温度係数等の温度に関する特性の安定性が良好で高抵抗
値が容易に得られ且つ低コストの装置で形成できる薄膜
抵抗器及びその製造方法を提供することを目的とする。
[0004] The present invention has been made in view of the above circumstances,
It is an object of the present invention to provide a thin-film resistor that has good stability of temperature-related characteristics such as a temperature coefficient, can easily obtain a high resistance value, and can be formed by a low-cost device, and a method of manufacturing the same.

【0005】[0005]

【課題を解決するための手段】本発明の薄膜抵抗器は、
金属薄膜抵抗体を基板表面に配置した薄膜抵抗器におい
て、前記薄膜抵抗体がクロムとシリコンにバルブ金属又
は遷移金属を加えた材料からなることを特徴とする。
According to the present invention, there is provided a thin film resistor comprising:
In a thin film resistor having a metal thin film resistor disposed on a substrate surface, the thin film resistor is made of a material obtained by adding a valve metal or a transition metal to chromium and silicon.

【0006】上述した本発明によれば、クロムとシリコ
ンにNb、Ta、Al、Cu、Mn、Zr、Niのいず
れか又はこれらの組合せからなるバルブ金属又は遷移金
属を含んで金属薄膜をスパッタリングにより形成するこ
とで、良好な温度係数をはじめ、特に温度に関して安定
した特性が得られる高比抵抗領域の薄膜抵抗体を形成す
ることができる。従って、この薄膜抵抗体を用いること
により、高抵抗値で、且つ温度係数が小さい薄膜抵抗器
が得られる。ここで、該当金属はNb、Ta、Al、C
u、Mn、Zr、Ni等について上述した良好な特性が
得られる。
According to the present invention described above, a metal thin film containing chromium and silicon containing a valve metal or a transition metal composed of any one of Nb, Ta, Al, Cu, Mn, Zr and Ni or a combination thereof is formed by sputtering. By forming the thin film resistor, it is possible to form a thin film resistor in a high resistivity region in which a stable characteristic with respect to a temperature, particularly a good temperature coefficient, can be obtained. Therefore, by using this thin film resistor, a thin film resistor having a high resistance value and a small temperature coefficient can be obtained. Here, the applicable metals are Nb, Ta, Al, C
The favorable characteristics described above are obtained for u, Mn, Zr, Ni, and the like.

【0007】又、本発明の薄膜抵抗器の製造方法は、セ
ラミック基板に薄膜抵抗体を形成する薄膜抵抗器の製造
方法において、クロムとシリコンに加え、バルブ金属又
は遷移金属材料のいずれか又は数種を含んで、スパッタ
リングにより前記基板上に前記薄膜抵抗体を形成する工
程を含むことを特徴とする。ここで、前記スパッタリン
グに際して、不活性ガスに窒素ガスを加えた雰囲気下で
前記スパッタリングを行うことが好ましい。
The method of manufacturing a thin film resistor according to the present invention is a method of manufacturing a thin film resistor in which a thin film resistor is formed on a ceramic substrate. A step of forming the thin-film resistor on the substrate by sputtering, including a seed. Here, at the time of the sputtering, it is preferable to perform the sputtering in an atmosphere in which a nitrogen gas is added to an inert gas.

【0008】これにより、薄膜チップ抵抗器、又はネッ
トワーク素子等において、比較的高い抵抗領域におい
て、小さな温度係数等の良好な特性を有する抵抗素子を
良好な歩留で生産することができる。又、スパッタリン
グ時にAr等の不活性ガスにN ガスを混合しつつ着膜
することで、高比抵抗領域における抵抗値の制御を容易
に行える。
As a result, a thin-film chip resistor or a network
In relatively high resistance areas of
Resistance element having good characteristics such as a small temperature coefficient.
It can be produced with good yield. Also, sputter
To inert gas such as Ar 2Deposition while mixing gas
Makes it easy to control the resistance value in the high resistivity region
Can be done.

【0009】又、この方法で形成される高比抵抗の薄膜
抵抗体は、ターゲットに絶縁物を含まないため、高価な
高周波電源が不要であり、安価な直流電源のみで十分な
スパッタリング速度が得られる。
Further, the thin film resistor having a high specific resistance formed by this method does not require an expensive high-frequency power supply because the target does not contain an insulator, and a sufficient sputtering rate can be obtained with only an inexpensive DC power supply. Can be

【0010】[0010]

【発明の実施の形態】以下、本発明の実施の形態を図1
及び2を参照しながら説明する。
FIG. 1 is a block diagram showing an embodiment of the present invention.
This will be described with reference to FIGS.

【0011】図1は、本発明の実施の形態の薄膜抵抗体
の形成方法を模式的に示す。スパッタリング装置に着膜
対象のセラミック基板11を装着し、これに対面するよ
うにシリコンのターゲット13、クロムのターゲット1
5、バルブ金属又は遷移金属のターゲット17をそれぞ
れ配置する。スパッタリング装置には、不活性ガス、例
えばAr、とNの混合ガスを流しつつスパッタリング
着膜を行う。不活性ガスとNガスは別々にチャンバー
に供給されてチャンバー内で混合しても、あらかじめ混
合されたボンベ等から供給してもよい。
FIG. 1 schematically shows a method of forming a thin film resistor according to an embodiment of the present invention. A ceramic substrate 11 to be deposited is mounted on a sputtering apparatus, and a silicon target 13 and a chromium target 1 are faced thereto.
5. Arrange the targets 17 of the valve metal or the transition metal. Sputter deposition is performed in the sputtering apparatus while flowing an inert gas, for example, a mixed gas of Ar and N 2 . The inert gas and the N 2 gas may be separately supplied to the chamber and mixed in the chamber, or may be supplied from a pre-mixed cylinder or the like.

【0012】スパッタリングは、低圧の不活性ガス雰囲
気下でターゲットと着膜対象の基板間に直流電圧等を印
加することにより、電離した不活性ガスイオンがそれぞ
れのターゲットを叩くことにより、クロム材13、シリ
コン材15、バルブ金属又は遷移金属材17からそれぞ
れの金属元素が飛び出して基板11の表面に着膜して合
金化することにより行われる。なお、この実施例では、
クロム、シリコン、及びバルブ金属又は遷移金属をそれ
ぞれ別個のターゲットを作成してスパッタリングを行う
例について説明したが、予め所望の成分比を有するクロ
ム、シリコン、バルブ金属又は遷移金属からなる合金タ
ーゲットを準備しておき、この一枚のターゲットからス
パッタリング着膜を行うようにしてもよい。又、電源は
ターゲットがすべて金属材であるので安価な直流電源で
十分であるが、高周波電源を使用しても何ら問題はな
い。
In sputtering, a DC voltage or the like is applied between a target and a substrate to be deposited in a low-pressure inert gas atmosphere, and ionized inert gas ions strike each target, thereby forming a chromium material 13. Each metal element jumps out of the silicon material 15, the valve metal or the transition metal material 17, deposits on the surface of the substrate 11, and is alloyed. In this embodiment,
An example was described in which chromium, silicon, and a valve metal or a transition metal were separately formed to perform sputtering, but an alloy target made of chromium, silicon, a valve metal, or a transition metal having a desired component ratio was prepared in advance. In addition, the sputtering deposition may be performed from the single target. In addition, as the power supply, an inexpensive DC power supply is sufficient because the target is entirely made of a metal material, but there is no problem even if a high-frequency power supply is used.

【0013】スパッタリング着膜においては、クロム、
シリコン、及びバルブ金属又は遷移金属のいずれか又は
数種の組合せの成分比により各種特性を有する薄膜抵抗
体が形成される。そして、スパッタリング成膜時に不活
性ガス(Ar)雰囲気中にN ガスを混入することによ
り、形成される薄膜抵抗体の比抵抗が高くなる傾向があ
る。即ち、例えばベースとなるArガスに対してN
スを10%程度混入することで、比較的高い比抵抗50
0μΩcm程度が得られ、又Nガスを40%程度混入
することによりその比抵抗を10000μΩcm程度ま
で上げることができ、このように不活性ガス(Ar)と
ガスの混合比を変えることにより自由に所望する比
抵抗を得ることが出来る。
In the sputtering deposition, chromium,
Silicon, and either valve metal or transition metal or
Thin film resistors with various characteristics depending on the composition ratio of several combinations
A body is formed. And it is inactive during sputtering film formation
N in an inert gas (Ar) atmosphere 2By mixing gas
And the specific resistance of the formed thin film resistor tends to increase.
You. That is, for example, N gas is used for the base Ar gas.2Moth
About 10%, a relatively high specific resistance of 50%.
About 0μΩcm is obtained.2About 40% mixed gas
The specific resistance to about 10,000μΩcm.
With inert gas (Ar)
N2The desired ratio can be freely set by changing the gas mixing ratio.
Resistance can be obtained.

【0014】次に、図2を参照して本発明の着膜方法を
用いた薄膜チップ抵抗器の製造方法について説明する。
まず(a)に示すように、アルミナ等のセラミック基板
11を準備する。そして、(b)に示すように上述した
シリコンとクロムにバルブ金属又は遷移金属を加えたタ
ーゲット材を用いてスパッタリングによる着膜を行う。
着膜21の厚さは、例えば1000Å程度である。そし
て、(c)に示すようにフォトリソ技術を用いてパター
ニングを行い薄膜抵抗体パターン21aを形成する。こ
れにより、例えば数百kΩの高い抵抗値の薄膜抵抗体が
得られる。そして、セラミック基板の裏面側からレーザ
スクライバを用いてスクライブ用の切り込みを設ける。
Next, a method of manufacturing a thin film chip resistor using the film deposition method of the present invention will be described with reference to FIG.
First, as shown in (a), a ceramic substrate 11 of alumina or the like is prepared. Then, as shown in (b), a film is formed by sputtering using a target material obtained by adding a valve metal or a transition metal to silicon and chromium as described above.
The thickness of the deposited film 21 is, for example, about 1000 °. Then, as shown in (c), patterning is performed by using a photolithography technique to form a thin film resistor pattern 21a. Thereby, a thin film resistor having a high resistance value of, for example, several hundred kΩ can be obtained. Then, scribing cuts are provided from the back side of the ceramic substrate using a laser scriber.

【0015】次に、下地電極23の着膜を行う。下地電
極としては、例えばCuのスパッタリング膜が用いら
れ、例えばメタルマスクを用いてスパッタリングを行う
ことにより図示の形状の下地電極23を形成する。な
お、この下地電極23はセラミック基板の裏面側にも同
様にメタルマスク等を用いてスパッタリングにより形成
する。次に、Nガス雰囲気中でエージング処理を行
う。このエージング処理は、例えば温度が500−70
0℃程度で行われ、スパッタリング着膜時の膜質の調整
がなされる。従って、このエージング処理により温度係
数が例えば±25ppm/℃程度と極めて小さく、且つ
直線的な特性が得られる。さらにレーザトリミングを施
し、抵抗値の高精度の調整を行う。
Next, the base electrode 23 is deposited. As the base electrode, for example, a Cu sputtering film is used, and the base electrode 23 having the illustrated shape is formed by performing sputtering using, for example, a metal mask. The base electrode 23 is also formed on the back side of the ceramic substrate by sputtering using a metal mask or the like. Next, an aging process is performed in an N 2 gas atmosphere. This aging treatment is performed, for example, at a temperature of 500-70.
This is performed at about 0 ° C., and the film quality at the time of sputtering deposition is adjusted. Therefore, the aging process provides a very small temperature coefficient of, for example, about ± 25 ppm / ° C. and linear characteristics. Further, laser trimming is performed to adjust the resistance value with high accuracy.

【0016】そして、(e)に示すようにオーバコート
膜25を形成する。このオーバコート膜は、例えば樹脂
の保護膜であり、樹脂ペーストをスクリーン印刷等で形
成後に硬化して形成する。次に、上述したレーザスクラ
イブ線に沿って1次ブレークを行い、短冊状のチップ群
を形成する。そして、露出した基板端面に端面下地電極
27を形成する。そして、2次ブレークを行い個々のチ
ップとし、端面下地電極及び基板の上面及び下面の下地
電極にニッケル鍍金及びハンダ鍍金を施し、これにより
電極部29が形成され、チップ抵抗器が完成する。
Then, an overcoat film 25 is formed as shown in FIG. The overcoat film is, for example, a resin protective film, and is formed by curing a resin paste after screen printing or the like. Next, a primary break is performed along the above-described laser scribe line to form a strip-shaped chip group. Then, an end face base electrode 27 is formed on the exposed end face of the substrate. Then, a secondary break is performed to form individual chips, and nickel plating and solder plating are applied to the end face base electrode and the base electrodes on the upper and lower surfaces of the substrate, whereby the electrode portion 29 is formed, and the chip resistor is completed.

【0017】このようにして製造されたチップ抵抗器に
よれば、薄膜抵抗体はクロムとシリコンにバルブ金属又
は遷移金属が含まれて形成されているので、これにより
特に数百kΩ程度以上の高抵抗領域において、温度係数
が例えば±25ppm/℃以下の安定した特性を実現で
きる。即ち、例えば1MΩの薄膜チップ抵抗器としては
高い抵抗値を有すると共に、低い温度係数を有し、且つ
温度に対して直線的な特性を有する薄膜チップ抵抗器を
安定に生産することが可能となる。
According to the chip resistor manufactured as described above, the thin film resistor is formed of chromium and silicon containing a valve metal or a transition metal. In the resistance region, stable characteristics with a temperature coefficient of, for example, ± 25 ppm / ° C. or less can be realized. That is, for example, a thin film chip resistor having a high resistance value, a low temperature coefficient, and a linear characteristic with respect to temperature can be stably produced as a 1 MΩ thin film chip resistor. .

【0018】なお、上述した実施形態は薄膜チップ抵抗
器について説明したが、ネットワーク素子、集積回路素
子、或いはその他の形式の各種薄膜抵抗体についても、
本発明の趣旨を同様に適用できることは勿論である。
Although the above-described embodiment has been described with respect to a thin film chip resistor, a network device, an integrated circuit device, or various types of thin film resistors may be used.
It goes without saying that the gist of the present invention can be similarly applied.

【0019】[0019]

【発明の効果】以上説明したように、本発明によれば、
小さな温度係数が安定に得られ、特に温度に対して安定
した特性を有する高い抵抗値の薄膜抵抗器を実現するこ
とができる。
As described above, according to the present invention,
A small temperature coefficient can be stably obtained, and a thin film resistor having a high resistance value and particularly stable characteristics with respect to temperature can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施形態のスパッタリング着膜を模式
的に示した図である。
FIG. 1 is a diagram schematically showing a sputtering deposition according to an embodiment of the present invention.

【図2】本発明の実施形態の薄膜チップ抵抗器の製造方
法を説明した図である。
FIG. 2 is a diagram illustrating a method for manufacturing a thin-film chip resistor according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

11 セラミック基板 21 クロム・シリコンにバルブ金属又は遷移金
属を含んだ膜 21a 薄膜抵抗体パターン 23 下地電極 25 オーバコート膜 27 下地端面電極 29 電極部
Reference Signs List 11 ceramic substrate 21 film containing valve metal or transition metal in chromium / silicon 21a thin film resistor pattern 23 base electrode 25 overcoat film 27 base end face electrode 29 electrode part

───────────────────────────────────────────────────── フロントページの続き (72)発明者 小口 友規 長野県上伊那郡箕輪町大字中箕輪14016 コーア株式会社内 Fターム(参考) 5E033 AA06 BA03  ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tomoki Oguchi 14016 Nakaminowa, Minowa-cho, Kamiina-gun, Nagano F-term in Core Co., Ltd. 5E033 AA06 BA03

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 金属薄膜抵抗体を基板表面に配置した薄
膜抵抗器において、前記薄膜抵抗体がクロムとシリコン
にバルブ金属又は遷移金属を加えた材料からなることを
特徴とする薄膜抵抗器。
1. A thin film resistor having a metal thin film resistor arranged on a substrate surface, wherein the thin film resistor is made of a material obtained by adding a valve metal or a transition metal to chromium and silicon.
【請求項2】 セラミック基板に薄膜抵抗体を形成する
薄膜抵抗器の製造方法において、クロムとシリコンに加
え、Nb、Ta、Al、Cu、Mn、Zr、Niのいず
れか又は数種からなるバルブ金属又は遷移金属材料を含
んで、スパッタリングにより前記基板上に前記薄膜抵抗
体を形成する工程を含むことを特徴とする薄膜抵抗器の
製造方法。
2. A method of manufacturing a thin-film resistor for forming a thin-film resistor on a ceramic substrate, comprising a valve made of one or more of Nb, Ta, Al, Cu, Mn, Zr, and Ni in addition to chromium and silicon. A method for manufacturing a thin film resistor, comprising a step of forming the thin film resistor on the substrate by sputtering, including a metal or a transition metal material.
【請求項3】 前記スパッタリングに際して、不活性ガ
スに窒素ガスを加えた雰囲気下で前記スパッタリング着
膜を行うことを特徴とする請求項2記載の薄膜抵抗器の
製造方法。
3. The method of manufacturing a thin film resistor according to claim 2, wherein the sputtering is performed in an atmosphere in which a nitrogen gas is added to an inert gas during the sputtering.
【請求項4】 前記スパッタリングに際して、DC電源
を用いて前記スパッタリングを行うことを特徴とする請
求項2又は3記載の薄膜抵抗器の製造方法。
4. The method for manufacturing a thin film resistor according to claim 2, wherein the sputtering is performed by using a DC power supply at the time of the sputtering.
JP2000336000A 2000-11-02 2000-11-02 Thin-film resistor and its manufacturing method Pending JP2002141201A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007073651A (en) * 2005-09-06 2007-03-22 Sumitomo Metal Mining Co Ltd Film resistor and method of manufacturing same
US20170011826A1 (en) * 2015-07-07 2017-01-12 Koa Corporation Thin-film resistor and method for producing the same
CN108075459A (en) * 2016-11-14 2018-05-25 国家电网公司 Neutral point high resistant damping resistor
DE112017000522T5 (en) 2016-01-27 2018-10-11 Koa Corporation Chip resistor and method of making the same
US10760156B2 (en) 2017-10-13 2020-09-01 Honeywell International Inc. Copper manganese sputtering target
US11035036B2 (en) 2018-02-01 2021-06-15 Honeywell International Inc. Method of forming copper alloy sputtering targets with refined shape and microstructure

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JPS60116104A (en) * 1983-11-28 1985-06-22 株式会社タイセー Metal thin film resistor
JPH056802A (en) * 1990-11-30 1993-01-14 Hitachi Ltd Thin film resistor and method of forming the same
JPH07306002A (en) * 1994-05-13 1995-11-21 Nok Corp Thin film for strain gage and its manufacture method
JPH10270201A (en) * 1997-03-21 1998-10-09 Res Inst Electric Magnetic Alloys Cr-N based strain resistive film, method for producing the same, and strain sensor

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58119601A (en) * 1982-01-08 1983-07-16 株式会社東芝 Resistor
JPS60116104A (en) * 1983-11-28 1985-06-22 株式会社タイセー Metal thin film resistor
JPH056802A (en) * 1990-11-30 1993-01-14 Hitachi Ltd Thin film resistor and method of forming the same
JPH07306002A (en) * 1994-05-13 1995-11-21 Nok Corp Thin film for strain gage and its manufacture method
JPH10270201A (en) * 1997-03-21 1998-10-09 Res Inst Electric Magnetic Alloys Cr-N based strain resistive film, method for producing the same, and strain sensor

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007073651A (en) * 2005-09-06 2007-03-22 Sumitomo Metal Mining Co Ltd Film resistor and method of manufacturing same
US20170011826A1 (en) * 2015-07-07 2017-01-12 Koa Corporation Thin-film resistor and method for producing the same
CN106340361A (en) * 2015-07-07 2017-01-18 Koa株式会社 Thin-film resistor and method for producing same
US10115504B2 (en) * 2015-07-07 2018-10-30 Koa Corporation Thin-film resistor and method for producing the same
CN106340361B (en) * 2015-07-07 2019-07-19 Koa株式会社 Thin film resistor and its manufacturing method
DE112017000522T5 (en) 2016-01-27 2018-10-11 Koa Corporation Chip resistor and method of making the same
US10446295B2 (en) 2016-01-27 2019-10-15 Koa Corporation Chip resistor and method for producing the same
DE112017000522B4 (en) 2016-01-27 2024-05-08 Koa Corporation Chip resistor and method for manufacturing the same
CN108075459A (en) * 2016-11-14 2018-05-25 国家电网公司 Neutral point high resistant damping resistor
CN108075459B (en) * 2016-11-14 2019-09-06 国家电网公司 Neutral point high damping resistor
US10760156B2 (en) 2017-10-13 2020-09-01 Honeywell International Inc. Copper manganese sputtering target
US11035036B2 (en) 2018-02-01 2021-06-15 Honeywell International Inc. Method of forming copper alloy sputtering targets with refined shape and microstructure

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