JP2002076197A - Board for semiconductor device and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device superior in insulation withstand voltage characteristic and heat resistant cycle and rich in reliability. SOLUTION: The semiconductor device comprises a heat sink 5, an insulation board 1 on the heat sink 5, surface side conductor plates 21, 22, 23 arranged selectively on the insulation plate 1, semiconductor chips 31, 32 arranged on the surface side conductor plates 21, 22, 23, a solid insulator 11 brought into contact with the outer peripheral ends of the surface side conductor plates 21, 22, 23 and arranged on the upper face of the insulation board 1, a case 6 provided on the heat sink 5 so as to surround the insulation board 1, and a soft insulator 9 filled into the case 6. The solid insulator 11 has an intermediate thermal expansion coefficient between the thermal expansion coefficients of the surface side conductor plates 21, 22, 23 and the insulation board 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package such as a power module having a plurality of semiconductor chips mounted thereon.
In particular, the present invention relates to a power semiconductor device package requiring high voltage and high reliability, and a substrate (semiconductor device substrate) used for the package.

[0002]

2. Description of the Related Art As shown in FIG. 7, a package of a conventional power semiconductor device (power device) such as a power module has a front-side conductor plate 25 and a back-side conductor plate 24 attached to an insulating substrate 1, and a front-side conductor plate. Semiconductor chip 3 on body plate 25
3, 34, 35 are attached, and bonding wires 44,
It is tied at 45. The insulating substrate 1 is attached to a metal radiator plate 5 and is surrounded by a case 6. Attach the terminal holder 8 with the external connection leads 71 and 72,
Silicone gel 9 is poured into case 6 and sealed with sealing members 10a and 10b.

The case 6 is filled with a silicone gel 9 for insulation and sealing. This not only prevents the entry of external dust and dust, but also improves the withstand voltage characteristics compared to air.
Since a high-voltage insulation specification can be satisfied with a small insulation distance, a more compact package structure can be provided. Further, since the silicone gel 9 is a flexible insulating material, there is little danger of a mechanical load being applied to the bonding wires 44, 45 and the like due to expansion and contraction in a temperature cycle, thereby causing breakage.

[0004]

In the conventional package structure as shown in FIG. 7, an electric stress is generated between the front-side conductor plate 25 to which a high voltage is applied and the grounded radiator plate 5. Here, the most concentrated electric field is caused by the insulating substrate 1
This is a peripheral end of the upper front-side conductor plate 25. A partial discharge is generated from the peripheral end, and becomes a starting point of a final dielectric breakdown. Silicone gel 9 used by conventional methods
Has a drawback that the breakdown voltage is lower than that of a hard insulator (hereinafter, referred to as a “solid insulator”), and there is a limit to improvement in electrical characteristics such as dielectric strength. Then, instead of the silicone gel 9, a "solid insulator" made entirely of a hard resin such as an epoxy resin is filled into the case 6 constituting the package as shown in FIG. And an insulating substrate (ceramic substrate) 1 and the like, and the withstand voltage characteristics are improved. However, there is a difference in the coefficient of thermal expansion between the metal or the insulating substrate (ceramic substrate) 1 forming the bonding wires 44 and 45 and the solid insulator, and since both materials are hard,
So-called thermal stress generated by expansion and contraction due to temperature change,
Since the solid insulator cannot be absorbed, cracks are generated in the solid insulator, and the solid insulator is easily peeled. Therefore, when a solid insulator is used, mechanical and electrical destruction becomes a problem.

SUMMARY OF THE INVENTION In view of the above problems, an object of the present invention is to provide a semiconductor device substrate having excellent withstand voltage characteristics and heat cycle resistance and high reliability, and a semiconductor device using this semiconductor device substrate. .

Another object of the present invention is to prevent a thermal expansion or a thermal shrinkage of a filler from applying a thermal stress to a semiconductor chip or a storage case (container main body), thereby causing damage to a module or malfunction of the semiconductor chip. It is an object of the present invention to provide a semiconductor device substrate that does not have the same, and a semiconductor device using the semiconductor device substrate.

It is still another object of the present invention to provide a semiconductor device capable of more effectively preventing moisture from penetrating into a semiconductor module.

[0008]

In order to achieve the above object, a first feature of the present invention is to selectively arrange an insulating substrate and an insulating substrate so as to expose a peripheral portion of the insulating substrate. A conductor plate; and a solid insulator disposed on an upper surface of the insulating substrate in contact with an outer peripheral end of the conductor plate. The solid insulator has a coefficient of thermal expansion of the conductor plate and a coefficient of thermal expansion of the insulating substrate. The semiconductor device substrate includes at least a part (or all) of a material having a coefficient of thermal expansion having an intermediate value between the two. Here, as the “solid insulator”, a material obtained by curing a thermosetting resin such as an epoxy resin, a phenol resin, and a polyimide resin may be used.

According to the first feature of the present invention, since the outer peripheral edge of the conductor plate is provided with the solid insulator, the outer peripheral edge of the conductor plate and the peripheral portion of the insulating substrate are in close contact with each other. Furthermore, the presence of the solid insulator at the interface between the two reduces the electric field at the interface between the two, and makes it difficult for creeping discharge to occur. FIG.
In the conventional package structure as described above, the electric field is concentrated most at the peripheral edge of the front-side conductor plate 25 on the insulating substrate 1. A partial discharge is generated from this portion, and becomes a starting point of a final dielectric breakdown. Therefore, in the first aspect of the present invention, the peripheral end portion is selectively coated with a solid insulator having excellent electric characteristics to achieve the enhancement of the insulating characteristics. As a result, dielectric breakdown can be prevented, a high breakdown voltage of the power semiconductor device can be realized, and reliability can be improved. In particular, if the height of the solid insulator is set to exceed the surface of the semiconductor chip, the thick solid insulator prevents penetration breakdown from penetrating the solid insulator from the outer peripheral edge of the conductor plate, and prevents surface breakdown. It can be completely prevented. Since the solid insulator is vulnerable to a heat cycle and easily causes peeling and cracking, it is selectively applied only to a necessary minimum portion.

A power semiconductor device (power device) used in a very severe environment such as an automobile must pass a reliability test such as a severe heat cycle test. For this reason, the mechanical strength (adhesion) at the interface between different materials between the solid insulator and the insulating substrate or the front-side conductor plate
And further strengthening of reliability, etc. are needed. Usually, the material used for the front-side conductor plate is a metal such as a copper (Cu) plate, aluminum (Al), nickel (Ni), or the like. On the other hand, to form an insulating substrate, aluminum nitride (AlN) and aluminum oxide (Al
Ceramics such as ₂ O ₃ ) and silicon nitride (Si ₃ N ₄ ). Compared to these metal materials and ceramic materials,
Epoxy resin, phenol resin,
A thermosetting resin such as a polyimide resin has a large coefficient of thermal expansion and generates a large stress due to a change in temperature. In particular, a large stress is generated at the corner portion of the end of the front-side conductor plate due to stress concentration. That is, since the outer peripheral end of the front-side conductor plate is generally at a right angle for convenience in manufacturing, there is a high possibility that the resin / copper plate interface will peel off.

When the power semiconductor device (power device) or power IC is actually operated (operated), it is turned on at normal temperature (about −20 ° C. in a cold region in winter) by energization.
It reaches 100 ° C. or more in a few minutes, and a large temperature change occurs. Insulating substrate, conductor plate,
Since the thermal expansion coefficients of solid insulators are different, large thermal stress is generated at the interface between dissimilar materials due to expansion and contraction due to temperature change, and even if it is partial, there is a possibility that minute peeling or cracks may occur in the solid insulator . Even if it is a small gap, if peeling or cracking occurs, the partial discharge characteristics are significantly reduced. The coefficient of thermal expansion of the insulating substrate, the conductor plate, and the solid insulator is α
_Assuming that _s , α _c , and α _i , the magnitude of the thermal expansion coefficient generally increases in the order of α _s <α _c <α _i (1). Since the solid insulator is structurally in contact with both the insulating substrate and the front-side conductor plate, the thermal expansion coefficient α _i (x) of the solid insulator is determined by the thermal expansion coefficient of the insulating substrate as in the first aspect of the present invention. a rate alpha _s, is set to an intermediate value of the thermal expansion coefficient alpha _c conductive plate, be effective to the difference in thermal expansion and contraction to a minimum. The solid insulator can be reduced in thermal expansion coefficient α _i (x) by filling a large amount of inorganic powder. Furthermore, if the solid insulator contains powdered aluminum oxide or the like, the electric field can be reduced and creeping discharge can be suppressed.

In particular, in the semiconductor device substrate according to the first aspect of the present invention, the coefficient of thermal expansion α _i (x) of the solid insulator is
Is a function of the spatial coordinate x, a value close to the coefficient of thermal expansion α _c of the conductive plate near the outer peripheral end of the conductive plate, and a value close to the coefficient of thermal expansion α _s of the insulating substrate near the insulating substrate. Is preferred. In this way, if the coefficient of thermal expansion is selected so as to change according to the spatial coordinate x, the difference between the thermal expansion and contraction at each interface can be minimized. Therefore, the volume of the solid insulator / insulating substrate interface or the solid insulator / conductor plate interface changes in exactly the same manner during the thermal cycle, and as a result, the generation of mechanical stress becomes very small. As a result, peeling of solid insulators and generation of cracks are suppressed, and a highly reliable semiconductor device substrate resistant to temperature changes can be provided.

The change of the coefficient of thermal expansion α _i (x) of the solid insulator according to the spatial coordinates x is not limited to a step-like (step-like) change. That is, the thermal expansion coefficient α of the solid insulator
_{i (x)} the thermal expansion coefficient alpha _c of the front conductor plate constituting material on the front side conductive plate _near, as will match the thermal expansion coefficient alpha _s of the insulating substrate constituting material of an insulating substrate near, depending on the spatial coordinates x,
The distribution of the coefficient of thermal expansion may be adjusted to have a slope.
The change in the coefficient of thermal expansion α _i (x) of the solid insulator depending on the spatial coordinates x may be a linear (linear function) or a function of a second or higher order.

A second feature of the present invention resides in that an insulating substrate, a conductive plate selectively disposed on the insulating substrate so as to expose a peripheral portion of the insulating substrate, and an outer peripheral end of the conductive plate are in contact with the conductive plate. hand,
A semiconductor device substrate comprising a solid insulator disposed on an upper surface of an insulating substrate and having an outer peripheral edge of a circular arc shape in a cross section perpendicular to a main surface of the insulating substrate. Here, as the “solid insulator”, a material obtained by curing a thermosetting resin similar to the first feature may be used.

[0015] Further, mechanical stress causes stress concentration at corners of the end of the front-side conductor plate. In the semiconductor device substrate according to the second aspect of the present invention, the arc-shaped outer peripheral end portion, that is, a rounded portion, relieves stress concentration and suppresses peeling of solid insulators and generation of cracks. You can do it. In particular, in the semiconductor device substrate according to the second aspect of the present invention, the curvature radius r of the arc-shaped outer peripheral end portion is set.
Is preferably 0.2 mm or more and 20 mm or less. However, if the radius of curvature r of the outer peripheral edge is too large, the length of the edge of the front-side conductor plate increases, resulting in a large insulating substrate structure. Therefore, in practice, the radius of curvature r is preferably set to 1 mm or less. . In particular, it is preferable that the radius of curvature r be approximately the same as the thickness of the front-side conductor plate.

Note that the first feature and the second feature of the present invention may be combined. In other words, in the semiconductor device substrate according to the first aspect of the present invention, if the outer peripheral end of the conductor plate is configured to have an arc shape in a cross section perpendicular to the main surface of the insulating substrate, the present invention The effect of the second characteristic can be obtained while maintaining the effect of the first characteristic, and a semiconductor device substrate that is more resistant to temperature changes and highly reliable can be provided.

A third feature of the present invention resides in that an insulating substrate, a conductive plate selectively disposed on the insulating substrate so as to expose a peripheral portion of the insulating substrate, and an outer peripheral end of the conductive plate are in contact with the conductive plate. hand,
A semiconductor device substrate comprising a solid insulator disposed on an upper surface of an insulating substrate, wherein an outer peripheral end of the conductor plate has a mesa-type (forward mesa-type) inclined end surface. . Here, as the “solid insulator”, a material obtained by curing a thermosetting resin similar to the first feature may be used.

As described above, the mechanical stress increases due to the concentration of the stress at the corners at the ends of the front conductor plate. Normally, the end of the front-side conductor plate has a 90 ° edge by press punching or the like for convenience of machining. In the case of a 90 ° edge, stress is generated in the direction in which the interface between the front-side conductor plate and the solid insulator separates due to thermal cycling. By repeating the thermal cycle, the solid insulator is peeled off at this interface, and the withstand voltage characteristics are significantly reduced. As in the semiconductor device substrate according to the third aspect of the present invention, the stress is reduced by changing the angle θ of the outer peripheral end of the front-side conductor plate with respect to the insulating substrate to a value smaller than 90 °. According to a detailed study, the stress takes the minimum value near 30 °. At this angle θ, the solid insulator is less likely to peel. However, if the angle θ of the front-side conductor plate is too small, the length of the end portion of the front-side conductor plate increases, resulting in a large insulating substrate configuration. It is preferable to make an angle of 15 to 60 °.

Note that the first feature and the third feature of the present invention may be combined. That is, in the semiconductor device substrate according to the first aspect of the present invention, if the outer peripheral end of the conductor plate has a mesa-shaped inclined end face, the effect of the first aspect of the present invention is maintained. In addition, the effect of the third characteristic can be obtained. Therefore, a highly reliable semiconductor device substrate that is more resistant to temperature changes can be provided.

A fourth feature of the present invention is that a radiator plate, an insulating substrate mounted on the radiator plate, and a conductor plate selectively disposed on the insulating substrate so as to expose a peripheral portion of the insulating substrate. And a semiconductor chip disposed on the conductor plate, a solid insulator disposed on the upper surface of the insulating substrate in contact with the outer peripheral end of the conductor plate, and provided on the heat sink to surround the insulating substrate. Case, a terminal holder disposed on the upper part of the case, an external terminal lead held through the terminal holder and electrically connected to the semiconductor chip, and filled in the case. The present invention relates to a semiconductor device comprising a flexible insulator. That is, in the semiconductor device according to the fourth aspect of the present invention, the solid insulator includes at least a material having a coefficient of thermal expansion intermediate between the coefficient of thermal expansion of the conductor plate and the coefficient of thermal expansion of the insulating substrate. Include in some. As the "flexible insulator", a gel or an elastomer such as silicone or polyurethane having excellent heat cycle resistance may be used. Further, as described in the first feature, a material obtained by curing a thermosetting resin such as an epoxy resin, a phenol resin, and a polyimide resin may be used as the “solid insulator”. These thermosetting resins are excellent in adhesion to an insulating substrate and a front-side conductor plate in order to ensure dielectric strength characteristics / long-term reliability.

In the semiconductor device according to the fourth aspect of the present invention, only the peripheral edge (outer peripheral edge) of the front-side conductor plate is covered with the solid insulator. On the other hand, the periphery of a portion that is vulnerable to a heat cycle such as a bonding wire is filled with a flexible insulating material such as a flexible silicone gel. Thus, by combining the solid insulator and the flexible insulator, a package structure having excellent withstand voltage characteristics and heat cycle resistance can be provided.

In a semiconductor device according to a fourth aspect of the present invention,
The difference between thermal expansion and contraction at each interface.
Because it can be kept to a minimum, solid
Edge / insulating substrate or solid insulator / front-side conductor plate
The volume changes in exactly the same way, and as a result
The generation of mechanical stress is very small. As a result, the solid
Insulation peeling and cracking are suppressed and resistant to temperature changes
A highly reliable semiconductor device can be provided. Special
The thermal expansion coefficient α of the solid insulator_i(X) is converted to the spatial coordinate x
The thermal expansion of the conductor plate near the outer peripheral edge of the conductor plate
Elongation factor α_cThe value is close to that of the insulating substrate.
Thermal expansion coefficient α_sIt is preferable to set the value close to Solid insulation
Thermal expansion coefficient α_i(X) Fills a large amount of inorganic powder
The thermal expansion coefficient α_i(X) can be reduced
I can do it. Thermal expansion coefficient α of solid insulator _iSpatial coordinates x of (x)
Changes are discrete changes, that is, steps
Not limited to (step-like) changes, linear
(Linear function) or a higher-order function of second or higher order
It may be set to change easily.

A fifth feature of the present invention is that a heat sink, an insulating substrate mounted on the heat sink, and a conductor plate selectively disposed on the insulating substrate so as to expose a peripheral portion of the insulating substrate. And a semiconductor chip disposed on the conductor plate, a solid insulator disposed on the upper surface of the insulating substrate in contact with the outer peripheral end of the conductor plate, and provided on the heat sink to surround the insulating substrate. Case, a terminal holder disposed on the upper part of the case, an external terminal lead held through the terminal holder and electrically connected to the semiconductor chip, and filled in the case. The present invention relates to a semiconductor device comprising a flexible insulator. That is, in the semiconductor device according to the fifth aspect of the present invention, the outer peripheral end of the conductor plate has an arc shape in a cross section perpendicular to the main surface of the insulating substrate. As the "flexible insulator", silicone, polyurethane and the like are preferable. In addition, as a "solid insulator",
What cured the thermosetting resin described in the first feature may be used.

The mechanical stress concentrates on the corner of the end of the front-side conductor plate. Usually, the end of the front-side conductor plate is an edge by press punching or the like for convenience of machining. By giving this part roundness, stress concentration is reduced,
Separation of solid insulators and generation of cracks can be suppressed.

In the semiconductor device according to the fifth aspect of the present invention, it is preferable that the radius of curvature r of the arc-shaped outer peripheral end is 0.2 mm or more and 20 mm or less. However, if the radius of curvature r of the outer peripheral end portion is too large, the length of the end portion of the front-side conductor plate increases, resulting in a large insulating substrate configuration, and a large package. Therefore, in practice, the radius of curvature r is 1
mm or less. In particular, it is preferable that the radius of curvature r be approximately the same as the thickness of the front-side conductor plate.

The fourth feature and the fifth feature of the present invention may be combined. That is, in the semiconductor device according to the fourth aspect of the present invention, if the outer peripheral end of the conductor plate is formed to have an arc shape in a cross section perpendicular to the main surface of the insulating substrate, the fourth aspect of the present invention will be described. While maintaining the effect of the fourth characteristic, the effect of the fifth characteristic can be obtained. That is, it is possible to provide a semiconductor device that is more resistant to temperature changes and has higher reliability.

A sixth feature of the present invention is that a heat sink, an insulating substrate mounted on the heat sink, and a conductive plate selectively disposed on the insulating substrate so as to expose a peripheral portion of the insulating substrate. And a semiconductor chip disposed on the conductor plate, a solid insulator disposed on the upper surface of the insulating substrate in contact with the outer peripheral end of the conductor plate, and provided on the heat sink to surround the insulating substrate. Case, a terminal holder disposed on the upper part of the case, an external terminal lead held through the terminal holder and electrically connected to the semiconductor chip, and filled in the case. The present invention relates to a semiconductor device comprising a flexible insulator. That is, in the semiconductor device according to the sixth aspect of the present invention, the outer peripheral end of the conductor plate has a mesa-shaped inclined end surface. As the "flexible insulator", silicone, polyurethane and the like are preferable. As the “solid insulator”, a material obtained by curing the thermosetting resin described in the first feature may be used.

Further, a sudden change in the angle of the outer peripheral end of the conductive plate promotes mechanical damage. When the outer peripheral edge of the front-side conductor plate has an angle of 90 ° with respect to the insulating substrate, a stress is generated in a direction in which the interface between the front-side conductor plate and the solid insulator separates due to a heat cycle. Then, by repeating the thermal cycle, peeling occurs at the interface, and the withstand voltage characteristic is significantly reduced. As described in the third feature, when the angle θ of the front-side conductor plate with respect to the insulating substrate is changed, the stress takes the minimum value in the vicinity of 30 °, making it difficult to peel. However, if the angle θ of the front-side conductor plate is reduced, the length of the end portion of the front-side conductor plate increases, resulting in a large insulating substrate configuration. Therefore, in practice, the inclined end face is 15 ° away from the main surface of the insulating substrate. ~
Preferably, the angle is 60 °.

The fourth feature and the sixth feature of the present invention may be combined. That is, in the semiconductor device according to the fourth aspect of the present invention, if the outer peripheral end of the conductor plate is configured to have a mesa-shaped inclined end face, while maintaining the effect of the fourth aspect of the present invention, Further, the effect of the sixth characteristic can be obtained. That is, it is possible to provide a semiconductor device that is more resistant to temperature changes and has higher reliability.

In the first to sixth aspects, the "power semiconductor device" includes an insulated gate bipolar transistor (IGBT), a power MOSFET, a power bipolar transistor (BJT), and a power static induction transistor (SIT). Thyristors, gate turn-off (GTO) thyristors, electrostatic induction (SI) thyristors and the like. The "semiconductor chip" means a semiconductor chip on which at least one of these power semiconductor devices is mounted. Needless to say, these semiconductor chips may include chips on which circuits for controlling the power semiconductor device and protection circuits are mounted. Further, a power IC in which the control circuit and the power semiconductor device are monolithically integrated on the same substrate may be used. At least one of these “semiconductor chips” may be arranged on the conductor plate. Further, the package of the power semiconductor device of the present invention may include various electronic components such as a resistor, a capacitor, an inductance, a circuit wire such as a bonding wire, and a lead. is there.

[0031]

Next, first to third embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimension, the ratio of the thickness of each layer, and the like are different from actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. In addition, it is needless to say that the drawings include portions having different dimensional relationships and ratios.

(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
FIG. 3 is a cross-sectional view showing a structure of a power semiconductor device (package) according to the embodiment. The power semiconductor device according to the first embodiment of the present invention includes an insulating substrate (ceramic substrate).
The present invention provides a novel structure for preventing the creeping breakdown and the creeping discharge between the base material 1 and the flexible insulating material (silicone gel) 9 therearound and improving the reliability. Aluminum nitride (AlN) as the insulating substrate (ceramic substrate) 1;
A beryllium oxide such as alumina (Al ₂ O ₃ ) or beryllia (BeO ₂ ) can be used. In the following description, a case where an AlN substrate having a thickness of 1 mm is used will be described. Then, on both surfaces of the AlN substrate (insulating substrate) 1, a front-side conductor plate 2 made of a copper plate having a thickness of 0.2 mm is formed by a copper (Cu) plate direct bonding (DBC) technique.
1, 22, 23 and the back-side conductor plate 24 are connected. That is, the front-side conductor plates 21, 22, 2 on the insulating substrate 1
Reference numeral 3 denotes a predetermined internal pattern on the upper surface (front surface) of the insulating substrate 1 and is connected so as to expose (leave) the periphery of the upper surface of the insulating substrate 1. The back-side conductor plate 24 is also provided on the lower surface (back surface) of the insulating substrate 1.
Are connected except for the peripheral portion of the lower surface of.

On the front-side conductor plate 22, power semiconductor chips 31, 32 and a control circuit semiconductor chip (not shown) for controlling these power semiconductor chips are arranged. Depending on the specification, the configuration may be such that the front-side conductor plate 22 is further divided, and the power semiconductor chips 31, 32 and the control circuit semiconductor chip (not shown) are arranged on the respective divided patterns. On the other hand, the front conductor plate 2
On pads 1 and 23, lead pads 73 and 74 are arranged. The insulating substrate 1 on which the power semiconductor chips 31, 32 and the like are mounted is housed in a case (container main body) 6, and a case (container main body) to which the insulating substrate 1 is attached.
The bottom plate 6 is made of metal and serves as a heat sink 5. The bonding pads provided on the respective surfaces of the power semiconductor chips 31, 32 and the like on the insulating substrate are connected to each other by the bonding wires 42. The bonding wire 41 connects the lead pad 73 to the bonding pad provided on the surface of the power semiconductor chip 31. The bonding wire 43 connects the lead pad 74 and the bonding pad provided on the surface of the power semiconductor chip 32. Connected to each other. Note that the lead pads 73 and 74 may be omitted. In this case, the front-side conductor plate 21 and the bonding pads provided on the surface of the power semiconductor chip 31 are directly connected by the bonding wires 41, and the bonding wires 43 are provided on the surface of the front-side conductor plate 23 and the power semiconductor chip 32. Directly connected to the bonding pad. The bonding wires 41, 42, 43,...
u), copper (Cu), aluminum (Al), or other metal wire may be used. Alternatively, instead of the bonding wire, a metal ribbon such as gold (Au), copper (Cu), or aluminum (Al) or a bonding band made of a band-shaped material similar thereto may be used.

From the lead pads 73 and 74, external terminal leads (lead wires) 71 and 72 penetrate through the upper lid of the case (container main body) in order to further electrically connect with the outside of the package. Have been pulled out. When the lead pads 73 and 74 are omitted, external terminal leads (lead wires) are directly provided from the front side conductor plates 21 and 23.
71 and 72 may be drawn out of the case (container main body). Alternatively, instead of the lead pads 73 and 74, semiconductor chips are mounted on the front-side conductor plates 21 and 23, and external terminal leads (lead wires) 71 and 72 are connected to bonding pads provided on these semiconductor chips. The external terminal leads (lead wires) 71 and 72 may be drawn out of the case (container body). The external terminal leads 71, 72 are connected to bonding wires 41, 42, 4
Are terminals for supplying power to the power semiconductor chips 31, 32 and a control circuit semiconductor chip (not shown) via 3,. Further, in the case (container main body) 6, in order to protect the bonding wires 41, 42, 43,.
A silicone gel 9 as a flexible insulator is filled. The upper surface of the case (container main body) 6 is held down by a terminal holder 8 as an upper lid, and a flexible insulator injection port (silicone gel injection port) is usually made of a resinous sealing member 10.
a and 10b. The whole semiconductor device
The outer dimensions are about 100 mm × 70 mm × 10 mm.

Here, as the power semiconductor chips 31, 32, IGBT, power MOSFET, power BJ
T, power SIT, thyristor, GTO thyristor, S
Various power devices such as I-thyristors can be used. The control circuit includes an nMOS control circuit, a pMOS control circuit, a CMOS control circuit, a bipolar control circuit, a BiCM
An OS control circuit, a SIT control circuit, or the like can be used. Also,
These control circuits may include an overvoltage protection circuit, an overcurrent protection circuit, and an overheat protection circuit. Further, in the package of the power semiconductor device according to the first embodiment of the present invention, in addition to the power semiconductor chips 31 and 32 and the control circuit semiconductor chip (not shown), various electronic devices such as a resistor, a capacitor and a coil are provided. A component or the like, or a circuit such as a power supply may be mounted. Alternatively, only a power semiconductor chip may be mounted and a simple module configuration may be adopted.

As shown in FIG. 1, in the package of the power semiconductor device according to the first embodiment of the present invention,
A solid insulator 11 is used to solidify the periphery of the insulating substrate 1 and the ends (outer peripheral ends) of the front-side conductor plates 21, 22, 23 facing the periphery. As the solid insulator 11, a resin having a higher dielectric breakdown voltage than the silicone gel 9 and having good adhesion to the insulating substrate 1 is preferable. For example, an epoxy resin is used here. Alternatively, a polyester resin can be used. In the package of the power semiconductor device according to the first embodiment of the present invention shown in FIG. 1, the solid insulator 11 is made up of the front-side conductor plates 21, 22, 2
A material having a coefficient of thermal expansion intermediate between the coefficient of thermal expansion of No. 3 and the coefficient of thermal expansion of the insulating substrate is included at least in part.

In the package of the power semiconductor device according to the first embodiment of the present invention, the front-side conductor plate 21,
Only the peripheral ends (outer peripheral ends) of 22 and 23 are covered with the solid insulator 11. On the other hand, bonding wires 41,
Around the portions that are vulnerable to heat cycles, such as 42 and 43, are filled with a flexible insulator 9 such as a flexible silicone gel. Thus, by combining the solid insulator 11 and the flexible insulator 9, a package structure having excellent withstand voltage characteristics and heat cycle resistance can be provided.

In the package of the power semiconductor device according to the first embodiment of the present invention, by selecting the thermal expansion coefficient α _i (x) of the solid insulator 11, the thermal expansion and contraction at the respective interfaces are made. Can be minimized, so that the solid insulator / insulating substrate or solid insulator / front-side conductor plate undergoes exactly the same volume change during thermal cycling, resulting in mechanical stress. The occurrence of S becomes very small. As a result, the solid insulator 11 peels off,
Crack generation is suppressed, and a highly reliable semiconductor device resistant to temperature changes can be provided. In particular, the coefficient of thermal expansion α _i (x) of the solid insulator 11 is defined as a function of the spatial coordinate x,
In the vicinity of the outer peripheral ends of the front-side conductor plates 21, 22, 23, the coefficient of thermal expansion is close to the thermal expansion coefficient α _c of the front-side conductor plates 21, 22, 23, and near the insulating substrate 1, the coefficient of thermal expansion α _s of the insulating substrate 1 is _large. It is preferable to set the value close to The coefficient of thermal expansion α _i (x) of the solid insulator 11 is determined by filling a large amount of inorganic powder.
The coefficient of thermal expansion α _i (x) can be reduced.

In the package of the power semiconductor device according to the first embodiment of the present invention, a large amount of an inorganic powder such as silica or alumina is filled as the solid insulator 11, and the thermal expansion coefficient α _i (x) is determined. The following three types of modified epoxy resins were prepared: epoxy resin A: coefficient of thermal expansion α _iA (x) = 10 × 10
⁻⁶ / ° C .; epoxy resin B: coefficient of thermal expansion α _iB (x) = 15 × 10
^-6 / ° C.; Epoxy resin C: coefficient of thermal expansion _{α iC (x) = 30 ×} 10
^-6 / C.

The epoxy resin A is a low α resin having a thermal expansion coefficient close to that of the insulating substrate 1 (aluminum nitride: α _s = 6 × 10 ⁻⁶ / ° C.). The epoxy resin B is made of a front-side conductor plate 21, 22, 23 (copper: α _c = 17 × 10 ⁻⁶ / ° C.)
It is a standard resin having a coefficient of thermal expansion close to The epoxy resin C is a reference material having a coefficient of thermal expansion α _i (x) = 30 × 10 ⁻⁶ / ° C.

In particular, in the package of the power semiconductor device according to the first embodiment of the present invention, as shown in FIG. 2, an epoxy resin A having a low coefficient of thermal expansion is used as the second resin 11b near the insulating substrate 1. Further, it is preferable to dispose a double-expansion type gradient expansion type solid insulating layer using an epoxy resin B having a thermal expansion coefficient close to that of copper as the first resin 11a on the front-side conductor plate 23 side. The change in the thermal expansion coefficient α _i (x) of the solid insulator 11 according to the spatial coordinates x is not limited to a discrete change as shown in FIG. 2, that is, a step-like (step-like) change, but a linear change. It may be set as a (primary function) or a higher-order function of second or higher order so as to change smoothly.

The thickness of the solid insulator 11 is related to the creepage distance from the power semiconductor chips 31 and 32 to the end of the insulating substrate 1. Even if the creepage distance is long, the effect of preventing dielectric breakdown can be obtained even if the creepage distance is small. In FIGS. 1 and 2, the solid insulator 11 is used to completely cover the shoulders at the ends (outer peripheral ends) of the front conductor plates 21, 22, 23. Even when the solid insulator 11 is embedded in a part of a corner formed between the insulating substrate 1 and the ends of 21, 22, and 23,
A certain degree of creeping discharge prevention effect can be achieved. If the shoulders at the ends of the front-side conductor plates 21, 22, 23 are exposed, the amount of resin can be reduced, so that the package can be manufactured at low cost. When the creepage distance is substantially equal to the thickness of the insulating substrate 1, the effect of preventing the creepage discharge can be further improved by the structure in which the solid insulator 11 is raised.

In the first embodiment of the present invention, as shown in FIG. 1 and FIG.
It is important not to paint. The reason is solid insulator 1
1 is applied to the heat sink 5, the insulating substrate 1 and the heat sink 5
This is because, due to the difference in the coefficient of thermal expansion, the solid insulator 11 is peeled off in the heat cycle, which has an adverse effect of making it easy to cause creeping breakdown.

As described above, in the package of the power semiconductor device according to the first embodiment of the present invention, on the outer peripheral edge of the front-side conductor plates 21, 22, 23 and on the peripheral portion of the insulating substrate 1. Is provided with the solid insulator 11 having the optimized thermal expansion coefficient α _i (x), so that the front-side conductive plates 21 and
The outer peripheral ends of the substrates 2 and 23 and the outer peripheral end of the insulating substrate 1 are in close contact with each other, and the occurrence of mechanical stress S is very small.
As a result, peeling and cracking of the solid insulator 11 are suppressed, and a highly reliable semiconductor device that is resistant to temperature changes can be provided. In addition, since the solid insulator 11 exists at the interface between the outer peripheral edge of the front-side conductor plates 21, 22, and 23 and the outer peripheral edge of the insulating substrate 1, the electric field at the interface between them is alleviated and creeping discharge occurs. It becomes difficult. Therefore, dielectric breakdown is prevented, and a high breakdown voltage can be realized.

The solid insulator 11 made of a solidified resin is provided on the outer peripheral edge of the front-side conductor plates 21, 22, and 23 and on the peripheral portion of the insulating substrate 1, so that the solid insulator 11 is formed. Acts as a reinforcement. Therefore, the reliability of bonding between the front-side conductor plates 21, 22, 23 and the insulating substrate 1 can be improved, and the mechanical strength of the insulating substrate 1 can be improved, so that the DBC substrate can be downsized.

(Second Embodiment) FIG. 4 shows a second embodiment of the present invention.
FIG. 3 is a cross-sectional view showing a part of a substrate constituting a power semiconductor device (package) according to the embodiment. The power semiconductor device according to the second embodiment of the present invention has the same basic structure as the power semiconductor device (package) according to the first embodiment of the present invention in FIG. That is, similarly to FIG. 1, the heat sink 5, the insulating substrate 1 mounted on the heat sink 5, and the front-side conductive member selectively disposed on the insulating substrate 1 so as to expose the peripheral portion of the insulating substrate 1. Body plates 21r, 22
r, 23r, the semiconductor chips 31, 32 disposed on the front-side conductor plates 21r, 22r, 23r, and the outer peripheral edges of the front-side conductor plates 21r, 22r, 23r, and disposed on the upper surface of the insulating substrate 1. Container body (case) provided on the heat sink 5 so as to surround the solid insulator 11 and the insulating substrate 1
6, an upper lid (terminal holder) 8 disposed on the upper part of the container body (case) 6, and a semiconductor chip 31,
The semiconductor device according to the present invention is different from the semiconductor device according to the present invention in that the semiconductor device is composed of external terminal leads 71 and 72 arranged to be electrically connected to the semiconductor device 32 and a flexible insulator 9 filled in the container body (case) 6. It is common to the power semiconductor device according to the first embodiment. However, in the power semiconductor device according to the second embodiment of the present invention, as shown in FIG.
In a cross section perpendicular to the main surface of the front side conductor plate 21
r, 22r, and 23r are arc-shaped (in FIG. 4, the front-side conductor plates 21r and 22r are not shown, but the outer-peripheral ends of the front-side conductor plates 21r and 22r are on the front side). Of course, it is the same as the outer peripheral end of the conductor plate 23r).

FIG. 3 shows, for comparison, a “standard electrode” in which the outer peripheral edge of the front-side conductor plate 23 is angled at an angle θ = 90 ° between the insulating substrate 1 and the front-side conductor plate 23. . In the substrate for a power semiconductor device according to the second embodiment of the present invention, as shown in FIG. Alternatively, it is formed by a chemical treatment. In the following, in a cross section perpendicular to the main surface of the insulating substrate 1 as shown in FIG.
The front-side conductor plate having an arcuate outer peripheral end is referred to as an “R electrode”.

Normally, in the conventional semiconductor device substrate, the end of the front-side conductor plate 23 has a 90 ° edge (corner) 14 as shown in FIG. In a "standard electrode" having a 90 ° corner 14, the mechanical stress S is
At the stress concentration of As shown in FIG. 4, by making this portion round, stress concentration can be reduced, and peeling of the solid insulator 11 and generation of cracks can be suppressed.

(Third Embodiment) FIG. 5 shows a third embodiment of the present invention.
FIG. 3 is a cross-sectional view showing a part of a substrate constituting a power semiconductor device (package) according to the embodiment. The power semiconductor device according to the third embodiment of the present invention has the same basic structure as the power semiconductor device (package) according to the first embodiment of the present invention in FIG. That is, similarly to FIG. 1, the heat sink 5, the insulating substrate 1 mounted on the heat sink 5, and the front-side conductive member selectively disposed on the insulating substrate 1 so as to expose the peripheral portion of the insulating substrate 1. Body plates 21t, 22
t, 23t, the semiconductor chips 31, 32 disposed on the front-side conductor plates 21t, 22t, 23t, and the outer peripheral edges of the front-side conductor plates 21t, 22t, 23t, and disposed on the upper surface of the insulating substrate 1. Container body (case) provided on the heat sink 5 so as to surround the solid insulator 11 and the insulating substrate 1
6, an upper lid (terminal holder) 8 disposed on the upper part of the container body (case) 6, and a semiconductor chip 31,
The semiconductor device according to the present invention is different from the semiconductor device according to the present invention in that the semiconductor device is composed of external terminal leads 71 and 72 arranged to be electrically connected to the semiconductor device 32 and a flexible insulator 9 filled in the container body (case) 6. It is common to the power semiconductor devices according to the first and second embodiments.

However, as shown in FIG.
In the power semiconductor device according to the embodiment, in a cross section perpendicular to the main surface of insulating substrate 1, the outer peripheral end of front-side conductive plate 23t has a mesa-shaped inclined end surface. (In FIG. 5, the front-side conductor plates 21t and 22t are not shown, but the outer periphery of the front-side conductor plates 21t and 22t is, of course, the same as the outer periphery of the front-side conductor plate 23t. ).

Also, a sudden change in angle promotes mechanical damage. For example, as shown in FIG. 3, the normal structure (“standard electrode” structure) is such that the outer peripheral end (end face) of the front-side conductor plate has an angle of 90 ° with respect to the insulating substrate 1. Due to the heat cycle, stress S is generated in a direction in which the front-side conductor plate / resin interface is separated. By repeating the thermal cycle, the interface is peeled off, and the insulating properties are significantly reduced. 9
In a “standard electrode” having a 0 ° corner 14, the mechanical stress S increases due to the stress concentration at the corner 14.

FIG. 6 shows a change in stress S when the angle θ of the outer peripheral end (end face) of the front-side conductor plate 23t with respect to the insulating substrate 1 is changed. The stress S takes a minimum value in the vicinity of the angle θ = 30 °, making it difficult to peel. Front conductor plate 23t
Is decreased, the length of the end portion of the front-side conductor plate 23t increases, resulting in a large insulating substrate configuration. Therefore, in practice, the angle θ of the front-side conductor plate 23t is set in the range of 15 to 60 °. It is effective. In the following, in a cross section perpendicular to the main surface of the insulating substrate 1 as shown in FIG. 5, a front-side conductor plate whose outer peripheral end has an angle of 90 ° or less with respect to the insulating substrate 1 is referred to as a “taper electrode”. Call.

(Comparison of Embodiments) Here, the characteristics of the semiconductor device substrate according to the first to third embodiments of the present invention and the characteristics of the semiconductor device using this semiconductor device substrate will be compared. In this comparison, an electrode plate simulating the front-side conductor plate was prepared. The electrode plate was joined to the insulating substrate 1 with the distance from the outer peripheral end of the electrode plate to the end of the insulating substrate 1 kept constant at the entire circumference of 1.5 mm. On the opposite side of the insulating substrate 1, a copper plate is joined by solder via a backside conductor,
The heat sink 5 was simulated. Then, around the solid insulating layer 11 around the edge of the electrode plate, there is a silicone gel 9 which has been degassed under vacuum.
And sealed. The simulated radiator plate 5 was grounded, a high voltage was applied to the electrode plate side, and the start of partial discharge when the discharge charge amount was 10 pC was determined. Thereafter, the voltage applied to the electrode plate was further increased, and the dielectric breakdown voltage was obtained. Further, as a deterioration test, a heat cycle was applied to a comparative sample (evaluation model) in a thermostat, and a partial discharge starting voltage and a dielectric breakdown voltage after the test were similarly obtained. The conditions of the heat cycle were such that a cycle of holding at 125 ° C. for 1 hour, immediately cooling to −40 ° C., and holding for 1 hour was one cycle, and 300 cycles were continuously added.

Table 1 shows the results of obtaining the partial discharge starting voltage CSV and the dielectric breakdown voltage BDV of the comparative sample (evaluation model) using the electrode shape as a parameter.

[0055]

[Table 1] By molding the periphery of the electrode plate corresponding to the front-side conductor plate with epoxy resin, the withstand voltage characteristics were remarkably improved. However, due to thermal cycling, the mold layer was peeled and cracked, and the partial discharge starting voltages CSV and BDV were reduced. Dropped.
On the other hand, the “R electrode” corresponding to the second embodiment of the present invention and the “taper electrode” corresponding to the third embodiment of the present invention relax the stress S during the thermal cycle, and Since the occurrence of peeling and cracking was suppressed, no decrease in the withstand voltage characteristics was observed.

Next, in accordance with the first embodiment of the present invention, the partial discharge starting voltage CSV and the dielectric breakdown voltage BDV were similarly obtained by changing the material and composition of the "mold resin".
Table 2 shows the results.

[0057]

[Table 2] Compared with the epoxy resin C having a large thermal expansion coefficient, the insulation withstand voltage characteristics are improved by molding with epoxy resins A and B having a thermal expansion coefficient intermediate between the insulating substrate (ceramics) and the front-side conductor plate (metal). I can do it. Further, it can be seen that the inclined expansion coefficient type (A / B inclined type) mold, which combines the two, exhibited the most effect on the thermal cycle. This occurs at the respective interfaces because the epoxy resin A having a thermal expansion coefficient close to the insulating substrate is used on the side near the insulating substrate, and the epoxy resin B having the thermal expansion coefficient near the electrode is used on the side near the electrodes. This is the result of minimizing the thermal stress that occurs.

(Other Embodiments) As described above, the present invention has been described with reference to the first to third embodiments.
The discussion and drawings that form part of this disclosure should not be understood as limiting the invention. From this disclosure, various alternative embodiments, examples, and operation techniques will be apparent to those skilled in the art.

In the description of the first to third embodiments, the front-side conductor plates 21 and 21 are formed on the AlN substrate.
The case where a DBC substrate with copper foils of 2, 23 is used has been described.
A configuration using an 1N substrate may be used. Furthermore, a substrate having an insulating substrate exposed on the entire surface, a substrate having a required metal pattern formed on an insulating substrate by a thick film technology or a thin film technology other than the DBC substrate, or the like can be adopted.

In the first to third embodiments, the intelligent semiconductor device having the power semiconductor chips 31, 32 and a control circuit chip (not shown) for controlling the power semiconductor chips 31, 32 is mounted. power·
Although the module (IPM) has been described, three or more power semiconductor chips may be used, or one power semiconductor chip may be used. Further, the present invention can be applied to a package having no control circuit chip. Further, the control circuit chips may be arranged at the center, and these can be changed to any positions by designing the package.

Further, the power semiconductor chip has a smart circuit in which the control circuit is integrated on the same substrate as the power semiconductor element.
A power IC such as a power IC may be used. Further, the first embodiment and the second embodiment may be combined, or the first embodiment and the third embodiment may be combined.

Further, in the first to third embodiments, the case where the epoxy resin is used as the solid insulator 11 has been described. However, the present invention is not limited to this, and the power semiconductor chips 31 and 32 are used instead of the epoxy resin. The present invention can be implemented in the same manner and the same effect can be obtained by using a resin (for example, polyester resin) having heat resistance to withstand the temperature rise of the control circuit chip.

In addition, the present invention can be variously modified and implemented without departing from the gist thereof.

As described above, the present invention naturally includes various embodiments and the like not described herein. Therefore, the technical scope of the present invention is determined only by the invention specifying matters according to the claims that are appropriate from the above description.

[0065]

According to the present invention, it is possible to provide a substrate for a semiconductor device which has a high breakdown voltage on the surface of an insulating substrate and has excellent heat cycle resistance, and a package (semiconductor device) using the substrate for a semiconductor device. Can be done.

Further, according to the present invention, a highly reliable semiconductor device substrate and a semiconductor device using this semiconductor device substrate can be provided.

Further, according to the present invention, the semiconductor chip or the storage case (container main body) is caused by thermal expansion or thermal contraction of the filler.
And a semiconductor device using the semiconductor device substrate, in which thermal stress is not applied to the semiconductor device and module breakage or semiconductor chip operation failure does not occur.

Further, according to the present invention, it is possible to provide a semiconductor device having a sufficient moisture-proof effect against penetration of moisture into a semiconductor module.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a structure of a power semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a detailed structure near the outer peripheral end of the power semiconductor device substrate according to the first embodiment of the present invention.

FIG. 3 shows an angle θ = 9 between the insulating substrate 1 and the front-side conductor plate 23 for comparison in the second embodiment of the present invention.
It is sectional drawing which shows the structure of a "standard electrode" of 0 degree.

FIG. 4 is a sectional view showing a detailed structure near an outer peripheral end of a power semiconductor device substrate according to a second embodiment of the present invention.

FIG. 5 is a sectional view showing a detailed structure near an outer peripheral end of a power semiconductor device substrate according to a third embodiment of the present invention.

FIG. 6 is a diagram showing a relationship between an angle θ of an electrode with respect to an insulating substrate and a generated stress in a power semiconductor device substrate according to a third embodiment of the present invention.

FIG. 7 is a sectional view showing the structure of a conventional power semiconductor device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 Insulating substrate 21, 22, 23, 23 r, 23 t Front conductive plate 24 Back conductive plate 31, 32 Semiconductor chip 41, 42, 43 Bonding wire 5 Heat sink 6 Case 71, 72 External connection lead 8 Terminal holder 9 Flexible Insulator (silicone gel) 10a, 10b Sealing member 11 Solid insulator 11a First resin 11b Second resin 14 Corner

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 25/18 // H01L 23/13 (72) Inventor Yuki Sekiya 1st Toshiba-cho, Fuchu-shi, Tokyo Stock (72) Inventor Toshiaki Matsumoto 1 Toshiba-cho, Fuchu-shi, Tokyo F-term (reference) 4M109 AA01 BA03 CA10 DA02 DB02 DB10 EA10 ED01 ED02 ED06

Claims (19)

[Claims] An insulating substrate; a conductive plate selectively disposed on the insulating substrate so as to expose a peripheral portion of the insulating substrate; A solid insulator disposed on the upper surface of the substrate, wherein the solid insulator is a material having a coefficient of thermal expansion intermediate between the coefficient of thermal expansion of the conductor plate and the coefficient of thermal expansion of the insulating substrate, A substrate for a semiconductor device, which is included at least in part. 2. The thermal expansion coefficient of the solid insulator is close to the thermal expansion coefficient of the conductor plate near the outer peripheral end of the conductor plate, and the thermal expansion coefficient of the insulating substrate near the insulation substrate. 2. The substrate for a semiconductor device according to claim 1, wherein the value is close to the ratio. 3. The semiconductor device substrate according to claim 1, wherein an outer peripheral end of the conductor plate has an arc shape in a cross section perpendicular to a main surface of the insulating substrate. 4. An insulating substrate; a conductive plate selectively disposed on the insulating substrate so as to expose a peripheral portion of the insulating substrate; A semiconductor device substrate comprising a solid insulator disposed on an upper surface of a substrate, wherein an outer peripheral end of the conductor plate has an arc shape in a cross section perpendicular to a main surface of the insulating substrate. 5. A curvature radius of the arc-shaped outer peripheral end portion is equal to 0.
The substrate for a semiconductor device according to claim 3, wherein the substrate is not less than 2 mm and not more than 20 mm. 6. The semiconductor device substrate according to claim 1, wherein an outer peripheral end of the conductor plate has a mesa-shaped inclined end surface. 7. An insulating substrate; a conductor plate selectively disposed on the insulating substrate so as to expose a peripheral portion of the insulating substrate; A semiconductor device substrate comprising a solid insulator disposed on an upper surface of a substrate, wherein an outer peripheral end of the conductor plate has a mesa-shaped inclined end surface. 8. The semiconductor device substrate according to claim 6, wherein the inclined end surface forms an angle of 15 ° to 60 ° with respect to a main surface of the insulating substrate. 9. The semiconductor device substrate according to claim 1, wherein the solid insulator is an insulator obtained by solidifying a thermosetting resin. 10. A heat sink, an insulating substrate mounted on the heat sink, a conductor plate selectively disposed on the insulating substrate so as to expose a peripheral portion of the insulating substrate, and A semiconductor chip disposed on a body plate; a solid insulator disposed on an upper surface of the insulating substrate in contact with an outer peripheral end of the conductor plate; and a solid insulator provided on the heat sink so as to surround the insulating substrate. A case, a terminal holder disposed on the upper part of the case, an external terminal lead held through the terminal holder and arranged to be electrically connected to the semiconductor chip; The solid insulator is a material having a coefficient of thermal expansion intermediate between the coefficient of thermal expansion of the conductor plate and the coefficient of thermal expansion of the insulating substrate, at least in part. Is characterized by including Semiconductor device. 11. The coefficient of thermal expansion of the solid insulator is close to the coefficient of thermal expansion of the conductor plate near the outer peripheral edge of the conductor plate, and the coefficient of thermal expansion of the insulating substrate near the insulation substrate. The semiconductor device according to claim 10, wherein the value is close to the rate. 12. The semiconductor device according to claim 10, wherein an outer peripheral end of the conductor plate has an arc shape in a cross section perpendicular to a main surface of the insulating substrate. 13. A heat sink, an insulating substrate mounted on the heat sink, a conductor plate selectively disposed on the insulating substrate so as to expose a peripheral portion of the insulating substrate, and A semiconductor chip disposed on a body plate; a solid insulator disposed on an upper surface of the insulating substrate in contact with an outer peripheral end of the conductor plate; and a solid insulator provided on the heat sink so as to surround the insulating substrate. A case, a terminal holder disposed on the upper part of the case, an external terminal lead held through the terminal holder and arranged to be electrically connected to the semiconductor chip; A semiconductor device comprising: a flexible insulator that is filled into a semiconductor substrate; and a cross section perpendicular to a main surface of the insulating substrate, wherein an outer peripheral end of the conductor plate has an arc shape. 14. The semiconductor device according to claim 12, wherein a radius of curvature of said arc-shaped outer peripheral end is 0.2 mm or more and 20 mm or less. 15. The semiconductor device according to claim 10, wherein an outer peripheral end of the conductor plate has a mesa-shaped inclined end surface. 16. A radiator plate, an insulating substrate mounted on the radiator plate, a conductor plate selectively disposed on the insulating substrate so as to expose a peripheral portion of the insulating substrate, and A semiconductor chip disposed on a body plate; a solid insulator disposed on an upper surface of the insulating substrate in contact with an outer peripheral end of the conductor plate; and a solid insulator provided on the heat sink so as to surround the insulating substrate. A case, a terminal holder disposed on the upper part of the case, an external terminal lead held through the terminal holder and arranged to be electrically connected to the semiconductor chip; A semiconductor device, comprising: a flexible insulator filled in a semiconductor substrate, wherein an outer peripheral end of the conductor plate has a mesa-shaped inclined end surface. 17. The semiconductor device according to claim 15, wherein said inclined end surface forms an angle of 15 ° to 60 ° with respect to a main surface of said insulating substrate. 18. The solid insulating material according to claim 10, wherein the solid insulating material is an insulating material obtained by solidifying a thermosetting resin.
The semiconductor device according to claim 1. 19. The apparatus according to claim 10, wherein said flexible insulator is made of silicone or polyurethane.
19. The semiconductor device according to any one of to 18.