JP2002026015A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

(57) [Problem] To improve electromigration characteristics of Cu wiring. SOLUTION: After forming a contact hole 8 and a wiring groove 9, an (111) oriented Al film 14 is deposited by ionization sputtering or the like, and then a MOCVD-TiN film 10 is deposited as a barrier film by MOCVD. Next, after the Cu seed layer 11 is formed by the sputtering method, the Cu plating film 12 is formed by the electrolytic plating method, and the contact holes 8 and the wiring grooves 9 are buried. The Cu plating film 12 and the Cu seed layer 11 are combined into one Cu film 1 by a process involving a subsequent temperature rise.
It becomes 3. An unnecessary conductive film outside the wiring groove is removed by a CMP method or the like to form a buried wiring. MOCVD-TiN
The film 10 is provided with the (111) -oriented Al film 14 thereunder, thereby inducing a crystallinity that easily matches the Cu (111) plane in the film, and the (111) orientation of the upper Cu film 13 Can be enhanced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device having a copper wiring and a method of manufacturing the same.

[0002]

2. Description of the Related Art Silicon LSI of 0.18 μm generation or later
In (2), since the delay due to the CR component of the wiring cannot be ignored with the increase in the speed of the transistor, Cu having a lower resistance (specific resistance of 1.7 μΩ · cm) is used instead of the conventional Al wiring (specific resistance of 3 μΩ · cm). Consideration is being given to using it for wiring materials. The density of the current flowing through the wiring has increased with each generation as the elements have been miniaturized, and the electromigration phenomenon, in which the wiring material is pushed by the electrons and moves when the current is applied, causing the wiring to be disconnected, is also required. It is necessary to increase resistance. Since Cu has a higher melting point than Al, it is expected that deformation, that is, movement of atoms, is unlikely to occur.

[0003] However, it has been reported that electromigration resistance is deteriorated even with Cu wiring as fine as about 0.3 µm (Y. Igarashi et al., VLSI Symp., P.
76, 1996), and it is necessary to improve the electromigration resistance even in a Cu wiring. It is known that the (111) orientation of the Cu film may be increased to improve the electromigration resistance of the Cu wiring (C. Ryu et al., Proc. IRPS., P. 201, 1997). The reason is as follows. First, Cu is an fcc metal and fc
c This is because the densest surface (111) of the metal is the most stable.
Second, the high (111) orientation means that the misalignment of adjacent crystal grains is small and the number of crystal defects at the crystal grain boundaries is reduced, so that diffusion of Cu atoms at the crystal grain boundaries due to electromigration is suppressed. That's because.

In the case of Cu wiring, 400 ° C. during the wiring process
Since it is necessary to prevent Cu from diffusing into the insulating film due to the heat treatment to a certain degree and to increase the leakage between wirings, it is necessary to provide a barrier film for preventing the diffusion of Cu between the Cu and the insulating film. As a barrier film, a titanium nitride, tantalum nitride, or tungsten nitride film containing amorphous or microcrystals having a high barrier property against Cu diffusion is considered most promising.

Hereinafter, a conventional method for manufacturing a semiconductor device having a Cu wiring using a titanium nitride film as a barrier film will be described with reference to FIG.

First, as shown in FIG. 8A, a trench wiring comprising a barrier metal 2 and a first Cu film 3 is formed in a first insulating film 1 on a semiconductor substrate, and a first silicon nitride film is formed. 4, in the semiconductor device covered with the second insulating film 5, the second silicon nitride film 6, and the third insulating film 7, a contact hole 8 and a wiring groove 9 are formed. Here, barrier metal 2
The silicon nitride film 4 has a role (barrier property) of preventing the Cu in the first Cu film 3 from diffusing into the insulating film due to the heat treatment at about 400 ° C. in the wiring process. The barrier metal 2 may be, for example, a titanium nitride film.

Next, as shown in FIG. 8B, a MOCVD-TiN (titanium nitride) film 10 is deposited as a barrier film by MOCVD. Next, a Cu film is deposited by a sputtering method to form a Cu seed layer 11 serving as a conductive layer.
As shown in (c), a Cu film is deposited by electrolytic plating to form a Cu plating film 12, and the contact holes 8 and the wiring grooves 9 are buried. In a subsequent step involving a rise in temperature, crystal growth of Cu occurs, the Cu plating film 12 and the Cu seed layer 11 become one film, and the second Cu film 13 is formed.

Next, as shown in FIG. 8D, the MOCVD-TiN film 10 outside the wiring groove and the second C
The u film 13 is removed to form a wiring. Thereafter, a silicon nitride film and an insulating film are deposited, and the steps after FIG. 8A are repeated to form a multilayer wiring.

Here, with respect to the MOCVD-TiN film 10, it is also expected to improve the reliability of the upper wiring formed of the second Cu film 13.

[0010]

However, the MOC
It is known that a Cu film on a VD-TiN film has low (111) orientation. It is considered that this is because the MOCVD-TiN film is in a state containing amorphous or microcrystal. The barrier film formed by the CVD method
Unlike a film formed by a sputtering method, it has an advantage that it can be formed thickly on the side wall of a contact hole or a wiring groove, which is advantageous in terms of barrier properties, but is inferior in crystallinity. There is a problem that the orientation is low and the electromigration characteristics of the Cu wiring are poor.

An object of the present invention is to provide a semiconductor device capable of improving the electromigration characteristics of Cu wiring and a method of manufacturing the same.

[0012]

Table 1 shows a laminated structure in which films constituting a Cu wiring are laminated, a Cu (111) plane and a Cu (111) plane.
The result of having investigated about the relationship with the diffraction intensity ratio of a (200) plane is shown.

[0013]

[Table 1]

The laminated structures in Table 1 are shown in order from the upper layer (Cu is the uppermost layer), and are examined on samples each simply laminated on a flat silicon nitride film.

As shown in Table 1, the present inventor has shown that MOCV
Cu // MOCVD-TiN / Al structure provided with (111) oriented Al film under D-TiN film, Cu // MOCVD-Ti provided with (002) oriented tetracrystalline Ta film
C with N // Ta structure and TiN film with (111) orientation
In the case of the u // MOCVD-TiN // TiN structure, it has been found that the (111) orientation of Cu is improved. After depositing a MOCVD-TiN film 10 nm on a silicon nitride film, exposing the substrate to air, and then analyzing a sample of a Cu // MOCVD-TiN structure in which a Cu film was deposited to a thickness of 50 nm by sputtering, by X-ray diffraction, Assuming that the diffraction intensity ratio I (111) / I (200) between the Cu (111) plane and the Cu (200) plane is 1, Cu sputtered the Al film 10 nm before the MOCVD-TiN film 10 nm was deposited. // MOCVD-Ti
I / (111) / I (200) of the sample having the N / Al structure is 1.2, and Cu // MOCVD-sputtered Ta film of 10 nm is used.
I (111) / I (200) of sample with TiN // Ta structure
Is 2.3, Cu // MOCV sputtered with 10 nm TiN film
I (111) / I (2) of a sample having a D-TiN // TiN structure
00) was 2.5, which was improved respectively.

The reason is considered as follows. First, the sputtered Al, Ta, and TiN films are fcc and Te, respectively.
tragonal, fcc crystal, its densest surface (111),
It is considered to be oriented to (002) and (111). At this time, as shown in FIG. 7, Al and TiN have the closest inter-atomic distances in the (111) plane of 2.86 ° and 3.00 °, so that A
l, TiN is below MOCVD-TiN and MOCV
It is considered that crystallization proceeds such that the (111) orientation proceeds in the D-TiN film. The (111) -oriented TiN film is lattice-matched with the Cu film at an in-plane atomic spacing of 3.00 × 6 = 18, 2.55 × 7 = 17.85, that is, at a 6-times and 7-times period, and the (111)
It is considered to enhance the orientation.

Even in a sample having a Cu // Al / MOCVD-TiN / Al structure, the Cu (111) orientation is Cu // MOCV.
It is slightly improved to 1.4 compared to 1.2 of the D-TiN / Al structure. Therefore, even if an Al film is formed directly under the Cu film, the Cu (111) orientation is improved because the Cu (111) plane and the Al (111) have close atomic spacings in the plane.

Also, it has been reported that a (002) -oriented Ta film also has a period of lattice matching with the (111) plane of Cu in the [220] direction.
Effect similar to N, ie, amorphous MOCVD-T
It is considered that a periodic order that easily matches with Cu was created on iN, and thus the Cu (111) orientation was improved.

According to the first and fifth aspects of the present invention, for the above reasons, the (111) -oriented Al film is provided under the Cu film as a part of the Cu wiring, so that the Cu film is (111) orientation can be improved.

According to the second and tenth aspects of the present invention, as a part of the Cu buried wiring, (11)
1) By providing an oriented Al film, the crystallinity of the barrier film can be enhanced, and the (111) orientation of the Cu film thereon can be enhanced.

A (111) -oriented A under the Cu film
Also, by forming an l film, the Cu (111) plane and the Al (1
In (11), since the in-plane atomic spacing is close, the Cu (111) orientation is improved. Therefore, claim 3 of the present invention, claim 1
According to the invention described in 2 above, the crystallinity of the barrier film is changed by providing an (111) -oriented Al film between the barrier film and the Cu film containing amorphous or microcrystal as a part of the Cu embedded wiring. Without increasing the (111) orientation of the Cu film. Since the barrier film is said to have higher barrier properties as it is amorphous, this structure has the advantage that the (111) orientation of the Cu film can be increased without impairing the barrier properties.

According to a fourth or thirteenth aspect of the present invention, the (111) -oriented Al in the buried wiring is provided.
The film is formed so that the film thickness at the bottom surface of the wiring recess is large and (111)
By aligning and making the film thickness on the side surfaces of the wiring recesses small and not necessarily (111) oriented, the growth of the Cu film in which the <111> axis is perpendicular to the side surfaces of the wiring recesses can be prevented. Suppressed and perpendicular to the bottom of the wiring recess <111
> By growing such that the axis is oriented, the Cu (111) orientation in the trench wiring can be improved.

The invention according to claims 6 and 14 of the present invention is a case where a wiring pattern is formed by etching, and an (111) -oriented Al film is formed under a barrier film containing amorphous or microcrystals. Is provided, the (111) orientation of the Cu film can be enhanced as in the second and tenth aspects.

By exposing the insulating film before the film deposition to Ar plasma in a method for improving the crystallinity of the sputtered film, the insulating film surface can be cleaned and the orientation of the sputtered film can be improved. Therefore, claim 1 of the present invention
According to a fifteenth aspect of the present invention, the surface of the interlayer insulating film is Ar
By exposing to plasma, the orientation of the (111) -oriented Al film formed by the sputtering method can be enhanced, and the (111) orientation of the upper Cu film can be enhanced.

The invention according to claims 7 and 16 of the present invention is directed to a case where a wiring pattern is formed by etching, wherein (111) orientation is provided between a barrier film containing amorphous or microcrystal and a Cu film. By providing the Al film thus formed, the (111) orientation of the Cu film can be increased without impairing the barrier property, as in the third and twelfth aspects.

Further, as in the invention according to claims 8 and 17 of the present invention, a titanium nitride film deposited by MOCVD, a sputtering method or C
A tantalum nitride film or a tungsten nitride film deposited by a VD method can be used,
Even when these barrier films are used, a (111) -oriented Al film, a (111) -oriented TiN film or a (00
2) By using an oriented Ta film as a base, a periodic order that easily matches with Cu is created in the amorphous film, and therefore, the (111) orientation of the Cu film can be improved.

Further, according to the ninth and eighteenth aspects of the present invention, instead of the (111) -oriented Al film, a (111) -oriented TiN film or a (002) -oriented Ta film is used. The same effect can be obtained by using.

As described above, according to the present invention, (11)
1) By improving the orientation, a Cu wiring having high electromigration resistance can be formed.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIGS.
The semiconductor device according to the first embodiment of the present invention and a method for manufacturing the same will be described with reference to FIG.

First, as shown in FIG. 1A, a trench wiring comprising a barrier metal 2 and a first Cu film 3 is formed in a first insulating film 1 on a semiconductor substrate, and a first silicon nitride film is formed. 4. In the semiconductor device being manufactured, which is covered with the second insulating film 5, the second silicon nitride film 6, and the third insulating film 7, about 50
A contact hole 8 having a depth of 0 nm and a wiring groove 9 having a depth of about 300 nm are formed. Here, the barrier metal 2 and the silicon nitride film 4 play a role (barrier property) of preventing the Cu of the first Cu film 3 from diffusing into the insulating film due to the heat treatment at about 400 ° C. during the wiring process.

Next, as shown in FIG. 1B, a (111) -oriented Al film 14 is deposited to a thickness of 10 nm by ionization sputtering or the like. Next, MOCVD is performed as a barrier film by MOCVD.
-Deposit a 10 nm TiN (titanium nitride) film 10. After exposing the surface of the TiN film 10 to air, a Cu film is deposited to a thickness of 100 nm by sputtering to form a Cu seed layer 11 serving as a conductive layer, and then the Cu film is formed by electrolytic plating as shown in FIG. A Cu plating film 12 is formed to a thickness of 500 nm, and the contact holes 8 and the wiring grooves 9 are buried. In a subsequent process involving a temperature rise, Cu crystal growth occurs and the Cu plating film 1 is formed.
2 and the Cu seed layer 11 form one film, and the second Cu film 13 is formed.

Next, as shown in FIG. 1D, the Al film 14 and the MOCVD-TiN film 1 outside the wiring groove are formed by a CMP method or the like.
0, the second Cu film 13 is removed to form a buried wiring. Thereafter, a silicon nitride film and an insulating film are deposited, and the steps after FIG. 1A are repeated to form a multilayer wiring.

In this embodiment, the (111) -oriented A
Because the film 14 is under the MOCVD-TiN film 10,
The atomic spacing of the MOCVD-TiN film 10 is also Al (111).
It is considered that microcrystallization proceeds to form a TiN (111) plane close to the plane. Then, as described in (Means for solving the problem), CuN on the TiN (111) surface
Since the (111) plane is easily formed, the Cu (111) orientation is improved. Therefore, according to the present embodiment, the MOCVD-TiN film 1 having good side wall coverage and high barrier properties
Electromigration characteristics of Cu wiring using 0 as a barrier film can be improved.

(Second Embodiment) A method of manufacturing a semiconductor device according to a second embodiment of the present invention will be described with reference to FIGS. 2 (a) to 2 (d).

First, as shown in FIG. 2A, a trench wiring comprising a barrier metal 2 and a first Cu film 3 is formed in a first insulating film 1 on a semiconductor substrate, and a first silicon nitride film is formed. 4. In the semiconductor device being manufactured, which is covered with the second insulating film 5, the second silicon nitride film 6, and the third insulating film 7, about 50
A contact hole 8 having a depth of 0 nm and a wiring groove 9 having a depth of about 300 nm are formed. Then, the semiconductor device is exposed to Ar plasma having a pressure of about 0.4 mTorr. The processing time is, for example, SiO 2
Performs 15 nm etching equivalent to ₂ At this time, a bias voltage may be applied to the wafer side.

Next, as shown in FIG. 2B, an Al film 14 having a (111) orientation is deposited to a thickness of 10 nm by ionization sputtering or the like. Next, MOCVD is performed as a barrier film by MOCVD.
-Deposit a 10 nm TiN (titanium nitride) film 10. After exposing the surface of the TiN film 10 to air, a Cu film is deposited to a thickness of 100 nm by a sputtering method to form a Cu seed layer 11 serving as a conductive layer, and then the Cu film is formed by an electrolytic plating method as shown in FIG. A Cu plating film 12 is formed to a thickness of 500 nm, and the contact holes 8 and the wiring grooves 9 are buried. In a subsequent process involving a temperature rise, Cu crystal growth occurs and the Cu plating film 1 is formed.
2 and the Cu seed layer 11 form one film, and the second Cu film 13 is formed.

Next, as shown in FIG. 2D, the Al film 14 and the MOCVD-TiN film 1 outside the wiring groove are formed by a CMP method or the like.
0, the second Cu film 13 is removed to form a buried wiring. Thereafter, a silicon nitride film and an insulating film are deposited, and the steps after FIG. 2A are repeated to form a multilayer wiring.

In this embodiment, the surface of the insulating film (second silicon nitride film 6) is cleaned by exposing it to Ar plasma before the formation of the Al film 14, and the (111) orientation of the Al film 14 is formed by sputtering. Can be further improved, and the (111) crystallinity of the MOCVD-TiN film 10 is improved to further improve the Cu (111) orientation. Therefore, the MOCVD-
The electromigration characteristics of the Cu wiring using the TiN film 10 as a barrier film can be further improved as compared with the case of the first embodiment.

(Third Embodiment) A semiconductor device and a method of manufacturing the same according to a third embodiment of the present invention will be described with reference to FIGS. 3 (a) to 3 (d).

The process of FIG. 3A is the same as the process of FIG.

Next, as shown in FIG. 3B, an Al film 14 having a (111) orientation is deposited to a thickness of 10 nm by ionization sputtering or the like. Next, MOCVD is performed as a barrier film by MOCVD.
-Deposit a 10 nm TiN (titanium nitride) film 10. Further, an Al film 15 having a (111) orientation is deposited to a thickness of 10 nm by ionization sputtering or the like. After exposing the surface of the Al film 15 to air, a Cu film is deposited to a thickness of 100 nm by sputtering to form a Cu seed layer 11 serving as a conductive layer, and then the Cu film is formed by electrolytic plating as shown in FIG. A Cu plating film 12 is formed to a thickness of 500 nm, and the contact holes 8 and the wiring grooves 9 are buried. In a subsequent step involving an increase in temperature, crystal growth of Cu occurs, and the Cu plating film 12 and the Cu seed layer 11 become one film, and the second Cu film 13 is formed.

Next, as shown in FIG. 3D, the Al films 14, 15 outside the wiring trench and the MOCVD-Ti
The N film 10 and the second Cu film 13 are removed to form a buried wiring. After that, a silicon nitride film and an insulating film are deposited, and FIG.
(a) The subsequent steps are repeated to form a multilayer wiring.

In the present embodiment, since the (111) -oriented Al film 15 is formed on the MOCVD-TiN film 10 and Cu is directly deposited on the Al film 15, (means for solving the problem) As described above, the Cu (111) orientation is improved, and the electromigration characteristics of the Cu wiring can be improved. In the present embodiment, A
The l film 14 may be omitted. In this case, since there is no underlying Al film, the (111) orientation of Cu can be increased without changing the crystallinity of the MOCVD-TiN film 10. Since the barrier film is said to have higher barrier properties as it is amorphous, the structure in which the Al film 14 is omitted has an advantage that the (111) orientation of Cu can be increased without impairing the barrier properties.

In the first to third embodiments, the Al films 14 and 15 are thicker and (111) oriented at the bottoms of the wiring grooves 9 and the contact holes 8, and the Al films 14 and 15 are It is preferable that the side surface of the hole 8 is thin and not necessarily (111) -oriented. Thereby, the wiring groove 9 and the contact hole 8 are formed.
The growth of the Cu film in which the <111> axis is oriented perpendicular to the side surface of the trench can be suppressed, and the growth in which the <111> axis is oriented perpendicular to the bottom surface of the wiring groove 9 and the contact hole 8 can be promoted. The Cu (111) orientation in the wiring can be further improved. Furthermore, if the Al films 14 and 15 on the side surfaces of the wiring groove 9 and the contact hole 8 are not (111) oriented at all, the Cu (111) orientation is improved. Furthermore, the Al films 14 and 15 may not be formed on the side walls of the wiring groove 9 and the contact hole 8.

In the first to third embodiments, pure Cu is used for the first Cu film 3 and the second Cu film 13, but another Cu alloy may be formed. Further, two films of a Cu seed layer 11 and a Cu plating film 12 are deposited to form a second
The Cu film 13 was used, but without depositing the Cu seed layer 11 or the Cu plating film 12, the second method was performed by the CVD method, the electroless plating method, the CVD + high temperature sputtering method, the sputtering + reflow method, the ion plating method, or the like. May be formed at one time.

The first, second, and third insulating films 1, 5,
7 is a CV having a low dielectric constant including a coating film, a SiO ₂ film and C.
A D film may be used.

The contact hole 8 is used as a wiring structure.
In this case, a method called dual damascene (in this case, the contact hole 8 and the wiring groove 9 are wiring concave portions) for simultaneously filling the wiring groove 9 is used, but one of them may be filled by this method. For example, when a contact hole is formed in an insulating film and the contact hole is buried, the contact hole can be formed using the above-described film configuration and formation method (in this case, the contact hole is a recess for wiring). In addition, when a wiring groove is formed in an insulating film and the wiring groove is buried, the film structure and the formation method described above can be used (in this case, the wiring groove is a wiring recess).

In FIGS. 1 to 3, the lower wiring formed by the barrier metal 2 and the first Cu film 3 is the same as the conventional example for the sake of explanation (for simplification of the explanation). Although the present invention has not been applied, it goes without saying that the configuration and the manufacturing method of the present invention can be applied to this lower wiring.

(Fourth Embodiment) A semiconductor device and a method of manufacturing the same according to a fourth embodiment of the present invention will be described with reference to FIGS. 4 (a) to 4 (d).

First, as shown in FIG. 4A, (11) is formed on the first insulating film 1 on the semiconductor substrate by ionization sputtering or the like.
1) Deposit an oriented Al film 14 to a thickness of 10 nm. Next, MOCV
A 10 nm MOCVD-TiN (titanium nitride) film 10 is deposited as a barrier film by the D method. Next, a Cu film 16 is deposited to a thickness of 300 nm by sputtering.

Next, as shown in FIG. 4 (b), a wiring pattern is formed with a resist 17, and as shown in FIG. 4 (c), the Al film 14, the MOCVD-TiN film 10,
The Cu film 16 is etched to form a wiring. Finally, FIG.
As shown in (d), the silicon nitride film 18 and the second insulating film 5 surround the wiring.

Also in the present embodiment, since the (111) -oriented Al film 14 is under the MOCVD-TiN film 10, the number of (111) -oriented microcrystals in the MOCVD-TiN film 10 increases, and It is considered that the (111) orientation of the Cu film 16 is improved. Therefore, according to the present embodiment, the electromigration characteristics of the Cu wiring can be improved.

(Fifth Embodiment) A method for manufacturing a semiconductor device according to a fifth embodiment of the present invention will be described with reference to FIGS. 5 (a) to 5 (d).

First, as shown in FIG. 5A, an Ar plasma treatment is applied to the first insulating film 1 on the semiconductor substrate. Next, as shown in FIG. 5B, (11)
1) Deposit an oriented Al film 14 to a thickness of 10 nm. Next, MOCV
MOCVD-TiN film 10 as a barrier film by D method
Is deposited to a thickness of 10 nm. Next, the Cu film 16 was formed to a thickness of 300 nm by sputtering.
accumulate. On top of this, a wiring pattern is formed with a resist 17 and, as shown in FIG.
The film 14, the MOCVD-TiN film 10, and the Cu film 16 are etched to form wiring. Finally, as shown in FIG. 5D, the silicon nitride film 18 and the second insulating film 5 surround the wiring.

According to this embodiment, as in the second embodiment, the surface of the first insulating film 1 can be cleaned by Ar plasma treatment, and the (111) orientation of the Al film 14 is further improved. By improving the crystallinity of the MOCVD-TiN film 10, the (111) orientation of the upper Cu film 16 is further improved. Therefore, the electromigration characteristics of the Cu wiring can be further improved as compared with the case of the fourth embodiment.

(Sixth Embodiment) A semiconductor device and a method of manufacturing the same according to a sixth embodiment of the present invention will be described with reference to FIGS. 6 (a) to 6 (d).

First, as shown in FIG. 6A, (11) is formed on the first insulating film 1 on the semiconductor substrate by ionization sputtering or the like.
1) Deposit an oriented Al film 14 to a thickness of 10 nm. Next, MOCV
A 10 nm MOCVD-TiN (titanium nitride) film 10 is deposited as a barrier film by the D method. Next, the (111) -oriented Al film 15 is formed by ion
accumulate. Next, a Cu film 16 is deposited to a thickness of 300 nm by sputtering.

Next, as shown in FIG. 6B, a wiring pattern is formed with a resist 17, and as shown in FIG. 6C, the Al film 14, the MOCVD-TiN film 10,
The Al film 15 and the Cu film 16 are etched to form wiring. Finally, as shown in FIG. 6D, the silicon nitride film 18 and the second insulating film 5 surround the wiring.

In this embodiment, as in the third embodiment, an (111) -oriented Al film 15 is formed on a MOCVD-TiN film 10 and Cu is directly deposited on the Al film 15. 111) The orientation can be improved, and the electromigration characteristics of the Cu wiring can be improved. Also, in the present embodiment, similarly to the third embodiment, the Al film 14 may be omitted.

In the fourth to sixth embodiments, the Cu film 16 is made of pure Cu, but another Cu alloy may be formed. The first insulating film 1 is formed of a coating film or Si
An O ₂ film or a CVD film containing C and having a low dielectric constant may be used.

In the first to sixth embodiments,
Although the MOCVD-TiN film 10 was used as the barrier film,
A tantalum nitride film or a tungsten nitride film deposited by a sputtering method or a CVD method may be used as long as it is a compound of a high melting point metal including amorphous or microcrystals, or MOCVD with SiH ₄ gas added.
Alternatively, a titanium silicon nitride film, a tantalum silicon nitride film, or the like may be used by reactive sputtering in Ar + N ₂ using a titanium silicon or tantalum silicon target.

In the first to sixth embodiments,
Although pure Al films are used as the Al films 14 and 15, Al films containing impurities may be used as long as they are preferentially oriented on the (111) plane of the fcc crystal. Further, the (111) -oriented Al film 14,
Similar effects can be obtained by forming a (111) -oriented TiN film or a (002) -oriented Ta film by sputtering or the like instead of 15.

Also, in the first, second, fourth, and fifth embodiments shown in FIGS.
Even when the CVD-TiN film 10 is not provided, the Cu film 13
By providing the (111) -oriented Al film 14 under the or 16, the (111) orientation of the Cu film 13 or 16 can be enhanced, and the electromigration characteristics of the Cu wiring can be improved. In this case, the MOC of the barrier film
Since the VD-TiN film 10 is not provided, the barrier property against Cu diffusion is inferior, but the Al film 14 provides a certain degree of barrier property.

[0064]

According to the first and fifth aspects of the present invention, (11)
1) By providing an oriented Al film, (11)
1) The orientation can be improved.

According to the second and tenth aspects of the present invention, (11) is formed under the barrier film containing amorphous or microcrystal as a part of the Cu embedded wiring.
1) By providing an oriented Al film, Cu
By inducing crystallinity that easily matches the (111) plane,
The (111) orientation of the upper Cu film can be increased.

According to the third and twelfth aspects of the present invention, the (111) -oriented Al between the barrier film and the Cu film containing amorphous or microcrystal as a part of the Cu embedded wiring. By providing the film, the (111) orientation of the Cu film can be increased without changing the crystallinity of the barrier film. Since the barrier film is more amorphous as it has a higher barrier property, this structure does not impair the barrier property.
There is an advantage that the (111) orientation of the u film can be increased.

According to the fourth and thirteenth aspects of the present invention, the (111) -oriented Al in the buried wiring is provided.
The film is formed so that the film thickness at the bottom surface of the wiring recess is large and (111)
By aligning and making the film thickness on the side surfaces of the wiring recesses small and not necessarily (111) oriented, the growth of the Cu film in which the <111> axis is perpendicular to the side surfaces of the wiring recesses can be prevented. Suppressed and perpendicular to the bottom of the wiring recess <111
> By growing such that the axis is oriented, the Cu (111) orientation in the trench wiring can be improved.

According to the sixth and fourteenth aspects of the present invention, the wiring pattern is formed by etching, and the (111) orientation is formed under the barrier film containing amorphous or microcrystal. By providing an Al film,
As in the second and tenth aspects, the (111) orientation of the Cu film can be improved.

According to the eleventh and fifteenth aspects of the present invention, the surface of the interlayer insulating film is exposed to Ar plasma before the step of forming the (111) -oriented Al film, whereby The (111) orientation of the Al film to be formed can be increased, and the (111) orientation of the upper Cu film can be enhanced.

According to the seventh and sixteenth aspects of the present invention, the wiring pattern is formed by etching, wherein (111) is formed between the barrier film containing amorphous or microcrystal and the Cu film. By providing the oriented Al film, the (111) orientation of the Cu film can be increased without impairing the barrier property, as in the third and twelfth aspects.

Further, as in the eighth and seventeenth aspects of the present invention, a titanium nitride film deposited by MOCVD, a sputtering method or a titanium nitride film deposited by MOCVD is used as the barrier film containing amorphous or microcrystals. C
A tantalum nitride film or a tungsten nitride film deposited by the VD method can be used.

Also, as in the ninth and eighteenth aspects of the present invention, instead of the (111) -oriented Al film, a (111) -oriented TiN film or a (002) -oriented Ta film is used. The same effect can be obtained by using.

As described above, according to the present invention, a Cu wiring having high electromigration resistance can be formed by improving the (111) orientation of the Cu film.

[Brief description of the drawings]

FIG. 1 is a process sectional view illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a process sectional view illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a process sectional view illustrating a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 4 is a process sectional view illustrating a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention.

FIG. 5 is a process sectional view illustrating a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention.

FIG. 6 is a process sectional view illustrating the method for manufacturing the semiconductor device in the sixth embodiment of the present invention.

FIG. 7 is a diagram showing an orientation plane and an in-plane atomic spacing of each metal film.

FIG. 8 is a process sectional view showing a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 Reference Signs List 1 1st insulating film 2 barrier metal 3 1st Cu film 4 1st silicon nitride film 5 2nd insulating film 6 2nd silicon nitride film 7 3rd insulating film 8 contact hole 9 wiring groove 10 MOCVD- TiN film 11 Cu seed layer 12 Cu plating film 13 Second Cu film 14 Al film 15 Al film 16 Cu film 17 Resist 18 Silicon nitride film

Continued on the front page F-term (reference)

Claims (18)

[Claims] 1. A semiconductor device having an embedded wiring embedded in an interlayer insulating film, wherein the embedded wiring is formed in a wiring recess of the interlayer insulating film, and has a (111) -oriented Al film; And a Cu film formed on the film. 2. A semiconductor device comprising an embedded wiring embedded in an interlayer insulating film, wherein the embedded wiring is formed in a wiring recess of the interlayer insulating film, and has a (111) -oriented Al film; A semiconductor device comprising: a barrier film formed on a film and including an amorphous or microcrystalline state; and a Cu film formed on the barrier film. 3. A semiconductor device provided with a buried wiring buried in an interlayer insulating film, wherein the buried wiring is formed in a wiring recess of the interlayer insulating film and includes a barrier film containing amorphous or microcrystal. And a (111) -oriented Al film formed on the barrier film, and a Cu film formed on the Al film. 4. The (111) -oriented Al film has a large thickness on the bottom surface of the wiring recess and is (111) oriented, and a thin film on the side surface of the wiring recess and is not necessarily (111) -oriented.
The semiconductor device according to claim 2, wherein the semiconductor device is not oriented. 5. A semiconductor device comprising a Cu wiring formed on an interlayer insulating film, wherein the Cu wiring is a (111) -oriented Al film formed on the interlayer insulating film;
and a Cu film formed on the I film. 6. A semiconductor device comprising a Cu wiring formed on an interlayer insulating film, wherein the Cu wiring is a (111) -oriented Al film formed on the interlayer insulating film;
1. A semiconductor device comprising: a barrier film formed on an L film and containing amorphous or microcrystals; and a Cu film formed on the barrier film. 7. A semiconductor device provided with a Cu wiring formed on an interlayer insulating film, wherein the Cu wiring is formed on the interlayer insulating film, and includes a barrier film in an amorphous or microcrystalline state. (111) formed on the barrier film
A semiconductor device comprising: an oriented Al film; and a Cu film formed on the Al film. 8. A barrier film containing amorphous or microcrystals is a titanium nitride film deposited by MOCVD, or a tantalum nitride film or tungsten nitride film deposited by sputtering or CVD. 8. The semiconductor device according to claim 2, wherein: 9. Instead of the (111) -oriented Al film,
5. A (111) oriented TiN film or a (002) oriented Ta film is provided.
9. The semiconductor device according to 6, 7, or 8. 10. A step of forming a wiring recess in an interlayer insulating film deposited on a semiconductor substrate; a step of forming an (111) -oriented Al film on the interlayer insulating film and in the wiring recess; A step of forming a barrier film containing amorphous or microcrystal on the film; a step of forming a Cu film on the barrier film so that the wiring recesses are buried; and a step of forming the Cu film other than in the wiring recesses. Forming a buried interconnect by removing the film, the barrier film, and the Al film. 11. After the step of forming a wiring recess,
11. The method according to claim 10, further comprising a step of exposing the surface of the interlayer insulating film to Ar plasma before the step of forming the (111) -oriented Al film. 12. A step of forming a recess for wiring in an interlayer insulating film deposited on a semiconductor substrate, and a step of forming a barrier film containing amorphous or microcrystal on the interlayer insulating film and in the recess for wiring. , On the barrier film (11
1) a step of forming an oriented Al film, a step of forming a Cu film on the Al film so that the wiring recesses are embedded, and the Cu film, the Al film, and the barrier film other than in the wiring recesses Forming a buried wiring by removing the semiconductor device. 13. The step of forming a (111) -oriented Al film, wherein the Al film has a large thickness on the bottom surface of the wiring recess and is (111) -oriented, and a film on a side surface of the wiring recess. 13. The film according to claim 10, wherein the film is formed so as to be thin and not necessarily oriented in (111) orientation.
13. The method for manufacturing a semiconductor device according to item 5. 14. A step of forming an (111) -oriented Al film on an interlayer insulating film deposited on a semiconductor substrate, and a step of forming a barrier film containing amorphous or microcrystal on the Al film. Forming a Cu film on the barrier film, and forming a wiring by etching the Cu film, the barrier film and the Al film into desired shapes. . 15. The method according to claim 14, further comprising a step of exposing the surface of the interlayer insulating film to Ar plasma before the step of forming the (111) -oriented Al film. 16. A step of forming a barrier film containing amorphous or microcrystal on an interlayer insulating film deposited on a semiconductor substrate, and a step of forming an (111) -oriented Al film on the barrier film. Forming a Cu film on the Al film, and forming a wiring by etching the Cu film, the Al film and the barrier film into desired shapes. . 17. The barrier film containing amorphous or microcrystals is a titanium nitride film deposited by MOCVD, or a tantalum nitride film or tungsten nitride film deposited by sputtering or CVD. The method for manufacturing a semiconductor device according to claim 10, wherein: 18. A (111) oriented TiN film or a (002) oriented Ta film is formed instead of the (111) oriented Al film.
18. The method for manufacturing a semiconductor device according to 1, 12, 13, 14, 15, 16, or 17.