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JP2002009220A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JP2002009220A
JP2002009220A JP2000189364A JP2000189364A JP2002009220A JP 2002009220 A JP2002009220 A JP 2002009220A JP 2000189364 A JP2000189364 A JP 2000189364A JP 2000189364 A JP2000189364 A JP 2000189364A JP 2002009220 A JP2002009220 A JP 2002009220A
Authority
JP
Japan
Prior art keywords
semiconductor chip
resin
semiconductor device
substrate
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000189364A
Other languages
Japanese (ja)
Inventor
Yukihiro Sato
幸弘 佐藤
Kazuo Shimizu
一男 清水
Shinya Koike
信也 小池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2000189364A priority Critical patent/JP2002009220A/en
Publication of JP2002009220A publication Critical patent/JP2002009220A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】 【課題】 放熱基板を用いた樹脂封止型半導体装置にお
いて、前記放熱基板の半導体チップが接着された面のモ
ールド樹脂の剥離を防ぐ。また、前記放熱基板に半導体
チップを接着する接着剤に生じる亀裂による放熱特性の
低下を防ぐ。 【解決手段】 熱伝導性の高い放熱基板と、前記放熱基
板の一主面(表面)に接着剤を用いて接着された半導体
チップと、前記半導体チップの外部電極と接続されるリ
ードと、前記半導体チップの外部電極とリードとを接続
する導電性部材と、前記半導体チップ及びリード、なら
びに導電性部材が封止する封止樹脂からなり、前記放熱
基板の前記半導体チップが接着された表面と対向する面
(裏面)が露出した樹脂封止型半導体装置において、前
記放熱基板は、前記表面の対向する2方向あるいは4方
向全ての辺に沿って、前記放熱基板の表面から前記半導
体チップの方向に突出する板状の突起が設けられている
樹脂封止型半導体装置である。
(57) Abstract: In a resin-encapsulated semiconductor device using a heat radiating substrate, peeling of a mold resin from a surface of the heat radiating substrate to which a semiconductor chip is bonded is prevented. In addition, it is possible to prevent heat radiation characteristics from being deteriorated due to cracks generated in the adhesive for bonding the semiconductor chip to the heat radiation substrate. A heat dissipation board having high thermal conductivity, a semiconductor chip adhered to one main surface (surface) of the heat dissipation board using an adhesive, a lead connected to an external electrode of the semiconductor chip, A conductive member that connects an external electrode and a lead of the semiconductor chip; and a sealing resin that seals the semiconductor chip and the lead, and the conductive member, and faces a surface of the heat dissipation substrate to which the semiconductor chip is bonded. In the resin-encapsulated semiconductor device having the exposed surface (back surface) exposed, the heat radiating substrate extends in the direction from the surface of the heat radiating substrate to the semiconductor chip along all sides of the surface facing in two or four directions. This is a resin-encapsulated semiconductor device provided with a protruding plate-shaped projection.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、樹脂封止型半導体
装置に関し、特に、半導体チップを接着する基板が、放
熱用に封止樹脂の外部に露出した半導体装置に適用して
有効な技術に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device, and more particularly to a technique effective when applied to a semiconductor device in which a substrate to which a semiconductor chip is bonded is exposed to the outside of a sealing resin for heat dissipation. Things.

【0002】[0002]

【従来の技術】従来、車載用電源やモータードライバー
系のIC(Integrated Circuit)等に用いられる半導体
装置で使用される半導体チップは、消費電力が大きく、
発熱量が大きい。発熱量の大きい前記半導体チップは、
半導体装置の内部が高温になりやすいため、前記半導体
チップから発生した熱を効率よく外部に放出して、オー
バーヒートするのを防ぐ必要がある。そのため、発熱量
の大きい半導体チップを用いた半導体装置では、図10
(a)に示すように、前記半導体チップ3を接着する基
板(ダイパッド)1に、銅(Cu)等の熱伝導性の高い
材料を用いて、前記半導体チップ3から発生する熱を、
はんだ等の接着剤2を介して前記基板1に伝導させると
ともに、前記基板1の前記半導体チップ3が接着された
面1Aの裏側の面1Bをモールド樹脂6の外側に露出さ
せて、前記半導体チップ3から発生する熱を効率よく放
熱できるようにしている。
2. Description of the Related Art Conventionally, a semiconductor chip used in a semiconductor device used for an in-vehicle power supply or an IC (Integrated Circuit) of a motor driver system has a large power consumption.
The calorific value is large. The semiconductor chip having a large calorific value is:
Since the temperature inside the semiconductor device is likely to be high, it is necessary to efficiently release the heat generated from the semiconductor chip to the outside to prevent overheating. Therefore, in a semiconductor device using a semiconductor chip that generates a large amount of heat,
As shown in (a), a substrate (die pad) 1 to which the semiconductor chip 3 is bonded is made of a material having high thermal conductivity such as copper (Cu), and heat generated from the semiconductor chip 3 is
Conduction is conducted to the substrate 1 through an adhesive 2 such as solder, and the surface 1B of the substrate 1 on the back side of the surface 1A to which the semiconductor chip 3 is adhered is exposed to the outside of the mold resin 6 to form the semiconductor chip. 3 can be efficiently radiated.

【0003】前記半導体チップ3を接着する放熱用の基
板(以下、放熱基板と称する)1は、前記モールド樹脂
6との接着性が低く、前記モールド樹脂6の剥離などが
生じやすい。前記放熱基板1とモールド樹脂6の界面が
剥離することにより、放熱基板1が抜け落ちたり、剥離
した部分からの水分の浸入による耐湿性の低下などが起
こりやすい。そのため、従来の放熱基板1を用いた樹脂
封止型半導体装置では、図10(a)に示すように、前
記放熱基板1の側面に、樹脂固定用の突起1Fを設け
て、モールド樹脂6の剥離及び前記放熱基板1の抜け落
ちを防止するとともに、耐湿性の向上を図っている。
A heat dissipation substrate (hereinafter, referred to as a heat dissipation substrate) 1 to which the semiconductor chip 3 is adhered has low adhesiveness to the mold resin 6 and the mold resin 6 is easily peeled off. When the interface between the heat radiating substrate 1 and the mold resin 6 is peeled off, the heat radiating substrate 1 is likely to fall off, and the moisture resistance is likely to be reduced due to the intrusion of moisture from the peeled portion. Therefore, in the conventional resin-encapsulated semiconductor device using the heat-radiating substrate 1, as shown in FIG. In addition to preventing peeling and falling off of the heat radiation substrate 1, the moisture resistance is improved.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、前記従
来の技術では、前記放熱基板1の側面に形成された樹脂
固定用の突起1Fにより、前記放熱基板1の側面とモー
ルド樹脂6との固定は強固になり、前記モールド樹脂6
の剥離及び前記放熱基板1の抜け落ちを防げるが、前記
半導体装置の組立工程におけるリフロー工程等で水蒸気
爆発を起こし、前記半導体チップ3を接着した放熱基板
1の表面1Aのモールド樹脂6が剥離した場合、前記放
熱基板1の表面とモールド樹脂6間に発生するせん断応
力は回避できない。言い換えると、前記放熱基板1の表
面1Aのモールド樹脂6が剥離することにより、図10
(b)に示すような、温度サイクル時のモールド樹脂6
の膨張、収縮の際の応力F5を前記放熱基板1の表面1
Aで緩和できず、その応力F5が前記半導体チップ3に
直接かかってしまう。その結果、図10(b)に示すよ
うに、前記半導体チップ3を前記放熱基板1に接着して
いる、はんだ等の接着剤2に高い応力F5がかかり、前
記接着剤2に亀裂15が生じる。前記接着剤2に生じた
亀裂15が大きくなると、前記半導体チップ3から放熱
基板1への放熱経路が遮断され、前記半導体チップ3で
発生した熱が半導体装置の内部にたまり、前記半導体装
置の内部が高温になり半導体チップ3がオーバーヒート
して半導体装置が故障するという問題があった。
However, in the prior art, the resin fixing protrusions 1F formed on the side surfaces of the heat radiating substrate 1 firmly fix the side surfaces of the heat radiating substrate 1 to the mold resin 6. And the molding resin 6
When the mold resin 6 on the surface 1A of the heat dissipation board 1 to which the semiconductor chip 3 is adhered peels off due to a steam explosion caused by a reflow process or the like in an assembling process of the semiconductor device. The shear stress generated between the surface of the heat dissipation substrate 1 and the mold resin 6 cannot be avoided. In other words, when the mold resin 6 on the surface 1A of the heat dissipation board 1 is peeled off, FIG.
Mold resin 6 during temperature cycle as shown in FIG.
The stress F5 at the time of expansion and contraction of the
A cannot relax the stress, and the stress F5 is directly applied to the semiconductor chip 3. As a result, as shown in FIG. 10B, a high stress F5 is applied to the adhesive 2 such as solder, which bonds the semiconductor chip 3 to the heat dissipation board 1, and a crack 15 is generated in the adhesive 2. . When the crack 15 generated in the adhesive 2 becomes large, the heat radiation path from the semiconductor chip 3 to the heat radiation substrate 1 is cut off, and the heat generated in the semiconductor chip 3 accumulates inside the semiconductor device, and the inside of the semiconductor device However, there has been a problem that the temperature of the semiconductor chip becomes high, the semiconductor chip 3 is overheated, and the semiconductor device breaks down.

【0005】本発明の目的は、放熱基板を用いた樹脂封
止型半導体装置において、前記放熱基板の半導体チップ
が接着された面のモールド樹脂の剥離を防ぐことが可能
な技術を提供することにある。本発明の他の目的は、放
熱基板を用いた樹脂封止型半導体装置において、前記放
熱基板に半導体チップを接着する接着剤に生じる亀裂に
よる放熱特性の低下を防ぐことが可能な技術を提供する
ことにある。本発明の前記ならびにその他の目的と新規
な特徴は、本明細書の記述および添付図面によって明ら
かになるであろう。
An object of the present invention is to provide a technique in a resin-encapsulated semiconductor device using a heat-radiating substrate, which can prevent the mold resin from peeling off from the surface of the heat-radiating substrate to which the semiconductor chip is bonded. is there. Another object of the present invention is to provide a technique in a resin-encapsulated semiconductor device using a heat radiating substrate, which can prevent a decrease in heat radiating characteristics due to a crack generated in an adhesive bonding a semiconductor chip to the heat radiating substrate. It is in. The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

【0006】[0006]

【課題を解決するための手段】本願において開示される
発明の概要を説明すれば、以下のとおりである。 (1)熱伝導性の高い放熱基板と、前記放熱基板の一主
面(表面)に接着剤を用いて接着された半導体チップ
と、前記半導体チップの外部電極と接続されるリード
と、前記半導体チップの外部電極とリードとを接続する
導電性部材と、前記半導体チップ及びリード、ならびに
導電性部材が封止する封止樹脂からなり、前記放熱基板
の前記半導体チップが接着された表面と対向する面(裏
面)が露出した樹脂封止型半導体装置において、前記放
熱基板は、前記表面の対向する2方向あるいは4方向全
ての辺に沿って、前記放熱基板の表面から前記半導体チ
ップの方向に突出する板状の突起が設けられている樹脂
封止型半導体装置である。 (2)前記(1)の樹脂封止型半導体装置において、前
記突起の先端には、所定の間隔で切り欠きが設けられて
いる。 (3)前記(1)または(2)の樹脂封止型半導体装置
において、前記放熱基板の表面から前記突起の先端まで
の高さが、前記放熱基板上に接着された前記半導体チッ
プの高さと等しい。
The summary of the invention disclosed in the present application is as follows. (1) a heat-dissipating substrate having high thermal conductivity, a semiconductor chip adhered to one main surface (surface) of the heat-dissipating substrate with an adhesive, a lead connected to an external electrode of the semiconductor chip, and the semiconductor A conductive member for connecting an external electrode and a lead of the chip; a sealing resin for sealing the semiconductor chip and the lead; and the conductive member, and facing a surface of the heat dissipation substrate to which the semiconductor chip is bonded; In the resin-encapsulated semiconductor device having an exposed surface (back surface), the heat dissipation board projects from the front surface of the heat dissipation board in the direction of the semiconductor chip along all sides of the front surface facing in two or four directions. This is a resin-encapsulated semiconductor device provided with plate-shaped protrusions. (2) In the resin-encapsulated semiconductor device of (1), notches are provided at predetermined intervals at the tips of the protrusions. (3) In the resin-encapsulated semiconductor device according to (1) or (2), the height from the surface of the heat radiating substrate to the tip of the protrusion is equal to the height of the semiconductor chip adhered on the heat radiating substrate. equal.

【0007】前記(1)の樹脂封止型半導体装置によれ
ば、半導体チップを接着する放熱基板の、半導体チップ
を接着する面(表面)の各辺に、前記放熱基板の表面か
ら半導体チップの方向に突出した突起を設けることによ
り、前記放熱基板の表面方向の樹脂が前記突起に引っか
かり、前記樹脂の固定力が強化するため、前記放熱基板
の表面の樹脂の剥離を防ぐことができる。
According to the resin-encapsulated semiconductor device of the above (1), each side of the surface (surface) of the heat dissipation substrate to which the semiconductor chip is adhered is attached to the semiconductor chip from the surface of the heat dissipation substrate. By providing the protrusion protruding in the direction, the resin in the surface direction of the heat radiating substrate is caught by the protrusion and the fixing force of the resin is strengthened, so that the resin on the surface of the heat radiating substrate can be prevented from peeling.

【0008】また、前記放熱基板の表面から半導体チッ
プの方向に突出した突起を設けることにより、前記半導
体チップの側面方向の樹脂が、膨張、収縮するときに働
くせん断応力を、前記突起により緩和することができる
ため、前記半導体チップ側面にかかる応力を低減でき
る。そのため、前記半導体チップと放熱基板を接着する
接着剤にかかる負荷が低減され、前記接着剤に亀裂が生
じて放熱経路が遮断され、放熱特性が低下することを防
げる。
In addition, by providing a projection protruding from the surface of the heat dissipation substrate in the direction of the semiconductor chip, a shear stress acting when the resin in the side direction of the semiconductor chip expands and contracts is reduced by the projection. Therefore, the stress applied to the side surface of the semiconductor chip can be reduced. Therefore, the load on the adhesive for bonding the semiconductor chip and the heat radiating substrate is reduced, and the heat radiating path is cut off due to the occurrence of cracks in the adhesive, thereby preventing the heat radiating characteristics from being deteriorated.

【0009】また、前記放熱基板の表面に突起を設けた
場合、前記突起が延在する辺に対して垂直方向のせん断
応力による樹脂のはがれは防げるが、平行方向のせん断
応力に対しては抗力が弱く、はがれやすい。また、前記
突起が延在する辺に対して垂直方向の応力は緩和できる
が、前記突起が延在する辺と平行な方向に働く応力はほ
とんど緩和されない。前記樹脂の、前記突起が延在する
辺と平行な方向への膨張、収縮による応力が緩和されず
に、前記半導体チップ側面にかかると前記接着剤に亀裂
が生じる可能性がある。そのため、前記(2)の手段の
ように、前記放熱基板の表面に設けられた突起の先端に
所定の間隔で切り欠きを設けることにより、前記樹脂が
前記突起の先端に引っかかり、前記突起が延在する方向
と平行な方向への樹脂のすべりを防げ、樹脂の固定力を
強化できる。
When a projection is provided on the surface of the heat-radiating substrate, the resin can be prevented from peeling off due to shear stress in a direction perpendicular to the side where the projection extends, but a resistance to shear stress in a parallel direction can be prevented. But weak and easy to peel off. Although the stress in the direction perpendicular to the side on which the protrusion extends can be reduced, the stress acting in the direction parallel to the side on which the protrusion extends is hardly reduced. If the resin is applied to the side surface of the semiconductor chip without relaxing the stress due to expansion and contraction in the direction parallel to the side where the protrusion extends, the adhesive may crack. Therefore, by providing notches at predetermined intervals at the tips of the projections provided on the surface of the heat dissipation board as in the means of (2), the resin is caught by the tips of the projections, and the projections extend. The resin can be prevented from sliding in a direction parallel to the existing direction, and the fixing force of the resin can be enhanced.

【0010】前記放熱基板の表面に設けられた突起は、
ある程度の高さがあれば、前記半導体チップの側面の樹
脂の膨張、収縮により受ける応力を低減できるが、前記
(3)の手段のように、前記突起の高さを、前記放熱基
板上に接着された半導体チップの高さと同じ高さにする
のが一番効果的である。前記突起と前記半導体チップの
高さを揃えることにより、前記半導体チップ側面にかか
る応力を均一に低減できる。
[0010] The protrusion provided on the surface of the heat dissipation board,
With a certain height, the stress received by the expansion and contraction of the resin on the side surface of the semiconductor chip can be reduced, but the height of the protrusion is bonded to the heat dissipation substrate as in the means of (3). It is most effective to set the same height as the height of the semiconductor chip. By making the heights of the protrusions and the semiconductor chip uniform, the stress applied to the side surface of the semiconductor chip can be reduced uniformly.

【0011】以下、本発明について、図面を参照して実
施の形態(実施例)とともに詳細に説明する。なお、実
施例を説明するための全図において、同一機能を有する
ものは、同一符号をつけ、その繰り返しの説明は省略す
る。
Hereinafter, the present invention will be described in detail together with embodiments (examples) with reference to the drawings. In all the drawings for explaining the embodiments, parts having the same function are denoted by the same reference numerals, and their repeated description will be omitted.

【0012】[0012]

【発明の実施の形態】(実施例1)図1及び図2は、本
発明による実施例1の樹脂封止型半導体装置の概略構成
を示す模式図であり、図1は樹脂封止型半導体装置の模
式平面図、図2(a)は図1のA−A’線での断面図、
図2(b)は図1の放熱基板の側面部分の拡大模式図、
図2(c)は図1のB−B’線での断面図である。
(Embodiment 1) FIGS. 1 and 2 are schematic views showing a schematic configuration of a resin-encapsulated semiconductor device according to Embodiment 1 of the present invention. FIG. FIG. 2A is a schematic plan view of the device, FIG. 2A is a cross-sectional view taken along line AA ′ of FIG.
FIG. 2B is an enlarged schematic view of a side portion of the heat dissipation board of FIG.
FIG. 2C is a cross-sectional view taken along line BB ′ of FIG.

【0013】図1において、1は放熱基板、1Aは半導
体チップ接着面(表面)、1Bは露出面(裏面)、1C
は応力低減用の突起、1Dは切り欠き、1EはV字溝、
2は接着剤、3は半導体チップ、4はリード、5はボン
ディングワイヤ、6はモールド樹脂である。
In FIG. 1, reference numeral 1 denotes a heat dissipation substrate, 1A denotes a semiconductor chip bonding surface (front surface), 1B denotes an exposed surface (back surface), and 1C.
Is a projection for reducing stress, 1D is a cutout, 1E is a V-shaped groove,
2 is an adhesive, 3 is a semiconductor chip, 4 is a lead, 5 is a bonding wire, and 6 is a molding resin.

【0014】本実施例1の樹脂封止型半導体装置は、図
1及び図2(a)に示すように、半導体チップを接着す
る放熱基板1と、前記放熱基板1の一主面(表面)1A
に接着剤2により接着された半導体チップ3と、前記半
導体チップ3の外部電極3Aと接続されるリード4と、
前記半導体チップ3の外部電極3Aと前記リード4を電
気的に接続するボンディングワイヤ5と、前記放熱基板
1、半導体チップ3、リード4、ボンディングワイヤ5
を封止するモールド樹脂6により構成されている。ま
た、前記放熱基板1の半導体チップ3が接着された表面
1Aと対向する面(裏面)1Bは、図2(a)に示すよ
うに、前記半導体チップ3で発生する熱を効率よく放熱
するために、前記モールド樹脂6から露出している。
As shown in FIGS. 1 and 2A, a resin-sealed semiconductor device according to a first embodiment of the present invention includes a heat-dissipating substrate 1 to which a semiconductor chip is bonded, and one principal surface (front surface) of the heat-dissipating substrate 1. 1A
A semiconductor chip 3 bonded to the semiconductor chip 3 by an adhesive 2, a lead 4 connected to an external electrode 3A of the semiconductor chip 3,
Bonding wires 5 for electrically connecting the external electrodes 3A of the semiconductor chip 3 to the leads 4, the heat dissipation board 1, the semiconductor chip 3, the leads 4, and the bonding wires 5;
Is formed by a mold resin 6 that seals the resin. Further, a surface (back surface) 1B of the heat dissipation substrate 1 facing the front surface 1A to which the semiconductor chip 3 is adhered, as shown in FIG. 2 (a), efficiently radiates heat generated in the semiconductor chip 3. And is exposed from the mold resin 6.

【0015】また、前記放熱基板1は、図1及び図2
(a)に示すように、前記表面1Aの対向する2方向の
辺に沿って、前記放熱基板1の表面1Aから半導体チッ
プ3の方向に板状の応力低減用の突起1Cが設けられて
いる。前記応力低減用の突起1Cは、前記半導体チップ
3の側面のモールド樹脂6がx方向に膨張、収縮すると
きに前記半導体チップ3にかかる応力、及び前記放熱基
板1の表面1Aとモールド樹脂6の間にかかるせん断応
力を緩和させる働きがある。
Further, the heat dissipation board 1 is made up of FIGS.
As shown in (a), plate-like stress-reducing projections 1C are provided from the surface 1A of the heat dissipation substrate 1 toward the semiconductor chip 3 along two sides of the surface 1A in two opposite directions. . The stress-reducing projections 1C are used for the stress applied to the semiconductor chip 3 when the mold resin 6 on the side surface of the semiconductor chip 3 expands and contracts in the x direction, and for the surface 1A of the heat dissipation substrate 1 and the mold resin 6. It has the function of alleviating the interposed shear stress.

【0016】また、前記応力低減用の突起1Cには、図
2(b)に示すように、所定の間隔で切り欠き1Dが形
成されている。前記切り欠き1Dには、前記モールド樹
脂6のy方向へのすべりを防ぎ、前記放熱基板1の表面
1Aの前記モールド樹脂6をはがれにくくする働きがあ
る。
As shown in FIG. 2B, cutouts 1D are formed at predetermined intervals in the stress-reducing projection 1C. The notch 1D has a function of preventing the mold resin 6 from slipping in the y direction and making it difficult for the mold resin 6 on the surface 1A of the heat dissipation board 1 to come off.

【0017】また、前記放熱基板1の表面1Aの、前記
応力低減用の突起1Cが設けられた2辺と異なる2辺方
向には、図2(c)に示すように、V字溝1Eが設けら
れている。前記V字溝1Eには、前記応力低減用の突起
1Cに形成された切り欠き1Dと同様に、前記モールド
樹脂6のy方向へのすべりを低減する働きがある。
As shown in FIG. 2C, a V-shaped groove 1E is formed on the surface 1A of the heat dissipation board 1 in two directions different from the two sides on which the stress reducing projections 1C are provided. Is provided. The V-shaped groove 1E has a function of reducing the slip of the mold resin 6 in the y direction, like the notch 1D formed in the stress reducing projection 1C.

【0018】図3乃至図6は、本実施例の樹脂封止型半
導体装置の製造方法を説明するための模式図である。図
3乃至図6において、7は異型材、7’はリードフレー
ム、7Aは突出部、7Bはリードになる部分、8は吊リ
ード、9はタイバーである。
FIGS. 3 to 6 are schematic views for explaining a method of manufacturing the resin-sealed semiconductor device of this embodiment. 3 to 6, reference numeral 7 denotes an odd-shaped member, 7 'denotes a lead frame, 7A denotes a protruding portion, 7B denotes a lead portion, 8 denotes a suspension lead, and 9 denotes a tie bar.

【0019】本実施例の樹脂封止型半導体装置では、以
下のような手順であらかじめ所定の形状に加工されたリ
ードフレームを用いる。まず、熱伝導性のよい銅(C
u)を圧延し、図3(a)及び図3(b)に示すよう
に、放熱基板として用いる突出部7Aとリードになる部
分7Bで厚さが異なる異型材7を形成する。
In the resin-encapsulated semiconductor device of this embodiment, a lead frame previously processed into a predetermined shape by the following procedure is used. First, copper (C
u) is rolled, and as shown in FIGS. 3 (a) and 3 (b), an irregularly shaped material 7 having different thicknesses is formed between the protruding portion 7A used as a heat dissipation substrate and the portion 7B serving as a lead.

【0020】次に、前記異型材7をプレス、エッチング
して、図4(a)及び図4(b)に示すように、吊リー
ド8で支持された放熱基板1、ダムバー9で一体的に支
持されたリード4となる部分を形成したリードフレーム
7’に加工する。このとき、前記放熱基板1の側面のう
ち、前記リード4と向かい合う側面部分には、応力低減
用の突起1Cとなる部分も形成される。また、前記応力
低減用の突起1Cの先端部分には、前記切り欠き1Dと
なる溝をリード4の間隔と同じ間隔で形成しておく。
Next, the irregularly shaped material 7 is pressed and etched, and as shown in FIGS. 4A and 4B, the heat radiating substrate 1 supported by the suspension leads 8 and the dam bar 9 are integrally formed. It is processed into a lead frame 7 ′ in which a portion to be the supported lead 4 is formed. At this time, of the side surfaces of the heat radiation substrate 1, a portion serving as a stress reducing projection 1 </ b> C is also formed on a side surface portion facing the leads 4. Further, at the tip of the stress reducing projection 1C, a groove serving as the notch 1D is formed at the same interval as the interval between the leads 4.

【0021】次に、前記リードフレーム7’の折り曲げ
加工を行って、図5(a)及び図5(b)に示すよう
に、前記放熱基板1とリード4の高さを変えるととも
に、前記放熱基板1の側面に突出した応力低減用の突起
1Cを半導体チップが接着される表面1Aの方向に折り
曲げる。ここで、前記突起1Cの折り曲げ角度は90度
にし、前記放熱基板1の表面に対して垂直になるように
加工するのが理想的であるが、実際には、90度に曲げ
ることが難しいため、図5(b)に示すように、45度
から90度の範囲になる。以上の工程に沿って製造され
たリードフレーム7’を用いて、本実施例の樹脂封止型
半導体装置を製造する。
Next, by bending the lead frame 7 ', as shown in FIGS. 5A and 5B, the height of the heat radiating substrate 1 and the lead 4 are changed, and The stress-reducing projection 1C protruding from the side surface of the substrate 1 is bent in the direction of the surface 1A to which the semiconductor chip is bonded. Here, it is ideal that the bending angle of the projection 1C is 90 degrees, and the projection is processed so as to be perpendicular to the surface of the heat dissipation board 1. However, it is difficult to bend it to 90 degrees in practice. As shown in FIG. 5B, the angle ranges from 45 degrees to 90 degrees. The resin-encapsulated semiconductor device of this embodiment is manufactured using the lead frame 7 'manufactured according to the above steps.

【0022】前記手順に沿って形成されたリードフレー
ム7’の放熱基板1の表面1A上に、図6(a)に示す
ように、はんだ等の接着剤2を用いて、半導体チップ3
を接着する。次に、図6(b)に示すように、前記半導
体チップ3の外部電極3Aと前記リード4をボンディン
グワイヤ5で接続し、前記放熱基板1、半導体チップ
3、リード4、ボンディングワイヤ5をモールド樹脂6
で封止する。
As shown in FIG. 6A, the semiconductor chip 3 is formed on the surface 1A of the heat dissipation board 1 of the lead frame 7 'formed according to the above-mentioned procedure using an adhesive 2 such as solder.
Glue. Next, as shown in FIG. 6B, the external electrodes 3A of the semiconductor chip 3 and the leads 4 are connected by bonding wires 5, and the heat dissipation substrate 1, the semiconductor chip 3, the leads 4, and the bonding wires 5 are molded. Resin 6
Seal with.

【0023】その後、リード4の端部を切断して、半導
体装置を前記リードフレーム7’から切り離し、前記リ
ード4を一体的に支持しているダムバー9を切断する。
その後、前記リード4のモールド樹脂6から突出した部
分(アウターリード)を、例えば、ガルウイング状に折
り曲げ加工すると、図2(a)に示したような、本実施
例の樹脂封止型半導体装置ができる。
Thereafter, the ends of the leads 4 are cut off to separate the semiconductor device from the lead frame 7 ', and the dam bar 9 integrally supporting the leads 4 is cut.
Thereafter, the portion (outer lead) of the lead 4 protruding from the mold resin 6 is bent into, for example, a gull wing shape, whereby the resin-encapsulated semiconductor device of this embodiment as shown in FIG. it can.

【0024】図7は、本実施例の樹脂封止型半導体装置
の作用効果を説明するための図である。本実施例の樹脂
封止型半導体装置では、図2(a)などに示したよう
に、前記放熱基板1の半導体チップ3が接着された表面
1Aの対向する2辺から前記半導体チップ3の方向に応
力低減用の突起1Cが設けられている。前記応力低減用
の突起1Cは、前記半導体チップ3の側面方向のモール
ド樹脂6を二分する形で設けられているので、前記半導
体チップ3の側面のモールド樹脂6が温度サイクルによ
り膨張、収縮したときに、x方向に働く応力の一部を緩
和することができる。また、前記応力低減用の突起1C
を設けることにより、図7(a)に示すように、前記半
導体チップ3の側面のモールド樹脂6のx方向の応力を
前記突起1Cと半導体チップ3の間の応力F3と、前記
突起1Cの外側の応力F4に分けることができる。その
ため、前記x方向に働き、前記放熱基板1の表面1Aと
モールド樹脂6の間にかかるせん断応力が小さくなり、
前記モールド樹脂6のはがれを低減させることができ
る。
FIG. 7 is a diagram for explaining the operation and effect of the resin-encapsulated semiconductor device of this embodiment. In the resin-encapsulated semiconductor device of this embodiment, as shown in FIG. 2A, the direction of the semiconductor chip 3 from two opposing sides of the surface 1A of the heat dissipation substrate 1 to which the semiconductor chip 3 is bonded. Is provided with a projection 1C for reducing stress. Since the stress-reducing projections 1C are provided so as to bisect the mold resin 6 in the side surface direction of the semiconductor chip 3, when the mold resin 6 on the side surface of the semiconductor chip 3 expands and contracts due to a temperature cycle. In addition, part of the stress acting in the x direction can be reduced. Further, the projections 1C for reducing stress are used.
7A, the stress in the x direction of the mold resin 6 on the side surface of the semiconductor chip 3 is reduced by the stress F3 between the protrusion 1C and the semiconductor chip 3, and the outside of the protrusion 1C, as shown in FIG. Stress F4. Therefore, the shear stress acting between the surface 1A of the heat dissipation board 1 and the mold resin 6 acting in the x direction is reduced,
Peeling of the mold resin 6 can be reduced.

【0025】また、前記応力低減用の突起を設けること
により、せん断応力を緩和して前記放熱基板1の表面1
Aとモールド樹脂6のはがれを防ぐとともに、前記放熱
基板1と半導体チップ3を接着している接着剤2にかか
る負荷も小さくなるので、前記接着剤2に亀裂が生じた
り、前記半導体チップ3がはがれることを防げる。以上
のようなことから、前記接着剤2に亀裂が生じ、半導体
チップ3から放熱基板1への放熱経路が遮断されて、半
導体装置内部に熱がたまり、オーバーヒートすることも
防げるので、半導体装置の放熱特性及び信頼性を向上さ
せることができる。
Further, by providing the stress reducing projections, the shear stress is relaxed and the surface 1 of the heat dissipation board 1 is reduced.
A and the mold resin 6 are prevented from peeling off, and the load on the adhesive 2 that bonds the heat dissipation substrate 1 and the semiconductor chip 3 is also reduced, so that the adhesive 2 is cracked or the semiconductor chip 3 Prevents peeling. From the above, a crack is generated in the adhesive 2 and the heat radiation path from the semiconductor chip 3 to the heat radiation substrate 1 is blocked, so that heat is prevented from accumulating inside the semiconductor device and overheating. Heat dissipation characteristics and reliability can be improved.

【0026】また、前記応力低減用の突起1Cの高さh
は、図7(b)に示すように、前記放熱基板1の表面1
Aから前記半導体チップ3の外部電極3Aが形成された
面までの高さと等しくすると、前記モールド樹脂6の膨
張、収縮により、前記半導体チップ3の側面にかかる応
力を均一に低減することができる。そのため、前記半導
体チップ3を接着する接着剤2にかかる付加をもっとも
効率よく低減させることができ、前記接着剤に亀裂が生
じることを防ぐ効果が大きくなる。
The height h of the stress reducing projection 1C
As shown in FIG. 7B, the surface 1 of the heat dissipation board 1 is
When the height from A to the surface on which the external electrodes 3A of the semiconductor chip 3 are formed is equal, the stress applied to the side surface of the semiconductor chip 3 due to expansion and contraction of the molding resin 6 can be reduced uniformly. Therefore, the addition of the adhesive 2 for bonding the semiconductor chip 3 can be reduced most efficiently, and the effect of preventing the adhesive from cracking becomes large.

【0027】以上説明したように、本実施例によれば、
放熱基板の半導体チップを接着する面(表面)に、前記
表面から、半導体チップの方向に突出した板状の突起を
設けることにより、前記半導体チップ側面のモールド樹
脂が膨張、収縮するときに働くせん断応力を緩和し、前
記放熱基板表面とモールド樹脂のはがれを防げる。ま
た、半導体チップ側面にかかる応力を低減して、前記半
導体チップと放熱基板を接着する接着材の亀裂、破損を
防ぎ、放熱特性を向上させることができる。
As described above, according to this embodiment,
By providing a plate-shaped projection protruding from the surface toward the semiconductor chip on the surface (front surface) of the heat dissipation substrate to which the semiconductor chip is bonded, shearing that acts when the mold resin on the side surface of the semiconductor chip expands and contracts. The stress is relieved, and the surface of the heat dissipation board and the mold resin can be prevented from peeling off. In addition, the stress applied to the side surface of the semiconductor chip can be reduced to prevent cracks and breakage of the adhesive for bonding the semiconductor chip and the heat dissipation substrate, thereby improving heat dissipation characteristics.

【0028】(実施例2)図8は、本発明による実施例
2の樹脂封止型半導体装置の概略構成を示す模式図であ
り、図8(a)は樹脂封止型半導体装置の模式平面図、
図8(b)は図8(a)のF−F’線での断面図であ
る。
(Embodiment 2) FIG. 8 is a schematic diagram showing a schematic configuration of a resin-encapsulated semiconductor device according to Embodiment 2 of the present invention. FIG. 8A is a schematic plan view of the resin-encapsulated semiconductor device. Figure,
FIG. 8B is a cross-sectional view taken along line FF ′ of FIG.

【0029】図8において、2は接着剤、4はリード、
5はボンディングワイヤ、6はモールド樹脂、10は放
熱基板、10Aは半導体チップ接着面(表面)、10B
は露出面、10Cは応力低減用の突起、10Dは切り欠
き、11は吊リード、12は半導体チップ、12Aは外
部電極である。
In FIG. 8, 2 is an adhesive, 4 is a lead,
5 is a bonding wire, 6 is a mold resin, 10 is a heat dissipation substrate, 10A is a semiconductor chip bonding surface (surface), 10B
Is an exposed surface, 10C is a projection for reducing stress, 10D is a cutout, 11 is a suspension lead, 12 is a semiconductor chip, and 12A is an external electrode.

【0030】本実施例2の半導体装置は、4方向にリー
ドを有するQFP型の半導体装置であって、図8(a)
及び図8(b)に示すように、半導体チップを接着する
放熱基板10と、前記放熱基板10の表面10Aに接着
剤2により接着される半導体チップ12と、前記半導体
チップ12の外部電極12Aと接続されるリード4と、
前記半導体チップ12の外部電極12Aと前記リード4
を電気的に接続するボンディングワイヤ5と、前記放熱
基板10、半導体チップ12、リード4、ボンディング
ワイヤ5を封止するモールド樹脂6により構成される。
なお、本実施例2の半導体装置も前記実施例1の半導体
装置と同様で、図8(b)に示すように、放熱基板10
の、半導体チップ12が接着された表面と対向する面
(裏面)10Bは前記モールド樹脂6から露出してい
る。
The semiconductor device according to the second embodiment is a QFP type semiconductor device having leads in four directions.
As shown in FIG. 8B, a heat radiating substrate 10 for bonding a semiconductor chip, a semiconductor chip 12 bonded to a surface 10A of the heat radiating substrate 10 with an adhesive 2, and an external electrode 12A of the semiconductor chip 12 A lead 4 to be connected;
The external electrodes 12A of the semiconductor chip 12 and the leads 4
And a molding resin 6 for sealing the heat radiating substrate 10, the semiconductor chip 12, the leads 4, and the bonding wires 5.
The semiconductor device according to the second embodiment is the same as the semiconductor device according to the first embodiment, and as shown in FIG.
The surface (back surface) 10B facing the surface to which the semiconductor chip 12 is adhered is exposed from the mold resin 6.

【0031】また、本実施例2の半導体装置では、図8
(a)に示すように、前記放熱基板10には、4つの角
部から前記モールド樹脂6の角部に向かって吊リード1
1があり、前記放熱基板10の表面10Aの前記リード
4と向かい合う4つの辺に、前記実施例1で説明したよ
うな応力低減用の突起10Cが設けられている。また、
前記応力低減用の突起10Cの先端には切り欠き10D
が設けられている。
In the semiconductor device of the second embodiment,
As shown in (a), the suspension leads 1 are provided on the heat dissipation board 10 from four corners toward the corners of the mold resin 6.
The protrusions 10C for reducing stress as described in the first embodiment are provided on four sides of the surface 10A of the heat dissipation board 10 facing the leads 4. Also,
A notch 10D is formed at the tip of the stress reducing projection 10C.
Is provided.

【0032】図9は、本実施例2の樹脂封止型半導体装
置に用いるリードフレームの概略構成を示す模式図であ
り、図9(a)はリードフレームの模式平面図、図9
(b)は図9(a)の模式正面図である。図9(a)及
び図9(b)において、13はリードフレーム、13A
は固定部、14は固定部材である。
FIG. 9 is a schematic diagram showing a schematic configuration of a lead frame used in the resin-encapsulated semiconductor device of the second embodiment. FIG. 9A is a schematic plan view of the lead frame.
FIG. 9B is a schematic front view of FIG. 9 (a) and 9 (b), 13 is a lead frame, 13A
Is a fixing portion, and 14 is a fixing member.

【0033】前記実施例1では、放熱基板に接着する半
導体チップ3の外部電極3Aが、対向する2辺に沿って
形成されたものであるため、リードフレーム7’のリー
ド4も前記外部電極が形成された2辺と向かい合う方向
のみに形成されている。そのため、図3に示したよう
な、部分的に厚さが異なる異型材7を用いて、一枚の板
でリードフレーム7’を形成することができる。しか
し、本実施例2の半導体チップ12のように、外部電極
12Aが4辺全てに沿って形成されている場合には、図
9(a)に示すように、4方向にリード4を形成したリ
ードフレーム13を用いなければならないため、図3に
示したような異型材7を用いてリードフレームを形成す
ることができない。
In the first embodiment, since the external electrodes 3A of the semiconductor chip 3 adhered to the heat radiating substrate are formed along two opposing sides, the leads 4 of the lead frame 7 'also have the external electrodes. It is formed only in the direction facing the formed two sides. Therefore, as shown in FIG. 3, the lead frame 7 'can be formed by one plate using the irregularly shaped members 7 having partially different thicknesses. However, when the external electrodes 12A are formed along all four sides as in the semiconductor chip 12 of the second embodiment, the leads 4 are formed in four directions as shown in FIG. Since the lead frame 13 must be used, the lead frame cannot be formed using the deformed material 7 as shown in FIG.

【0034】本実施例2の樹脂封止型半導体装置のよう
に、4方向にリード4が設けられた半導体装置の場合に
は、図9(a)及び図9(b)に示すように、リード4
のみが形成されたリードフレーム13と、角部に吊リー
ド11が設けられた放熱基板10をそれぞれ別の手順で
形成しておき、前記放熱基板10の角部に設けた吊リー
ド11の先端部を前記リードフレーム13に設けられた
固定部13Aに金バンプなどの固定部材14で接続し
た、2枚板形式のリードフレームを用いる。前記放熱基
板10の4方向に設けられた応力低減用の突起1Cの加
工は、前記リードフレーム13に接続する前に形成、加
工される。
In the case of a semiconductor device in which leads 4 are provided in four directions as in the resin-sealed semiconductor device of the second embodiment, as shown in FIGS. 9 (a) and 9 (b), Lead 4
A lead frame 13 in which only the lead frame 13 is formed and a heat radiating board 10 in which the hanging leads 11 are provided in the corners are formed in different procedures, respectively. Is connected to a fixing portion 13A provided on the lead frame 13 by a fixing member 14 such as a gold bump. The processing of the stress reducing protrusions 1C provided in the four directions of the heat dissipation board 10 is formed and processed before connecting to the lead frame 13.

【0035】前記図9(a)及び図9(b)に示したよ
うなリードフレームを、あらかじめ用意したあとの、半
導体チップ12の接着、ワイヤボンディング、モールド
樹脂6による封止は、前記実施例1で説明した手順ある
いは従来の手順と同様であるため、その説明は省略す
る。
After the lead frame as shown in FIGS. 9A and 9B is prepared in advance, the bonding of the semiconductor chip 12, the wire bonding, and the sealing with the molding resin 6 are performed in the above-described embodiment. Since the procedure is the same as the procedure described in 1 or the conventional procedure, the description is omitted.

【0036】本実施例2のQFP型の半導体装置では、
前記応力低減用の突起1Cを放熱基板10の4方向に設
けることができる。そのため、前記実施例1で説明した
ような、モールド樹脂6の膨張、収縮による応力を低減
する効果を、x方向、y方向ともに得ることができ、前
記放熱基板10の表面10Aとモールド樹脂6のはが
れ、前記接着剤2の亀裂の発生を防ぐことができる。
In the QFP type semiconductor device of the second embodiment,
The stress-reducing projections 1C can be provided in four directions of the heat dissipation substrate 10. Therefore, the effect of reducing the stress due to the expansion and contraction of the mold resin 6 as described in the first embodiment can be obtained in both the x direction and the y direction. The adhesive 2 can be prevented from peeling and cracking.

【0037】以上、本発明を、前記実施例に基づき具体
的に説明したが、本発明は、前記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲において種々変
更可能であることはもちろんである。
As described above, the present invention has been specifically described based on the above-described embodiment. However, the present invention is not limited to the above-described embodiment, and may be variously modified without departing from the gist thereof. Of course.

【0038】[0038]

【発明の効果】本願において開示される発明のうち、代
表的なものによって得られる効果を簡単に説明すれば、
以下のとおりである。 (1)放熱基板を用いた樹脂封止型半導体装置におい
て、前記放熱基板の半導体チップが接着された面のモー
ルド樹脂の剥離を防ぐことできる。 (2)放熱基板を用いた樹脂封止型半導体装置におい
て、前記放熱基板に半導体チップを接着する接着剤に生
じる亀裂による放熱特性の低下を防ぐことができる。
Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows. (1) In a resin-sealed semiconductor device using a heat radiating substrate, peeling of the mold resin from the surface of the heat radiating substrate to which the semiconductor chip is bonded can be prevented. (2) In a resin-encapsulated semiconductor device using a heat radiating substrate, a decrease in heat radiating characteristics due to a crack generated in an adhesive bonding a semiconductor chip to the heat radiating substrate can be prevented.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明による実施例1の樹脂封止型半導体装置
の概略構成を示す模式平面図である。
FIG. 1 is a schematic plan view illustrating a schematic configuration of a resin-sealed semiconductor device according to a first embodiment of the present invention.

【図2】本実施例1の樹脂封止型半導体装置の概略構成
を示す模式断面図及び部分拡大模式図である。
FIG. 2 is a schematic cross-sectional view and a partially enlarged schematic view illustrating a schematic configuration of a resin-sealed semiconductor device according to a first embodiment.

【図3】本実施例1の樹脂封止型半導体装置に用いるリ
ードフレームの製造方法を説明するための模式平面図及
び断面図である。
FIG. 3 is a schematic plan view and a cross-sectional view illustrating a method for manufacturing a lead frame used in the resin-encapsulated semiconductor device of Example 1;

【図4】本実施例1の樹脂封止型半導体装置に用いるリ
ードフレームの製造方法を説明するための模式平面図及
び断面図である。
FIG. 4 is a schematic plan view and a cross-sectional view illustrating a method for manufacturing a lead frame used in the resin-sealed semiconductor device of the first embodiment.

【図5】本実施例1の樹脂封止型半導体装置に用いるリ
ードフレームの製造方法を説明するための模式平面図及
び断面図である。
5A and 5B are a schematic plan view and a cross-sectional view illustrating a method for manufacturing a lead frame used in the resin-encapsulated semiconductor device according to the first embodiment.

【図6】本実施例1の樹脂封止型半導体装置の製造方法
を説明するための模式断面図である。
FIG. 6 is a schematic cross-sectional view for explaining the method for manufacturing the resin-sealed semiconductor device of the first embodiment.

【図7】本実施例1の樹脂封止型半導体装置の作用効果
を説明するための模式図である。
FIG. 7 is a schematic diagram for explaining the function and effect of the resin-sealed semiconductor device of the first embodiment.

【図8】本発明による実施例2の樹脂封止型半導体装置
の概略構成を示す模式平面図及び断面図である。
FIG. 8 is a schematic plan view and a cross-sectional view illustrating a schematic configuration of a resin-sealed semiconductor device according to a second embodiment of the present invention.

【図9】本実施例2の樹脂封止型半導体装置に用いるリ
ードフレームの概略構成を示す模式平面図及び断面図で
ある。
FIG. 9 is a schematic plan view and a cross-sectional view illustrating a schematic configuration of a lead frame used in the resin-sealed semiconductor device of the second embodiment.

【図10】従来の樹脂封止型半導体装置の概略構成及び
課題を示す模式図である。
FIG. 10 is a schematic diagram showing a schematic configuration and problems of a conventional resin-encapsulated semiconductor device.

【符号の説明】[Explanation of symbols]

1,10…放熱基板、1A,10A…半導体チップ接着
面(表面)1B,10B…露出面(裏面)、1C,10
C…応力低減用の突起、1D,10D…切り欠き、1E
…V字溝、2…接着剤、3,12…半導体チップ、4…
リード、5…ボンディングワイヤ、6…モールド樹脂、
7…異型材、7’,13…リードフレーム、7A…突出
部、7B…リードになる部分、8,11…吊リード、9
…ダムバー、13A…固定部、14…固定部材。
1, 10: heat dissipation board, 1A, 10A: semiconductor chip bonding surface (front surface) 1B, 10B: exposed surface (back surface), 1C, 10
C: projection for reducing stress, 1D, 10D: notch, 1E
... V-shaped groove, 2 ... adhesive, 3,12 ... semiconductor chip, 4 ...
Lead, 5: bonding wire, 6: mold resin,
Reference numeral 7: deformed material, 7 ', 13: lead frame, 7A: projecting portion, 7B: lead portion, 8, 11: suspension lead, 9
... dam bar, 13A ... fixed part, 14 ... fixed member.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 小池 信也 東京都小平市上水本町五丁目20番1号 株 式会社日立製作所半導体グループ内 Fターム(参考) 4M109 AA01 BA01 CA21 DB02 FA02 FA03 FA04 GA05 5F067 AA03 AA04 AB02 AB03 BD02 BD05 BE01 BE04 BE07 BE08 CA03 CA07 DA05 DA16 EA04 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Shinya Koike 5-2-1, Kamimizuhoncho, Kodaira-shi, Tokyo F-term within the Hitachi Semiconductor Group 4M109 AA01 BA01 CA21 DB02 FA02 FA03 FA04 GA05 5F067 AA03 AA04 AB02 AB03 BD02 BD05 BE01 BE04 BE07 BE08 CA03 CA07 DA05 DA16 EA04

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 熱伝導性の高い放熱基板と、前記放熱基
板の一主面(表面)に接着剤を用いて接着された半導体
チップと、前記半導体チップの外部電極と接続されるリ
ードと、前記半導体チップの外部電極とリードとを接続
する導電性部材と、前記半導体チップ及びリード、なら
びに導電性部材が封止する封止樹脂からなり、前記放熱
基板の前記半導体チップが接着された表面と対向する面
(裏面)が露出した樹脂封止型半導体装置において、前
記放熱基板は、前記表面の対向する2方向あるいは4方
向全ての辺に沿って、前記放熱基板の表面から前記半導
体チップの方向に突出する板状の突起が設けられている
ことを特徴とする樹脂封止型半導体装置。
A heat-dissipating substrate having high thermal conductivity, a semiconductor chip adhered to one main surface (surface) of the heat-dissipating substrate using an adhesive, and a lead connected to an external electrode of the semiconductor chip. A conductive member for connecting an external electrode and a lead of the semiconductor chip, and the semiconductor chip and the lead, and a sealing resin formed by sealing the conductive member; and a surface of the heat dissipation substrate to which the semiconductor chip is bonded. In the resin-encapsulated semiconductor device in which the facing surface (back surface) is exposed, the heat radiating substrate extends in a direction from the surface of the heat radiating substrate to the semiconductor chip along all sides of the front surface in two or four opposite directions. A resin-encapsulated semiconductor device, characterized in that a plate-shaped projection protruding from the semiconductor device is provided.
【請求項2】 前記請求項1に記載の樹脂封止型半導体
装置において、前記突起の先端には、所定の間隔で切り
欠きが設けられていることを特徴とする樹脂封止型半導
体装置。
2. The resin-sealed semiconductor device according to claim 1, wherein a notch is provided at a predetermined interval at a tip of said projection.
【請求項3】 前記請求項1または2に記載の樹脂封止
型半導体装置において、前記放熱基板の表面から前記突
起の先端までの高さが、前記放熱基板上に接着された前
記半導体チップの高さと等しいことを特徴とする樹脂封
止型半導体装置。
3. The resin-encapsulated semiconductor device according to claim 1, wherein a height from a surface of the heat radiating substrate to a tip of the projection is equal to a height of the semiconductor chip bonded on the heat radiating substrate. A resin-encapsulated semiconductor device characterized by being equal in height.
JP2000189364A 2000-06-23 2000-06-23 Resin-sealed semiconductor device Pending JP2002009220A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000189364A JP2002009220A (en) 2000-06-23 2000-06-23 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000189364A JP2002009220A (en) 2000-06-23 2000-06-23 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JP2002009220A true JP2002009220A (en) 2002-01-11

Family

ID=18689000

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000189364A Pending JP2002009220A (en) 2000-06-23 2000-06-23 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JP2002009220A (en)

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