JP2001142508A - Programmable controller - Google Patents

Abstract

(57) [PROBLEMS] To provide a programmable controller in which power is not supplied from a backup power supply system to a static RAM during operation of the programmable controller. A changeover switch is provided in a backup power supply system, and a backup power supply system is connected to a power supply terminal of a static RAM via the changeover switch. As a result, the changeover switch 12 is turned off.
In this case, power is not supplied from the backup power supply system regardless of the potential difference between the operation power supply system 7 and the backup power supply system 8.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a static RA
The present invention relates to a programmable controller having a backup function for retaining data in M.

[0002]

2. Description of the Related Art A memory mounted on a programmable controller has a role of storing data and a role of holding data stored until the next operation starts. In recent years, the processing speed of the programmable controller has been required to be increased, and as a means for realizing the processing, the memory access time has been reduced.

In order to satisfy these conditions, a static RAM is generally used as a memory. In order to hold data in the static RAM, it is necessary to supply a data holding power supply (backup power supply). .

Therefore, referring to FIG.
A conventional power supply method for realizing AM data retention will be described.

FIG. 1 is a block diagram showing a configuration of a conventional programmable controller for realizing a backup function of a static RAM, focusing on a power supply system. In the figure, a CPU 3 for performing arithmetic processing inside the programmable controller, an input / output control block 2 for interfacing with external devices, and a static RAM 4 for storing various data are provided by a power supply circuit block 1. Connected to the operating power supply system 7 supplied by the power supply. The reset circuit block 9 monitors the voltage of the operation power supply and generates a reset signal RS to the CPU 3.
Are also connected to the operating power supply system 7.

Further, since the static RAM 4 needs to hold the stored data when the operating power is not supplied, in addition to the operating power system 7, a backup power source (primary battery) 6
It is also connected to the backup power supply system 8 supplied from the power supply.

[0007] In a general programmable controller, a battery is mainly used as a backup power supply. Therefore, a case where a primary battery is used will be described here.

As shown in FIG. 1, in order to separate the operating power supply system 7 from the backup power supply system 8, a power supply system separating diode 5 is provided on the operating power supply system 7 at a power supply portion to the static RAM 4. ing. Note that the diode 10 provided in the backup power supply system 8
It is a diode for preventing charging of the primary battery 6.

FIG. 2 is a timing chart showing the voltage supplied to the static RAM 4 and the power supply path. In the figure, the power supply circuit block 1 is outputting a voltage (period T _A ).
Is supplied with power from the power supply circuit block 1 to the operation power supply system 7, and its voltage is sufficiently higher than the voltage of the backup power supply system 8. Therefore, power supply from the primary battery 6 does not occur during operation, and all power required for operation is supplied from the operation power supply system 7.

On the other hand, when the supply from the operating power supply system 7 is stopped (period T _B ), the voltage of the backup power supply system 8 becomes
Since the voltage becomes higher than the voltage of the operation power supply system 7, power is supplied from the primary battery 6 to the static RAM 4.

In this way, even when the operation power supply is cut off, the power is supplied to the static RAM 4 and the data backup is realized.

[0012]

In the above-mentioned conventional device, the voltage of the operating power supply system is set higher than the voltage of the backup power supply system.
Power was not supplied from the primary battery 6 to the static RAM 4 during operation.

However, in recent years, the voltage of the operating power supply system has become lower than the voltage of the backup power supply system due to the reduction in the voltage of electronic components.

Therefore, in the conventional power supply system configuration, power is supplied to the static RAM from the backup power supply system even during operation. As a result, a shortage of backup charge occurs during data retention, and a sufficient backup time can be secured. The problem of disappearing occurs.

Accordingly, an object of the present invention is to provide
An object of the present invention is to provide a programmable controller in which power is not supplied from a backup power supply system to a static RAM during operation of the programmable controller.

[0016]

In order to achieve the above object, a programmable controller according to the present invention is a programmable controller having a backup function for retaining data in a static RAM. Switching means for switching between the operating power supply and the backup power supply, and controls the switching means in accordance with the presence or absence of access to the static RAM.

Here, in the above-mentioned programmable controller, it is possible to use a port signal for outputting the state of the operating flag of the CPU as the switching control signal for controlling the switching means. Alternatively, a power supply monitoring reset signal can be used as a switching control signal for controlling the switching means.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A programmable controller to which the present invention is applied focuses on the fact that a switch can be controlled so that supply from a backup power supply path is only required. Here, the switch uses various switch control signals, paying attention to the fact that the switch may be controlled depending on whether the static RAM is accessed or not.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

Embodiment 1 FIG. 3 shows Embodiment 1 to which the present invention is applied. In this figure, the same elements as those in FIG. 1 shown as a conventional example are denoted by the same reference numerals. That is, 1 is a power supply circuit block, 2 is an input / output control block, 3 is a CPU, 4 is a static RAM, 5 is a power system separation diode, 6 is a backup power supply (primary battery), 7 is an operation power supply system, and 8 is a backup power supply. Power supply system, 9 is a reset circuit block, 10
Is a charge preventing diode.

In the conventional example shown in FIG. 1, the backup power supply system 8 is directly connected to the static RAM 4 via the charge preventing diode 10, whereas in the present embodiment, the switch 12 is switched to the backup power supply system.
The backup power supply system 8 is connected to the power supply terminal of the static RAM 4 via the changeover switch 12.

As a result, the changeover switch 12 is turned off.
In this case, power is not supplied from the backup power supply system regardless of the potential difference between the operation power supply system 7 and the backup power supply system 8.

A switch, a transistor, or the like can be used for the changeover switch 12. However, a required condition is that a passing current (a current flowing from the primary battery 6 to the static RAM 4) is several μA. In this embodiment, an FET (field effect transistor) is used in order to satisfy the following condition and that the current value of the switch control signal 30 is small.

However, when an FET is used as the changeover switch 12, it is necessary to select an element having a characteristic of “operating power supply system voltage−backup power supply system voltage> gate cut off voltage”.

Second Embodiment FIG. 4 is a block diagram showing a second embodiment. Also in this figure, the same elements as those in FIG. 1 shown as a conventional example are denoted by the same reference numerals, and thus description thereof will be omitted. FIG.
5 shows the operation timing of FIG.

In this embodiment, an output port signal of the CPU 3 (ie, a port signal for outputting the state of the CPU operating flag) 40 is used as a control signal of the changeover switch (FET) 12 provided in the backup power supply system. I do.

However, this output port must be a terminal capable of drawing current when power is not supplied to the CPU 3.

The state of the output port is set by software and reset is performed by C as shown in the timing chart of FIG.
This is performed by a reset signal RS to PU3.

Thus, the power supply system is switched before the access to the static RAM 4 is started, so that the power supply from the backup power system 8 is not performed during the operation of the static RAM 4.

Third Embodiment FIG. 6 is a block diagram showing a third embodiment. Also in this figure, the same elements as those in FIG. 1 shown as a conventional example are denoted by the same reference numerals, and thus description thereof will be omitted. FIG.
7 shows the operation timing of FIG.

In the present embodiment, a power supply monitoring reset signal RS for controlling the operation / stop of the CPU 3 is used as a control signal for the changeover switch (FET) 12 provided in the backup power supply system. However, this reset signal output must be an output that can draw current when power is not supplied to the reset circuit block 9.

Thus, even when the voltage of the operating power supply system 7 is lower than the voltage of the backup power supply system 8,
During operation, that is, when the power supply monitoring reset signal RS is disabled, power is supplied from the operation power supply system 7, and when stopped, that is, when the power supply monitoring reset signal RS is enabled, power is supplied from the backup power supply system 8. Will be.

[0033]

As described above, according to the present invention, even when the voltage of the operation power supply system is lower than the voltage of the backup power supply system, when the static RAM is accessed, the power supply from the operation power supply system. When the static RAM is not accessed, power is supplied from the backup power supply system.

That is, in a programmable controller having a backup function of retaining data in a static RAM, a switch is used for switching between an operation power supply system for supplying power to the static RAM and a backup power supply system, and a circuit for controlling the switch is provided. Thus, the power supply path can be appropriately switched.

[Brief description of the drawings]

FIG. 1 is a power supply diagram of a conventionally known program controller.

FIG. 2 is a diagram showing operation timings of FIG. 1;

FIG. 3 is a block diagram showing Embodiment 1 of the present invention.

FIG. 4 is a block diagram showing a second embodiment of the present invention.

FIG. 5 is a diagram showing the operation timing of FIG. 4;

FIG. 6 is a block diagram showing a third embodiment of the present invention.

FIG. 7 is a diagram showing the operation timing of FIG. 6;

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 power supply circuit block 2 input / output control block 3 CPU 4 static RAM 5 power supply system separation diode 6 backup power supply (primary battery) 7 operation power supply system 8 backup power supply system 9 reset circuit block 10 charge prevention diode 12 changeover switch 30 switch control Signal 40 Output port signal

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5B011 DA02 DA07 DB23 EB01 HH02 JB01 5G015 FA04 GB05 HA14 JA08 JA34 JA53 KA04 5H220 BB09 CC03 CX04 FF03 JJ06 JJ31 KK02 MM01 9A001 BB03 BB05 JJ48

Claims (3)

[Claims] 1. A programmable controller having a backup function for holding data in a static RAM, comprising: switching means for switching between an operation power supply for supplying power to the static RAM and a backup power supply, A programmable controller, wherein the switching unit is controlled according to the presence or absence. 2. The programmable controller according to claim 1, wherein a port signal for outputting a state of an operating flag of a CPU is used as a switching control signal for controlling the switching unit. 3. The programmable controller according to claim 1, wherein a power supply monitoring reset signal is used as a switching control signal for controlling said switching means.