JPH06118893A - Display apparatus - Google Patents

Abstract

PURPOSE:To enhance the display quality by eliminating an abnormal display at the time of turning on a power source. CONSTITUTION:At the time of executing driving control of a VFD 3 through a VFD (fluorescent display tube) driver 2 from a CPU 1, a control signal (for instance, a CTR) corresponding to a display signal outputted from its CPU 1 is used, and this control signal and a signal from a constant-voltage circuit 5 are inputted to an AND circuit 6. This display apparatus is constituted so that, by executing turn-on/turn-off control of the VFD 3 by an output of this AND circuit 6, a grid G of the VFD 3 is turned off and its display is turned off forcibly until a normal display signal is supplied to VFD driver 2 from the CPU 1 at the time of turning on a power source. In such a way, even if a display output is supplied to the VFD 3 before display data of the inside of the VFD driver 2 is defined, an abnormal display is obviated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device which uses a microprocessor, that is, a CPU, to perform various displays, and more particularly to a display device which eliminates an abnormal display at power-on.

[0002]

2. Description of the Related Art An example of a conventional display device will be described with reference to FIG. This display device, as shown in FIG.
A VFD driver 2, a fluorescent display tube (hereinafter abbreviated as VFD) 3, and a reset circuit 4 for resetting the CPU 1 when the power is turned on, and a constant power supply voltage V _DD is applied to each of these parts. Sourced from. In the figure, reference sign + B is a positive voltage of a battery power source (not shown)
ND indicates the ground potential, respectively.

[0003]

In such a conventional display device, when the power is turned on (see FIG. 4 (a)), the reset circuit 4 causes the CPU 1 to "L" as shown in FIG. 4 (b).
The signal is for a while and the reset state is maintained for a while, and then the signal for "H" is released for the reset. Therefore, the display signal 11 to the VFD driver 2 is cut off as shown in FIG. 4 (c). However, at this time, the power supply voltage V _DD is being supplied from the constant voltage circuit 5 to the VFD driver 2, and the VFD driver 2
There is a problem that the display output 12 is supplied to the VFD 3 before the internal display data is determined and an abnormal display occurs.

[0004]

In order to solve such a problem, the present invention provides a VFD, a driver for the VFD, and
In a display device including a CPU that controls the driver and a reset circuit that resets the CPU when the power is turned on, a regular display signal is sent from the CPU to the VFD driver when the power is turned on. A means for applying a display blanking signal to the VFD to erase the display until it is supplied is provided.

[0005]

In the present invention, the display blanking signal is given to the VFD to erase the display until the regular display signal is supplied from the CPU to the VFD driver.
Before the display data inside the VFD driver is confirmed, V
Even if the display output is supplied to the FD, the abnormal display can be eliminated.

[0006]

1 is a block diagram showing an embodiment of a display device according to the present invention. In FIG. 1, 1 is a CPU, 2
Is a VFD driver, 3 is VFD, 4 is a reset circuit that resets the CPU 1 when the power is turned on, and 5 is a constant voltage circuit that keeps a voltage from a battery power source (not shown) constant and supplies the voltage V _DD to each unit, An AND circuit 6 receives the control signal from the CPU 1 and the signal from the constant voltage circuit 5, and the output of the AND circuit 6 is supplied to the grid G of the VFD 1.

That is, this embodiment is different from the conventional example shown in FIG. 3 in that when the CPU 1 drives and controls the VFD 3 via the VFD driver 2, the CP
A control signal (for example, CTR) corresponding to the display signal output from U1 is used, the control signal and the signal from the constant voltage circuit 5 are input to the AND circuit 6, and V is output by the output.
The FD3 is controlled to be turned on and off by turning off the grid G of the VFD3 and forcibly turning off the display until the normal display signal is supplied from the CPU1 to the VFD driver 2 when the power is turned on.

In this case, the CPU 1 controls the control signal (C
TR) is set to “H” for the first time after the reset is released and the regular display signal is supplied to the VFD driver 2. The AND circuit 6 portion may be configured by a transistor or the like.

According to the display device configured as described above,
When the power is turned on (see Fig. 2 (a)), the reset circuit 4 causes C
As shown in Fig. 2 (b), PU1 is reset by the "L" signal for a while, and the display signal to VFD driver 2 is interrupted as shown in Fig. 2 (c). A control signal (see FIG. 2D) is input from the CPU 1 to the AND circuit 6.

Therefore, the AND circuit 6 sets the signal of the logic level "L" as the display blanking signal when the input conditions of the control signal and the signal of the constant voltage circuit 5 do not match, and when they match, the logic level "H". V signal as the normal display signal
Supply to the grid G of FD3. This makes VFD3
As shown in FIG. 2, the CPU 1 causes the VFD driver 2
The off operation is performed until a normal display signal is supplied to, and thereafter, a normal display is performed. Therefore, as in the conventional example described above, even if the display output is supplied to the VFD 3 before the display data inside the VFD driver 2 is fixed, the abnormal display can be eliminated.

[0011]

As described above, according to the present invention, in a display device having a function of driving a VFD through a VFD driver based on a command from a CPU and resetting the CPU when the power is turned on, the display device is turned on. Since the display blanking signal is given to the VFD and the display is erased until the regular display signal is supplied from the CPU to the VFD driver, it is possible to eliminate the abnormal display when the power is turned on.
This has the effect of improving the display quality.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a display device according to the present invention.

FIG. 2 is a time chart used for explaining the operation of the present embodiment.

FIG. 3 is a block diagram showing an example of a conventional display device.

FIG. 4 is a time chart for explaining the operation of the conventional example.

[Explanation of symbols]

 1 CPU 2 VFD driver 3 VFD (fluorescent display tube) 4 reset circuit 5 constant voltage circuit 6 AND circuit

Claims (1)

[Claims] 1. A fluorescent display tube, a VFD driver for driving the fluorescent display tube, and a CPU for controlling the driver.
And a reset circuit that resets the CPU when the power is turned on. In a display device that supplies a constant power supply voltage to each of these, a regular display signal is supplied from the CPU to the VFD driver when the power is turned on. The display device, further comprising means for applying a display blanking signal to the fluorescent display tube to erase the display.