JP2001093868A - Method for manufacturing silicon wafer, and silicon wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a silicon wafer with smooth surfaces and a method of manufacturing such a silicon wafer, where the formation of particles is suppressed. SOLUTION: A silicon wafer 1 is subjected to a lapping step and an alkali etching step, after which the wafer 1 is subjected to a deposition step, wherein a wafer smoothing layer 2 is deposited on one of its surfaces, and then subjected to a mirror-finished surface step, where the other surface of the wafer 1 is mirror-surface finished. The layer 2 is preferably a polysilicon layer deposited by a CVD method, whereby fine asperities on the surface of the wafer 1 resulting from the alkali etching step are filled to obtain a planarized surface and to prevent the formation of particles in subsequent steps. The mirror-surface finished surface also allows the wafer 1 to be obtained, where the formation of particles is suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a silicon wafer having a high flatness and a silicon wafer.

[0002]

2. Description of the Related Art Conventionally, in order to obtain a silicon wafer, a silicon single crystal rod is cut out with a diamond cutter and then subjected to a lapping step, an etching step and a mirror polishing step.
Wash and finish.

The outline of the lapping step, etching step and mirror polishing step will be described below.

[0004] The lapping step is performed to remove the distortion of the cut silicon wafer and to smooth the surface. The lapping device is made of, for example, a platen having two upper and lower surfaces, and polishes with particles while rotating the silicon wafer with the platen interposed therebetween. FIG. 7 shows a schematic view of the silicon wafer after the lapping step. As shown in FIG. 7, a fine surface crush layer remains on both surfaces of the silicon wafer.

[0005] The etching step is performed to remove the crushed layer generated in the lapping step, and is chemically etched using an etching solution.

Further, the mirror polishing step is performed to improve the smoothness of the silicon wafer, and mechanical and chemical polishing is performed by using both the particles and an alkaline solution as a chemical polishing agent.

In the above etching process, acid etching using an acid etching solution or alkali etching using an alkali etching solution is performed. In particular, the alkali etching has a more uneven etching amount in the silicon wafer surface than the acid etching. This is one of the technologies that will satisfy the demand for the future high flatness of wafers.

However, since alkaline etching is anisotropic etching, a phenomenon occurs in which fine irregularities due to the direction of the silicon crystal plane of the silicon wafer occur on both surfaces of the silicon wafer. FIG. 8 is a schematic view of a silicon wafer when alkali etching has been performed on the silicon wafer after the lapping step. As shown in FIG. 8, these fine irregularities generated on both surfaces of the silicon wafer can be removed in the mirror polishing process. However, since the mirror polishing is a process performed on only one surface of the silicon wafer (mirror polishing is performed when both surfaces are polished). In addition to this, the silicon wafer detection sensor that detects the presence of the silicon wafer due to light scattering, which is widely used, cannot detect the silicon wafer because both sides of the silicon wafer are mirror surfaces. ), Fine irregularities on the mirror-polished surface can be removed, but fine irregularities on the other surface cannot be removed. These irregularities have a problem in that the leading end portions are chipped and become particles, which lowers the yield of the semiconductor device in a later process and hinders manufacturing.

[0009]

As described above, when an etching step by alkali etching is performed in the conventional silicon wafer manufacturing process, fine irregularities are generated on one surface of the silicon wafer, and these become particles, which become particles. There has been a problem in that the yield of semiconductor devices has been reduced and production has been hindered.

The present invention has been made in view of the above problems, and has as its object to provide a method of manufacturing a silicon wafer and a silicon wafer in which generation of particles is suppressed.

[0011]

According to the present invention, there is provided a lapping step of lapping a silicon wafer cut out of a silicon single crystal rod, an alkali etching step of subjecting the silicon wafer to alkali etching after the lapping step, and an alkali etching step. A method of manufacturing a silicon wafer, comprising: performing a deposition step of depositing a wafer smoothing layer on one surface of the silicon wafer and a mirror finishing step of performing mirror finishing on the other surface of the silicon wafer. .

Preferably, in the depositing step, a wafer smoothing layer made of polysilicon is deposited by a CVD method.

Further, the present invention is a silicon wafer having a wafer smoothing layer deposited on one surface and a mirror-finished surface on the other surface.

Preferably, the wafer smoothing layer is made of polysilicon.

In producing a silicon wafer according to the present invention, a thin disk-shaped silicon wafer cut from a silicon single crystal rod is first subjected to a lapping step and an alkali etching step. Fine irregularities are generated on both surfaces of the silicon wafer by the alkali etching process. Therefore, in the present invention, a polysilicon layer is deposited on one surface of the silicon wafer after the alkali etching step, thereby filling the fine irregularities and smoothing the silicon wafer.
This is to prevent the generation of particles in a later step. Further, finally, the surface of the silicon wafer opposite to the surface on which the polysilicon layer is deposited is subjected to mirror finishing to perform mirror finishing, thereby obtaining a wafer in which generation of particles is suppressed. Further, the deposition of the polysilicon layer does not impair the flatness of the wafer.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG.
This will be described with reference to FIG. FIG. 1 is a schematic view showing a process for manufacturing a silicon wafer of the present invention. Example 1, Comparative Example First, as shown in FIG. 1 (a), a flat silicon wafer 1 (p-type, resistivity: １1 Ωcm) cut out from a silicon single crystal rod and chamfered as necessary. A lapping step was performed. The lapping process was performed to remove the distortion of the sliced silicon wafer 1 and to smooth the surface, and the both surfaces of the silicon wafer 1 were polished with particles. However, a fine crushed layer remains on both surfaces of the silicon wafer 1.

Next, as shown in FIG. 1B, an alkali etching step of chemically etching the silicon wafer 1 using an alkali etching solution was performed. The alkali etching step is performed to remove the crushed layer generated in the lapping step. In this embodiment, the alkali etching step is performed by immersing the silicon wafer in a 50% NaOH aqueous solution for 40 minutes.

In the present invention, the alkaline etching step is performed, for example, at a concentration of 40 wt% to 50 wt% of KOH or N.
It is preferable that the above-mentioned process be performed by immersing the silicon wafer in at least one aqueous solution of aOH for several minutes to several tens of minutes.
It is particularly preferable to use an aqueous solution of KOH or NaOH because the cost is low, the treatment of waste liquid is relatively simple, and good polishing is performed.

Next, as shown in FIG. 1C, a deposition step of depositing a wafer smoothing layer 2 on one surface of the silicon wafer 1 was performed.

In this embodiment, the wafer smoothing layer 2 is a polysilicon layer formed by the CVD method. The thickness of the wafer smoothing layer 2 was 0.05 to 0.6 μm.

In the present invention, it is desirable that the wafer smoothing layer be made of polysilicon formed by the CVD method so as not to impair the characteristics of the device. The thickness of the wafer smoothing layer is preferably 0.05 to 0.6 μm, and more preferably 0.2 to 0.6 μm. Within this range, fine irregularities formed in the alkali etching step can be filled and one surface of the silicon wafer can be smoothed. Further, as shown in FIG. 1D, the other surface of the silicon wafer 1 is subjected to mirror polishing. A mirror finishing process was performed. The mirror polishing step is performed to improve the smoothness of the surface of the silicon wafer, and performs mechanical and chemical polishing. At this time, granules and an alkaline solution were used as an abrasive. At this time, the surface on which the wafer smoothing layer 2 is formed is attracted to a polishing table, and the surface opposite to the surface on which the wafer smoothing layer 2 is formed is mirror-polished to obtain the silicon wafer of Example 1. Was.

As Comparative Example 1, a silicon wafer was produced in the same manner as in this example except that the deposition step was not performed.

The surface roughness of the surface of the silicon wafer of Example 1 on which the wafer smoothing layer was formed was measured. In addition, the surface roughness of the surface of the silicon wafer of the comparative example which was not subjected to mirror finishing was measured. FIG. 2 shows the thickness of the wafer smoothing layer of the silicon wafers of Example 1 and Comparative Example 1, the surface on which the wafer smoothing layer was formed (Example 1), and the surface of the silicon wafer on which mirror processing was not performed (Comparative Example). It is a characteristic view which shows the relationship of 1) surface roughness (Ra / micrometer). As shown in FIG. 2, the surface roughness of Example 1 is smaller than that of Comparative Example 1. If a wafer smoothing layer having a thickness equal to or greater than the surface roughness Ra before the formation of the wafer smoothing layer is formed, the decrease in Ra saturates.

On the other hand, the particle density of the mirror-polished surfaces of the silicon wafers of Example 1 and Comparative Example 1 was measured by a particle counter. FIG. 3 shows Example 1 and Comparative Example 1.
FIG. 5 is a characteristic diagram showing a density of particles on a mirror-polished surface of a silicon wafer. As shown in FIG. 3, the particle density of the mirror-polished surface of the silicon wafer of Example 1 is lower than that of Comparative Example 1.

Further, the flatness (S-TIR) of the silicon wafers of Example 1 and Comparative Example 1 was measured. FIG. 4 is a characteristic diagram showing the flatness of the silicon wafers of Example 1 and Comparative Example 1. Even when a wafer smoothing layer was formed as in Example 1, there was no decrease in flatness as compared with Comparative Example 1.

The silicon wafers of Example 1 and Comparative Example 1 were subjected to a heat treatment at a high temperature (1200 ° C.) for one hour. When the rate of occurrence of slip due to the heat treatment of the silicon wafers of Example 1 and Comparative Example 1 was examined, the rate of occurrence of slip with respect to the support base was low in the silicon wafer of Example 1.
FIG. 5 is a characteristic diagram showing the rate of occurrence of slip of the silicon wafer of the present example, where the rate of occurrence of slip of the silicon wafer of Comparative Example 1 is 1.

As described above, in the silicon wafer of Example 1, fine irregularities generated in the alkaline etching step were filled, the surface roughness was reduced, and the generation of particles was suppressed. Also, the flatness (S-TIR) did not increase. In addition, since the boat support surface on the silicon wafer during the high-temperature heat treatment was smoothed and the stress concentration was reduced, the occurrence of slip from the support base was suppressed. Example 2 A lapping step was performed on a flat silicon wafer (p-type, resistivity: １1 Ωcm) cut out of a silicon single crystal rod. In the lapping step, polishing was performed by using grains. The amount of processing distortion on both surfaces of the silicon wafer was larger than that in Example 1. In order to completely remove the influence, in the second embodiment, the silicon etching was carried out in a 40% KOH aqueous solution by alkali etching.
This was performed by immersion for 0 minutes, and the etching amount was increased as compared with the alkali etching step of Example 1.

Next, a deposition step and a mirror finishing step were performed in the same manner as in Example 1 to obtain a silicon wafer of Example 2. Further, as Comparative Example 2, a silicon wafer obtained by the same method as in this example except that the deposition step was not performed was manufactured.

The surface roughness of the silicon wafer of Example 2 on which the wafer smoothing layer was formed was measured. FIG. 6 shows the thickness of the wafer smoothing layer of the silicon wafers of Example 2 and Comparative Example 2, the surface on which the wafer smoothing layer was formed (Example 2), and the surface on which the silicon wafer was not mirror-finished (Comparative Example). It is a characteristic view which shows the relationship of surface roughness (Ra / micrometer) of 2). As is apparent from a comparison between FIG. 6 and FIG. 2, the surface roughness of Comparative Example 2 is larger than that of Comparative Example 1. However, even if the surface roughness of the silicon wafer before the formation of the wafer smoothing layer is rough, the reduction of the Ra can be reduced by forming the wafer smoothing layer having a thickness greater than the surface roughness Ra before the formation of the wafer smoothing layer.
Saturates as in 1.

In the silicon wafer of Example 2, fine irregularities generated in the alkaline etching step were filled, the surface roughness was reduced, and the generation of particles was suppressed. Also, the flatness (S-TIR) did not increase.

[0031]

As described above, according to the present invention, the generation of particles due to the alkali etching step in the production of a silicon wafer is suppressed, and the yield of semiconductor devices is improved, and there is no possibility that the production will be hindered.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing a manufacturing process of a silicon wafer of the present invention.

FIG. 2 shows the thickness of the wafer smoothing layer of the silicon wafers of Example 1 and Comparative Example 1, the surface on which the wafer smoothing layer is formed (Example 1), and the surface of the silicon wafer that is not mirror-finished (Comparative). FIG. 4 is a characteristic diagram showing a relationship of surface roughness (Ra / μm) in Example 1).

FIG. 3 is a characteristic diagram showing particle densities of silicon wafers of Example 1 and Comparative Example 1.

FIG. 4 is a characteristic diagram showing the flatness of the silicon wafers of Example 1 and Comparative Example 1.

FIG. 5 is a characteristic diagram showing the rate of occurrence of slip of the silicon wafer of the present example, where the rate of occurrence of slip of the silicon wafer of Comparative Example 1 is 1.

FIG. 6 shows the thickness of the wafer smoothing layer of the silicon wafers of Example 2 and Comparative Example 2, the surface on which the wafer smoothing layer is formed (Example 2), and the surface of the silicon wafer on which mirror processing is not performed (Comparative) FIG. 4 is a characteristic diagram showing a relationship of surface roughness (Ra / μm) in Example 2).

FIG. 7 is a schematic view of a silicon wafer after a lapping step.

FIG. 8 is a schematic diagram of a silicon wafer when alkali etching has been performed on the silicon wafer after the lapping step.

[Explanation of symbols]

 1. Silicon wafer 2. Wafer smoothing layer

Claims (4)

[Claims] 1. A lapping step of lapping a silicon wafer cut from a silicon single crystal rod, an alkali etching step of performing alkali etching on the silicon wafer after the lapping step, and one surface of the silicon wafer after the alkali etching step. A method of manufacturing a silicon wafer, comprising: performing a deposition process of depositing a wafer smoothing layer on the surface of the silicon wafer; and a mirror polishing process of performing mirror polishing on the other surface of the silicon wafer. 2. The method according to claim 1, wherein said depositing step deposits a wafer smoothing layer made of polysilicon by a CVD method. 3. A silicon wafer having a wafer smoothing layer deposited on one surface and a mirror-finished surface on the other surface. 4. The silicon wafer according to claim 3, wherein said wafer smoothing layer is made of polysilicon.