JP2001060600A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To surely prevent a wiring lead in a tape carrier substrate from being disconnected for improving connection reliability, even if there is concentration of stresses caused by the difference in the amount of heat shrinkage. SOLUTION: In the tape carrier substrate of a tape BGA(ball grid array) semiconductor device, in a substrate electrode 8a, where an end part is positioned directly below a reinforcing material end line HL which is set to the inner periphery of the reinforcing material bonded onto the tape carrier substrate out of substrate electrodes where a bump is formed, lead wiring 3 withdrawn out from a lead withdrawal part 8a is wired, in parallel along the reinforcing material end line HL by a certain length, a prescribed arc is formed at the zigzag part for bending, and wiring is made obliquely at a certain angle, without orthogonally crossing the reinforcing material end line HL, thus increasing the area of lead wiring 3 passing through the reinforcing material end line HL, and substantially.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technology for preventing disconnection of a lead wiring formed on a tape carrier, and more particularly, to a technology for preventing disconnection of a lead wire.
The present invention relates to a technology effective when applied to prevent disconnection of a tape carrier using a reinforcing frame such as SP (Chip Size Package).

[0002]

2. Description of the Related Art According to studies made by the present inventors, for example, a tape-type BGA (Ball Grid Array)
y) In a semiconductor device, a tape carrier substrate is used as a carrier substrate on which a semiconductor chip is mounted, and TAB (Ta)
(Automated Bonding) technology.

In this tape carrier substrate, for example, a copper foil serving as a lead wiring is adhered to the back surface of a resin tape made of polyimide or the like. A device hole for mounting a semiconductor chip is provided at the center of the tape carrier substrate, and a wiring portion protruding from the device hole serves as a pad electrode and is electrically connected to a bonding pad of the semiconductor chip.

An array of substrate electrodes is formed on the back surface of the tape carrier substrate, and these substrate electrodes are electrically connected to respective pad electrodes via lead wires. On each of the substrate electrodes, spherical solders, so-called solder balls, are formed in place of the leads for external lead-out, and are connected to the electrodes of the printed wiring board on which electronic components are mounted via these solder balls. I have.

In addition, for example, near the outer periphery of the mounted semiconductor chip on the surface of the tape carrier substrate,
A reinforcing frame made of nickel is bonded. With this reinforcing frame, the flatness of the tape carrier substrate is maintained, and handling during mounting can be facilitated.

[0006] As an example describing this type of semiconductor device in detail, there is "1999 Semiconductor Assembly and Inspection Technology" published on July 27, 1998 by Press Journal, P17 to P20. Has various BG
It describes the configuration of an A-type semiconductor device.

[0007]

However, the present inventor has found that the above-described semiconductor device has the following problems.

That is, the lead wiring drawn out from the substrate electrode is wired so as to be orthogonal to the reinforcing frame adhered to the surface of the tape carrier substrate, and due to the difference in expansion coefficient between the tape carrier substrate and the reinforcing frame. Stress concentrates on the periphery of the reinforcing frame on the tape carrier substrate,
There is a risk that the lead wiring may be disconnected, and the reliability of the semiconductor device is reduced.

In addition, such a disconnection is conspicuous in a lead wiring drawn from a substrate electrode located immediately below a peripheral portion of a reinforcing frame.

An object of the present invention is to provide a semiconductor device capable of reliably preventing disconnection of a wiring lead and improving connection reliability even when stress due to a difference in heat shrinkage is concentrated. is there.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0012]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, in the semiconductor device of the present invention, the lead wires drawn from the substrate electrodes of the tape carrier substrate on which the bumps are formed are arranged so as not to be orthogonal to the inner periphery of the reinforcing frame provided near the outer periphery of the semiconductor chip. Wired.

Further, in the semiconductor device according to the present invention, the lead wiring is formed only on the substrate electrode located immediately below or near the inner periphery of the reinforcing frame among the substrate electrodes formed on the tape carrier substrate. is there.

Further, in the semiconductor device according to the present invention, the lead wire lead-out portion of the substrate electrode is wired in parallel with the inner periphery of the reinforcing frame by a certain wire length, and then the bent portion of the lead wire is formed in an arc shape. And it is wired so as not to be orthogonal to the inner periphery of the reinforcing frame.

As described above, the area of the lead wiring passing through the inner periphery of the reinforcing frame can be increased, and disconnection of the lead wiring can be greatly reduced.

Further, by forming a predetermined arc at the bent portion of the lead wiring drawn out from the substrate electrode,
The lead wiring can be made harder to break.

[0018]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a sectional view of a semiconductor device according to one embodiment of the present invention, FIG. 2 is a plan view of a tape carrier substrate according to one embodiment of the present invention, and FIG. FIG. 4 is an explanatory view of a shape of a lead lead-out portion from which a lead wiring is drawn out from a substrate electrode according to an embodiment. FIG. 4 is a flowchart of a manufacturing process in a semiconductor device according to an embodiment of the present invention. FIG. 9 is an explanatory diagram of a manufacturing process in the semiconductor device according to the embodiment, and FIG. 9 is a plan view of a tape carrier substrate on which a semiconductor chip according to one embodiment of the present invention is mounted.

In the present embodiment, the semiconductor device 1
It is made of a tape BGA, which is a type of surface mount package. As shown in FIG. 1, the semiconductor device 1 is provided with a tape carrier substrate 2 which is a tape-shaped flexible wiring substrate.

In the tape carrier substrate 2, for example, wiring leads 3 are formed on the back surface of an insulating tape film 2a made of polyimide or the like via an adhesive. The tips of the wiring leads 3 are inner leads 3a, and these inner leads 3a are connected to the bumps BP of the semiconductor chips CH mounted in the device holes 4 located at the center of the tape carrier substrate 2. The bump BP of the semiconductor chip CH is made of, for example, a gold (Au) bump.

In the vicinity of the outer peripheral portion of the semiconductor chip CH, a frame-like reinforcing material (reinforcing frame) 5 made of copper, nickel or the like is provided.
Is attached to the tape carrier substrate 2 via the adhesive 6. The reinforcing material 5 maintains the flatness of the tape carrier substrate 2 and facilitates handling during mounting.

Further, a resin 7 such as epoxy is applied and sealed on the side surface and the main surface of the semiconductor chip CH mounted on the tape carrier substrate 2. A circular substrate electrode 8 is formed on the back surface of the tape carrier substrate 2, and a solder resist 9 is formed on the back surface other than the substrate electrode 8.

Further, the substrate electrode 8 is formed on the back surface of the tape carrier substrate 2 in a region where the reinforcing material 5 is adhered. The bumps 10 are respectively formed on the substrate electrodes 8. These bumps 10 are formed of so-called solder balls, which are spherical solders, and are mounted on a printed wiring board on which electronic components and the like are mounted, instead of the leads for external drawing of the semiconductor device 1.

Next, the connection shape between the wiring lead 3 and the substrate electrode 8 on the tape carrier substrate 2 in this embodiment will be described with reference to FIGS.

As shown in FIG. 2, three rows of substrate electrodes 8 are formed on the tape carrier substrate 2 from the outer periphery of the device hole 4 to the outer periphery of the tape carrier substrate 2.

Of the substrate electrodes 8, the substrate electrode 8 a formed closest to the outer periphery of the device hole 4, that is, the position closest to the peripheral portion of the semiconductor chip CH, is formed such that an end of the substrate electrode 8 a is formed of a reinforcing material. 5 is located immediately below the reinforcing material end line HL, which is the inner periphery of 5.

The lead lead-out portion 8 of the substrate electrode 8a
As shown in FIG. 3, the lead wiring 3 drawn out from b is wired in parallel along the reinforcing material end line HL by a certain length, and then is bent by forming a predetermined arc at the bent portion thereof. It is wired obliquely at a certain angle without being orthogonal to the reinforcing member end line HL. Therefore, the area of the lead wiring 3 passing through the reinforcing material end line HL can be increased.

Next, a method of manufacturing the semiconductor device 1 will be described.
This will be described with reference to the flowcharts of FIGS. 1, 2 and 4, the process explanatory diagrams of FIGS. 5 to 8, and the plan view of FIG. 9.

First, as shown in FIG. 5, a tape carrier T on which a tape carrier substrate 2 (FIG. 2) is repeatedly formed.
Prepare P. As shown in FIG. 6, a reinforcing material 5 is attached to the tape carrier TP via an adhesive 6 by thermocompression bonding or the like (step S101).

Then, the semiconductor chip CH is mounted on the tape carrier substrate 2 of the tape carrier TP, and FIG.
As shown in FIG. 5, bumps B formed on the semiconductor chip CH
P and inner lead 3 formed on tape carrier substrate 2
is connected by batch thermocompression bonding, so-called gag bonding or the like (step S102).

Here, FIG. 9 shows a state in which the bumps BP of the semiconductor chip CH and the inner leads 3a of the tape carrier substrate 2 are gag-bonded.

Thereafter, as shown in FIG. 8, a liquid resin 7 is applied to the side surfaces and the main surface of the semiconductor chip CH and sealed (step S103), and the bumps 10 are formed on the substrate electrodes 8 of the tape carrier substrate 2. The tape carrier TP is formed by a vapor deposition method or the like (step S104), and the semiconductor device as shown in FIG. 1 is manufactured by cutting the tape carrier TP into individual pieces.

Accordingly, in the present embodiment, the lead wire 3 connected to the substrate electrode 8a is drawn obliquely with respect to the reinforcing material end line HL at a certain angle, and is wired, whereby the reinforcing material end is provided. The area of the lead wiring 3 passing through the line HL can be increased, and even if stress is applied to the vicinity of the reinforcing material end line HL in the tape carrier substrate 2 due to a temperature change or the like, disconnection of the lead wiring 3 can be greatly reduced. it can.

Further, by forming a predetermined circular arc at the bent portion of the lead wire 3 drawn out from the substrate electrode 8a, it is possible to make the lead wire 3 harder to break.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, in the above-described embodiment, only the substrate electrode formed at the position closest to the peripheral portion of the semiconductor chip has a lead wire shape for preventing disconnection. By arranging the lead wiring drawn from the substrate electrode obliquely to the reinforcing material end line, disconnection of the wiring pattern due to stress can be significantly reduced, and the connection reliability of the semiconductor device can be further improved.

The lead wiring drawn out from the substrate electrode may have a shape other than that shown in the above embodiment. For example, as shown in FIG. 10, the lead lead portion 8b of the electrode substrate 8a is connected to the reinforcing material end line HL. Without wiring in parallel,
The reinforcing member end line may be drawn obliquely at an angle.

With this, the disconnection of the wiring pattern can be significantly reduced, and the connection reliability of the semiconductor device can be further improved.

[0040]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1) According to the present invention, disconnection of the lead wiring due to temperature change or the like is greatly reduced by laying the lead wiring connected to the substrate electrode obliquely to the inner periphery of the reinforcing frame. Can be.

(2) Further, according to the present invention, by forming a predetermined circular arc at the bent portion of the lead wiring drawn out from the substrate electrode, disconnection of the lead wiring can be further reduced.

(3) Further, in the present invention, the reliability in the semiconductor device can be greatly improved by the above (1) and (2).

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a plan view of a tape carrier substrate according to one embodiment of the present invention.

FIG. 3 is an explanatory diagram of a shape of a lead lead-out portion from which a lead wiring is led out from a substrate electrode according to an embodiment of the present invention.

FIG. 4 is a flowchart of a manufacturing process in the semiconductor device according to one embodiment of the present invention;

FIG. 5 is an explanatory diagram of a manufacturing process in the semiconductor device according to the embodiment of the present invention;

FIG. 6 is an explanatory view of the manufacturing process of the semiconductor device, following FIG. 5;

FIG. 7 is an explanatory view of the semiconductor device manufacturing process following FIG. 6;

FIG. 8 is an explanatory view of the manufacturing process of the semiconductor device, following FIG. 7;

FIG. 9 is a plan view of a tape carrier substrate on which a semiconductor chip according to one embodiment of the present invention is mounted.

FIG. 10 is an explanatory diagram of a shape of a lead lead-out portion from which a lead wire is led out from a substrate electrode according to another embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Tape carrier board 2a Insulating tape film 3 Lead wiring 3a Inner lead 4 Device hole 5 Reinforcement material (reinforcement frame) 6 Adhesive material 7 Resin 8 Substrate electrode 8a Substrate electrode 8b Lead extraction part 9 Solder resist 10 Bump CH Semiconductor chip BP Bump TP Tape carrier HL Reinforcement end line

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yasuhisa Hagiwara 5-22-1, Josuihoncho, Kodaira-shi, Tokyo Inside Hitachi Super-LSI Systems Co., Ltd. (72) Inventor Ryo Haruta Tokyo 5-20-1, Josuihonmachi, Kodaira-shi F-term in Hitachi Semiconductor Co., Ltd. F-term (reference) 5F044 MM03 MM08 MM13 MM25 MM28 MM31 NN09 RR18

Claims (3)

[Claims] 1. A semiconductor device in which a semiconductor chip is mounted on a surface of a tape carrier substrate, a reinforcing frame is adhered near an outer peripheral portion of the semiconductor chip, and bumps are arranged on the rear surface to serve as external terminals. A lead wire drawn from a substrate electrode to be formed is wired so as not to be orthogonal to the inner periphery of the reinforcing frame. 2. The semiconductor device according to claim 1, wherein the lead wiring is connected to a substrate electrode located immediately below or near an inner periphery of the reinforcing frame among the substrate electrodes formed on the tape carrier substrate. A semiconductor device characterized by being formed. 3. The semiconductor device according to claim 1, wherein a lead wire lead-out portion of the substrate electrode is wired in parallel with an inner periphery of the reinforcing frame by a certain wire length, and then the lead wire is connected to the lead wire. A semiconductor device, wherein a bent portion is formed in an arc shape and wired so as not to be orthogonal to the inner periphery of the reinforcing frame.