JP2000331348A - Digital signal recording and reproducing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To execute a recording condition control for every recording medium and to compensate the adverse effect caused by thermal interference by creating the data table of the plural patterns, in which the combination of the pulses having different continuous (n) pulse interval lengths is different, and the corresponding recording pulse interval adjustment amounts. SOLUTION: A pulse width setting discriminating circuit 17 time sequentially stores the data, that include the pulse interval information of characteristic measurement test patterns, into an internal ROM as reference data. Every time a polarization reversal interval signal 14 is received, a conversion is made to an edge fluctuation amount by the reference data and the accumulated values of the conversion result for every recording pattern are internally accumulated. Moreover, detection signal errors of a recording medium defect are automatically transmitted to a controller. In the care of no error, the average value of the edge fluctuation amounts is computed from the adding result stored at the time of signal receiving completion of the signal 14 and the value is transmitted to a data converting circuit 18 to create a pulse width adjustment table 19. Thus, the fluctuation component related to the edge position of reproduced signals caused by thermal interference is eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for recording / reproducing a digital signal on / from a recording medium such as an optical disk, and more particularly to controlling a recording signal based on recording characteristics of a combination of a recording medium and a recording apparatus. Accordingly, the present invention relates to a recording / reproducing apparatus suitable for achieving higher density of recorded information, higher transfer speed, and improved reliability.

[0002]

2. Description of the Related Art An optical disk device is one of means for recording a digital signal on a recording medium. In an optical disk, a laser beam is focused on a recording surface by a lens, the intensity of which is changed according to the information to be recorded, and the reflectivity of the recording film in an area irradiated with the laser beam, or in the case of magneto-optical recording. The information is recorded by changing the magnetization direction by external magnetization or the like. When reproducing the recorded information, irradiate a laser beam of weaker intensity than at the time of recording and detect the change in the amount of light or the polarization plane rotation due to the difference in the magnetization direction from the reflected light from the recording film. Performed by The recording density is mainly determined by the size of the spot of the laser beam focused on the recording surface, and the size is about 1
Since it is as small as about μm, high-density recording about 10 times that of a magnetic disk can be realized.

The mark length recording method in which information is recorded at positions before and after a recording mark recorded by modulating the irradiation light power is used because two or more data are recorded on one recording mark. This is an effective method for realizing high-density recording.

In the mark length recording method for recording and reproducing information at a high density on an optical disk as described above, various signal processings are performed at the time of recording and reproducing data in order to realize high reliability of information. Have been done.

[0005] For example, in general, when the irradiation light power at the time of recording is small, the shape of a recording mark formed tends to be unstable.
Further, if the recording linear velocity is different, the amount of heat applied per unit area and the heat distribution are changed, so that the recording mark shape is different. Therefore, in order to actually perform recording and reproduction while forming a stable recording mark shape, "application of pit edge recording to a PbTbSe film" (Proceedings of the 70th Anniversary of IEICE, p4-176) In, the recording irradiation light pulse is set to be relatively large, and the laser pulse length is shortened during recording so that the mark length does not become excessive according to the linear velocity, or the pulse length of the binarized signal during reproduction is reduced. Adjustments such as sharpening.

In general, the shape of a recorded mark mainly depends on the recording sensitivity and thermal conductivity of the recording medium, the intensity distribution of a focused laser beam used for recording, wavefront aberration, and the like. When the combination of the recording media changes, the characteristics change. Furthermore, the level of the irradiation light power at the time of recording on the apparatus side changes with time. This phenomenon is inevitable in a certain range of fluctuation even when an automatic laser power control mechanism (APC) is provided, and the recording / reproducing characteristics also fluctuate due to this factor. This change leads to a change in the recording mark length during recording and a change in the pulse interval of the reproduced signal during reproduction.

For this reason, when the recording correction amount and the recording light power are set to fixed values in advance at the time of shipment of the apparatus, these setting specifications are determined by measuring the recording / reproducing characteristics with a number of combinations of recording media and recording apparatuses. decide. then,
In consideration of the variation range of the recording / reproducing characteristics due to the difference of the combination, in order to guarantee the reliability at the time of detection in all cases, a large margin is provided for the recording density, and the recording density is sacrificed.

Therefore, in order to absorb the variation in characteristics due to the combination of the recording medium and the recording apparatus and to increase the recording density, a method of preliminarily recording a test pattern and obtaining information for adjusting recording conditions from a reproduced signal thereof. Has been proposed. For example, in the apparatus described in JP-A-61-239441, the irradiation light power level, which is a constant value at the time of recording, is adjusted to the level in JP-A-61-74178.
In the device described in Japanese Patent Application Laid-Open No. 61-304427, a certain adjustment amount regarding the recording pulse width is used.
And the automatic equalization coefficient at the time of reproduction is adjusted at the same time.

Further, since the optical disk is basically a recording method using thermal diffusion, a phenomenon in which the shape of a recording mark changes due to the diffusion of heat distribution due to a plurality of recording pulses before and after the recording mark (hereinafter, referred to as a recording mark). Thermal interference). This phenomenon also leads to variations in the pulse interval of the reproduced signal during reproduction. Therefore, it is necessary to consider the influence of the thermal interference in order to perform the optimum correction at the time of recording. As a countermeasure, in the recording method described in JP-A-63-48617, the width of each recording pulse is changed according to the interval to the immediately preceding recording pulse.

[0010]

SUMMARY OF THE INVENTION Among the above prior arts,
The method of adjusting the recording pulse width according to the interval up to the immediately preceding recording pulse has the following problems.

In other words, if it is attempted to achieve high-density recording with the recording mark shape and the interval between the recording marks being about the same size as the size of the laser spot converged on the recording film surface, The range affected by thermal interference is larger than the shortest recording mark length used. That is, the length of the interval between a plurality of recording pulses of the recording irradiation light pulse affects the amount of change in the edge position of one recording mark. In particular, the recording sensitivity to the intensity of laser light is high,
In the case of a recording medium capable of recording with a low laser power, the thermal conductivity is generally large, and the range affected by this thermal interference is large.

Further, in the method of adjusting the recording pulse interval, since the information on the adjustment amount uses a preset value, the adjustment amount on the fluctuation of the recording characteristics cannot be changed, and the recording characteristics are different from those at the time of setting. As much as it appears, an error appears in the adjustment, and it will not be an accurate adjustment.

On the other hand, in the method of obtaining the information for adjusting the recording conditions, the adjustment amount of the recording irradiation light power and the recording pulse width is a single value, and the recording mark length and fluctuation due to thermal interference are reduced. It is not possible.

Conventionally, as a countermeasure against intersymbol interference components, in the field of communication and magnetic recording, a linear equalizer such as a transversal filter is generally used on the reproduction side.
This is to reduce linear intersymbol interference generated by superimposing on a nearby waveform, because the frequency band of the signal reproduction system is narrow and the base of the reproduction signal pulse is widened.

[0015] However, the above-mentioned influence of thermal diffusion mainly appears as a waveform shift in the time direction during reproduction. This is a non-linear intersymbol interference component that cannot be expressed simply as a linear superposition of basic waveforms according to recording information. Therefore, the edge position fluctuation component due to the thermal interference generated at the time of recording cannot be dealt with by the linear equalizer, and it is actually very difficult for the reproducing side to deal with this interference component in real time.

For the above-mentioned reasons, even if the conventional method can cope with the fluctuation of the recording characteristics, the fluctuation of the recording mark length due to the influence of heat interference cannot be reduced at all or the recording due to the influence of heat interference. There is an adjustment error in the fluctuation of the mark length, and it cannot cope with the fluctuation of the recording characteristics at all.
In particular, in mark length recording in magneto-optical recording using a recording medium having large heat conduction, these fluctuation components are large,
In order to provide such a margin, the recording density must be greatly sacrificed.

[0017]

SUMMARY OF THE INVENTION According to the present invention, in a combination of a recording medium to be recorded and reproduced and a recording apparatus, various recording patterns are recorded in a plurality of areas on the recording medium at necessary timings. Then, the recording characteristics are measured by reproducing the recorded data, a data table for the recording pulse interval adjustment amount is created from the measurement results, and the data table is converted for each recording pulse interval based on the data table. Using the immediately preceding plurality of recording irradiation light pulse intervals, the adjustment amounts of the leading edge and the trailing edge of the pulse are sequentially obtained, and assigned to obtain the recording irradiation light pulse interval. The recording mark length and the pulse interval of the reproduction signal are obtained. According to the present invention, more accurate edge position control of a recording mark for high-density recording by mark length recording can be realized.

In the combination of a recording medium and a recording apparatus for which recording and reproduction are to be performed, its recording characteristics are measured in advance, and the recording pattern sequence immediately before each recording pulse is also considered based on the measurement result. By sequentially allocating the correction amount of the leading edge and the trailing edge of the pulse, the recording mark when the recording pattern difference due to the difference of the combination of the recording medium and the recording device and the recording pattern sequence due to the influence of the thermal interference is different. Variations in length can be absorbed.

Further, by using a plurality of recording characteristics measured in different areas on the recording medium, it is possible to perform recording correction at a place where the linear velocity is different.

Further, when the use of the apparatus is started, when the recording medium is exchanged, and at regular time intervals, or at a timing corresponding to a change in the temperature on the recording film and a change in the power of the recording light, By performing the above measurement, it is possible to absorb the change in the characteristics of the recording apparatus over time.

As described above, it is possible to more accurately control the edge position of a recording mark in high-density recording by mark length recording.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention. FIGS. 3 to 11 are diagrams showing the configuration of the elements in FIG. 1 in more detail.
In this configuration example, the thermal irradiation affects the amount of change in the edge position of one recording mark, and the number of recording irradiation light pulse intervals that need to be considered in order to reduce the amount of edge fluctuation is determined by the number of recording irradiation light pulses. The following describes three cases before the corresponding edge timing, but the present invention is not limited to this.

In FIG. 1, an optical disc 1 is rotated at a constant angular velocity by a spindle motor 2, and a laser beam for recording and reproduction is focused on a recording film surface on the disc 1 by an optical pickup 3 by a focusing lens. The optical pickup 3 can move in the radial direction of the disk corresponding to the information recording position.

A signal detected by a detector in the optical pickup 3 is amplified to a desired level by an amplifier 4 and then, by an equalizing circuit 5, a rotational linear velocity of the optical disk at a laser light focusing position on a recording surface. , The waveform is equalized. After that, it is converted into a reproduced binary signal 7 which is a digital signal by the binary lower circuit 6. At the time of information reproduction, the reproduction binary signal 7 is separated into a data signal and a clock signal by a PLL (phase lock loop) circuit 8 and becomes reproduction data by a demodulation circuit 9.

The above is the data reproduction signal processing system in the optical disk system adopting the mark length recording method. In addition to the reproduction signal processing system, the recording characteristic is detected and the pulse interval adjustment amount during recording, and the recording power is calculated or updated in the recording characteristic measurement mode. There is a recording characteristic measuring system that operates in a recording condition check mode in which a recording condition such as a recording power and an environmental temperature at that time is checked using a recording condition check pattern recorded in a recording condition. This measurement system operates in the recording characteristic measurement mode and in the recording condition check mode when instructed by a controller that controls the entire optical disc system.

There are two types of recording characteristic measurement modes: a pulse width adjustment table creation mode and a recording power search mode. In the recording characteristic measurement mode, first, the recording power search mode is executed, and thereafter, the pulse width adjustment table creation mode is continuously executed. In both modes, the recording power level is input from the controller to the laser driver 12 in the dedicated test pattern and the recording power search mode, and the laser in the optical pickup 3 is modulated according to these signals. The laser light is condensed from the optical pickup 3 onto the optical disk surface, and a test signal is recorded. Then, using the reproduction signal of the recording mark corresponding to the test signal, a characteristic detection and change operation is performed in the recording characteristic measuring system.

Hereinafter, a recording characteristic measuring system will be described.

In the recording characteristic measurement mode and the recording condition check mode, the operation up to the binarization circuit 6 is the same as in normal data reproduction, and a reproduction binarization signal 7 for the test signal is obtained. The reproduced binary signal 7 is input to the edge timing detection circuit 13 and converted into a polarity inversion interval signal 14 as a digital signal and a polarity inversion timing signal 15 as a pulse signal. The edge timing detection circuit 13 performs the same operation in the pulse width adjustment table creation mode, the recording power search mode, and the recording condition check mode. Polarity inversion interval signal 1
Numeral 4 is a digital representation of the length information of the interval at which the polarity of the reproduced binary signal 7 changes. The polarity inversion timing signal 15 is a pulse-like signal at the timing at which the polarity of the reproduced binary signal 7 changes. Are assigned.

The output signal of the edge timing detecting circuit 13 is input to a recording power setting determining circuit 16 and a pulse width setting determining circuit 17. The recording power setting determination circuit 16 operates in the recording power search mode and the recording condition check mode, and the pulse width setting determination circuit 17 operates in the pulse width adjustment table creation mode.

The recording power setting determination circuit 16 determines the duty of the reproduction signal (strictly speaking, the difference between the rise-fall interval and the fall-rise interval of the binarized reproduction signal for each recording power setting value). Average). In the recording power search mode, the recording power set value of the data is further written simultaneously with the calculation result.
2 and the laser driver 12 has a duty of 50
Set the recording power setting value when the value becomes%. In the recording condition check mode, it is checked whether or not the result is within a certain range, and the result is transmitted to the controller.
The controller receives this signal and performs a procedure for entering the recording characteristic measurement mode when the signal is not within the predetermined range.

The pulse width setting determination circuit 17 calculates the average value of the edge fluctuation amount for each pattern. In this circuit, data including pulse interval information of the test pattern for characteristic measurement is stored as reference data in the internal ROM in chronological order. Each time the polarity inversion interval signal 14 is received, it is converted into an edge variation using this reference data. Then, the accumulated value of the conversion result for each same recording pattern is stored internally. An error in the detection signal due to a defect in the recording medium or the like is automatically detected in this circuit, and the occurrence of the error is notified to the controller. If no error occurs, the polarity inversion interval signal 1
The average value of the edge fluctuation amount is calculated from the addition result stored at the end of the reception of No. 4 and transmitted to the data conversion circuit 17.

The data conversion circuit 17 operates in the pulse width adjustment table creation mode. The data conversion circuit 17 creates the pulse width adjustment table 19 based on the edge variation data transmitted from the determination circuit 17.

As described above, the components from the edge timing detection circuit 13 to the data conversion circuit 17 detect the recording characteristics in the optical disk system, calculate and update the pulse interval adjustment amount during recording, and the recording power, and determine the recording conditions during each recording. This is a circuit system for checking.

At the time of normal information recording, the pulse width adjustment circuit 21 refers to the pulse width adjustment table 19 with respect to the data that has been code-modulated by the modulation circuit 20 and, for each recording pulse, its rising position and falling position. Find the amount of adjustment and correct it. Then, the recording pulse is input to the laser driver circuit 12, and the laser in the optical pickup 3 is modulated in response to the recording pulse.
Record above.

FIG. 2 shows an example of a characteristic detection test pattern waveform used in the recording characteristic measurement mode. FIG. 2 (a)
Is a waveform for the recording power search mode, which is a repetition of the shortest recording pulse interval used for mark length recording. Then, the recording power set value is gradually changed every predetermined number of repetitions to increase the recording power. This recording power change range is set so as to include the signal amplitude at the optimum recording power as long as the use environment of the apparatus is within the guaranteed range.

When recording general data, this waveform is also used for a recording condition check pattern which is usually recorded before data for each sector. However, at that time, the recording power setting value is not changed while it is already set. Further, for simplicity in this embodiment, the number of repetitions is also made to match the number of repetitions at each recording power at the time of recording power search.

FIG. 2B shows a waveform for the pulse width adjustment table creation mode, in which the pulse interval length is 3 consecutive.
This is a waveform including a plurality of patterns having different combinations.

In general, the larger the number of combinations, the more accurate a recording pulse adjustment table can be created. In the pulse width adjustment table creation mode, this pattern is repeatedly recorded, and an average value operation is performed on the calculated edge variation to improve the measurement accuracy.

[0040] Here, repeated several to 2 ^ C ₂ times at each recording power characteristic measuring test pattern of the recording power search mode, the number of ticks of the recording power S _2, a pulse width adjusting table creating mode The description will be made assuming that the number of pulse intervals included in one cycle of the characteristic measurement test pattern is S ₁ , and the number of repetitive recordings is 2 ＾ C ₁ .

In FIG. 1, an optical disk 1, a spindle motor 2, an optical pickup 3, an amplifier 4, a binarizing circuit 6, a PLL circuit 8, and a demodulating circuit 9 have the same structure and function as those used in a conventional optical disk apparatus. Things are fine,
The detailed description is omitted.

Hereinafter, other components will be described.

FIG. 3 is a diagram showing an example of the configuration of the equalizing circuit 5, and FIG. 4 is a diagram for explaining the operation thereof. Here, an equalizing circuit when the number of taps is three will be described.
3, the data signal amplified by the amplifier 4 is converted into a low impedance signal by a voltage follower 301 by an operational amplifier, and is input to a delay element 302. The resistors 303 and 304 before and after the delay element 30
This is for matching with the characteristic impedance of No. 2.

Of the signals delayed by the delay element 302,
A center tap signal, which is an output signal from the center tap position, is directly input to an adding circuit 305 formed by an amplifier. One of the outputs from the tap positions closer to the delay line input side than the center tap position is selected by the multiplexer 306 and input to the addition / inversion amplifier circuit 307. Similarly, one of the outputs from the tap positions farther from the delay line input side than the center tap position is selected by the multiplexer 308 and input to the addition / inversion amplifier circuit 307. The amplification factor in the addition / inversion amplifier circuit 307 is variable by switching the value of the feedback resistor 309 by the multiplexer 310. The output signal of the addition / inversion amplification circuit 307 is input to the addition circuit 305, and is input to the binarization circuit 6 as the output signal of the equalization circuit 5.

Next, the operation of the equalization circuit 5 of FIG. 3 will be described with reference to FIG. In FIG. 4, f (t) is a waveform corresponding to the data signal input to the equalization circuit 5 shown in FIG. 3, and here represents a reproduced signal for an isolated recording mark for easy understanding. In general, an optical disk has a finite light spot size, which cannot be ignored compared to the size of a recording mark. Therefore, for example, even if the center of the light spot is on the recording film surface at a position where there is no recording mark, the end of the light spot may cover a part of the adjacent recording mark, and the end of the light spot may Appears as a waveform interference component. This is intersymbol interference generated due to a low optical frequency band. In addition, the characteristics of the reproduction signal detection system are also reduced on the high frequency side,
This causes intersymbol interference.

These intersymbol interferences are caused by the data signal f
In (t), since the rise and fall of the signal amplitude at the sampling point t = NT are slow, the component remains as the signal amplitude even at the nearby sampling points t = (N−1) T and (N + 1) T. Appears in the playback signal. In a general reproduction waveform in which a plurality of recording marks exist and such waveforms overlap, this inter-symbol interference causes the amplitude deterioration of the reproduction signal, and the signal judgment is liable to be erroneous due to the influence of superimposed noise. I have.

The equalizing circuit 5 of FIG. 3 has the effect of compensating for such a deterioration in characteristics on the high frequency side and reducing the influence of intersymbol interference. In FIG. 4A, when the center tap signal is f (t), the output signal of the delay element 302 is f (t).
Signals f (t−τ) and f (t) obtained by delaying (t) by ± τ
+ Τ). The output signals of these delay elements 302 are subjected to signal processing by an addition / inversion amplification circuit 307 and an addition circuit 305,

[0048]

[Mathematical formula-see original document] The calculation of f (t) -K {f (t- [tau]) + f (t + [tau])} is performed, and as a result, an output signal as shown in FIG. 4B is obtained. This signal waveform is sharper than the waveform of f (t), and the influence of the signal amplitude at the sampling point t = NT indicates that the sampling points t = (N−1) T, (N
+1) T to reduce the influence of intersymbol interference.

The parameters for determining the characteristics of the equalizing circuit 5 shown in FIG. 3 include a delay time τ and an amplification factor K. The delay time τ is determined by multiplexers 306 and 308, respectively.
The value of the amplification factor K can be changed by the multiplexer 310. In the case of an optical disk, the optical frequency characteristics are different due to the difference in the linear velocity between the inner peripheral side and the outer peripheral side of the disk. That is, for example, when the recording linear density is the same on the inner and outer circumferences of the disk and the recording mark shape is the same,
Although the spatial frequency characteristics are the same, the temporal frequency characteristics are different because the linear velocities are different on the inner and outer peripheral sides. In many actual cases, the recording linear density and the recording mark shape are also different between the inner and outer circumferences of the disk, so that the frequency characteristics are spatially and temporally different. Therefore, since the optimum characteristics of the equalizing circuit 5 also change at the inner and outer circumferences of the disk, the delay amount τ and the amplification factor K are set with respect to the disk radial position based on the track address value on the disk. By this operation, it is possible to always realize a nearly optimal equalization condition regardless of the disk radius.

As described above, here, the number of taps of the equalizing circuit 5 is three.
Although the number has been described, it is necessary to design the number so that its influence can be sufficiently reduced from the range of intersymbol interference in the waveform of f (t).

FIG. 5 is a diagram showing one configuration example of the edge timing detection circuit 13 in FIG. 1, and FIG. 6 is a diagram for explaining the operation thereof.

The reproduced binarized signal 7 output from the binarizing circuit 6 is input to the impulse signal generating circuit 501. The impulse signal generation circuit 501 outputs an impulse-like signal waveform at each timing when the polarity of the input signal changes, and this output signal is input to the determination circuit 16 and the A / D converter 502 as the polarity inversion timing signal 15. .

On the other hand, the reproduced binary signal 7 is also input to an integration circuit 503 composed of an amplifier. Further, "H" level V _H in the reproduction binarization signal 7 to the integrating circuit 503, "L" when the V _L level - (V _H + V _L) / integration criteria represents 2 Level The signal 504 is also input. Then, the integration circuit 503 detects an integration signal 505 of the difference between the reproduced binary signal 7 and the integration reference signal 504, and A
/ D converter 502.

The characteristic measurement mode signal 506 and the recording condition check mode signal 507, which are signals from the controller, are input to an OR circuit 508, and the result is input to a flip-flop 509. The polarity determination timing signal 15 is also input to the flip-flop 509 as a clock signal. The output of the flip-flop 509 is input to the switching terminal of the analog switch 510 as a signal representing the interval measurement period upon detecting the first rise of the reproduced binary signal 7 after entering the recording characteristic measurement mode or the recording condition check mode. You. Except at the time of characteristic measurement, the analog switch 510 is turned on by this signal, and the output of the integrating circuit 503 is initialized to zero. When the characteristic measurement starts, the analog switch 51
0 becomes a non-conductive state, and the operation of the integrating circuit 503 is started.

The A / D converter 502 converts the integrated signal 505, which is an input signal, into a digital signal by using the polarity inversion timing signal 15 as a timing clock for performing a digital conversion operation. The conversion result is output as a polarity inversion interval signal 14 and input to the determination circuits 16 and 17. The conversion accuracy of the A / D converter 502, that is, the polarity inversion interval signal 14 has a sufficient accuracy that its value is used as a pulse interval adjustment amount, and a quantization accuracy and each interval so that overflow does not occur. Has the number of digits (the number of bits) for representing the value of.

Next, the edge timing detection circuit 1 shown in FIG.
Operation 3 will be described with reference to FIG.

The reproduction binarized signal 7 is a digital signal output from the binarization circuit 6, and is either "H" or "L" depending on whether or not there is a recording mark at the irradiation light spot position on the recording film surface. Take the level. The reproduced binary signal 7 passes through an impulse signal generation circuit 501 and becomes a polarity inversion timing signal 15 to which an impulse waveform is assigned at the timing when its polarity changes.
It is used to generate a trigger signal in the converter 502 and a signal indicating the operation start and end timings of the integration circuit 503.

The output signal of the characteristic measurement mode signal 506 and the recording condition check mode signal passed through the OR circuit 508 is a digital signal indicating the operation state of this circuit, and is "H" when this circuit is in the operation state. At "L" level. This signal uses the polarity inversion timing signal 15 in the flip-flop 507 to determine an accurate characteristic measurement period, and operates the integration circuit 503 during that period.

In the integration circuit 503, the pulse interval of the reproduced binary signal 7 is calculated and output.

In general, when the input signal is X (t), the integration circuit 503 generates the output signal Y (t) as

[0061]

[Number 2] ^{_{Y (t) = ∫ 0 t}} X (τ) dτ + Y (0) is obtained. Let the pulse interval of the reproduced binary signal 7 be P ₁ ,
When represented by P ₂ , P ₃ ,..., _PN , the output signal level V ₀ of the integration circuit 503 is at the time when the i-th pulse of the polarity inversion timing signal 15 rises, when i is an even number.

[0062]

V ₀ = A (-P ₁ + P ₂ -P ₃ +... -P _i-1 ) When i is an odd number,

[0063]

V ₀ = A (−P ₁ + P ₂ −P ₃ +... + P _i−1 ) Here, A in the above equation is a constant determined by the amplification factor of the integrating circuit 503. That is, the output signal level at this point is “H” for the pulse interval of the reproduced binary signal 7.
It shows the result of integrating pulse intervals when the level is represented by a negative value and the “L” level is represented by a positive value. Therefore,
The polarity determination timing signal 15 is output by the A / D converter 502.
Is used to convert the integrated signal level at that time into a digital value, and the result of the conversion is input to the determination circuit 16 as the polarity inversion interval signal 14.

The quantization accuracy of the A / D converter 502 needs to be designed so as to obtain sufficient accuracy for detecting the edge fluctuation amount of the reproduced binary signal. Further, since the integration signal 505 and the polarity determination interval signal 14 represent the cumulative number of the reproduced binary signal 7, the values are always in a range that can be used by the integration circuit 503, and are converted by the A / D converter 502. It is desirable to devise a characteristic measurement test pattern so as to fall within the range as possible.

FIG. 7 shows an example of the configuration of the recording power setting determination circuit 16 in FIG. The circuit receives a characteristic measurement mode signal 506, a power / pulse width signal 701, and a recording condition check mode signal 507 from a controller. The characteristic measurement mode signal 506 indicates “H” level in the characteristic measurement mode, and “L” level in other cases. The power / pulse width signal 701 indicates “H” level in the recording power search mode and “L” level in the pulse width adjustment table creation mode. The recording condition check mode signal 507 is at the “H” level in the recording condition check mode, and is at the “L” level otherwise. Therefore,
These signals are supplied to an AND circuit 702 and an OR circuit 70.
3 becomes "H" level in the recording power search mode and the recording condition check mode. At that time, the counter circuits 704 and 705, the latch circuit 706 including flip-flops, and the flip-flop 70
The clear levels 7 and 708 are released, and the recording power setting determination circuit 16 operates.

Each time the data of the polarity inversion interval signal 14 from the edge timing detection circuit 13 is updated, the sum of the data and the output data of the latch circuit 706 is calculated by the addition circuit 709. And the polarity inversion interval signal 14
The polarity inversion timing signal 15 sent at the same timing as that at the time of data update passes through the delay element 710 and is input as a clock signal to the latch circuit 706 at the timing when the result of the addition circuit 709 is obtained. Latch circuit 7
At 06, the result of the addition is latched at that time, and the result is held as an output signal until the next clock is input.
Therefore, this output signal represents the cumulative result of the polarity inversion interval signal 14 up to that point. The polarity inversion interval signal 14 indicates that the length of the "L" level of the reproduced binary signal 7 is positive,
Since the length of the “H” level is represented as a negative value, the accumulated result is the length of the “H” level of the reproduced binary signal and the length of the “L” level.
Represents the cumulative value of the level length differences.

The output of the delay element 710 is also input to the counter circuit 704 as a clock signal. Then the count is input to the decoder circuit 711, a decoder circuit 7 at time (more precisely the number of pulses interval) repeat count for each power setting value of the test pattern was consistent with C ₁
The output of No. 11 becomes "H" level. This signal passes through a NOT circuit 712 and an AND circuit 713 and passes through a latch circuit 706.
And its contents are cleared to zero. Also, AN
The output of the D circuit 713 is also input to the counter circuit 705 and the flip-flops 707 and 708 as a clock signal. The output value of the counter circuit 705 is counted up by one, and indicates the next recording power set value. In the flip-flops 707 and 708, the operation results of the addition circuit 709 and the subtraction circuits 714 and 715 with the output data immediately before the latch circuit 706 is cleared to zero are latched.

The MSB (Most Sig) of the output signal of the adder circuit 709 that is input to the flip-flop 707 is
nificant Bit) signal. This signal is added to an adder circuit 709.
The sign of the result of addition is “L” when positive and “H” when negative.

That is, this signal becomes "L" when the "L" level of the reproduced binary signal is longer than the "H" level from the time when the recording power set value is switched to the present, and becomes "H".
When the level is longer than the “L” level, it is “H”. Therefore, when the data latched by the flip-flop 707 by the clock signal which is the output signal of the AND circuit 713 is "L", the "L" level of the reproduced binary signal is longer than the "H" level. This means that the recording power was low. Conversely, when it is at the "H" level, it means that the recording power at that time was high. Therefore, when reproducing the recording characteristic measurement test pattern recorded by gradually increasing the recording power, this data is switched from "L" to "H" in the middle, so that the output value of the counter circuit 705 at that time is set as the optimum recording power. Set.

The output signal of the addition circuit is subtracted from the subtraction circuits 714 and 7
15 is also input. In the subtraction circuits 714 and 715, the upper and lower limits of the allowable range in the recording condition check mode are set as the other input signals. Therefore, by inputting only the MSB signal of both subtraction results to the AND circuit 716, an "L" level is output as an output signal when the value is out of the allowable range in the recording condition check mode. This signal is input to the flip-flop, and is latched as a determination result when a clock signal output from the AND circuit is input, that is, when the recording condition check pattern is completed, and is sent to the controller. When the controller detects that this signal is at the "L" level, a procedure for entering the recording characteristic measurement mode is performed.

FIG. 8 shows an example of the configuration of the pulse width setting determination circuit 17 in FIG. This circuit receives a characteristic measurement mode signal 506 and a power / pulse width signal 701 from a controller. The result of these signals passing through the NOT circuit 801 and the AND circuit 802 becomes “H” level in the pulse width adjustment table creation mode. At that time, the counter circuits 803 and 804, the M−1 stage shift registers 805 to 810, Latch circuit 811 composed of flip-flop and flip-flop 8
The clear levels of 12 and 813 are released, and the recording power setting determination circuit 17 operates.

The polarity reversal timing signal 15 from the edge timing detection circuit 13 is an input signal of the counter circuit 803. Every time a pulse signal is input, the output data of the counter circuit 803 increases by one, and its value is stored in the ROM.
The signal is input to the circuit 814 as an address signal. At that time, the data at the corresponding address is read from the ROM circuit 814 and input to the adder circuit 815. The edge timing detection circuit 1 updated at the same time as the pulse signal of the polarity inversion timing signal 15
3 is also input, and the result of addition is output.

The ROM circuit 803 stores data representing the accumulated value up to each polarity inversion position from address 0, with the length of the "H" level of the characteristic measurement test pattern being positive and the length of the "L" level being negative. They are stored in order. That is, the pulse intervals of the characteristic measurement test pattern are set to T ₁ , T ₂ , T ₃ ,
.., T _N , the address i of the ROM circuit 803
(I ≦ M) data R _i , when i is an even number,

[0074]

## EQU5 ## R _i = A (T ₁ −T ₂ + T ₃ +... + T _i−1 ) When i is an odd number,

[0075]

## EQU6 ## R _i = A (T ₁ −T ₂ + T ₃ +... −T _i−1 ) The quantization accuracy of the pulse interval is equal to the quantization accuracy when the pulse interval of the reproduced binary signal 7 is converted to the polarity inversion interval signal 14. That is, A in the above equation is equal to the constant A determined by the amplification factor of the integrating circuit 503. Therefore, for example, the pulse interval at the time of reproduction at the time of recording are equal, i.e. _{P 1 = T 1, P 2} = T 2, if the ...... P _N = T _N, ROM
The sign of the data R _{j of the} address j stored in the circuit 803 and the data V _{0 of the} j-th polarity inversion interval input to the pulse width setting determination circuit 17 are different from each other and have the same absolute value. That is, the k-th output of the adder circuit 815 is the recording pulse and the leading pulse edge position in the pulse of the reproduced binary signal, and the edge position of the k-th recording pulse and the k-th reproduced binary signal are set. Represents the amount of deviation from the position of the pulse edge, that is, the amount of edge fluctuation.

The output signal of the adding circuit 815 is
6 and is added to the outputs of the shift registers 805 to 810. The result is input to the latch circuit 811 and then to the shift registers 805 to 810. Shift registers 805 to 810 and latch circuit 811
Constitute a ring-shaped storage circuit (M stages), and the adder circuit 816 calculates and stores the accumulated value of the edge variation amount at every M intervals. Since the number of pulse intervals in one cycle of the test pattern in the pulse width adjustment table creation mode is M, an accumulated value is calculated for each of the same patterns. A polarity inversion timing signal is input to the clock signals of the shift registers 805 to 810, and a signal obtained by passing the polarity inversion timing signal through the delay element 817 is input to the clock signal of the latch circuit 811. Perform the latch.

When an overflow occurs in the operation result of the adding circuits 815 and 816, the level of each carry signal becomes "H". This occurs when a location where the recording characteristic measurement pattern could not be recorded normally due to a defect or the like of the optical disc 1 is detected. This result passes through the OR circuit 818 and generates an "H" level as a measurement error when an overflow has occurred on one side. And the delay element 8
The output signal of No. 17 is input to the flip-flop 812 as a clock signal, the data is latched at the timing when the data is determined, the data is transmitted to the controller side, and the characteristic measurement is stopped when an error occurs.

The output of the counter circuit 803 is also input to the decoder circuit 819. The decoder circuit 819 outputs an “H” level when the output value of the counter circuit 803 becomes M−1. The signal is input as a clear signal of the counter circuit 803 through the NOT circuit 820 and the AND circuit 821, and the counter circuit 803 is initialized each time the characteristic measurement test pattern has been reproduced for one cycle.

The output signal of the decoder circuit 819 is also input to the counter circuit 804, and counts the number of cycles of the reproduced characteristic measurement test pattern. The output of the counter circuit 804 is input to the decoder circuit 822, "H" level is output from the decoder circuit 822 when the characteristic measuring test pattern has entered the 2 ^ C ₂ -1 cycles Me, data conversion as a conversion start signal 823 The start of data transmission is notified to the circuit 18. When data transmission to the data transmission circuit 18 is started, the data conversion circuit 18 starts updating the pulse width adjustment table 19 at the same time. Even if an error occurs at this point, the characteristic measurement cannot be stopped. At this time, the signal outputs the output of the decoder circuit 822 to the NOT circuit 824,
And mask by the AND circuit 825. However, at that time, the flip-flop 813 and the selector circuits 826 to 831 cause the latch circuit 8 including an error to occur.
Instead of outputting the 11 output signals, control is performed so as to output the accumulated value up to the previous time. This output signal is sent to the data conversion circuit 18 as an edge shift signal 832.

As the transfer timing, the output of the delay element 817 is further generated as a timing signal 833 in which the output data of the selector circuits 826 to 831 is determined through the delay element 834 and transmitted to the data conversion circuit 18. are doing.

FIG. 9 shows the data conversion circuit 18 in FIG.
And a configuration example of a pulse width adjustment table 19.
The conversion start signal 823, the edge shift signal 832, and the timing signal 833 are input from the pulse width setting determination circuit 17 to this circuit. Timing signal 833
Every time a pulse signal is input, the output data of the counter circuit 901 is incremented by one, and the value is stored in the ROM circuits 902-9.
04 is input as an address signal. The output signal of the counter circuit 901 is input to the decode circuit 905, and when the value is 1, that is, only when the pulse waveform input of the first timing signal is received, the decode circuit 905
Is at "H" level. This signal is input to the clear terminal of the pulse width adjustment table 19, and the contents of the table are cleared to zero when the output of the decoder circuit 905 becomes "H" level, that is, when the table update starts.

The values of the pulse intervals T ₁ , T ₂ , T ₃ ,..., T _N of the characteristic measurement test pattern are stored in the ROM circuit 902 in order from the start address + 2 (address 2).

The ROM circuit 903 stores T ₁ , T ₂ ,
The value of T ₃ ,..., T _N is the start address + 1 (address 1)
, And T ₁ , T ₂ , T
_3, ..., the value of T _N is stored from the head address (address 0) in this order. Address 0 of the ROM circuit 902,
1, and data 0 is stored in the address 0 of the ROM circuit 903.
(Actually, any value that cannot be obtained at the recording pulse interval is acceptable).

The outputs of the ROM circuits 902 to 903 pass through the gate circuits 906 to 907 and the pulse width adjustment table 1
9 is input as an address signal. On the other hand, the output of the ROM circuit 904 is input as a data signal to the pulse width adjustment table 19 through the gate circuit 908. An output signal of the same ROM circuit 904 is added to an addition / subtraction circuit 909.
Is added to or subtracted from the edge shift signal 832 from the pulse width setting determination circuit 17. The LSB (Least Significant Bit) of the output signal of the counter circuit 901 is input to the addition / subtraction circuit 909 as a selector signal. This is because the edge shift direction when the value of the edge shift signal 832 is positive is alternately changed, and therefore, the addition and subtraction are switched one by one to make the edge shift direction constant. The output of the addition / subtraction circuit 909 is input as an address signal to the pulse width adjustment table 19 through the gate circuit 910. The gate circuits 906 to 908 and 910 are connected to the ROM circuits 902 to 902 while the edge shift signal 832 is being transmitted.
904 and signals from the addition / subtraction circuit 909 are sent to the pulse width adjustment table 19 as these output signals. Further, in order to sort the data for the front edge and the data for the rear edge of the pulse width adjustment table 19, the timing signal 833 is supplied to the NOT circuit 911, the AND circuit 912, 9
13 are input to chip select terminals of both pulse width adjustment tables 19.

As described above, the edge shift signals 832 to i
When the th data comes in, the edge fluctuation amount is e
_i (where the spot traveling direction is positive), the addresses (T _1-2 , T _i-1 , T _i +
An operation of substituting data T _i for e _i ) is performed. Therefore, when data is actually recorded, for example, if a pattern of T _1-2 , T _i-1 , T _i + e _i appears in the recording pattern, the address (T _1-2, with reference to the _{T i-1, T i +} e i), the data T _i stored in that position in place of the T _i + e _i used as the recording pulse interval. As a result, the recording mark undergoes an edge shift by e _i to have a desired pulse interval T _i + e _i , and the effect of the edge shift can be canceled.

However, it is generally difficult to prepare the pulse interval of the test pattern for characteristic measurement in a number including all cases.
To complete the empty area of the data interpolation circuit 91 after all the edge shift signals 832 have been received.
4 is operated. In this circuit, data where the content of the pulse width adjustment table 19 is 0 is found near the non-zero data in the vicinity thereof, and interpolation calculation is performed. When the calculation is completed, the data interpolation circuit 914 sends the characteristic measurement /
The fact that the updating operation of the pulse width adjusting table is completed is completed, and the recording characteristic measurement mode ends.

FIG. 10 shows the pulse width adjusting circuit 2 in FIG.
1 and a configuration example of a pulse width adjustment table 19. The recording data that is the output signal of the modulation circuit 20 is obtained by multiplying the number of codes “0” between the codes “1” and “1” after code modulation by a constant, and the quantization accuracy is determined by a pulse width adjustment table. 19 (that is, the conversion accuracy of the A / D converter 502), and the latch circuits 1001, 1
002.

The recording data is stored in a latch circuit 1001,
A clock signal is alternately input to 1002, and data is alternately latched and output by both. This output signal is added to the immediately preceding edge position adjustment amount in the adder circuits 1003 and 1004 (the direction opposite to the spot traveling direction is positive).
Is added. By this operation, a longer pulse interval is taken here by the previous edge position adjustment, so that the edge position comes to the same position as before the conversion.

Using the output data of the adders 1003 and 1004, the pulse interval after adjustment is obtained by referring to the pulse width adjustment table 19. When referring to the pulse width adjustment table 19, the latch circuit 10
The last pulse interval (after adjustment) is input from the latch circuits 05 and 1006, and the pulse interval (after adjustment) two times before is input from the latch circuits 1006 and 1005, and is used for determining the pulse interval after the adjustment. This output signal is supplied to latch circuits 1007 and 100
At 8 the latch is held.

The output signal is supplied to the down counter circuits 1010 and 1011 together with the clock signal 1009 having one cycle of the quantization precision of the recording data output from the modulation circuit 20 in order to realize the recording pulse width. , And a clock. Since the time from when the initial value is set until the output value becomes 0 is the recording pulse interval, the OR circuits 1012 and 1013
And the output values of the down counter circuits 1010 and 1011 are 0
, And both outputs are combined by the NAND circuit 1014 and the flip-flop 1015 to generate a pulse, and the pulse is generated as the pulse signal 1016.
2 has been entered.

The output of the OR circuit is
1, 1002, 1005, and 1006 are input as clock signals, and have timings for latching the next data. This signal is input as a clock signal to the latch circuits 1007 and 1008 through the delay elements 1017 and 1018, and latches at the timing when the data is determined. The difference between the signal before the table reference and the signal after the table reference is the adjustment amount of the edge position. This value is calculated by the subtraction circuits 1019 and 1020, and the addition circuit 100
4,1003.

With the above circuit, the recording data is
Referring to the pulse width adjustment table 19, the pulse interval is sequentially adjusted according to the pattern.

FIG. 11 shows an example of the configuration of the laser driver circuit 12 in FIG. In this figure, the semiconductor laser 1
The circuit for driving 101 is an NPN transistor 1102,
A current switch 1103 is provided.

The pulse signal 1016 is supplied to the selector circuit 110
4 is input. This circuit has a terminal for selecting an input signal, a signal from a controller is input, and an output signal is selected. When recording normal data, the pulse signal is selected as the output signal. And
A pulse of a pulse width adjustment test pattern from the controller or a recording power search test pattern, which is the other input signal only in the recording characteristic measurement mode, is selected as a signal output signal.

This output signal is input to an ECL (emitter coupled logic) AND circuit 1105. The non-inverted signal and the inverted signal of this circuit are level-shifted by zener diodes 1106 and 1107, and then transistors 1102 and 11
03 is input to the base terminal. In this current switch, when the transistor 1103 is turned on, the current is superimposed by an amount corresponding to the current value set by the transistor 1108. A current source for supplying a current sufficient for the semiconductor laser of the transistor 1109 to light at the reproduction level is configured.
On the other hand, the transistor circuit 1108 sets a current to be superimposed during recording, applies the output voltage of the D / A converter 1110 to the base terminal of the transistor 1108, and sets a voltage between the emitter terminal of the transistor 1108 and the voltage −V. A current having a value obtained by dividing the potential difference by the value of the resistor 1111 flows.
The operational amplifier 1112 forms a voltage follower, and suppresses variation in the potential difference between the base and the emitter of the transistor 1108.

The recording power is determined by the input data of the D / A converter 1110. This value is determined by the selector circuit
The value set by the controller 1116 or the value of the output data of the flip-flop 1117 is set by 1116. The signal for making this selection is input from the controller. During normal data recording, the selector circuit 1112
1115, the value of the output data of the flip-flop 1117 is selected, and the value set by the controller is selected only when recording the characteristic measurement test pattern in the recording power search mode.

[0097] First, when the characteristic measuring test pattern recording, set value 1 from the controller is set to the D / A converter, the setting value each time repeating the test pattern 2 ^ C ₁ once is increased by 1, and gradually the recording power I will give you.
Then, the recording mark is reproduced, and the edge timing detection circuit 13 and the recording power setting determination circuit 16 determine which recording power is optimal. By storing the number in the flip-flop 1117 and setting it in the D / A converter, the optimum setting of the recording power is realized.

The optimum recording power number is the NAND circuit 1
118, when the recording power is determined in the recording power search mode by the OR circuit 1119, the flip-flop 111
As a result, the output of the flip-flop 707 in the determination circuit 16 for recording power setting is used as an input signal.

The above is the description of the operation of each component according to the embodiment of the present invention. By using the recording pulse edge adjustment amount calculation method, it is possible to eliminate a change in edge position in a reproduced waveform due to thermal interference, which occurs due to a different recording pattern in the same recording pulse.

In the above embodiment, the case where the recording linear velocity is constant has been described. However, since the rotation speed of many optical discs is constant, the linear velocity actually varies depending on the recording radius, and the recording characteristics also differ. In the case of an optical disk, considering that random access is required, it is necessary to perform a detection operation by recording a characteristic measurement test pattern at a plurality of positions on the disk surface having different linear velocities when recording characteristics are measured. A plurality of pulse width adjusting tables 19 are prepared.

As the area used for this measurement, a plurality of locations including the inner circumference side, the outer circumference side, and between them are used. The area may be specially provided or a general data recording area. In the latter case, if recording data already exists in that area, another free area is used, or the information written in that area to use that area is stored in another memory such as a memory in the temporary controller. The process of evacuating to the location is performed.

The pulse width setting determination circuit 17 classifies the average value of the edge fluctuation amount for each test pattern (not for each pulse interval but for each combination of a plurality of consecutive pulse intervals). This is because the edge position of the reproduced waveform depends not only on the combination of the recording device and the recording medium, but also on the recording pulse pattern near the laser light pulse edge at the time of recording corresponding to the reproduced waveform edge due to thermal interference in addition to the linear velocity. Because it is.

Generally, the edge position of the reproduced waveform corresponding to the laser pulse edge at the time of recording has a large influence from the pattern recorded immediately before. On the other hand, if the effect of the subsequent recording pulse pattern is small and the thermal conductivity of the recording medium is extremely large, or if the linear velocity during recording is excessively small and the effect of thermal interference is extremely large, the edge of the recording signal This effect is negligible except when the interval is extremely short and when the effect of the domain wall energy of the recording medium at the time of forming the recording mark is large.

The range of the recording pulse pattern on the front side having the above-mentioned influence can be mainly defined by its length. This differs depending on the linear velocity, and the range becomes wider toward the inner circumference when considered on the time axis. However, in an actual system, the range may be adjusted to the inner circumference where this condition is poor, or the range may be switched according to the linear velocity. Also, this range is generally difficult to handle as the length of time, so it is somewhat redundant, but it is handled by the number of recording patterns, and the amount is the worst condition, that is, when the pattern of the minimum polarity inversion interval is continuous. It is better to determine with the number of influences. Therefore, in this embodiment, an example in which this range is set to three recording patterns has been described.

In the recording characteristic measurement operation, an error (that is, the recording condition deviated from the set value) was detected when the apparatus was turned on, when the disk was replaced, and when the recording condition was checked at each data recording. Design to do when. If there is no recording operation for a while, it is desirable to design so as to perform this operation periodically.

The present invention can be applied to any information recording method which is rewritable and whose principle is a recording method using heat.
And a description of a basic method for controlling recording conditions such as recording power and recording pulse interval applicable to a recording medium. In particular, the heat diffusion effect is high and sensitive to recording conditions, that is, recording power, environmental temperature, configuration of recording medium,
In the case of a recording method and a recording medium in which a slight change in the characteristics of the recording device or the like appears as a difference in recording characteristics, it is effective in securing the reliability of the recorded data.

For example, the present invention is particularly useful for a magneto-optical disk, a magneto-optical disk capable of overwriting using exchange coupling force, an optical disk utilizing phase change capable of overwriting, and the like.

[0108]

According to the present invention, it is possible to eliminate a variation related to the edge position of a reproduced signal due to thermal interference. Also, be sure that the combination of each recording medium and recording device changes,
In addition, the recording characteristics are measured and updated from time to time, so the optimum recording conditions are always realized. Higher-density recording using mark length recording is easy without strict adjustment during production. And the reliability of the recorded data is greatly improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a diagram showing an example of a characteristic detection test pattern waveform used in a recording characteristic measurement mode.

FIG. 3 is a diagram showing one configuration example of an equalization circuit.

FIG. 4 is an explanatory diagram of the operation of the equalization circuit.

FIG. 5 is a diagram showing one configuration example of an edge timing detection circuit.

FIG. 6 is an explanatory diagram of an operation of the edge timing detection circuit.

FIG. 7 is a diagram showing one configuration example of a recording power setting determination circuit.

FIG. 8 is a diagram showing one configuration example of a pulse width setting determination circuit.

FIG. 9 is a diagram showing one configuration example of a data conversion circuit and a pulse width adjustment table.

FIG. 10 is a diagram showing one configuration example of a pulse width adjustment circuit and a pulse width adjustment table.

FIG. 11 is a diagram illustrating a configuration example of a laser driver circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Optical disk, 2 ... Spindle motor, 3 ... Optical pickup, 4 ... Amplifier, 5 ... Equalization circuit, 6 ... Binarization circuit,
7: Reproduced binary signal, 8: PLL (phase locked
Loop) circuit, 9 demodulation circuit, 12 laser driver,
13: edge timing detection circuit, 14: polarity inversion interval signal, 15: polarity inversion timing signal, 16: determination circuit for setting recording power, 17: determination circuit for setting pulse width, 1
8 data conversion circuit 19 pulse width adjustment table
20: modulation circuit, 21: pulse width adjustment circuit 21, 301
.. Voltage follower, 302 delay element, 305 addition circuit, 306 multiplexer, 307 addition inversion amplification circuit, 308 multiplexer, 501 impulse signal generation circuit 501, 502 A / D converter, 503 integration circuit, 504: integration reference signal, 505: integration signal, 50
6: characteristic measurement mode signal, 507: recording condition check mode signal, 509: flip-flop, 510: analog switch, 701: power / pulse width signal, 704
705: counter circuit, 706: latch circuit, 707,
708: flip-flop, 709: addition circuit, 710
... Delay elements, 711 ... Decoder circuits, 714, 715 ...
Subtraction circuit, 803, 804 ... Counter circuit, 805-8
10 shift register, 811 latch circuit, 812
813: flip-flop, 814: ROM circuit, 81
5,816 addition circuit, 817 delay element, 819,8
22, a decoder circuit; 823, a conversion start signal;
831 ... selector circuit, 832 ... edge shift signal, 8
33 timing signal, 834 delay element, 901 counter circuit, 902-904 ROM circuit, 905 decode circuit, 906-908, 910 gate circuit, 9
09 ... addition / subtraction circuit, 914 ... data interpolation circuit, 10
01, 1002, 1003 to 1008 ... Latch circuit, 1
003, 1004 ... addition circuit, 1009 ... clock signal, 1010, 1011 ... down counter circuit, 101
5 flip-flop, 1016 pulse signal, 101
7, 1018 delay element, 1019, 1020 subtraction circuit, 1101 semiconductor laser, 1102, 1103, 1
108, 1109: Transistor, 1104: Selector circuit, 1106, 1107: Zener diode, 11
10 D / A converter, 1112 Operational amplifier, 1113
1116: selector circuit, 1117: flip-flop.

Claims (1)

[Claims] 1. A recording medium is irradiated with a laser beam, and has n consecutive pulses (n is an integer) having different pulse intervals according to a mark length recording method, and the combination of the pulses is different. A first test pattern having a plurality of patterns is recorded, a recording pulse interval adjustment amount is calculated for each pattern in which the combination is different, and a recording condition is controlled for each of the recording media to correct the influence of thermal interference. For this purpose, a table creation method is characterized in that a data table of the recording pulse interval adjustment amounts corresponding to the patterns having different combinations and the respective patterns is created.