JP2000267141A - Liquid crystal display device and driving method of liquid crystal display device - Google Patents

Abstract

(57) Abstract: An IPS type liquid crystal display device having a high aperture ratio and capable of displaying a bright image, a driving method thereof, a liquid crystal display device having good display quality by preventing crosstalk, and image sticking. Provided is an IPS type liquid crystal display device which is hardly generated. SOLUTION: A gate electrode 11b of a TFT 19 is connected to a gate bus line 11a above a pixel region,
The display electrode 16a is connected to the source electrode 16c of the TFT 19. The common electrodes 11c and 11d are connected to the lower gate bus line 11a of the pixel region, and are arranged in parallel with the display electrode 16a. When writing display data to the display electrode 16a, for example, + 15V is applied to the upper gate bus line 11a, and 0V is applied to the lower gate bus line 11a. Also, the gate bus line 11a in the pixel area where no data is written
Is applied with -10V.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a driving method of the liquid crystal display device, and more particularly to an IPS (In-Plane).
The present invention relates to an improvement in the aperture ratio of a Switchig) type liquid crystal display device, prevention of crosstalk in an IPS type liquid crystal display device and a TN (Twisted Nematic) type liquid crystal display device, and prevention of image sticking in an IPS type liquid crystal display device.

[0002]

2. Description of the Related Art In recent years, demand for liquid crystal display devices has been diversified. Initially, the liquid crystal display device was mainly used as a display device of a notebook personal computer, but has also been used for a desktop personal computer, a workstation, a television (TV), and the like.

A general TN liquid crystal display device has a structure in which liquid crystal is sealed between two transparent substrates. Of the two surfaces of the transparent substrate facing each other, a counter electrode, a color filter, an alignment film, and the like are formed on one surface, and a TFT (Thin Film Transistor: TFT) is formed on the other surface.
Thin film transistor), a pixel electrode, an alignment film, and the like. A polarizing plate is attached to a surface of the transparent substrate opposite to the opposite surface. These two polarizing plates are arranged, for example, so that their polarization axes are orthogonal to each other. In the state where no voltage is applied between the pixel electrode and the counter electrode, light is transmitted to make a bright display, and a voltage is applied. In this state, light is shielded and dark display is performed. When the polarization axes of the two polarizing plates are arranged in parallel to each other, dark display is performed when no voltage is applied between the pixel electrode and the counter electrode, and bright display is performed when a voltage is applied.

[0004] However, the above-mentioned TN type liquid crystal display device generally has a disadvantage that viewing angle characteristics are not sufficient. That is, although good contrast is obtained when the image displayed on the liquid crystal display device is viewed from the front, the contrast is reduced when viewed from an oblique direction, or the brightness is reversed in an extreme case. As a liquid crystal display device having good viewing angle characteristics, an IPS type display device has been developed (JP-A-6-160878, JP-A-9-2303).
No. 61).

FIG. 17A is a plan view showing a conventional IPS type liquid crystal display device, and FIG.
It is sectional drawing by E line. The IPS type liquid crystal display device has a glass substrate 110 and a glass substrate
0, a liquid crystal 129 sealed between the glass substrates 110 and 120, and a polarizing plate (not shown) disposed below the glass substrate 110 and above the glass substrate 120, respectively.

On the glass substrate 110, a plurality of gate bus lines 111a arranged in a mutual orientation and a common wiring 1 arranged in parallel to the gate bus lines 111a.
11b, and a plurality of data bus lines 116a crossing the gate bus line 111a at right angles are formed. Gate bus line 111a and data bus line 1
Each of a plurality of rectangular areas defined by 16a is a pixel area.

In each pixel region, a TFT 119, a plurality of display electrodes 116d arranged in a vertical direction, and a display electrode 11
A common electrode 111d is provided in parallel with 6d. Gate bus line 111a, common wiring 11
1b, the common electrode 111d, and the gate electrode of the TFT 119 are all made of metal such as aluminum, and are formed in the same step as the lower conductive layer. And TFT11
The gate electrode 9 is connected to the gate bus line 111a, and the common electrode 111d is connected to the common wiring 111b.

An interlayer insulating film 112 is formed on the lower conductive layer, and a data bus line 116a, a drain electrode and a source electrode of the TFT 119, and a display electrode 116d are formed on the interlayer insulating film 112. . The data bus line 116a, the drain electrode and the source electrode of the TFT 119, and the display electrode 116d are also made of metal such as aluminum, and are formed in the same process as an upper conductive layer. Protective film (insulating film) on upper conductive layer
117 is formed, and an alignment film 118 made of polyimide or the like is formed on the protective film.

On the other hand, on the lower surface side of the glass substrate 120, a black matrix 121 and a color filter 122 made of a metal such as chromium or a metal compound are formed.
The black matrix 121 is a data bus line 116a
Is formed so as to cover the upper part. Further, a color filter 122 of any one of red (R), green (G), and blue (B) is arranged for each pixel region. An alignment film 123 made of polyimide or the like is formed below the black matrix 121 and the color filters 122.

[0010] In the IPS type liquid crystal display device thus configured, when no voltage is applied between the display electrode 116d and the common electrode 111d, as shown in FIG. It is oriented in the orientation processing directions of 118 and 123. Light transmitted through the polarizing plate from below the glass substrate 110 and incident on the liquid crystal layer passes through the liquid crystal layer without changing the polarization state and is emitted toward the substrate 120. Then, the light is blocked by the other polarizing plate, and black display is performed. on the other hand,
When a voltage is applied between the display electrode 116d and the common electrode 111d, as shown in FIG.
9a changes the alignment direction along the direction of the electric field. For this reason, light transmitted through the polarizing plate from below the glass substrate 110 and incident on the liquid crystal layer is changed in polarization state by the liquid crystal layer, passes through the other polarizing plate, and becomes white. In this way,
By controlling the voltage applied to the display electrode 116d, the light transmittance of each pixel can be controlled, and a desired image can be displayed.

[0011]

However, the present inventor considers that the above-mentioned conventional IPS type liquid crystal display device has the following problems. In the IPS type liquid crystal display device, two electrodes (display electrode 116d and common electrode 111d) for controlling the alignment direction of liquid crystal molecules are both on the glass substrate 110 side, and these electrodes are formed of a metal such as aluminum. Have been. In the IPS type liquid crystal display device, a common wiring 111b is arranged in parallel with the gate bus line 111a in order to maintain the common electrode 111d at a constant potential. For this reason, the area of the portion contributing to the display is reduced, and it is difficult to display a bright and high-contrast image.

It is known that IPS type liquid crystal display devices cause crosstalk in the vertical direction. For example, when a white square is displayed on a black background, a white band is formed in the upper and lower portions of the white square (portions indicated by oblique lines in the figure) as shown in FIG. This phenomenon is particularly noticeable when the image is viewed from an oblique direction. This occurs because light passing through the gap between the common electrode 111d and the data bus line 110a passes through the liquid crystal display device as shown in FIG. 19B.

When displaying black on the entire screen, the voltage of the data bus line 116a is substantially the same as the voltage of the common electrode 111d, and an electric field is applied to the liquid crystal between the common electrode 111d and the data bus line 116a. No voltage is applied and no light leakage occurs. On the other hand, when a white square is displayed on a black background, a voltage is applied to the data bus line 116a in a region above and below a portion where the white square is displayed, so that a voltage is applied between the common electrode 111d and the data bus line 116a. An electric field is generated, and the liquid crystal molecules are aligned along the electric field. Therefore, as shown in FIG.
The polarized light that has entered the liquid crystal layer from below is reflected by the surface of the black matrix 121, and is further reflected by the common electrode 111d.
And is transmitted through the color filter 112 and the glass substrate 120. Due to this leakage light, a portion originally displayed in black becomes whitish. This phenomenon is called crosstalk.

In order to prevent this crosstalk, a black matrix may be formed using a resin mixed with a black dye. However, since the resin black matrix has a low light absorptivity, the effect of preventing light leakage is not sufficient, and there is a problem that the contrast is lowered as a whole. It is also conceivable to superimpose a resin black matrix on a metal black matrix. However, doing so increases the number of steps and is complicated, and causes an increase in manufacturing cost.

The phenomenon of burn-in occurs not only in the IPS type liquid crystal display device but also in the TN type liquid crystal display device. For example, as shown in FIG. 20, after a white square is displayed on a black background for a long time, when the entire surface is switched to a halftone (gray) display, a portion where black was displayed and white are displayed. This is a phenomenon in which the luminance is different from the part where it was.

From the above, it is an object of the present invention to provide a high aperture ratio,
An object of the present invention is to provide an IPS type liquid crystal display device capable of displaying a bright image and a driving method thereof. Another object of the present invention is to prevent crosstalk due to light leakage,
An object of the present invention is to provide a liquid crystal display device having good display quality.
Still another object of the present invention is to provide a liquid crystal display device which is less likely to cause image sticking and has good display quality.

[0017]

SUMMARY OF THE INVENTION The above-mentioned problem is solved by a first substrate 10 and a second substrate 2 as illustrated in FIG.
In a liquid crystal display device in which a liquid crystal 29 is sealed between zeros, a plurality of gate bus lines 11a formed on a surface of the first substrate 10 on the side of the second substrate 20; A plurality of data bus lines 16a formed on the surface of the substrate 10 on the side of the second substrate 20 and intersecting the gate bus lines 11a; and an nth (n is 1, 2,...) Gate bus line 11a , N + 1-th gate bus line 11a, m-th (m is 1, 2,...) Data bus line 16a and m + 1-th data bus line 16a.
Alternatively, a plurality of display electrodes 16d, a gate electrode is electrically connected to the n-th gate bus line 16a, a drain electrode is electrically connected to the m-th data bus line 16a, and a source electrode is A thin film transistor 19 electrically connected to the electrode 16d, and one or a plurality of common electrodes 11c and 11d disposed apart from the display electrode 16d and electrically connected to the (n + 1) th gate bus line 11a. The problem is solved by a liquid crystal display device having the following.

In the liquid crystal display device configured as described above, there is no common wiring required conventionally, and the aperture ratio of the pixel region is improved. This makes it possible to display a bright and high-contrast image. in this case,
It is preferable that both the display electrode and the common electrode are formed on the upper conductive layer. When both the display electrode and the common electrode are formed on the upper conductive layer, since there is no insulating layer on these electrodes, it is possible to avoid the deterioration of display quality due to the accumulation of an electric field in the insulating film. However, when the common electrode is formed in the upper layer wiring, wiring for connecting the common electrode and the gate wiring is required, and the aperture ratio is reduced accordingly. Therefore, when giving priority to the aperture ratio, the common electrode may be formed in the lower conductive layer.

In the case where the common electrode is formed on the lower conductive layer, it is preferable that the common electrode and the data bus line partially overlap. This prevents light from leaking from the gap between the common electrode and the data bus line. In addition, as described above, in the liquid crystal display device in which the liquid crystal is sealed between the first substrate and the second substrate, the above-described problem occurs in the liquid crystal display device on the second substrate side of the first substrate 30. A plurality of gate bus lines 31a formed on the surface, a plurality of data bus lines 36a formed on the surface of the first substrate 30 on the second substrate side and intersecting the gate bus lines 31a, n-th (n is 1,
, 2), the (n + 1) th gate bus line 31a, and the mth (m is 1, 2, 2)
..), One or more display electrodes 36d arranged in a pixel area defined by the data bus line 36a and the (m + 1) th data bus line 36a, and the gate electrode is connected to the n-th gate bus line 31a. A first thin film transistor 39a electrically connected, a drain electrode electrically connected to the m-th data bus line 36a, and a source electrode electrically connected to the display electrode 36d; One or more common electrodes 31c and 31d spaced apart, a gate electrode is electrically connected to the nth gate bus line 31a, and a drain electrode is electrically connected to the (n + 1) th gate bus line 31a. And the second thin film transistor 39 whose source electrode is electrically connected to the common electrodes 31c and 31d. It is solved by a liquid crystal display device characterized by having and.

In the liquid crystal display device configured as described above,
Since the thin film transistor is connected between the common electrode and the gate bus line, a change in the voltage of the common electrode between data writing and data holding is avoided. In this liquid crystal display device, the common electrode is usually formed in the same layer as the source electrode of the second thin film transistor, that is, in the upper conductive layer. In this case, the gate bus line and the second thin film transistor are formed in the lower conductive layer. Requires a common wiring for connection with the drain electrode. By forming the common wiring so as to partially overlap the data bus line and the common electrode, it is possible to block light leaked from a gap between the data bus line and the common electrode.

As shown in FIG. 3, the above-mentioned problem is caused by providing a plurality of gate bus lines (G1, G2,...) On one of two substrates arranged opposite to each other.
A plurality of data bus lines (D1, D2,...) Crossing the gate bus lines (G1, G2,...) And an nth (n is 1, 2,...) Gate bus line (G1, G2).
,...), The (n + 1) th gate bus line (G1,.
G2,...), The mth (m is 1, 2,...) Data bus line (D1, D2,...) And the (m + 1) th data bus line (D1, D2,. One or a plurality of display electrodes (S1, S
2), the gate electrode is electrically connected to the n-th gate bus line (G1, G2,...), The drain electrode is electrically connected to the m-th data bus line (D1), and the source is The electrodes are the display electrodes (S1, S2, ...)
Thin film transistors TFT1, TF electrically connected to
T2,... And one or more commons which are arranged apart from the display electrodes (S1, S2,...) And electrically connected to the (n + 1) th gate bus line (G1, G2,. In the driving method of the liquid crystal display device having the electrodes (C1, C2,.
, G2,...), A reference voltage (for example, 0 V) for determining the potential of the common electrode when writing display data, and a first voltage (for example, +1) for turning on the thin film transistor.
5V) and a second voltage (for example, -10 V) for turning off the thin film transistor are supplied over time.

According to the driving method of the liquid crystal display device described above,
Since the thin film transistor is turned on, display data is written to the display electrode in the pixel region where the first voltage is applied to the gate electrode of the thin film transistor. In the pixel region where the second voltage is applied to the gate electrode of the thin film transistor, the display data is not written because the thin film transistor is turned off. In a pixel region where a reference voltage is applied to the gate electrode of the thin film transistor, display data is erroneously written depending on the voltage of the display data. However, since data is written to such a pixel in the next vertical synchronization period, deterioration of display quality due to erroneous writing can be substantially ignored.

With such a driving method, it is possible to drive a liquid crystal display device having an improved aperture ratio by omitting common wiring. In addition, as described above, as shown in FIG. 5, one of the two substrates disposed opposite to each other has a plurality of gate bus lines (G1, G2,
...) and a plurality of data bus lines (D1, D2, ...) intersecting the gate bus lines (G1, G2, ...).
, The nth (n is 1, 2,...) Gate bus line (G1, G2,...), The (n + 1) th gate bus line (G1, G2,. ..) And one or more display electrodes (S1,...) Arranged in a pixel area defined by the (m + 1) th data bus line (D1, D2,...). S2,...) And a gate electrode connected to the n-th gate bus line (G1, G2,...), And a drain electrode connected to the m-th data bus line (D1, D2,.
..), And the source electrode is connected to the display electrodes (S1, S1).
, ...) connected to a first thin film transistor (TFT)
, TFT21,...) And the display electrodes (S1, S2,.
...) and one or more common electrodes (C1, C2, ...) arranged at a distance from each other, and a gate electrode is electrically connected to the n-th gate bus line (G1, G2, ...);
The drain electrode is connected to the (n + 1) th gate bus line (G
, G2,...), And a second thin film transistor (TFT12, TFT22,...) Having a source electrode electrically connected to the common electrode. The gate bus line (G1
, G2,...), A reference voltage (for example, 0 V) for determining the potential of the common electrode at the time of display data writing, and a first voltage (for example, +15 V) for turning on the first thin film transistor and the second thin film transistor. ) And the first
And a second voltage for turning off the second thin film transistor (for example, −10 V) is supplied over time.

The above driving method has a first thin film transistor connecting between the nth data bus line and the display electrode, and a second thin film transistor connecting between the (n + 1) th data bus line and the common electrode. This is a driving method of the liquid crystal display device. According to this driving method, it is possible to drive a liquid crystal display device in which the aperture ratio is improved by omitting the common wiring extending in the horizontal direction along the gate wiring.

The above-mentioned problem is, as exemplified in FIGS. 7 to 9, in which liquid crystal is sealed between the first substrate 40 and the second substrate 50, and the light transmittance of a plurality of pixel regions is increased. In the liquid crystal display device for displaying an image by controlling individually, the first substrate 40 has a plurality of data bus lines 46a and a plurality of gate bus lines 41a that define the pixel area, The second substrate 50 includes a black matrix 51 made of a metal or a metal compound that shields light between the pixel regions, and color filters 51R, 51G, and 51B that determine the color of transmitted light for each pixel region. Color filters 51R, 51G, and 51B extend from the pixel area to the adjacent pixel area over the black matrix 51, and at least two color filters are provided on the black matrix 51. Covered data is solved by a liquid crystal display device in which the width W3 of the overlapping portion of the color filter of the two colors is equal to or wider than the width of the black matrix W2.

In the liquid crystal display device having the above structure, at least two color filters are superimposed on the black matrix to reduce the light reflected by the black matrix. In a cold cathode fluorescent lamp generally used as a backlight of a liquid crystal display device, peaks of wavelengths corresponding to red, green and blue are high, and light transmitted through a red color filter transmits through a green or blue color filter. It is difficult to transmit light passing through a green color filter, it is difficult to transmit light through a red or blue color filter, and light passing through a blue color filter can pass through a red or green color filter. Is difficult. Therefore, by stacking two or more color filters, the amount of light reflected by the black matrix can be significantly reduced.

As described above, according to the present invention, since the overlapping portion of the color filter is used as a part of the black matrix, it is possible to prevent an increase in the number of manufacturing steps and to prevent crosstalk caused by reflection on the black matrix. Can be. The present invention can be applied not only to the IPS type liquid crystal display device but also to a TN type liquid crystal display device having a metal auxiliary capacitance electrode.

In a liquid crystal display device in which pixels having color filters of the same color are arranged in the vertical direction, the color filter is RG.
The stripes of B are formed, and the overlapping portions of the color filters are parallel to the data bus lines. In the case of the IPS type liquid crystal display device, by extending the overlapping portion of the color filter above the common electrode, crosstalk caused by reflection on the black matrix can be more reliably prevented.

The above-mentioned problem is caused by the liquid crystal 99 between the first substrate 80 and the second substrate 90 as illustrated in FIG.
In the liquid crystal display device configured by enclosing
A plurality of gate bus lines 81a formed on the surface of the first substrate 80 on the second substrate 90 side and the plurality of gate bus lines 81a formed on the surface of the first substrate 80 on the second substrate 90 side. Data bus lines 86a intersecting with
And 1 arranged in a pixel area defined by the gate bus line 81a and the data bus line 86a.
Or, a plurality of display electrodes 86d, one or a plurality of common electrodes 81d arranged in the pixel region apart from the display electrodes 86d, and the display electrodes 86d and the common electrodes on the first substrate 80. A first alignment film 88 formed so as to cover 81d, and a first alignment film 8 formed on the surface of the second substrate 90 on the first substrate 80 side.
8 and a second alignment film 91 having different electrical properties.

From the study of the present inventors, it has been found that image sticking occurs due to electric charges accumulated at the interface between the alignment film and the liquid crystal. Therefore, image sticking can be prevented by using an alignment film in which electric charges are not easily accumulated.
For example, when a film having a volume resistance of 10 ¹⁰ Ωcm is used as an alignment film, accumulation of electric charge at the interface between the alignment film and the liquid crystal is prevented. However, when both of the alignment films have a small volume resistance, the voltage holding ratio is reduced and the display performance is deteriorated.

According to the study of the present inventors, it has been found that the image sticking phenomenon of the liquid crystal display device depends on the alignment film on the substrate side on which the drive electrodes are formed. When an alignment film having a low volume resistance is used as the alignment film on the substrate side on which the drive electrode is formed, the amount of charge accumulated in the alignment film is reduced, and image sticking is prevented. On the other hand, the voltage holding characteristic is different between the alignment film on the first substrate side and the second film.
It was found that, among the alignment films on the substrate side, the voltage dependence of the alignment film was high. Therefore, in the present invention,
As the alignment film on the first substrate side on which the display electrode and the common electrode are formed, an alignment film having a low volume resistance, for example, an alignment film formed of polyamic acid is used. An alignment film having high resistance, for example, an alignment film made of polyimide is used.

In the TN type liquid crystal display device, since the drive electrodes (pixel electrode and counter electrode) are on different substrates, when the electric characteristics of the alignment film on one side and the alignment film on the other side are different, Electric charges are accumulated in one of the alignment films, and the display quality is significantly deteriorated. However, in the IPS type liquid crystal display device, since the drive electrodes (display electrodes and common electrodes) are provided on one substrate side, as described above, the electrical alignment between the alignment film on one substrate side and the alignment film on the other substrate side is performed. Even if one having different characteristics is used, the accumulation of charges in the alignment film is avoided, and the display quality does not deteriorate.

Conventionally, IPS type liquid crystal display devices include:
There are problems that the movement of liquid crystal molecules is slow and the applied voltage is high. As means for solving these problems, cyano-based liquid crystals are used. However, in such a case, it is known that the cyano-based liquid crystal is decomposed by an asymmetrical voltage caused by the charges accumulated in the alignment film.
Therefore, in order to prevent charges from being accumulated in the alignment film, it is necessary to use an alignment film having a relatively low resistance. However, as described above, if both the alignment film on the first substrate side and the alignment film on the second substrate side have a small resistance, the voltage holding ratio is reduced and the display is deteriorated. In the present invention, the one having a small volume resistance is used as the alignment film on the substrate side on which the drive electrode is formed,
By using an alignment film having a large volume resistance as the alignment film on the substrate side where the drive electrode is not formed, it is possible to use a cyano-based liquid crystal.

[0034]

Embodiments of the present invention will be described below with reference to the accompanying drawings. (First Embodiment) FIG. 1A is a plan view showing a liquid crystal display device according to a first embodiment of the present invention, and FIG.
It is sectional drawing by the AA of (a). FIG. 2 is also a diagram showing the pattern of the conductive layer of the liquid crystal display device. The solid line shows the pattern of the upper conductive layer, and the broken line shows the pattern of the lower conductive layer. FIGS. 1A and 2 each show one pixel region of a liquid crystal display device.

The liquid crystal display device of the present embodiment has a glass substrate 10 and a glass substrate 20 which are disposed opposite to each other, and a liquid crystal 29 which is sealed between the glass substrates 10 and 20.
And a polarizing plate (not shown) arranged below the glass substrate 10 and above the glass substrate 20, respectively. On the glass substrate 10, a plurality of gate bus lines 11a arranged in parallel with each other and a plurality of data bus lines 16a intersecting at right angles to the gate bus line 11a are formed. A plurality of rectangular areas defined by these gate bus lines 11a and data bus lines 16a are pixel areas. On the glass substrate 10, for example, 2400 pieces (800 ×
R, G, B), and 600 pixel regions are arranged in the vertical direction.

Each pixel region has a TFT 19, a single display electrode 16d arranged vertically in the center of the pixel region,
Two common electrodes 11c and 11d respectively arranged on both ends in the horizontal direction of the pixel region, and a gate bus line 11a
And a storage capacitor electrode 16e arranged so as to overlap therewith. The auxiliary capacitance electrode 16e forms an auxiliary capacitance together with the gate bus line 11a thereunder.

As shown in FIG. 2, the gate bus line 11
a, gate electrode 11b of TFT 19, common electrode 11c
Is formed in the lower conductive layer. The gate electrode 11b is connected to the upper gate bus line 11a of the pixel area, and the common electrodes 11c and 11d are connected to the lower gate bus line 11a. As shown in FIG. 1B, an interlayer insulating film 12 made of SiN is formed on these gate bus lines 11a, the gate electrode 11b of the TFT 19, and the common electrode 11c. Interlayer insulating film 12
An amorphous silicon film 13, a channel protection film 14, an amorphous silicon film 15 into which impurities are introduced, a drain electrode 16 b, and a source electrode 16 c constituting the TFT 19 are formed thereon.

The drain electrode 16b is connected to the data bus line 16a on the left side of the pixel area. The source electrode 16c extends in parallel with the gate bus line 11a and is connected to the upper end of the display electrode 16d. The protective film 1 made of SiN is formed on the upper conductive layer on which the data bus line 16a, the drain electrode 16b, the source electrode 16c, the display electrode 16d, and the auxiliary capacitance electrode 16e are formed.
The alignment film 1 is formed on the protective film 17.
8 are formed. Rubbing treatment is performed on the surface of the alignment film 18 in a direction substantially orthogonal to the display electrode 16d.

The alignment film 2 is also provided below the glass substrate 20.
1 is formed. The surface of the alignment film 21 is also rubbed in the same direction as the rubbing direction of the alignment film 18. A spherical or cylindrical spacer (not shown) is arranged between the glass substrates 10 and 20 so that the distance between the two is constant. In the case of a color liquid crystal display device, a color filter and a black matrix are formed on the glass substrate 20 side, but they are not shown in FIG.

FIG. 3 is a schematic diagram showing a driving method of the liquid crystal display device of the present embodiment. Here, four pixels arranged in the vertical direction are shown. Pixel A is a pixel immediately after data is written, pixel B is a pixel during data writing, pixel C
Is a pixel to which data is written next, and pixel D is a pixel to which data is written next to pixel C. Note that FIG.
Gate bus lines G1 to G5, data bus line D
1, D2, TFT1 to TFT4, display electrodes S1 to S4, and common electrodes C1 to C4 correspond to the gate bus line 1 of FIG.
1a, the data bus line 16a, the TFT 19, the display electrode 16d, and the common electrodes 11c, 11d.

In the liquid crystal display device, scanning signals are sequentially supplied to a plurality of gate bus lines G1, G2,... Arranged in the vertical direction from the top at a timing synchronized with the vertical synchronizing signal. Then, by supplying a data signal to the pixel to which the scan signal is supplied via the data bus lines D1, D2,..., Specific display data is written to a specific pixel.

In order to write data to the pixel B, a pulse signal (scanning signal) having a voltage of +15 V is supplied to the gate bus line G2 to turn on the TFT 2 for a predetermined time.
Further, a voltage in a range from -5 V to +5 V is supplied to the data bus line D1 as display data while the TFT 2 is on. At this time, the gate bus lines G1, G
4, a voltage of -10 V is applied to G5 to turn off TFT1 and TFT4 of pixel A and pixel D. Pixel B
Is set to 0V. That is, the voltage of the gate bus line G3 is set to 0V.

As shown in FIG. 3, each of the gate bus lines G1 to G
5 and the data bus line D1, when a voltage is applied,
When the FT2 is turned on, the display data (± 5) is displayed on the display electrode S2.
V signal is written. At this time, in the pixel A and the pixel D, since the gate bus lines G1 and G4 are both at −10 V, both the TFT1 and the TFT4 are in the off state. Therefore, the display data supplied to the data bus line D1 is not written to the pixels A and D.

In the pixel C, the gate voltage of the TFT 3 is 0 V
Therefore, when the voltage of the display data supplied to the data bus line D1 is negative, the TFT 3 is turned on, and the display data is written to the display electrode S3. However, since the display data is written to the pixel C in the next vertical synchronization period, even if the display data is written to the pixel C at the same time as the display data is written to the pixel B, Since the correct display data is written to the pixel C during the vertical synchronization period, the effect of the erroneous writing can be substantially ignored.

When the writing of the display data to the pixel B is completed, -1 is applied to the gate bus line G2 in the next vertical synchronization period.
0V is supplied, and +15 is applied to the gate bus line G3.
A voltage of V is supplied, and a voltage of 0 V is supplied to the gate bus line G4. As a result, the TFT 2 of the pixel B is turned off, and the display electrode S2 is in a so-called floating state. At this time, the voltage of the common electrode C2 changes from 0V to -10.
Although the voltage changes to V, an electric field having an intensity corresponding to the display data written in the display electrode S2 is generated between the display electrode S2 and the common electrode C2, and the display electrode S2 is kept in the floating state because the display electrode S2 is in a floating state. . Therefore, the liquid crystal molecules of the pixel B are oriented in a direction corresponding to the direction and intensity of the electric field, and the light transmittance of the pixel B is determined. The display electrode S2 and the common electrode C2
Next, the electric field strength between the gate bus line G2 and 0V
It is held until it becomes.

In the present embodiment, the display electrode 16d
(S1, S2,...) And common electrodes 11c, 11d (C
1, C2,...) Are different between data writing and data holding. However, if the number of gate bus lines is 600, for example, the same voltage difference is maintained for 598/600 times in one frame period.
The display electrode 16d (S1, S2,...) And the common electrode 11
The deterioration of the display due to the change in the potential difference from c, 11d (C1, C2,...) can be substantially ignored.

In the liquid crystal display device of the present embodiment, the common electrode 16d is connected to the gate bus line 11a,
Since a wiring that is conventionally required to keep the common electrode at a constant potential is unnecessary, a portion of the pixel region that contributes to display has a large area and a high aperture ratio. Therefore, a bright and high-contrast image can be displayed. Further, in the present embodiment, the common electrodes 11c and 11d are formed so as to partially overlap the data bus lines 16a.
There is also an advantage that there is no risk of light leaking from the space a.

(Second Embodiment) FIG. 4A is a plan view showing one pixel region of a liquid crystal display device according to a second embodiment of the present invention, and FIG. It is a figure which shows the pattern of the conductive layer of an apparatus, a solid line shows the pattern of an upper conductive layer, and the broken line shows the pattern of a lower conductive layer. Since the sectional view and the configuration of the upper glass substrate in the TFT portion are basically the same as those in the first embodiment, the sectional view and the illustration of the upper glass substrate are omitted here.

On the glass substrate 30, a plurality of gate bus lines 31a arranged in parallel with each other and a plurality of data bus lines 36a intersecting the gate bus lines 31a at right angles are formed. Each rectangular area defined by the gate bus line 31a and the data bus line 36a is a pixel area. In each pixel region, two TFTs 39a and 39b, one display electrode 36d vertically arranged in the center of the pixel region, and
Two common electrodes 36e and 36f respectively arranged on both sides in the horizontal direction of the pixel region, and common electrodes 36e and 36f arranged along the gate bus line 31a below the pixel region.
An auxiliary capacitance electrode 36g for electrically connecting between 36f and a common wiring 31c connected to the gate bus line 31a.
31d are formed.

In this embodiment, a gate bus line 31a, a common gate electrode 31b for TFTs 39a and 39b, and common wirings 31c and 31d are formed in a lower conductive layer, and a data bus line 36a and a TFT are formed in an upper conductive layer.
A drain electrode 36b and a source electrode 36c of 39a, a display electrode 36d, common electrodes 36e and 36f, an auxiliary capacitance electrode 36g, and a drain electrode 36h and a source electrode 36i of the TFT 39b are formed. And the source electrode 3
6c partially overlaps the upper gate bus line 31a of the pixel region, the common wiring 31c partially overlaps the left data bus line 36a and the common electrode 36e,
The common wiring 31d partially overlaps the right data bus line 36a and the common electrode 36f, and the auxiliary capacitance electrode 3
6g partially overlaps the lower data bus line 31a.

The TFT 39a includes a gate electrode 31b, a drain electrode 36b, and a source electrode 36c. The TFT 39b includes a gate electrode 31b, a drain electrode 36h, and a source electrode 36i.
In this example, the two TFTs 39a and 39b are both formed in the upper left part in the pixel area. FIG. 5 is a schematic diagram illustrating a driving method of the liquid crystal display device of the present embodiment. Here, four pixels arranged in the vertical direction are shown. Pixel A is a pixel immediately after data is written, and pixel B is
Is a pixel to which data is being written, pixel C is a pixel to which data is written next, and pixel D is a pixel to which data is written next to pixel C. The gate bus line G shown in FIG.
1 to G5, data bus lines D1, D2, TFT11, T
FT21, ..., TFT41, TFT12, TFT21, ..., TF
T42, display electrodes S1 to S4 and common electrodes C1 to C4
Are the gate bus line 31a, the data bus line 36a, the TFT 39a, the TFT 39b, and the display electrode 36d in FIG.
And the common electrodes 36e and 36f, respectively.

To write data to the pixel B, a +15 V pulse signal (scan signal) is applied to the gate bus line G2.
A voltage is applied to turn on the TFTs 21 and 22 for a fixed time. In addition, the data bus line D1 has TFT21,
While the TFT 22 is on, the display data is changed from -5V to +
Supply voltages in the range up to 5V. At this time, in order to turn off TFT11, TFT12, TFT41, and TFT42 of the pixel A and the pixel D, -1 is applied to the gate bus lines G1, G4.
A voltage of 0 V is applied. Also, the common electrode C2 of the pixel B
Is set to 0V, the voltage of the gate bus line G3 becomes 0V.
V.

As shown in FIG. 5, each of the gate bus lines G1 to G
5 and the data bus line D1, when a voltage is applied,
When the FT21 and the TFT22 are turned on, display data (signal in the range of ± 5 V) is supplied to the display electrode S2, and the common electrode C
2 is supplied with 0V. As a result, an electric field parallel to the substrate is generated between the display electrode S2 and the common electrode C2, the orientation direction of the liquid crystal molecules of the pixel B is changed, and the light transmittance of the pixel B is changed to the display electrode S2 and the common electrode C2. It changes according to the electric field strength between.

At this time, since the gate bus lines G1 and G4 of the pixel A and the pixel D are both -10V,
TFT11, TFT12, TFT41 and TFT42 are all in the off state. Therefore, the display data supplied to the data bus line D1 is not written to the pixels A and D. In the pixel C, the gate voltages of the TFTs 31 and 32 are 0 V. Therefore, when the voltage of the display data supplied to the data bus line D1 is negative, the TFTs 31 and 32
32 turns on, and display data is written to the display electrode S3. However, since the display data is written to the pixel C in the next vertical synchronization period, even if the display data is written to the pixel C at the same time when the display data is written to the pixel B, the next writing is performed. Since correct display data is written to the pixel C during the vertical synchronization period, the effect of the erroneous writing can be substantially ignored.

When the writing of the display data to the pixel B is completed, -1 is applied to the gate bus line G2 in the next vertical synchronization period.
0V is supplied, and +15 is applied to the gate bus line G3.
A voltage of V is supplied, and a voltage of 0 V is supplied to the gate bus line G4. Thereby, the TFTs 21 and TF of the pixel B are
T22 is turned off, and the display electrode S2 and the common electrode C
2 is in a floating state. Therefore, these electrodes S2,
The charge at the time of data writing is held in C2.

In this embodiment, only during data writing, the TFT 39b (TFT12, TFT22,...) Is turned on and the voltage of the common electrodes 36e and 36f is set to 0V. 36e and 36f are electrically disconnected from the gate bus line 31a. For this reason, in addition to obtaining the same effect as in the first embodiment, there is an advantage that a change in potential between data writing and data holding can be avoided.

In the present embodiment, the source electrode 36c partially overlaps the upper gate bus line 31a of the pixel region, the common wiring 31c partially overlaps the left data bus line 36a and the common electrode 36e, and Since the wiring 31d partially overlaps the right data bus line 36a and the common electrode 36f and the auxiliary capacitance electrode 36g partially overlaps the lower gate bus line 31a, a region near the data bus line 36a and the gate bus line 31a is provided. Light leakage from the light source can be more reliably avoided.

Further, in this embodiment, since there is only an alignment film on the display electrode 36d and the common electrodes 36e and 36f, a protective film (insulating film) exists between the common electrode and the alignment film. As compared with the first embodiment, there is an advantage that an electric field is easily applied to the liquid crystal, and display degradation due to accumulation of electric charges at the interface between the insulating film and the alignment film on the electrode is avoided.

(Modification of Second Embodiment) FIG.
FIG. 15 is a schematic diagram showing a modification of the liquid crystal display device of the embodiment. In this example, a TFT (TFT1) interposed between the data bus line (D1) and the display electrodes (S1, S2,...)
1, TFT21, TFT31, TFT41) are arranged on the upper left side of the pixel area, and the TFTs interposed between the gate bus lines (G1, G2,...) And the common electrodes (C1, C2,.
(TFT12, TFT22, TFT32, TFT42) are arranged at the lower left of the pixel area.

The operation of this liquid crystal display device is the same as that of the second embodiment, and the description is omitted here. (Third Embodiment) FIG. 7 is a plan view showing a liquid crystal display device according to a third embodiment of the present invention, FIG. 8 is a plan view showing a conductive layer pattern of a lower glass substrate, and FIG. It is sectional drawing by the BB line of FIG.

The liquid crystal display device according to the present embodiment comprises a glass substrate 40 and a glass substrate 50 disposed opposite to each other, a liquid crystal 59 sealed between the glass substrates 40 and 50,
It is composed of polarizing plates (not shown) arranged below the glass substrate 40 and above the glass substrate 50, respectively. On the glass substrate 40, a plurality of gate bus lines 41a arranged in parallel with each other, and a common wiring 41b arranged in parallel with these gate bus lines 41a.
And a plurality of data bus lines 46a crossing the gate bus line 41a at right angles. A plurality of rectangular areas defined by the gate bus lines 41a and the data bus lines 46a are pixel areas.
The pixel regions are arranged, for example, at a pitch of 100 μm in the horizontal direction and at a pitch of 300 μm in the vertical direction.

Each pixel region has a TFT 49 and one display electrode 46e vertically arranged at the center of the pixel region.
And two common electrodes 41d and 41e arranged on both sides in the horizontal direction of the pixel region, an auxiliary capacitance electrode 41f arranged above the pixel region, and an auxiliary capacitance electrode 46f arranged below the pixel region. Are provided. Gate bus line 41a, common wiring 41b, gate electrode 4 of TFT 49
1c, common electrodes 41d and 41e and auxiliary capacitance electrode 41
f is formed on the lower conductive layer. And T
The gate electrode 41c of the FT49 is a gate bus line 41a.
The common electrodes 41d and 41e are both connected to the common wiring 41b.
1f is connected to the upper end of the common electrode 41e.

On the other hand, the data bus line 46a and the TFT 4
Nine drain electrodes 46b and source electrodes 46c, display electrodes 46e, and auxiliary capacitance electrodes 46f are all formed in the upper conductive layer. The drain electrode 46b is connected to the data bus line 46a, the source electrode 46c extends in the horizontal direction and is connected to the display electrode 46d, and the auxiliary capacitance electrode 46f is connected to the lower end of the display electrode 46e.

An interlayer insulating film (not shown) is formed between the lower conductive layer and the upper conductive layer, and an alignment film (not shown) is formed on the upper conductive layer. Auxiliary capacitance electrode 4
1f and the source electrode 46c thereabove, and the auxiliary capacitance electrode 46f and the common wiring 41b therebelow form an auxiliary capacitance. Further, on the lower surface side of the glass substrate 50, a black matrix 51 made of a metal or a metal compound such as chromium oxide having a low reflectance is formed in parallel with the data bus line 46a. In this example, the width W1 of the data bus line 46a is 4 μm, and the width W2 of the black matrix 51 is 8 μm. On the lower surface side of the glass substrate 50, a blue color filter 52B, a red color filter 52R, and a green color filter 52G are formed. In this example, for example, 3n
A blue color filter 52B is formed in the pixel area of the (n is 1, 2,...) Column, and a red color filter 52R is formed in the pixel area of the 3n + 1th column.
A green color filter 52G is formed in the pixel area on the + 2nd column. Color filters 52R, 52G, 52B
Has a width W4 of 110 .mu.m.

As shown in FIG. 9, each color filter 52
B, 52R, and 52G slightly extend to the next pixel through the lower side of the black matrix 51. In other words, below the black matrix 51, there are blue and green color filters 52B and 52G, and blue and red color filters 52B.
B, 52R or green and red color filters 52G, 52R
Are superimposed. The width W3 of the overlapping portion of the two color filters is 10 μm and the black matrix 5
1 is set wider than the width W2. The thickness of each of the color filters 52B, 52R, and 52G is 0.1 to 2 μm.
m. Here, the color filters 52B, 52R,
The thickness of 52G is 1 μm.

Referring to FIG. 10, the effect of the liquid crystal display of the present embodiment will be described. In the case of the IPS type liquid crystal display device as in this embodiment, the orientation direction of the liquid crystal molecules is controlled by the electric field between the display electrode 46e and the common electrodes 41d and 41e. However, between the common electrode 41d and the left data bus line 46a,
Since the alignment direction of the liquid crystal molecules existing between the display electrode 46e and the data bus line 46a on the right side thereof cannot be controlled by the electric field between the display electrode 46e and the common electrodes 41d, 41e, the gap between them (about (2 μm width), the light incident on the liquid crystal layer may be transmitted to the opposite side and leak light.

In this embodiment, since two types of color filters (color filters 52R and 52G in FIG. 10) having different colors are overlapped on the lower side of the black matrix 51, the light enters from the lower side of the glass substrate 40. If light leaks to the upper side of the glass substrate 50, the leaked light follows the path indicated by the arrow in FIG. That is,
Light incident on the liquid crystal layer from between the common electrode 41d and the data bus line 46a is transmitted to the color filters 52R and 52G.
Are reflected by the surface of the black matrix 51 through the overlapping portion of the black matrix 51, and the reflected light is transmitted through the color filters 52R and 52R.
The light passes through the overlapping portion of G and is reflected by the common electrode 41d, and the reflected light passes through the color filters 52R and 52G and is emitted to the glass substrate 50 side. In this case, the leaked light passes through the overlapping portion of the color filters 52R and 52G three times.

A cold cathode fluorescent lamp generally used as a backlight of a liquid crystal display device has high peaks of wavelengths corresponding to red, green and blue, and has a red color filter 52.
The light transmitted through R is a green or blue color filter 52.
G, 52B easily absorbs. Similarly, light transmitted through the green color filter 52G is easily absorbed by the red or blue color filters 52R and 52B, and light transmitted through the blue color filter 52B is absorbed by the red or green color filters 52R and 52G. Cheap. Therefore, in the liquid crystal display device of the present embodiment, the intensity of the leaked light is significantly reduced, and a decrease in display quality is avoided.

FIG. 11 shows a liquid crystal display device of this embodiment,
FIG. 7 is a diagram showing the results of measuring the amount of light leakage due to crosstalk in a conventional liquid crystal display device in which a black matrix is formed of a metal film and in a conventional liquid crystal display device in which a black matrix is formed of a resin. However, the luminance of the white display portion is set to 100. As shown in FIG. 10, when only the metal black matrix (BM) is used, the luminance is about 4.
3. The brightness was about 1.6 when only the resin black matrix (BM) was used, whereas the brightness was extremely low at 0.1 or less in the present embodiment. From this, it was confirmed that the present embodiment is extremely effective in reducing crosstalk.

(Fourth Embodiment) FIG. 12 is a plan view showing a liquid crystal display device according to a fourth embodiment of the present invention, and FIG. 13 shows a pattern of a conductive layer on a lower substrate of the liquid crystal display device. FIG. 14 is a sectional view taken along line CC of FIG. However, FIG. 12 shows only one black matrix 71 and the data bus lines 66 on both sides.
The illustration of the black matrix on a is omitted.

The liquid crystal display device of the present embodiment comprises a glass substrate 60 and a glass substrate 70 which are arranged to face each other, a liquid crystal 79 sealed between these glass substrates 60 and 70,
A polarizing plate (not shown) is arranged below the glass substrate 60 and above the glass substrate 70, respectively. On the glass substrate 60, a plurality of gate bus lines 61a parallel to each other and a plurality of data bus lines 66 intersecting the gate bus lines 61a at right angles.
a is formed. These gate bus lines 61a
A plurality of rectangular areas defined by the data bus lines 66a are pixel areas. In the present embodiment.
The horizontal pitch of the pixel region is 100 μm, and the vertical pitch is 300 μm.

In each pixel region, a TFT 69, an auxiliary capacitance electrode 61c, and a pixel electrode 67 are formed. The gate bus line 61a, the gate electrode 61b of the TFT 69, and the auxiliary capacitance electrode 61c are all formed in the lower conductive layer. As shown in FIG. 14, an interlayer insulating film 62 is formed on these gate bus lines 61a, gate electrodes 61b and auxiliary capacitance electrodes 61c.
2 are connected to the data bus lines 66a, T
The drain electrode 66b and the source electrode 66c of the FT 69 are formed. A protection film 63 is formed on the data bus line 66a, the drain electrode 66b, and the source electrode 66c, and an ITO (in) is formed on the protection film 63.
A pixel electrode 67 made of dium-tin oxide (indium tin oxide) is formed. Then, an alignment film 68 is formed on the pixel electrode 67.

The gate electrode 61b of the TFT 69 is connected to the gate bus line 61a, and the drain electrode 66b
Are connected to the data bus line 66a. Also, T
The source electrode 66c of the FT 69 is electrically connected to the pixel electrode 67 via a contact hole (not shown). The auxiliary capacitance electrode 61c has a shape of “H”, and has a horizontal portion having a width of 15 μm and a vertical portion having a width of 4 μm. The distance between the vertical portion of the auxiliary capacitance electrode 61c and the data bus line 66a is, for example, 2 μm.

On the other hand, a black matrix 71 is formed below the glass substrate 70. The black matrix 71 is formed above the data bus line 66a with a width larger than the width of the data bus line 66a. A red color filter 72R, a green color filter 72G, and a blue color filter 72B are formed below the glass substrate 70. In the present embodiment, a red color filter 72R is provided in the pixel area of the 3n (n is 1, 2,...) Column and a green color filter 72G is provided in the pixel area of the 3n + 1th column. Is provided with a blue color filter 72B. Each of the color filters 72R, 72G, and 72B extends under the black matrix 71 to an adjacent pixel region.
That is, two types of color filters having different colors overlap on the lower side of the black matrix 71. A counter electrode 73 made of ITO is formed below the color filters 71R, 71G, and 72B, and an alignment film 74 is formed below the counter electrode 73.

In the liquid crystal display device of the present embodiment thus configured, the orientation of liquid crystal molecules is controlled by the voltage applied between the pixel electrode 67 and the counter electrode 73, so that each pixel region has Control light transmittance.
In this embodiment, the width W1 of the data bus line 66a is 4 μm, the width W2 of the black matrix is 8 μm,
The width W4 of each color filter 72R, 72G, 72B is 1
30 μm, the width W3 of the overlapping portion of the color filter is 15
μm. The overlapping portion of the color filter covers the region where the TFT 69 is formed and the region between the vertical portion of the auxiliary capacitance electrode 61c and the data bus line 66a.

Also in the present embodiment, the region where the TFT 69 is formed and the region between the auxiliary capacitance electrode 61c and the data bus line 66a are covered by the overlapping portions of the color filters. In the same manner as described above, light leakage can be reduced, and a favorable display with high contrast can be realized. (Fifth Embodiment) FIG. 15A is a plan view showing a liquid crystal display device according to a fifth embodiment of the present invention, and FIG. 15B is a cross section taken along line DD of FIG. FIG.

The liquid crystal display device of the present embodiment comprises a glass substrate 80 and a glass substrate 90 which are arranged to face each other, a liquid crystal 99 sealed between these glass substrates 80 and 90,
A polarizing plate (not shown) is provided below the glass substrate 80 and above the glass substrate 90. On the glass substrate 80, a plurality of gate bus lines 81a and a plurality of common electrodes 81b arranged in parallel with each other and a data bus line 86a intersecting the gate bus line 81a at right angles are formed. . These gate bus lines 81a and data bus lines 86a
Each of a plurality of rectangular areas defined by is a pixel area.

In each pixel region, a TFT 89, two display electrodes 86d arranged in the vertical direction, and three common electrodes arranged in parallel with the display electrode 86d at a predetermined distance from the display electrode 86d. 81d and two display electrodes 86d
And a storage capacitor electrode 81e that electrically connects the upper ends of the three common electrodes 81d.

Gate bus line 81a, common wiring 81
b, gate electrode 81c and common electrode 81 of TFT 89
d is formed in the lower wiring layer. The gate electrode 81c is connected to a gate bus line 81a, and the common electrode 81d is connected to a common wiring 81b.
These gate bus lines 81a, common lines 81b,
On the gate electrode 81c and the common electrode 81d, FIG.
As shown in (b), an interlayer insulating film 82 is formed. On the interlayer insulating film 82, an amorphous silicon film 83, a channel protection film 84, an amorphous silicon film 85, a drain electrode 86b, and a source electrode 86c that constitute the TFT 89 are formed. The drain electrode 86b is connected to the data bus line 86a on the left side of the pixel area. The source electrode 86c is connected to the gate bus line 8
It extends parallel to 1a and is connected to two display electrodes 86d.

On the upper wiring layer on which the data bus line 86a, the drain electrode 86b, the source electrode 86c, the display electrode 86d and the auxiliary capacitance electrode 86e are formed,
A protective film (insulating film) 87 made of iN is formed,
On the protective film 87, an alignment film 88 is formed to a thickness of 500 °. Rubbing treatment is performed on the surface of the alignment film 88 in a direction substantially orthogonal to or substantially parallel to the display electrode 86d (for example, a direction forming an angle of 75 ° or 15 °). In this embodiment mode, the alignment film 88 having a volume resistance of about 10 ¹⁰ to 10 ¹¹ Ωcm is used. As such an alignment film, for example, a polyamic acid-based alignment film can be used.

The alignment film 9 is also provided below the glass substrate 90.
1 is formed to a thickness of 500 °. This alignment film 91
Is also rubbed in the same direction as the rubbing direction of the alignment film 88. However, the alignment film 91 needs to be formed of a material having a higher volume resistance than the alignment film 88. In the present embodiment, the volume resistance of the alignment film 91 is about 10 ¹³ Ωcm. As such an alignment film, for example, an alignment film formed of a soluble polyimide can be used. Examples of the soluble polyimide include a polyimide having a 5-membered ring proposed by JSR. In addition, even with a polyamic acid-based alignment film, it is possible to further increase the voltage holding characteristic by setting a high firing temperature. Further, as an alignment film having a high voltage holding characteristic, an inorganic alignment film, for example, a silane coupling agent (such as OA-003) which is a silicon-based inorganic alignment film manufactured by Nissan Chemical Industries, Ltd.
, Good characteristics can be realized.

Further, in this embodiment, a liquid crystal whose volume resistance is close to that of the alignment film 88 is used. For example, a liquid crystal having a volume resistance of about 10 ¹⁰ Ωcm is CN
There is a (cyano) -based liquid crystal. In the liquid crystal display device of the present embodiment configured as described above, the alignment film 88 having a small volume resistance is used on the substrate 80 side, and since the liquid crystal 99 and the alignment film 88 have close volume resistance, the alignment film 88 It is possible to prevent charges from being accumulated between the liquid crystal 99 and the liquid crystal. As described above, it is generally known in electromagnetism that charges are hardly accumulated at the interface of one layer having a close volume resistance.

Further, the alignment film 91 on the substrate 90 side has a high voltage holding ratio since the volume resistance is large. Therefore, the display data written between the display electrode 86d and the common electrode 81d is held for a long time, and the deterioration of the display quality is avoided.
Hereinafter, the result of actually manufacturing the liquid crystal display device of the present embodiment and examining the presence or absence of image sticking will be described in comparison with a comparative example.

As an example and a comparative example, an IPS type liquid crystal display device having the structure shown in FIG. 15 was manufactured by using an alignment film having a volume resistance shown in Table 1 below and a liquid crystal. Then, on the liquid crystal display devices of these Examples and Comparative Examples, white square images on a black background were displayed for 48 hours. Thereafter, gray (16 gradations out of 64 gradations) was displayed on the entire screen. When burn-in occurs, the brightness of the white display portion becomes brighter than the brightness of the black display portion. The difference between the brightness of the white display portion and the brightness of the black display portion is shown in Table 1 below as a percentage.

[0085]

[Table 1]

As can be seen from Table 1, Examples 1 and 2
In this case, the seizure was low, and when the liquid crystal having the same volume resistance as that of the alignment film 88 was used, the value was as extremely low as 3%. on the other hand,
Comparative example 1 having basically the same configuration as the conventional liquid crystal display device
In this case, the seizure was as high as 20%.

Generally, in a TN liquid crystal display device, an alignment film having a high volume resistance is used. this is,
This is to increase the voltage holding ratio. However, even if the voltage holding ratio is increased, electric charges accumulate at the interface between the alignment film and the liquid crystal and image sticking occurs, thereby significantly deteriorating the display quality. Therefore, in the present embodiment, as described above, the volume resistance of the alignment film 88 on the glass substrate 80 side on which the display electrode 86d and the common electrode 81d are formed is reduced. In this case, since a material having a high volume resistance is used as the alignment film 91 on the glass substrate 90 side, deterioration in display quality due to a decrease in voltage holding ratio can be avoided. Hereinafter, a result of examining the voltage holding ratio will be described.

As shown in FIG. 16, the driving electrode 101
Prepare two glass substrates on which a and 101b are formed,
On each of the electrodes 101a, 101b, an alignment film 102a, 10
2b was applied, and two glass substrates were arranged in parallel such that the electrodes 101a and 101b faced each other, and a liquid crystal 103 was sealed between the two substrates. Note that the alignment films 102a, 1
As 02, an alignment film having a volume resistance shown in Table 2 below was used.

A voltage was applied between the electrodes 101a and 101b, and the voltage holding ratio was measured. The voltage holding ratio is determined by the electrode 101
A voltage of 5 V was applied between a and 101b, and the voltage after one frame time (16 msec) was measured and shown as a percentage.

[0090]

[Table 2]

As a result, as shown in Table 2, the alignment film 10
When an alignment film having a volume resistance of 10 ¹⁰ Ωcm is used as 2a and 102b, the voltage holding ratio is about 70%, and the volume resistance generally used in the conventional liquid crystal display device is 10%.
The voltage holding ratio when using an orientation film of ¹³ Ωcm is about 9
8.5%. In the present invention, an alignment film having a low voltage holding ratio is used as an alignment film on a substrate (glass substrate 110) on which a display electrode and a common electrode are formed, and an alignment film having a high voltage holding ratio is formed on a counter substrate (glass substrate 120). ) Side is used as the alignment film. This avoids burning of the liquid crystal display device.

[0092]

As described above, according to the first to fourth aspects of the present invention, by employing a structure in which the common electrode is connected to the gate bus line, the aperture ratio is improved, and the brightness and contrast are high. Images can be displayed.
According to the invention of claims 5 to 8, a reference voltage for determining a potential of the common electrode at the time of display data writing, a first voltage for turning on the thin film transistor, and the thin film transistor are applied to the gate bus line. Is supplied over time, whereby the liquid crystal display device having the common electrode connected to the gate bus line can be driven.

According to the ninth to twelfth aspects of the present invention, at least two or more color filters are formed on a black matrix made of a metal or a metal compound, and the width of the overlapping portion of the color filters is formed. Are set wider than the width of the black matrix, so that light leakage is prevented, and deterioration of display quality due to crosstalk is avoided.

According to the thirteenth to fifteenth aspects of the present invention, the electrical characteristics of the first alignment film formed on the first substrate and the second alignment film formed on the second substrate are different. Because of the difference, image sticking due to accumulation of charges in the alignment film is avoided, and the voltage holding characteristics are good, and a high-quality image can be displayed.

[Brief description of the drawings]

FIG. 1A is a plan view showing a liquid crystal display device according to a first embodiment of the present invention, and FIG.
It is sectional drawing by the A line.

FIG. 2 is a diagram illustrating a pattern of a conductive layer of the liquid crystal display device according to the first embodiment.

FIG. 3 is a schematic diagram illustrating a driving method of the liquid crystal display device according to the first embodiment.

FIG. 4A is a plan view illustrating a liquid crystal display device according to a second embodiment of the present invention, and FIG. 4B is a diagram illustrating a pattern of a conductive layer of the liquid crystal display device.

FIG. 5 is a schematic diagram illustrating a driving method of the liquid crystal display device according to the second embodiment.

FIG. 6 is a schematic diagram illustrating a modification of the liquid crystal display device according to the second embodiment.

FIG. 7 is a plan view showing a liquid crystal display device according to a third embodiment of the present invention.

FIG. 8 is a plan view showing a conductive layer pattern on a lower glass substrate of a liquid crystal display device according to a third embodiment.

FIG. 9 is a sectional view taken along line BB of FIG. 7;

FIG. 10 is a schematic diagram illustrating an effect of the third embodiment.

FIG. 11 shows light due to crosstalk between the liquid crystal display device of the third embodiment, a conventional liquid crystal display device having a black matrix formed of a metal film, and a conventional liquid crystal display device having a black matrix formed of a resin. It is a figure showing the result of having measured the amount of leaks.

FIG. 12 is a plan view showing a liquid crystal display device according to a fourth embodiment of the present invention.

FIG. 13 is a plan view showing a pattern of a conductive layer on a lower substrate of a liquid crystal display device according to a fourth embodiment.

FIG. 14 is a sectional view taken along line CC of FIG. 12;

FIG. 15A is a plan view showing a liquid crystal display device according to a fifth embodiment of the present invention, and FIG.
It is sectional drawing by the DD line of (a).

FIG. 16 is a schematic diagram showing an apparatus for measuring a voltage holding ratio of an alignment film.

17 (a) is a plan view showing a conventional IPS type liquid crystal display device, and FIG. 17 (b) is an EE of FIG. 17 (a).
It is sectional drawing by a line.

FIGS. 18A and 18B are schematic diagrams illustrating the operation of the IPS type liquid crystal display device.

FIGS. 19A and 19B are schematic diagrams illustrating the occurrence of crosstalk.

FIG. 20 is a plan view showing an example of a display pattern in which image sticking occurs remarkably.

[Explanation of symbols]

10, 20, 30, 40, 50, 80, 90, 110,
120 glass substrate, 11a, 31a, 41a, 61a, 81a, 111a
Gate bus line, 11b, 41c, 61b Gate electrode, 11c, 11d, 36e, 36f, 41d, 41e, 8
1d, 111d common electrode, 16a, 36a, 46a, 86a, 116a data bus line, 16b, 36b, 46b drain electrode, 16c, 36c, 46c source electrode, 16d, 36d, 46e, 86d, 116d display electrode, 18, 21 , 68, 74, 88, 91, 118, 123
Alignment film, 19, 39a, 39b, 49, 69, 89, 119 T
FT, 29, 49, 79, 99, 129 liquid crystal, 31c, 31d, 41b, 81b, 111b common wiring, 51, 71 black matrix, 52R, 52G, 52B, 72R, 72G, 122 color filter, 61c auxiliary capacitance electrode, 67 pixel electrode.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme court ゛ (Reference) G09G 3/20 611 G09G 3/20 611D 5C080 642 642D 3/36 3/36 (72) Inventor Takashi Sasababayashi Kanagawa (1-1) Kamijidanaka 4-1-1, Nakahara-ku, Kawasaki-shi, Japan Inside the Fujitsu Co., Ltd. (72) Inventor Yohei Nakanishi 4-1-1 Kamikadanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Person Hisashi Yamaguchi Hisashi F-term (reference) 2-1, 1-1 Kagamidanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture GA13 HA06 LA03 LA17 LA30 2H092 GA14 GA17 GA25 JA24 JB02 JB16 JB22 KB23 NA07 PA02 PA06 PA08 PA13 QA06 2H093 NA16 NA43 NB23 NC34 ND04 ND08 ND12 ND 15 NE03 NE04 NE06 NF04 5C006 AA22 BB16 BC06 FA34 FA36 FA54 FA56 GA03 5C080 AA10 BB05 DD03 DD10 DD29 FF11 JJ02 JJ05 JJ06

Claims (15)

[Claims] 1. A liquid crystal display device in which liquid crystal is sealed between a first substrate and a second substrate, wherein a plurality of liquid crystals are formed on a surface of the first substrate on the side of the second substrate. A plurality of data bus lines formed on a surface of the first substrate on the side of the second substrate and intersecting the gate bus lines; an n-th (n is 1, 2,...) The gate bus line, n
+ 1st gate bus line, mth (m is 1,
A display electrode disposed in a pixel area defined by the (2,...) Data bus line and the (m + 1) th data bus line; a gate electrode electrically connected to the nth gate bus line; An electrode electrically connected to the m-th data bus line, a thin-film transistor having a source electrode electrically connected to the display electrode, and a thin-film transistor disposed apart from the display electrode, and connected to the (n + 1) -th gate bus line. A liquid crystal display device comprising: a common electrode electrically connected; 2. The data bus line according to claim 1, wherein both the display electrode and the common electrode are arranged in parallel with the data bus line, and the common electrode partially overlaps the data bus line. Liquid crystal display. 3. A liquid crystal display device in which liquid crystal is sealed between a first substrate and a second substrate, comprising: a plurality of gate bus lines formed on a surface of the first substrate on the side of the second substrate; A plurality of data bus lines formed on a surface of the first substrate on the side of the second substrate and intersecting the gate bus line; and an n-th (n is 1, 2,...) Gate bus line , N
+ 1st gate bus line, mth (m is 1,
A display electrode disposed in a pixel area defined by the (2,...) Data bus line and the (m + 1) th data bus line; a gate electrode electrically connected to the nth gate bus line; A first thin film transistor having an electrode electrically connected to the m-th data bus line, and a source electrode electrically connected to the display electrode; a common electrode spaced apart from the display electrode; A second thin film transistor in which an electrode is electrically connected to the nth gate bus line, a drain electrode is electrically connected to the (n + 1) th gate bus line, and a source electrode is electrically connected to the common electrode. A liquid crystal display device comprising: 4. The first thin film transistor and the second thin film transistor
4. The liquid crystal display device according to claim 3, wherein a gate electrode with the thin film transistor is formed of a common electrode. 5. A plurality of gate bus lines, a plurality of data bus lines intersecting with the gate bus lines, and one of the two substrates arranged opposite to each other.
n-th (n is 1, 2,...) gate bus lines, n
+ 1st gate bus line, mth (m is 1,
2,...), A display electrode disposed in a pixel region defined by the (m + 1) th data bus line, and a gate electrode electrically connected to the nth gate bus line. An electrode is electrically connected to the m-th data bus line, a source electrode is disposed apart from the display electrode and a thin film transistor electrically connected to the display electrode, and the n-th gate bus line is connected to the n + 1-th gate bus line. A method for driving a liquid crystal display device having a common electrode electrically connected thereto, comprising: a reference voltage for determining a potential of the common electrode at the time of writing display data; Wherein the first voltage and the second voltage for turning off the thin film transistor are supplied over time. Movement method. 6. When writing display data to a pixel connected to the n-th gate bus line, the n
A first gate bus line having the first voltage;
6. The method according to claim 5, wherein a + 1st gate bus line is used as the reference potential, and other gate bus lines are used as the second voltage. 7. A plurality of gate bus lines, a plurality of data bus lines intersecting with the gate bus lines, and one of the two substrates arranged opposite to each other.
n-th (n is 1, 2,...) gate bus lines, n
+ 1st gate bus line, mth (m is 1,
2,...) And a display electrode disposed in a pixel region defined by the (m + 1) th data bus line, a gate electrode electrically connected to the nth gate bus line, and a drain electrode. A first thin film transistor having an electrode electrically connected to the m-th data bus line, a source electrode electrically connected to the display electrode, a common electrode disposed apart from the display electrode, and a gate. A second thin film transistor in which an electrode is electrically connected to the nth gate bus line, a drain electrode is electrically connected to the (m + 1) th data bus line, and a source electrode is electrically connected to the common electrode. In the method of driving a liquid crystal display device, the potential of the common electrode is determined when the display data is written to the gate bus line. And supplying a reference voltage, a first voltage for turning on the first thin film transistor and the second thin film transistor, and a second voltage for turning off the first thin film transistor and the second thin film transistor over time. Driving method for a liquid crystal display device. 8. When writing display data into a pixel connected to the n-th gate bus line, the n
A first gate bus line having the first voltage;
8. The method according to claim 7, wherein a (+1) th gate bus line is used as the reference potential, and other gate bus lines are used as the second voltage. 9. A liquid crystal display device comprising a liquid crystal sealed between a first substrate and a second substrate, wherein the liquid crystal display device displays an image by individually controlling the light transmittance of a plurality of pixel regions. The substrate has a plurality of data bus lines and a plurality of gate bus lines that define the pixel region. The second substrate has a black matrix that blocks light between the pixel regions, A color filter that determines a color of transmitted light for each of the color filters. The color filter extends from a pixel area to an adjacent pixel area through the black matrix, and has at least two colors on the black matrix. A liquid crystal display device covered by a filter, wherein a width of an overlapping portion of the two color filters is wider than a width of the black matrix. 10. The device according to claim 9, wherein the first substrate has a display electrode and a common electrode for generating an electric field in a direction parallel to the first substrate for each pixel region. Liquid crystal display. 11. The liquid crystal according to claim 9, wherein the first substrate has a metal auxiliary capacitance electrode and a pixel electrode, and the second substrate has a counter electrode. Display device. 12. The color filter includes a red (R) color filter, a green (G) color filter, and a blue (B) color filter, each of which is formed in a stripe shape, and an overlapping portion of the color filters is formed by the data bus. The liquid crystal display device according to claim 9, wherein the liquid crystal display device is parallel to the line. 13. A liquid crystal display device comprising liquid crystal sealed between a first substrate and a second substrate, wherein a plurality of liquid crystals are formed on a surface of the first substrate on the second substrate side. A gate bus line, a plurality of data bus lines formed on a surface of the first substrate on the side of the second substrate and intersecting the gate bus line, partitioned by the gate bus line and the data bus line A display electrode disposed in the pixel region, a common electrode disposed apart from the display electrode in the pixel region, and a first substrate formed to cover the display electrode and the common electrode. A first alignment film formed on the first substrate side of the second substrate, and a second alignment film having an electrical property different from that of the first alignment film. Liquid crystal display device. 14. The liquid crystal display device according to claim 13, wherein a volume resistance of the first alignment film is smaller than a volume resistance of the second alignment film. 15. The liquid crystal display device according to claim 14, wherein a volume resistance of the liquid crystal is closer to a volume resistance of the first alignment film than to a volume resistance of the second alignment film.