JP2000195846A - Dry etching method and dry etching apparatus - Google Patents

Abstract

(57) [Problem] To dry-etch a film containing Pt or PZT in a parallel plate dry etching apparatus,
Simplifies cleaning of electrodes in a dry etching apparatus. SOLUTION: At the time of cleaning, a high frequency power and a low frequency power are simultaneously supplied to a counter electrode facing an electrode supporting a substrate to be processed in a dry etching apparatus,
By displacing the plasma to a position near the substrate to be processed, impurities accumulated on the counter electrode are removed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to a semiconductor device, and more particularly to a method for manufacturing a semiconductor device including a dry etching process. The dry etching process is widely used in the manufacture of general semiconductor devices. In dry etching, an etching gas is introduced into a reaction chamber holding a substrate to be etched, and plasma is formed to excite etching gas molecules to form active molecular species or ions.

In such a dry etching technique, it is important to form plasma stably in a reaction chamber. On the other hand, in recent years, various materials have been used for manufacturing semiconductor devices, and accordingly, various types of gases have been used for plasma formation. As a result, depending on the combination of the semiconductor material and the type of etching gas, highly adsorbable particles may be formed in the reaction chamber. In such a case, problems such as unstable plasma formation or the formation of a defect due to a fall of an adhered substance on a substrate are caused.

[0003]

2. Description of the Related Art FIG. 1 shows a configuration of a conventional typical parallel plate electrode type dry etching apparatus 10. As shown in FIG. Referring to FIG. 1, a dry etching apparatus 10 includes a pair of opposed electrodes 12A and 12B in a reaction chamber 11 having an inlet port 11A and an exhaust port 11B.
The substrate 13 to be etched is provided on the main surface facing B
Is held.

The reaction chamber 11 is evacuated at the exhaust port 11B, and furthermore, Cl gas is introduced from the introduction port 11A.
₂ . An etching gas such as CF ₄ or C ₄ F ₈ is introduced. Further, by supplying high-frequency power of typically 27.12 MHz from the high-frequency power supply 14A to the electrode 12B via the matching unit 14B, plasma between the electrodes 12A and 12B is generated in the reaction chamber 11. It is formed.

At this time, the electrode 12 for holding the substrate 13
A is supplied with a low-frequency bias of typically several hundred kHz from a low-frequency power supply 15A via a matching unit 15B.
The energy of ions incident on 3 is controlled. Due to the formation of the plasma, the etching gas is dissociated in the plasma, and adsorbable neutral particles and ions for promoting the etching reaction are formed. When the neutral particles and ions reach the substrate 13, the substrate 13 On 13, etching having a desired high anisotropy is realized.

Further, a magnet 11C for generating a magnetic field for confining the formed plasma is disposed outside the reaction chamber 11, and an electrostatic force for holding the substrate 13 on the electrode 12A is provided on the electrode 12A. A DC power supply 16A forming a chuck and a filter 16B including a DC blocking capacitor are connected.

[0007]

Although the dry etching apparatus 10 having the structure shown in FIG. 1 is widely used in the manufacturing process of various semiconductor devices, it is accelerated by an electric field perpendicular to the main surface of the electrode 12A. Ions collide with the substrate 13, and the particles sputtered by the ions collide with the counter electrode 12 </ b> B.
If it adheres, the formation of plasma between the electrodes 12A and 12B becomes unstable. Further, when the particles deposited on the electrode 12B fall on the substrate 13, a defect is introduced into a semiconductor device formed on the substrate 13.
This problem is particularly serious in a semiconductor device using a material having a low vapor pressure such as Pt, for example, a ferroelectric memory device (FeRAM) using a Pt electrode in combination with a ferroelectric film such as PZT.

Conventionally, when a FeRAM is formed using a dry etching apparatus 10 as shown in FIG. 1, the reaction chamber 11 is opened at predetermined time intervals and the electrodes 12A, 12B are formed.
In addition, cleaning of the inner wall of the reaction chamber 11 is performed. However, if such a periodic cleaning is performed, the optimum plasma forming conditions differ before and after the cleaning.
B needs to be adjusted.

Therefore, the present invention has solved the above-mentioned problems,
A general object is to provide a new and useful method for manufacturing a semiconductor device, a dry etching method, and a dry etching apparatus. A more specific object of the present invention is to provide a dry etching method and apparatus capable of cleaning an electrode without opening a reaction chamber, and a method of manufacturing a semiconductor device using the dry etching method.

[0010]

According to the present invention, there is provided a dry etching apparatus provided with a pair of parallel plate electrodes comprising a first electrode and a second electrode. Introducing a plasma gas into said second gas;
Simultaneously applying a high-frequency voltage and a low-frequency voltage having a lower frequency than the high-frequency voltage to the electrodes, cleaning the second electrode, and introducing an etching gas into the dry etching apparatus. Mounting a substrate to be processed on the first electrode of the dry etching apparatus; and applying the high-frequency voltage to the second electrode to etch the substrate to be processed. The dry etching method according to claim 1, wherein the cleaning step is repeatedly performed at predetermined intervals, as described in claim 2.
Alternatively, as described in claim 3, the cleaning step is performed by mounting another substrate on the first electrode, and the step of mounting the substrate to be processed includes the step of mounting the another substrate on the first electrode. 3. The method according to claim 1, further comprising a step of replacing the substrate with a substrate, or as described in claim 4, the low frequency voltage can be substantially followed by ions in the plasma. The dry etching method according to any one of claims 1 to 3, wherein the dry etching method has a frequency in a range,
Alternatively, in the step of introducing a plasma gas prior to the cleaning step, an etching gas is also introduced at the same time.
4 to 4, or as described in claim 6, the etching step includes forming Pt, Pb, and Z on the substrate.
6. A method according to claim 1, wherein a film selected from the group consisting of r, PZT, SBT and BST is patterned.
A reaction chamber provided with a gas introduction port and an exhaust port by the dry etching method according to any one of claims 1 to 7, and a first chamber disposed in the reaction chamber. An electrode; a second electrode disposed in the reaction chamber so as to be substantially parallel to the first electrode;
And a low-frequency power supply connected to the second electrode and generating a low-frequency voltage having a lower frequency than the high-frequency voltage formed by the high-frequency power supply. The dry etching apparatus according to claim 7, further comprising a switch provided between the low-frequency power supply and the second electrode by a dry etching apparatus or as described in claim 8. Or as described in claim 9, the low-frequency power supply generates the low-frequency voltage within a range in which ions in plasma formed between the first electrode and the second electrode can follow. 9. The method according to claim 7, wherein the signal is formed at a frequency.
The problem is solved by the dry etching apparatus described above. [Operation] FIG. 2 shows the principle of the dry etching method and apparatus according to the present invention. However, in FIG. 2, the parts described above are denoted by the same reference numerals, and description thereof will be omitted. FIG.
Medium, reaction chamber 11, magnet 11A outside thereof, and electrostatic chuck 16A. 16B is omitted because it is not essential.

Referring to FIG. 2, in the dry etching apparatus of the present invention, a low frequency power supply 17A is connected to the electrode 12B via a matching unit 17B in addition to the high frequency power supply 14A. The electrodes 12A, 12B
A low-frequency output having a frequency such that ions in the plasma formed between the electrodes can follow the electrode is supplied to the electrode 12B. A similar low-frequency output is also supplied from the low-frequency power supply 15A to the lower electrode 12A via a coupler 15B, but the low-frequency power supply 17A supplies a higher-output low-frequency power.

As a result of the low-frequency power being supplied from the low-frequency power supply 17A to the electrode 12B, not only the electrons in the plasma but also the cations having a low following speed can reach the electrode 12B. The accumulation of the negative charge on the electrode 12B carrying the particulate precipitate 12X is substantially eliminated, and the plasma is generated near the electrode 12A in the negative phase of the low frequency power as shown by an arrow in FIG. Moving. Along with this, as shown on the right side of FIG. 2, an electric field near the electrode 12B generates a potential gradient larger than usual,
The ions in the plasma are accelerated and collide with the electrode 12B. As a result, the deposit 12X accumulated on the electrode 12B is sputtered and deposited on the substrate 13. Therefore, when driving the low frequency power supply 17A, the electrode 1
By mounting a dummy substrate for capturing impurities on the electrode 12B as the substrate 13 on 2A,
The electrode 12B is cleaned. In this cleaning step, there is no need to open the reaction chamber, and after dry etching a predetermined number of substrates, a large number of substrates can be obtained simply by periodically replacing the substrate 13 with a dummy substrate and driving the low frequency power supply 17A. Can be efficiently dry-etched.

FIG. 3 shows the number of particles observed on the substrate when the electrode 12B is cleaned every time five substrates are processed using the dry etching apparatus of FIG. 10 and electrodes 12B between
The number of particles is shown in comparison with the number of particles observed when the substrate is continuously processed without cleaning. In FIG. 3, ○ indicates the results of the present invention using the apparatus of FIG.
Shows a conventional result using the apparatus 10 of FIG.

In the experiment, a sample was formed by forming a Pt film having a thickness of 100 nm on an insulating film covering an Si substrate, and further forming a PZT (PbZrTiO ₃ ) film having a thickness of 200 nm on the Pt film. 20m using resist pattern
Under an internal pressure of Torr, patterning was performed using a mixed gas of Cl ₂ , Ar and C ₄ F ₈ as an etching gas. At the time of patterning, the high-frequency power source 1 is connected to the electrode 12B.
A high frequency power of 27.12 MHz from 4A is applied with a voltage amplitude of 250 V, and the low frequency power supply 15A is applied to the electrode 12A.
By applying a low frequency power of 800 kHz to 100 V with a voltage amplitude of 100 V, an etching rate of about 80 nm / min can be obtained.

In the experiment shown in FIG. 3, when the electrode 12B is further cleaned, a low-frequency power having a frequency of 800 kHz is supplied to the electrode 12B from the low-frequency power supply 17A in a superposed manner with a voltage amplitude of 550V. I do. Referring to FIG. 3, in the present invention, even after processing 10 substrates, the number of particles observed on the substrates is about 20 and hardly increases from the start of processing. This is because, as described in FIG. 2, the plasma formed between the electrodes 12A and 12B moves toward the electrode 12A due to the supply of the low-frequency power to the electrode 12B, and as a result, the electric field near the electrode 12B It is considered that a large potential gradient is generated, and ions accelerated by the potential gradient collide with the electrode 12B to sputter particles deposited on the electrode 12B. On the other hand, according to the conventional method, it can be seen that the number of particles adhering to the substrate increases rapidly when the number of processed substrates exceeds five.

When the dry etching apparatus according to the present invention shown in FIG. 2 is used, the accumulation of particles on such a substrate is troublesome by interrupting the operation of the dry etching apparatus, opening the reaction chamber, and cleaning. Simple and effective suppression can be achieved without performing a complicated operation.

[0017]

[First Embodiment] FIG. 4 shows the structure of a dry etching 20 according to a first embodiment of the present invention.
Referring to FIG. 4, the dry etching apparatus 20 includes a pair of opposed electrodes 22A and 22B in a reaction chamber 21 having an inlet port 21A and an exhaust port 21B.
A substrate 23 to be etched is held on the main surface facing the electrode 22B of A.

The reaction chamber 21 is evacuated at the exhaust port 21B, and furthermore, Cl is supplied from the introduction port 21A.
₂ . An etching gas such as CF ₄ or C ₄ F ₈ is introduced. Further, by supplying high-frequency power of typically 27.12 MHz from the high-frequency power supply 24A to the electrode 22B via the matching unit 24B, plasma between the electrodes 22A and 22B is generated in the reaction chamber 21. It is formed.

At this time, the electrode 22 holding the substrate 23
A is connected to the low frequency power supply 25A via the matching unit 25B.
0 kHz to 13.56 MHz, typically about 800 kHz
A low frequency bias of z is applied. Due to the formation of the plasma, the etching gas is dissociated in the plasma to form adsorptive neutral particles and ions for promoting the etching reaction.
, Etching having a desired high anisotropy on the substrate 23 is realized.

Further, a magnet 2 for generating a magnetic field for confining the plasma formed outside the reaction chamber 21 is provided.
1C, and the substrate 22 is provided on the electrode 22A.
A DC power supply 26A forming an electrostatic chuck for holding 3 on the electrode 22A and a filter 26B composed of a DC blocking capacitor are connected. Dry etching apparatus 2 in FIG.
0, another low frequency power supply 27 is connected to the electrode 22B.
A is connected via the matching unit 27B and the switch 27C, and as a result, when the switch 27C is closed, the electrode 22B is supplied from the low-frequency power supply 27A to a frequency of 1 MHz or less that allows ions in the plasma to follow. , Typically at a frequency of about 800 kHz, so that the electrodes 22A and 22A, as previously described in FIG.
The plasma formed between B and B moves toward the electrode 22A.

For example, when a Pt film or a PZT film is etched by the dry etching apparatus 20,
The substrate 23 supporting the t film or the PZT film is
2A, a DC power supply 26A constituting an electrostatic chuck mechanism
Is installed by driving, and Cl is introduced into the reaction chamber 21.
A dry etching gas such as a mixed gas of ₂ , Ar, and C ₄ F ₈ is introduced from the introduction port 21A. Further, by exhausting the reaction chamber 21 through the exhaust port 21B, the reaction chamber pressure is reduced to, for example, 20 mTorr.
, And 27.12 MH from the high frequency power supply 24A.
z is applied to the electrode 12B, typically 25
The voltage is supplied via the matching unit 24B with a voltage amplitude of 0V. As a result of the supply of the high frequency power, a plasma is formed between the electrodes 12A and 12B.

Further, if necessary, the electrode 22A is supplied from a low-frequency power supply 25A through a matching unit 25B to the electrode 22A.
Hz low-frequency power is supplied with a voltage amplitude of typically about 100 V, and the magnet 21C is driven at, for example, 20 rpm.
The substrate 23 is dry-etched while rotating at a speed of m. Next, when cleaning the electrode 22B, the substrate 23 is replaced with a dummy substrate, a dry etching gas is introduced again into the reaction chamber 21, and plasma is generated under the same conditions. However, in this cleaning mode, the switch 27C
Is closed so that a high power low frequency of typically 800 kHz from the low frequency power supply 27A is applied to the electrode 22B.
Is supplied to the high frequency power of 27.12 MHz through the matching unit 27B. At this time, by supplying the low-frequency power from the low-frequency power supply 27A at a voltage amplitude of, for example, 550 V larger than the voltage amplitude of the high-frequency power, the plasma to be formed can be moved to the vicinity of the electrode 22A. it can. As a result, the electrode 22B
Impurities such as particles deposited on the substrate are sputtered and collected on the dummy substrate.

In this cleaning mode, it is preferable to supply an etching gas into the reaction chamber 21 in order to remove impurities collected on the dummy substrate. However, it is not always necessary to supply an etching gas simply to a plasma gas such as Ar. You may have introduced only. In the cleaning mode, it is not always necessary to drive the low-frequency power supply 25A on the substrate side. As shown in a modification of FIG. 5, another switch 25C is provided between the low-frequency power supply 25A and the matching device 25B.
In the cleaning mode, the switch 27C may be closed and the switch 25C may be opened.

Further, in this embodiment, the dry etching apparatus 20 shown in FIG. 4 performs not only dry etching of a Pt or PZT film, but also a metal film containing a metal element such as Pt, Pb, Zr, or PZT, SBT (SrBaTi).
The present invention is also applicable to dry etching of a ferroelectric film such as O ₃ ) and BST (BaSrTiO ₃ ). Also, the etching gas is not limited to the specific etching gas mixture described above. [Second Embodiment] FIGS. 6A to 8H are views showing a manufacturing process of an FeRAM 50 according to a second embodiment of the present invention.

Referring to FIG. 6A, a memory cell region is formed on a p − type Si substrate 51 by a field oxide film 52. Further, a gate insulating film 53 is formed on the Si substrate 51 so as to cover the memory cell region, and a gate electrode 54 is formed on the gate insulating film 53 in the same manner as a normal MOS transistor. Gate electrode 54 forms a part of a word line crossing the memory cell region. Further, in the substrate 51, n-type diffusion regions 55 and 56 are formed on both sides of the gate electrode 54 using the gate electrode 54 as a self-alignment mask.

After the MOS transistor is formed in this manner, an SiO ₂ film 57 is formed on the substrate 51 so as to cover the gate electrode 54, and the SiO ₂ film 57 is formed in the SiO ₂ film 57 by a well-known photolithography method. Then, a contact hole exposing the diffusion region 55 is formed. After the formation of the contact hole, a WSi layer is deposited on the SiO ₂ film 57 so as to include the contact hole. As a result, the WSi layer contacts the diffusion region 55 in the contact hole. By patterning this WSi layer, a bit line electrode 58 shown in FIG. 6A is formed.

Next, in the step of FIG. 6B, an interlayer insulating film 59, typically made of SiO ₂ , is deposited on the structure of FIG. 6A, for example, using a CMP (chemical mechanical polishing) method. After the planarization, the diffusion region 56 is formed in the interlayer insulating film 59.
Is formed by high-resolution photolithography. Next, FIG.
In the step, P ^{+ is} added to the structure of FIG.
A polysilicon film 61 doped with a mold is deposited by a CVD method so that the polysilicon Si film 61 fills the contact hole 60. Further, in the step of FIG. By etching back until the surface of the interlayer insulating film 59 is exposed by etching, a structure in which the contact holes are filled with the polysilicon plugs 62 is obtained.

In the step of FIG. 7D, a Ti film (not shown) is further formed on the interlayer insulating film 59 so as to cover the polysilicon plug 62 by a sputtering method, and a TiN film is further formed thereon. (Not shown) is formed as a diffusion barrier layer by a reactive sputtering method. In the step of FIG. 7D, a Pt film 63 is further formed thereon by sputtering, and a PZT film 63 is formed on the Pt film 63.
The film 64 is formed by a sputtering method in an Ar atmosphere. The deposited PZT film 64 is heat-treated in an O ₂ atmosphere to eliminate oxygen vacancies and crystallize.

Next, in the step of FIG.
The ZT film 64 and the underlying Pt film 63 are patterned into a desired pattern by performing dry etching in the dry etching apparatus 10 of FIG. As a result of the patterning of the Pt film 63, a lower electrode 65 of the high dielectric capacitor is formed, and as a result of the patterning of the PZT film 64, a capacitor insulating film 66 is formed.

Further, in the step of FIG.
(E) to cover the capacitor insulating film 66
SiO_TwoA film 67 is deposited by CVD and
Notation SiO _TwoExposing the capacitor insulating film 66 in the film 67
A contact hole 68 is formed. Further, FIG.
In the step (G), the SiO_TwoExposed on membrane 67
Pt pattern 69 so as to cover capacitor insulating film 66
Is formed as the upper electrode of the ferroelectric capacitor,
In the step of FIG._TwoOn the membrane 67
An interlayer insulating film 70 is formed to cover the upper electrode 69.
It is. A wiring pattern 7 is formed on the interlayer insulating film 70.
1 is formed.

In the manufacturing process of the FeRAM 50 according to the present embodiment, when the dry etching of the Pt film 63 or the PZT film 64 of FIG. 7E is performed using the dry etching apparatus 20 of FIG. The electrode 22B of the apparatus can be cleaned by simply replacing the substrate with a dummy substrate and driving the low-frequency power supply 27A without opening the reaction chamber 21. As a result, it is possible to efficiently perform FeRAM mass production. Production becomes possible.

The dry etching apparatus 20 shown in FIG.
Can be used not only in the dry etching step of FIG. 7E but also in other dry etching steps. Further, the semiconductor device 50 manufactured in the steps of FIGS. 6A to 8H can be used as a DRAM other than the FeRAM. Further, the capacitor insulating film 66 is made of PZT
However, the present invention is not limited to this, and may be a complex oxide such as SBT or BST, or a high dielectric substance such as Ta ₂ O ₅ . [Third Embodiment] Next, the FeR according to a third embodiment of the present invention will be described.
The AM 80 will be described with reference to FIGS. However, the same reference numerals are given to the parts described above, and the description will be omitted.

Referring to FIG. 9A, in this embodiment, a memory cell region is defined by a field oxide film 52 on the p-type Si substrate 51 as in the previous embodiment. Further, the gate insulating film 53 and the gate electrode 54 are formed in the same manner, but it can be seen that two gate electrodes 54 are formed in the illustrated example. The gate electrode 54 is covered with an SiO ₂ film 72 corresponding to the cross-sectional shape of the electrode 54, and diffusion regions 55 and 56 are formed in the substrate 51 on both sides of the gate electrode 54 using the gate electrode 54 as a mask. Meanwhile, the gate electrode 54 is the SiO ₂ film 72
Is patterned by using as a self-alignment mask.

Next, in the step of FIG.
Structure of (A) is covered as in the previous embodiments by the SiO ₂ film 57, of the SiO ₂ film 57, the diffusion region 5
Anisotropic etching substantially perpendicular to the substrate 51 is performed on a portion corresponding to 5 to form a contact hole 73 exposing the diffusion region 55 in a self-aligned manner. The self-aligned contact hole 73 thus formed is defined by the SiO ₂ film 77 covering the side wall of the gate electrode 54.

After the step of FIG. 9B, a WSi layer is deposited in the step of FIG. 9C and is patterned to form a bit line 58 contacting the diffusion region 55. Next, in the step of FIG. 10D, an interlayer insulating film 59 is deposited on the structure of FIG.
After planarization by the CMP method, a contact hole 60 exposing the diffusion region 56 is formed in the interlayer insulating film 59. After forming the contact hole 60, FIG.
On the structure of (D), an amorphous silicon film doped n-type with P is deposited so as to fill the contact hole 60 by a CVD method. Of the amorphous silicon film thus deposited, a portion deposited on the interlayer insulating film 59 is removed, and as a result, the contact hole 60 becomes a conductor plug 6 made of amorphous silicon.
2 gives a buried structure.

After forming the conductor plug in this manner, FIG.
In step 0 (E), a Ti film is deposited to a thickness of about 20 nm by a sputtering method using Ti as a target. Further, after depositing the Ti film, a TiN film having a thickness of about 50 nm is formed on the Ti film by performing reactive sputtering using the same Ti target in an N ₂ atmosphere.

The TiN film forms a part of the conductor film 63. In this embodiment, a Pt film is deposited on the TiN film as a remaining portion of the conductor film 63 by a sputtering method using a Pt target. . The sputtering of the Pt film is performed for about 100 n under the same conditions as described above.
m, and the resulting conductor film 63 has a Pt / TiN / Ti structure.

After the conductor film 63 is formed, the Pt
The film is patterned by a dry etching method in the dry etching apparatus 20 described above with reference to the resist pattern as a mask, and the TiN / T
Using the Pt pattern as a mask, the i film is made of CH ₂ Cl and Cl
_The patterning is performed in the same dry etching apparatus by a dry etching process using the mixed gas of _{2 as} an etching gas. As a result, the Pt / TiN / Ti
A lower electrode 65 having a structure is formed on the interlayer insulating film 59 as shown in FIG.

In the step of FIG. 11F, the lower side
The PZT film 66 is formed on the electrode 65 in the Ar atmosphere as described above.
Formed by sputtering in an atmosphere
O _TwoBy heat treatment in an atmosphere, the film 66
The oxygen vacancy in the inside is eliminated, and the film 66 is crystallized.
You. Further, in the step of FIG.
6, a Pt film is further deposited, and the dry etching is performed.
Dry etching using a resist pattern in the apparatus 20
By applying the etching method, the capacitor insulating film 6 can be formed.
6 and the upper electrode 69 are formed. The lower electrode 6
5. The capacitor insulating film 66 and the upper electrode 69
Electrically connected to the diffusion region 56 by the conductor plug 62
The formed high dielectric memory cell capacitor is formed.

Further, in the step of FIG. 11 (G), an interlayer insulating film 70 is deposited on the interlayer insulating film 59 so as to cover the high dielectric memory cell capacitor. A wiring pattern 71 made of an Al alloy is formed. FeRAM according to the present embodiment
Also in the case of 80, in the dry etching step of FIG. 11F, by using the dry etching apparatus 20 of FIG. 4, when cleaning the electrode 22B in the dry etching apparatus 20, it is necessary to open the reaction chamber 21 each time. Instead, it is only necessary to replace the substrate with a dummy substrate and drive the low-frequency power supply 27A simultaneously with the high-frequency power supply 24A to form plasma in the reaction chamber.
Manufacturing efficiency can be improved. Furthermore, FeR
AM80 can also be used as a DRAM.

Also in this embodiment, the capacitor insulating film is not limited to PZT, but may be SBT or BST.
Or a high dielectric such as Ta ₂ O ₅ . As described above, the present invention has been described with reference to the preferred embodiments. However, the present invention is not limited to such specific embodiments, and various modifications and changes can be made within the scope of the claims.

[0042]

According to the first to ninth aspects of the present invention, in a dry etching step using a parallel plate type dry etching apparatus, particles and the like generated on a counter electrode facing an electrode supporting a substrate to be processed are provided. Deposition of impurities is removed without opening the reaction chamber of the dry etching apparatus by supplying low-frequency power to the counter electrode, superimposing it on high-frequency power for plasma formation, and performing cleaning. As a result, the manufacturing throughput of the semiconductor device including the dry etching step is improved.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a conventional dry etching apparatus.

FIG. 2 is a diagram illustrating the principle of the present invention.

FIG. 3 is a diagram showing the operation and effect of the present invention.

FIG. 4 is a diagram showing a configuration of a dry etching apparatus according to a first embodiment of the present invention.

5 is a diagram showing a modification of the dry etching apparatus of FIG. 4 in a cleaning mode.

FIGS. 6A to 6C are diagrams (part 1) illustrating a manufacturing process of the FeRAM according to the second embodiment of the present invention;

FIGS. 7D to 7F are diagrams (part 2) illustrating the manufacturing process of the FeRAM according to the second embodiment of the present invention;

FIGS. 8G to 8H are views (part 3) illustrating the steps of manufacturing the FeRAM according to the second embodiment of the present invention;

FIGS. 9A to 9C are views (No. 1) showing the manufacturing process of the FeRAM according to the third embodiment of the present invention.

FIGS. 10 (D) to 10 (E) are views (No. 2) showing the steps of manufacturing the FeRAM according to the second embodiment of the present invention.

FIGS. 11F to 11G are diagrams (part 3) illustrating the manufacturing process of the FeRAM according to the second embodiment of the present invention;

[Explanation of symbols]

10, 20 Dry etching apparatus 11, 21 Reaction chamber 11A, 21A Gas introduction port 11B, 21B Exhaust port 11C, 21C Magnet 12A, 22A Lower electrode 12B, 22B Counter electrode 12X Particle deposit 13, 23 Substrate 14A, 24A High frequency power supply 15A, 17A, 25A, 27A Low frequency power supply 16A, 26 DC power supply 16B, 26B Filter 14B, 15B, 17B Matching device 25C, 27C Switch 50, 80 FeRAM 51 Si substrate 52 Field oxide film 53 Gate insulating film 54 Gate electrode 55, 56 Diffusion region 57 SiO ₂ film 58 Bit line electrode 59 Interlayer insulating film 60 Contact hole 61 Conductive film 62 Conductor plug 63 TiN / Ti base film 64 Pt film 65 Lower electrode 66 PZT film 67 SiO ₂ film 68 PZT film 6 9 upper electrode 70 interlayer insulating film 71 wiring pattern 72 SiO ₂ film 73 self-aligned opening

Continuation of the front page F term (reference) 4K057 DA01 DB08 DC10 DD01 DE01 DE06 DE14 DG15 DM05 DM17 DM18 DM32 DM33 DN02 5F004 AA15 BA04 BB11 CA03 DA04 DA23 DB08 DB13 EB02 EB08 FA08

Claims (9)

[Claims] A step of introducing a plasma gas into a dry etching apparatus provided with a pair of parallel plate electrodes comprising a first electrode and a second electrode; a high-frequency voltage applied to the second electrode; Simultaneously applying a low-frequency voltage having a lower frequency than the high-frequency voltage to clean the second electrode; introducing an etching gas into the dry etching apparatus; A dry etching method comprising: mounting the substrate on the first electrode of an etching apparatus; and applying the high-frequency voltage to the second electrode to etch the substrate to be processed. . 2. The dry etching method according to claim 1, wherein the cleaning step is repeatedly performed at a predetermined interval. 3. The cleaning step is performed by mounting another substrate on the first electrode. The step of mounting the substrate to be processed includes a step of replacing the another substrate with the substrate to be processed. 3. The dry etching method according to claim 1, wherein the dry etching method includes: 4. The dry etching method according to claim 1, wherein the low frequency voltage has a frequency within a range in which ions in the plasma can substantially follow. 5. The dry etching method according to claim 1, wherein in the step of introducing a plasma gas prior to the cleaning step, an etching gas is also introduced. 6. The etching step includes forming Pt, Pb, Zr, PZT, SBT and B formed on the substrate.
6. The dry etching method according to claim 1, wherein a film selected from the group consisting of ST is patterned. 7. A reaction chamber having a gas inlet and an exhaust port, a first electrode disposed in the reaction chamber, and substantially parallel to the first electrode in the reaction chamber. A second electrode disposed so as to be; a high-frequency power supply connected to the second electrode; and a lower-frequency voltage connected to the second electrode and lower than a high-frequency voltage formed by the high-frequency power supply. A dry etching apparatus comprising a low-frequency power supply for generating a low-frequency voltage. 8. The dry etching apparatus according to claim 7, further comprising a switch provided between said low-frequency power supply and said second electrode. 9. The low frequency power supply, wherein the low frequency voltage is:
9. The dry etching apparatus according to claim 7, wherein the ions are formed at a frequency within a range in which ions in plasma formed between the first electrode and the second electrode can follow. 9.