JP2000151736A - Circuit and method for interface - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an interface circuit and an interface method which prevent a weak current of a transmission side device from sneaking to a reception side device and can start normal communication between the transmission side device and the reception side device. SOLUTION: This device is an interface circuit which electrically connects a transmission side device 10 and a reception side device 20 by transmitting a signal from a driver 11 equipped with the transmission side device 10 to a receiver 21 equipped with the reception side device 20. In this case, the transmission side device 10 is equipped with a control circuit 12 which controls validity and invalidity of an output of the driver 11 and a power source switch 13 for supplying the reception side device 20 with a power source. Then, the control circuit 12 has a function for controlling turning on and off of the power source switch 13 and validates the output of the driver 11 after a specified time elapses since the power source switch 13 is turned on by the control circuit 12.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interface circuit and an interface method for connecting one device to another device, and more particularly, to a method in which a current flows to an unpowered device via the interface circuit. Regarding technology to prevent.

[0002]

2. Description of the Related Art Conventionally, various interface circuits have been developed for connecting a plurality of devices. For example, JP-A-6-152658 discloses an "interface circuit of a communication control device". In this interface circuit, the non-inverting-side receiver input input from the non-inverting-side input terminal and the inverting-side receiver input input from the inverting-side input terminal are connected to the EIA standard RS-422A (CCIT
T. V11 recommendation) through a terminating resistor to satisfy
The signal is input to the non-inverting input terminal and the inverting input terminal of the receiver.

The inverting input terminal of the receiver is connected to the other end of a pull-up resistor having one end connected to a power supply, and the non-inverting input terminal is connected to the other end of a pull-down resistor having one end connected to ground. Is connected. Thus, the output of the receiver is determined even when the input is open or the like, so that disturbance due to noise or the like is prevented.

[0004] As a related technique, for example, Japanese Patent Application Laid-Open No. 60-253352 discloses an "interface circuit".
Is disclosed. This interface circuit transmits and receives a balanced digital signal between a driver of a transmitting device and a receiver of a receiving device via a cable. The transmitting device is further provided with an open collector type gate circuit. I have. The receiving device further includes a gate circuit that gates the output of the receiver with an output switching control signal sent from a gate circuit of the transmitting device via a cable, and the output switching control output is a resistor. Has been pulled up. As a result, when the connector of the cable is disconnected and the power supply of the transmission side device is cut off, the output of the receiver is blocked by the output open / close control signal, so that a malfunction due to uncertainty of the output signal of the receiver is prevented. Is prevented.

[0005] Japanese Patent Application Laid-Open No. Sho 62-16647 discloses a "terminal interface signal control system". This terminal interface control method is configured such that a relay is provided in a transmitting device, and a signal from the transmitting device is output to the outside via a contact point of the relay. According to this terminal interface output control method, the contacts of the relay are opened until the power supply voltage reaches the relay operating voltage after the power is turned on, so that no significant signal is output to the outside. This prevents a device that receives an output signal from the transmitting device from malfunctioning.

[0006] Furthermore, Japanese Patent Application Laid-Open No. Hei 10-111742 discloses an "interface circuit". This interface circuit is used to connect the main system and the subsystem, and has a two-input AND circuit.
It consists of a gate. A power-on reset signal from the main system and a power-on reset signal from the subsystem are input to the AND gate. The AND gate generates a gate control signal when both of the two power-on reset signals are at a high level, that is, when both the main system and the subsystem are active, and opens this interface circuit. To As a result, a malfunction such as a malfunction can be prevented by an inexpensive circuit.

[0007]

However, each of the above techniques has the following problems. That is,
In the "interface circuit of the communication control device" disclosed in the above-mentioned Japanese Patent Application Laid-Open No. 6-152658, when the power of the transmitting device is turned on but the power of the receiving device is not turned on, the input terminal of the receiver is turned off. The weak current of the transmitting device goes around the receiving device via the pull-up resistor provided on the side. When such a phenomenon occurs, there is a problem that when the power of the receiving device is turned on, the initialization of the circuit provided in the receiving device is not performed normally, and the receiving device itself malfunctions. .

In the "interface circuit" disclosed in Japanese Patent Application Laid-Open No. Sho 60-253352, output switching is controlled by a structure in which an open collector type gate circuit is provided in a transmitting device and a pull-up resistor is provided in a receiving device. It is configured to transmit a signal. Therefore, similarly to the above-described interface circuit of the communication control device, there is a problem that a weak current of the transmitting device flows to the receiving device via the pull-up resistor, and a malfunction occurs in the receiving device.

In the "terminal interface signal control system" disclosed in Japanese Patent Application Laid-Open No. Sho 62-16647, the output signal line can be opened by a relay in the transmitting device, but the output signal line is not connected to the receiving device. Since the timing is not matched, if the power of the receiving device is not turned on while the relay is turned on, the weak current of the transmitting device goes to the receiving device in the same manner as described above. The same problem occurs.

Further, in the "interface circuit" disclosed in Japanese Patent Application Laid-Open No. H10-111742, the power-on reset signal of the transmitting device is directly supplied to the AND gate of the receiving device, so that the weak current of the transmitting device is reduced. The situation of sneaking around to the receiving device is inevitable.

SUMMARY OF THE INVENTION The present invention has been made to solve such a conventional problem, and it is intended to prevent a weak current of a transmitting device from sneaking into a receiving device so that the transmitting device and the receiving device can communicate with each other. It is an object of the present invention to provide an interface circuit and an interface method that can start normal communication between them.

[0012]

According to a first aspect of the present invention, there is provided an interface circuit for achieving the above object.
An interface circuit that electrically connects the transmission-side device and the reception-side device by transmitting a signal from a driver included in the transmission-side device to a receiver included in the reception-side device, wherein the transmission-side device is A control circuit for controlling the validity and invalidity of the output of the driver, and a power switch for turning on the power of the receiving side device.

In this case, the power switch comprises a mechanical switch which is turned on and off manually, a relay which is turned on and off electromechanically, or an electronic switch which is turned on and off electronically. it can.

When the power switch is constituted by a relay that is turned on and off electromechanically or an electronic switch that is turned on and off electronically, the control circuit of the transmitting device includes the power switch. And a function of controlling the turning on and off of the driver, and enabling the output of the driver after a lapse of a fixed time after the power switch is turned on by the control circuit.

Further, the interface method according to the second aspect of the present invention transmits the signal from the driver provided in the transmitting device to the receiver provided in the receiving device for the same purpose as described above. An interface method for electrically connecting a transmitting device and the receiving device, wherein the transmitting device enables an output of the driver after a lapse of a predetermined time after turning on power to the receiving device. It is characterized by the following.

[0016]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of a control system to which an interface circuit according to an embodiment of the present invention is applied. This control system includes a transmitting device 10 and a receiving device 20.
0 and the receiving device 20 are connected by a balanced double-flow interconnection interface circuit.

The balanced double-current interconnection interface circuit includes a driver 11 mounted on the transmitting device 10, a receiver 21 mounted on the receiving device 20, and a signal line 30 connecting these components. The driver 11 has a non-inverted output terminal, an inverted output terminal, and a control input terminal. When a low-level (hereinafter, referred to as “L level”) control signal is applied to the control input terminal, a significant signal is output to the non-inverted output terminal and the inverted output terminal, and a high level (hereinafter, “H level”) is output. ), The non-inverting output terminal and the inverting output terminal are brought into a high impedance state.

The receiver 21 has a non-inverting input terminal and an inverting input terminal, and has a significant H level when the voltage supplied to the non-inverting input terminal and the voltage supplied to the inverting input terminal have a predetermined potential difference. A signal or an L level signal is output. A signal line 30 is connected between the non-inverting output terminal of the driver 11 and the non-inverting input terminal of the receiver 21 and between the inverting output terminal of the driver 11 and the inverting input terminal of the receiver 21. The signal line 30 on the receiving device 20
The terminating resistor 22 is provided so as to satisfy the A standard specification RS-422A (CCITT. V11 recommendation).

The transmitting apparatus 10 includes a control circuit 12, a power switch 13, a power circuit 14, and a power switch 15 in addition to the driver 11. Control circuit 12
Generates a control signal supplied to a control input terminal of the driver 11 and a control signal for controlling opening and closing of the power switch 13. The power switch 13 generates a power control signal for controlling turning on and off of the power of the receiving device 20. As the power switch 13, a mechanical switch that is turned on and off manually, a relay that is turned on and off electromechanically, or an electronic switch (for example, a transistor) that is turned on and off electronically can be used. When a mechanical switch is used as the power switch 13,
The control circuit 12 generates only a control signal to be supplied to a control input terminal of the driver 11.

The power supply circuit 14 supplies power to the entire transmission device 10. The power supply circuit 14 starts supplying power when a power switch 15 constituted by, for example, a mechanical switch is turned on.

The receiving device 20 includes the receiver 2
1 and a terminating resistor 22, a rewritable gate array (FPGA: Field Programmable Gate Array) circuit 23 and a power supply circuit 24 are provided. The FPGA circuit 23 realizes various functions as the receiving device 20 by receiving a signal from, for example, the receiver 21. Further, the power supply circuit 24 supplies power to the entire receiving device 20. ON / OFF of the power supply circuit 24 is controlled by a power control signal transmitted from the power switch 13 of the transmission device 10 via the control line 31.

The operation of the transmitting apparatus 10 and the receiving apparatus 20 to which the interface circuit according to the embodiment of the present invention has been applied in the above configuration will be described. In the following, it is assumed that the power switch 13 is constituted by an electronic switch.

Now, in this control system, the transmitting device 10
→ It is assumed that the power is turned on in the order of the receiving device 20.
First, when the power switch 15 of the transmission device 10 is turned on, power supply from the power circuit 14 to the entire transmission device 10 is started. When the voltage supplied from the power supply circuit 14 becomes a constant voltage, the power supply circuit 14 supplies a power-on reset signal to each circuit in the transmission device 10. Thereby, each circuit of the transmission device 10 is reset to the initial state, and subsequently, the operation as the transmission device 10 is started.

When the operation of the transmitting device 10 is started, first, the control circuit 12 supplies an H level signal to the control input terminal of the driver 11. As a result, the non-inverting output terminal and the inverting output terminal of the driver 11 are brought into a high impedance state. Note that, during the period from when the power switch 15 is turned on to when the power-on reset signal is output, the driver 11
The signal supplied to the control input terminal is also in a high impedance state, so that a significant signal is not output from this driver 11. Accordingly, since a weak current does not flow inside the receiving device 20, for example, the FPGA circuit 2
3 does not malfunction.

The control circuit 12 generates the power control signal and supplies it to the power switch 13 after a certain period of time has passed since the supply of the H level signal to the control input terminal of the driver 11, thereby causing the power switch 13 to operate. turn on. The power control signal from the power switch 13 is supplied to the power circuit 24 of the receiving device 20 via the control line 31. Thereby, the power supply circuit 24 of the receiving device 20
Power supply is started to each circuit inside.

When the voltage supplied from the power supply circuit 24 becomes a constant voltage, the power supply circuit 24 supplies a power-on reset signal to each circuit in the receiver 20. Thereby, each circuit of the receiving device 20 is reset to the initial state, and subsequently, the operation as the receiving device 20 is started.

The control circuit 12 of the transmitting device 10 supplies a power control signal to the power switch 13 and supplies an L level signal to the control input terminal of the driver 11 after a certain time has elapsed since the power switch 13 was turned on. I do. As a result, the non-inverting output terminal and the inverting output terminal of the driver 11 become active, and the input signal is output to the outside. With the above operation, both the transmission device 10 and the reception device 20 start operating normally, and communication between the transmission device 10 and the reception device 20 becomes possible.

As described above, the output of the driver 11 is in a high impedance state when the power of the transmitting apparatus 10 is turned on and the power of the receiving apparatus is not turned on. After the power of the receiving device 20 is turned on under the control of the transmitting device 10, the output of the driver 11 is activated.
The current from the transmitting device 10 is prevented from sneaking in a state in which the power supply is turned off. Therefore, it is possible to prevent a circuit inside the receiving device 20 from malfunctioning.

In the above-described embodiment, the balanced double-current interconnection interface circuit according to the EIA standard specification RS-422A (recommended by CCITT.V11) has been described as an example. However, it is needless to say that the present invention can be applied to other various interface circuits.

[0031]

As described in detail above, according to the present invention,
An interface circuit and an interface method capable of starting normal communication between the transmitting side device and the receiving side device can be provided because the weak current of the transmitting side device can be prevented from flowing to the receiving side device.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a control system to which an interface circuit according to an embodiment of the present invention is applied.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Transmitting device 11 Driver 12 Control circuit 13 Power switch 14 Power circuit 15 Power switch 20 Receiving device 21 Receiver 22 Terminating resistor 23 FPGA 24 Power circuit

Claims (6)

[Claims] An interface circuit for electrically connecting the transmitting device and the receiving device by transmitting a signal from a driver provided in the transmitting device to a receiver provided in the receiving device, A control circuit for controlling the validity and invalidity of the output of the driver; a power switch for turning on power to the receiving side device;
And an interface circuit comprising: 2. The interface circuit according to claim 1, wherein said power switch is a mechanical switch that is manually turned on and off. 3. The interface circuit according to claim 1, wherein said power switch is a relay that is turned on and off electromechanically. 4. The interface circuit according to claim 1, wherein said power switch is an electronic switch that is turned on and off electronically. 5. The control circuit of the transmission-side device further has a function of controlling on and off of the power switch, and after a lapse of a fixed time from the turning on of the power switch by the control circuit, the driver circuit 5. The interface circuit according to claim 3, wherein an output of the interface circuit is enabled. 6. An interface method for electrically connecting the transmitting side device and the receiving side device by transmitting a signal from a driver provided in a transmitting side device to a receiver provided in a receiving side device, The interface method according to claim 1, wherein the transmitting device enables the output of the driver after a lapse of a predetermined time since the power of the receiving device is turned on.