JP2000077413A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve a copper wiring in resistance to electromigration by a method wherein barrier metal is formed into a two-layered laminated barrier metal film used for an embedded metal wiring, a first barrier metal layer comes into contact with wiring metal and is satisfactory in adhesion to it, and a second barrier metal layer comes into contact with an inter-wiring insulating film and is made to serve as a diffusion preventing layer. SOLUTION: A first interlayer insulating film 2 is formed on a silicon substrate 1, an inter-wiring insulating film 3 is formed on the interlayer insulating film 2, a wiring groove is provided to the insulating film 3, a first and a second barrier metal layer, 6 and 7 are formed on the inner wall and base of the wiring groove, and copper is filled up in the groove for the formation of a copper wiring 8. The first barrier metal layer 6 serves as a barrier film to prevent copper from diffusing into the inter- wiring insulating film 3, and the second barrier metal 7 is satisfactory in adhesion to the copper wiring 8. Furthermore, a second interlayer insulating film 9 is formed to constitute an upper wiring structure. The second interlayer insulating film 9 prevents copper from diffusing into the upper wiring structure and functions as a stopper in dry etching carried out for the formation of a wiring groove when the upper wiring structure is formed. The above processes are repeatedly carried out for the formation of a multilayer interconnection structure.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device having a buried metal wiring structure and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, miniaturization of devices has been promoted in order to improve the performance of LSIs. However, as the wiring becomes finer, the wiring resistance increases, and the electromigration resistance of the conventional AlCu wiring becomes insufficient.
In addition, an increase in wiring resistance is also a main factor limiting device speed. From the above points, Al as the next generation wiring
Attention has been paid to copper wiring, which is said to have lower resistance than Cu wiring and also has higher electromigration resistance.

[0003]

However, the use of copper wiring does not necessarily improve the electromigration resistance, and its performance greatly depends on the formation process and the selection of materials. For example, titanium nitride is known as a barrier metal for copper buried wiring, but the adhesion between titanium nitride and copper is not always good, so the electromigration resistance is deteriorated and the original performance of copper cannot be sufficiently brought out. . Improvement of the adhesion between the barrier metal and copper is important for realizing high electromigration resistance.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device with improved electromigration resistance of copper wiring by using a laminated metal film as a barrier metal in a trench-buried copper wiring structure. Another object of the present invention is to provide a method for manufacturing the semiconductor device.

[0005]

According to the present invention, in a trench-filled metal wiring, a barrier metal is a laminated metal film, and a barrier metal layer in contact with the wiring metal is a metal layer having good adhesion to the wiring metal. The present invention relates to a semiconductor device, wherein a barrier metal layer in contact with an interwiring insulating film is a diffusion preventing layer.

Further, according to the present invention, in the trench-filled copper wiring, the barrier metal is a laminated metal film, and the barrier metal layer in contact with the copper wiring is a metal layer having good adhesion to the copper wiring. The present invention relates to a semiconductor device, wherein a barrier metal layer in contact with a film is a diffusion preventing layer capable of preventing diffusion of copper.

Further, the present invention provides a step of forming a second insulating film after forming a first insulating film on a substrate, forming a wiring groove in the second insulating film using the first insulating film as an etching stopper film. Forming an anti-diffusion film of copper as a first barrier metal film on a region including the inside of the wiring groove;
Forming a metal film having good adhesion to copper as a barrier metal film, depositing copper so as to fill wiring trenches, and removing copper and the first barrier until the surface of the second insulating film is visible by CMP. The present invention relates to a method for manufacturing a semiconductor device, comprising a step of removing a metal film and a second barrier metal film.

[0008] The present invention also provides a step of forming a first insulating film on a substrate, forming a second insulating film made of a low dielectric constant material, and forming a third insulating film thereon. Forming a wiring groove in the second and third insulating films using the insulating film as an etching stopper film, forming a copper diffusion preventing film as a first barrier metal film on a region including the inside of the wiring groove, Forming a metal film having good adhesion to copper as a second barrier metal film, depositing copper so as to fill wiring trenches, and using CMP to expose the surface of the third insulating film as a stopper film Up to the step of removing copper, the first barrier metal film and the second barrier metal film.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment FIG. 1 shows the structure of a first embodiment of the present invention. The structure of the present embodiment has a structure in which a first trench as a stopper film is formed when a wiring groove is formed on the silicon substrate 1 by dry etching.
, And an inter-wiring insulating film 3 is formed thereon. A wiring groove is formed in the inter-wiring insulating film 3, a first barrier metal 6 and a second barrier metal 7 are formed in the wiring groove, and then copper is buried to form a copper wiring 8. ing. The first barrier metal 6 is a barrier film (diffusion preventing film) for preventing copper from diffusing into the inter-wiring insulating film 3, and the second barrier metal 7 is a barrier film having good adhesion to the copper wiring 8. is there.

Further, a second interlayer insulating film 9 is formed, and an upper wiring structure is formed in the same manner as described above. This second interlayer insulating film 9 prevents diffusion of copper into the inter-wiring insulating film of the upper wiring structure, and also functions as a stopper film in dry etching of wiring grooves when forming the upper wiring structure. By repeating the above structure, a multilayer wiring structure is formed.

The structure of the present embodiment is the same as that of the
However, it is suitable when a material having sufficient mechanical strength for the CMP processing used for forming the copper wiring, for example, a silicon oxide film is used.

The first interlayer insulating film 2 and the second interlayer insulating film 9 are made of a material having a high selectivity with respect to the inter-wiring insulating film 3 in the dry etching of the wiring groove. 9 needs to be made of a material capable of preventing copper diffusion from the copper wiring 8. Specifically, a silicon nitride film is desirable.

The first barrier metal 6 is made of a metal capable of preventing the diffusion of copper, for example, titanium nitride. It is necessary that the second barrier metal 7 be made of a metal having good adhesion to the copper wiring 8, and further be made of a metal having good adhesion to the first barrier metal 6. preferable. For example, aluminum or AlCu is desirable.

According to the above structure, the adhesion between the copper wiring 8 and the first barrier metal 6 is improved and copper atoms are hardly moved, so that a copper wiring having high electromigration resistance can be realized.

The semiconductor device according to the present embodiment is manufactured by the method shown in FIGS.

First, as shown in FIG. 2A, a first interlayer insulating film 2 is formed on a silicon substrate 1 on which a semiconductor element and a flattened interlayer insulating film (not shown) are formed. 100
A film is formed to a thickness of 0 °, and then an inter-wiring insulating film 3 is formed. The film thickness of the inter-wiring insulating film 3 corresponds to the film thickness of the copper wiring 8 to be formed later, and is suitably 3000 to 5000.

Next, as shown in FIG. 2B, a resist film 4 is formed by patterning an arbitrary wiring groove by using a conventional lithography technique. Width of wiring groove 5 (wiring width)
Is set as appropriate.

Next, the inter-wiring insulating film 3 is etched using a dry etching technique to form a wiring groove 5. At this time, compared with the etching rate of the inter-wiring insulating film 3, the first
By using the condition that the etching rate of the interlayer insulating film 2 is sufficiently low, it is possible to form a wiring groove having a uniform depth independent of the width of the wiring groove. After the groove etching, oxygen plasma ashing is performed to remove the resist film 4, and the structure shown in FIG. 2C is realized.

Next, as shown in FIG. 3D, a laminated barrier metal is formed. First, a metal having a sufficient barrier property against copper diffusion is used as the first barrier metal 6.
Sputtering is performed to a thickness of {500} and then a metal having good adhesion to both copper and the first barrier metal 6 is sputtered as a second barrier metal 7 to a thickness of 200-500 [deg.].

Next, as shown in FIG.
Copper wiring 8 is buried. The method of burying copper includes a sputter + reflow method, an MO-CVD method, a plating method, and the like, and is appropriately selected.

Next, as shown in FIG. 3F, the excess copper wiring existing on the surface of the inter-wiring insulating film 3 and the first barrier metal 6 and the second barrier metal 7 are removed by CMP (chemical (Mechanical polishing method).

Finally, as shown in FIG. 3G, a second interlayer insulating film 9 is formed on the inter-wiring insulating film 3 and the copper wiring 8 by 500.
The film is formed to a thickness of Å to 1000Å.

Second Embodiment FIG. 4 shows the structure of a second embodiment of the present invention. The structure of the present embodiment has a structure in which a first trench as a stopper film is formed when a wiring groove is formed on the silicon substrate 1 by dry etching.
, An inter-wiring insulating film 3 and a cap insulating film 10 are laminated thereon. A wiring groove is formed in the inter-wiring insulating film 3 on which the cap insulating film 10 is laminated, and a first barrier metal 6 and a second barrier metal 7 are formed in the wiring groove.
Is formed and then copper is buried to form a copper wiring 8. The first barrier metal 6 is used as the inter-wiring insulating film 3.
The second barrier metal 7 is a barrier film having good adhesion to the copper wiring 8.

Further, a second interlayer insulating film 9 is formed, and an upper wiring structure is formed in the same manner as described above. This second interlayer insulating film 9 prevents diffusion of copper into the inter-wiring insulating film of the upper wiring structure, and also functions as a stopper film in dry etching of wiring grooves when forming the upper wiring structure. By repeating the above structure, a multilayer wiring structure is formed.

The structure of this embodiment is based on the
However, it is suitable when the material is made of a material having a relatively low mechanical strength, for example, a low dielectric constant material. Inorganic materials such as SiOF and HSQ (Hydrogen Silsesquiox)
ane), and organic materials include parylene and fluorinated amorphous carbon.

Since these materials generally have low film strength, it is difficult to detect an end point in CMP processing of wiring metal, and there is a possibility that film peeling may occur. Therefore, such a low dielectric constant film is protected by a cap insulating film 10 such as a silicon-containing insulating film having sufficient mechanical strength. As the cap insulating film, a silicon oxide film (S
iO ₂ ), a silicon nitride film (SiN), an oxygen-containing silicon nitride film (SiON), and the like.

The first interlayer insulating film 2 and the second interlayer insulating film 9 are made of a material having a high selectivity with respect to the inter-wiring insulating film 3 in the dry etching of the wiring groove. 9 needs to be made of a material capable of preventing copper diffusion from the copper wiring 8. Specifically, a silicon nitride film is desirable.

The first barrier metal 6 is made of a metal capable of preventing the diffusion of copper, for example, titanium nitride. It is necessary that the second barrier metal 7 be made of a metal having good adhesion to the copper wiring 8, and further be made of a metal having good adhesion to the first barrier metal 6. preferable. For example, aluminum or AlCu is desirable.

With the above structure, the adhesion between the copper wiring 8 and the first barrier metal 6 is improved and copper atoms are less likely to move, so that a copper wiring having high electromigration resistance can be realized.

The semiconductor device according to the present embodiment is manufactured by the method shown in FIGS.

First, as shown in FIG. 5A, a first interlayer insulating film 2 is formed on a silicon substrate 1 on which a semiconductor element and a flattened interlayer insulating film (not shown) are formed by 500 .ANG. 100
A film having a thickness of 0 ° is formed, and then an inter-wiring insulating film 3 and a cap insulating film 10 made of a low dielectric constant material are formed. It is appropriate that the thickness of the inter-wiring insulating film 3 is 3000 to 5000, and the thickness of the cap insulating film 10 is 500 to 1500. The total thickness of the inter-wiring insulating film 3 and the cap insulating film 10 is the thickness of the copper wiring 8 to be formed later.

Next, as shown in FIG. 5B, a resist film 4 in which an arbitrary wiring groove is patterned by using a conventional lithography technique is formed. Width of wiring groove 5 (wiring width)
Is set as appropriate.

Next, the inter-wiring insulating film 3 is etched using a dry etching technique to form a wiring groove 5. At this time, compared with the etching rate of the inter-wiring insulating film 3, the first
By using the condition that the etching rate of the interlayer insulating film 2 is sufficiently low, it is possible to form a wiring groove having a uniform depth independent of the width of the wiring groove. After the groove etching, the resist film 4 is removed, and the structure shown in FIG. 5C is realized.

Next, as shown in FIG. 6D, a laminated barrier metal is formed. First, a metal having a sufficient barrier property against copper diffusion is used as the first barrier metal 6.
Sputtering is performed to a thickness of {500} and then a metal having good adhesion to both copper and the first barrier metal 6 is sputtered as a second barrier metal 7 to a thickness of 200-500 [deg.].

Next, as shown in FIG.
Copper wiring 8 is buried. As a method of burying copper, there are a sputtering + reflow method, an MO-CVD method, a plating method and the like. However, the low dielectric constant film generally has low heat resistance, and may be decomposed by heat treatment exceeding the heat resistance temperature. Therefore, it is preferable to use a method that can perform treatment at a relatively low temperature.

Next, as shown in FIG. 6F, excess copper wiring existing on the surface of the cap insulating film 10 and the first
The barrier metal 6 and the second barrier metal 7 are removed by the CMP method. At this time, the cap insulating film 10 is
Acts as a P stopper film.

Finally, as shown in FIG. 6 (g), a second interlayer insulating film 9 is formed on the
The film is formed to a thickness of Å to 1000Å.

[0038]

As is apparent from the above description, according to the present invention, the adhesion between the copper wiring and the barrier metal is improved, and the copper atoms are less likely to move. Can be realized. As a result, a semiconductor device having a fine structure with high device speed, high performance, and high reliability can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of one embodiment of a semiconductor device of the present invention.

FIG. 2 is a schematic sectional view of a semiconductor device according to the present invention;

FIG. 3 is a schematic cross-sectional view of a semiconductor device according to the present invention, illustrating the process;

FIG. 4 is a schematic sectional view of another embodiment of the semiconductor device of the present invention.

FIG. 5 is a schematic process sectional view of the semiconductor device of the present invention.

FIG. 6 is a schematic process sectional view of the semiconductor device of the present invention.

[Description of Reference Numerals] 1 silicon substrate 2 first interlayer insulating film 3 wiring insulating film 4 resist film 5 wiring groove 6 first barrier metal 7 second barrier metal 8 copper wiring 9 second interlayer insulating film 10 cap Insulating film

Claims (7)

[Claims] In the trench-filled metal wiring, the barrier metal is a laminated metal film, the barrier metal layer in contact with the wiring metal is a metal layer having good adhesion to the wiring metal, and is in contact with the inter-wiring insulating film. A semiconductor device, wherein the barrier metal layer is a diffusion prevention layer. 2. In the trench-filled copper wiring, the barrier metal is a laminated metal film, the barrier metal layer in contact with the copper wiring is a metal layer having good adhesion to the copper wiring, and is in contact with the inter-wiring insulating film. A barrier metal layer which is a diffusion prevention layer capable of preventing diffusion of copper. 3. The semiconductor device according to claim 2, wherein the barrier metal layer in contact with the copper wiring contains aluminum or AlCu. 4. The semiconductor device according to claim 3, wherein the barrier metal layer in contact with the inter-wiring insulating film contains titanium nitride. 5. An inter-wiring insulating film material comprising silicon oxide, S
5. The semiconductor device according to claim 4, comprising iOF, HSQ, fluorinated amorphous carbon, or parylene. 6. A step of forming a second insulating film after forming a first insulating film on a substrate; a step of forming a wiring groove in the second insulating film using the first insulating film as an etching stopper film; Forming a copper diffusion prevention film as a first barrier metal film on a region including the inside of the wiring groove, and forming a metal film having good adhesion to copper as a second barrier metal film thereon; Depositing copper to fill the trench, C
Until the surface of the second insulating film can be seen by MP, the copper, the first
A step of removing the barrier metal film and the second barrier metal film. 7. A step of forming a first insulating film on a substrate, forming a second insulating film made of a material having a low dielectric constant, and forming a third insulating film thereon. Forming a wiring groove in the second and third insulating films using as an etching stopper film, forming a copper diffusion prevention film as a first barrier metal film on a region including the inside of the wiring groove, and forming a second Forming a metal film having good adhesion to copper as a barrier metal film, depositing copper so as to fill wiring trenches, using copper as a stopper film with the third insulating film as a stopper film by CMP until the surface is visible. And a step of removing the first barrier metal film and the second barrier metal film.