IT991502B - Dispositivo di memoria - Google Patents
Dispositivo di memoriaInfo
- Publication number
- IT991502B IT991502B IT67336/71A IT6733671A IT991502B IT 991502 B IT991502 B IT 991502B IT 67336/71 A IT67336/71 A IT 67336/71A IT 6733671 A IT6733671 A IT 6733671A IT 991502 B IT991502 B IT 991502B
- Authority
- IT
- Italy
- Prior art keywords
- memory device
- memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
- G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356017—Bistable circuits using additional transistors in the input circuit
- H03K3/356026—Bistable circuits using additional transistors in the input circuit with synchronous operation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356017—Bistable circuits using additional transistors in the input circuit
- H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
- H03K3/35606—Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB37782/70A GB1260777A (en) | 1969-08-18 | 1970-08-05 | Improvements in or relating to memory cells |
Publications (1)
Publication Number | Publication Date |
---|---|
IT991502B true IT991502B (it) | 1975-08-30 |
Family
ID=10398965
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT67336/71A IT991502B (it) | 1970-08-05 | 1971-02-01 | Dispositivo di memoria |
Country Status (2)
Country | Link |
---|---|
US (1) | US3693170A (it) |
IT (1) | IT991502B (it) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3942160A (en) * | 1974-06-03 | 1976-03-02 | Motorola, Inc. | Bit sense line speed-up circuit for MOS RAM |
US3936810A (en) * | 1975-01-20 | 1976-02-03 | Semi, Inc. | Sense line balancing circuit |
US4070653A (en) * | 1976-06-29 | 1978-01-24 | Texas Instruments Incorporated | Random access memory cell with ion implanted resistor element |
DE3017700A1 (de) * | 1980-05-08 | 1981-11-12 | Siemens AG, 1000 Berlin und 8000 München | Monolithisch integrierbare digitale komparatorschaltung |
US4404653A (en) * | 1981-10-01 | 1983-09-13 | Yeda Research & Development Co. Ltd. | Associative memory cell and memory unit including same |
US4813002A (en) * | 1986-07-21 | 1989-03-14 | Honeywell Bull Inc. | High speed high density dynamic address translator |
US20080273366A1 (en) * | 2007-05-03 | 2008-11-06 | International Business Machines Corporation | Design structure for improved sram device performance through double gate topology |
US7408800B1 (en) * | 2007-05-03 | 2008-08-05 | International Business Machines Corporation | Apparatus and method for improved SRAM device performance through double gate topology |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3440444A (en) * | 1965-12-30 | 1969-04-22 | Rca Corp | Driver-sense circuit arrangement |
US3518635A (en) * | 1967-08-22 | 1970-06-30 | Bunker Ramo | Digital memory apparatus |
US3548389A (en) * | 1968-12-31 | 1970-12-15 | Honeywell Inc | Transistor associative memory cell |
-
1970
- 1970-11-13 US US89204A patent/US3693170A/en not_active Expired - Lifetime
-
1971
- 1971-02-01 IT IT67336/71A patent/IT991502B/it active
Also Published As
Publication number | Publication date |
---|---|
US3693170A (en) | 1972-09-19 |
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