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IT7949957A0 - Procedimento e dispositivo ibridi per la verifica di circuiti mediante sigle di controllo - Google Patents

Procedimento e dispositivo ibridi per la verifica di circuiti mediante sigle di controllo

Info

Publication number
IT7949957A0
IT7949957A0 IT7949957A IT4995779A IT7949957A0 IT 7949957 A0 IT7949957 A0 IT 7949957A0 IT 7949957 A IT7949957 A IT 7949957A IT 4995779 A IT4995779 A IT 4995779A IT 7949957 A0 IT7949957 A0 IT 7949957A0
Authority
IT
Italy
Prior art keywords
verification
circuits
hybrid procedure
abbreviations
control
Prior art date
Application number
IT7949957A
Other languages
English (en)
Other versions
IT1117425B (it
Original Assignee
Fluke Trendar
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fluke Trendar filed Critical Fluke Trendar
Publication of IT7949957A0 publication Critical patent/IT7949957A0/it
Application granted granted Critical
Publication of IT1117425B publication Critical patent/IT1117425B/it

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318385—Random or pseudo-random test pattern
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/273—Tester hardware, i.e. output processing circuits
    • G06F11/277—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault-free response
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/83—Indexing scheme relating to error detection, to error correction, and to monitoring the solution involving signatures

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
IT49957/79A 1978-08-11 1979-08-03 Procedimento e dispositivo ibridi per la verifica di circuiti mediante sigle di controllo IT1117425B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/933,019 US4216374A (en) 1978-08-11 1978-08-11 Hybrid signature test method and apparatus

Publications (2)

Publication Number Publication Date
IT7949957A0 true IT7949957A0 (it) 1979-08-03
IT1117425B IT1117425B (it) 1986-02-17

Family

ID=25463288

Family Applications (1)

Application Number Title Priority Date Filing Date
IT49957/79A IT1117425B (it) 1978-08-11 1979-08-03 Procedimento e dispositivo ibridi per la verifica di circuiti mediante sigle di controllo

Country Status (7)

Country Link
US (1) US4216374A (it)
EP (1) EP0016177A1 (it)
AU (1) AU4969479A (it)
CA (1) CA1129004A (it)
IT (1) IT1117425B (it)
WO (1) WO1980000375A1 (it)
ZA (1) ZA794049B (it)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4317412A (en) * 1980-06-25 1982-03-02 International Business Machines Corporation Control system and method for testing print hammers in a high speed printer
US4381563A (en) * 1980-12-18 1983-04-26 International Business Machines Corporation Apparatus and method for visually presenting analytical representations of digital signals
US4672574A (en) * 1981-06-16 1987-06-09 International Business Machines Corporation Data communication system with terminal for displaying the coded stream of data being transmitted
DE3135368A1 (de) * 1981-09-07 1983-03-31 Siemens AG, 1000 Berlin und 8000 München Verfahren und anordnung zur funktionspruefung einer programmierbare logikanordnung
US4503536A (en) * 1982-09-13 1985-03-05 General Dynamics Digital circuit unit testing system utilizing signature analysis
GB8413933D0 (en) * 1984-05-31 1984-07-04 Columbia Automation Ltd Emulating timing characteristics of microprocessor
DE3587620T2 (de) * 1984-05-28 1994-03-24 Advantest Corp Logikanalysator.
US4683569A (en) * 1985-10-21 1987-07-28 The Singer Company Diagnostic circuit utilizing bidirectional test data comparisons
US4710932A (en) * 1986-01-15 1987-12-01 Kashiwagi Hiroshi Method of and apparatus for fault detection in digital circuits by comparison of test signals applied to a test circuit and a faultless reference circuit
US4771429A (en) * 1986-09-18 1988-09-13 Abbott Laboratories Circuit combining functions of cyclic redundancy check code and pseudo-random number generators
US4855681A (en) * 1987-06-08 1989-08-08 International Business Machines Corporation Timing generator for generating a multiplicty of timing signals having selectable pulse positions
US5179696A (en) * 1987-07-24 1993-01-12 Nec Corporation Generator detecting internal and external ready signals for generating a bus cycle end signal for microprocessor debugging operation
US4897842A (en) * 1987-11-05 1990-01-30 Ampex Corporation Integrated circuit signature analyzer for testing digital circuitry
US5357523A (en) * 1991-12-18 1994-10-18 International Business Machines Corporation Memory testing system with algorithmic test data generation
WO1995016974A1 (en) * 1993-12-17 1995-06-22 Quintet, Incorporated Method of automated signature verification
US5956409A (en) * 1996-04-29 1999-09-21 Quintet, Inc. Secure application of seals
FR2786580B1 (fr) * 1998-11-30 2001-08-03 St Microelectronics Sa Circuit generateur de signature
US6557132B2 (en) 2001-02-22 2003-04-29 International Business Machines Corporation Method and system for determining common failure modes for integrated circuits
US20020183953A1 (en) * 2001-04-25 2002-12-05 Eastman Kodak Company Method of fault isolation of a digital electronic device
US7386839B1 (en) * 2002-11-06 2008-06-10 Valery Golender System and method for troubleshooting software configuration problems using application tracing
US7437641B1 (en) * 2004-04-01 2008-10-14 Pmc-Sierra, Inc. Systems and methods for signature circuits
DE102009034242A1 (de) * 2009-07-22 2011-01-27 Volkswagen Ag Verfahren und Vorrichtung zum Prüfen eines Steuergeräts eines Fahrzeugs
US8717878B2 (en) * 2010-03-25 2014-05-06 Canon Kabushiki Kaisha Providing feedback information when network streaming over multiple physical interfaces
US8369349B2 (en) * 2010-03-25 2013-02-05 Canon Kabushiki Kaisha Network streaming over multiple physical interfaces using feedback information
US8375139B2 (en) 2010-06-28 2013-02-12 Canon Kabushiki Kaisha Network streaming over multiple data communication channels using content feedback information
DE102019218904A1 (de) * 2019-12-04 2021-06-10 Volkswagen Aktiengesellschaft Robustheitstestverfahren, Robustheitstestschaltung, Robustheitstestvorrichtung

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3924181A (en) * 1973-10-16 1975-12-02 Hughes Aircraft Co Test circuitry employing a cyclic code generator
US3976864A (en) * 1974-09-03 1976-08-24 Hewlett-Packard Company Apparatus and method for testing digital circuits
US4059749A (en) * 1976-11-09 1977-11-22 Westinghouse Electric Corporation Digital monitor
US4122995A (en) * 1977-08-02 1978-10-31 Burroughs Corporation Asynchronous digital circuit testing system

Also Published As

Publication number Publication date
US4216374A (en) 1980-08-05
AU4969479A (en) 1980-02-21
IT1117425B (it) 1986-02-17
ZA794049B (en) 1980-07-30
CA1129004A (en) 1982-08-03
EP0016177A1 (en) 1980-10-01
WO1980000375A1 (en) 1980-03-06

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