GB9626975D0 - Semiconductor device and a manufacturing method for the same - Google Patents
Semiconductor device and a manufacturing method for the sameInfo
- Publication number
- GB9626975D0 GB9626975D0 GBGB9626975.8A GB9626975A GB9626975D0 GB 9626975 D0 GB9626975 D0 GB 9626975D0 GB 9626975 A GB9626975 A GB 9626975A GB 9626975 D0 GB9626975 D0 GB 9626975D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- manufacturing
- same
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6708—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76275—Vertical isolation by bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76281—Lateral isolation by selective oxidation of silicon
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Thin Film Transistor (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950066069A KR100197656B1 (en) | 1995-12-29 | 1995-12-29 | Manufacturing Method of Semiconductor S.I.I.Device |
Publications (4)
Publication Number | Publication Date |
---|---|
GB9626975D0 true GB9626975D0 (en) | 1997-02-12 |
GB2308739A GB2308739A (en) | 1997-07-02 |
GB2308739A8 GB2308739A8 (en) | 1998-01-22 |
GB2308739B GB2308739B (en) | 2000-06-28 |
Family
ID=19447237
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9626975A Expired - Fee Related GB2308739B (en) | 1995-12-29 | 1996-12-27 | Semiconductor device and a manufacturing method for the same |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP2936536B2 (en) |
KR (1) | KR100197656B1 (en) |
DE (1) | DE19654711C2 (en) |
GB (1) | GB2308739B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4054557B2 (en) * | 2001-10-10 | 2008-02-27 | 沖電気工業株式会社 | Manufacturing method of semiconductor device |
JP4139105B2 (en) | 2001-12-20 | 2008-08-27 | 株式会社ルネサステクノロジ | Manufacturing method of semiconductor device |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL164424C (en) * | 1970-06-04 | 1980-12-15 | Philips Nv | METHOD FOR MANUFACTURING A FIELD-EFFECT TRANSISTOR WITH AN INSULATED STEERING ELECTRODTH, IN WHICH A SILICONE COATED WITH A COAT-DYLICATED SILICONE COATING PROTECTION IS PROTECTED TO AN OXYDATED PROCESSING. |
US4435895A (en) * | 1982-04-05 | 1984-03-13 | Bell Telephone Laboratories, Incorporated | Process for forming complementary integrated circuit devices |
EP0157780B1 (en) * | 1983-09-30 | 1988-05-18 | Hughes Aircraft Company | High density mosfet with field oxide aligned channel stops and method of fabricating the same |
NL8501720A (en) * | 1985-06-14 | 1987-01-02 | Philips Nv | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE IN WHICH A SILICONE PLATE IS LOCALLY PROVIDED WITH FIELD OXIDE WITH CHANNEL INTERRUPTER. |
-
1995
- 1995-12-29 KR KR1019950066069A patent/KR100197656B1/en not_active IP Right Cessation
-
1996
- 1996-12-27 JP JP8358680A patent/JP2936536B2/en not_active Expired - Fee Related
- 1996-12-27 GB GB9626975A patent/GB2308739B/en not_active Expired - Fee Related
- 1996-12-30 DE DE19654711A patent/DE19654711C2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR970054268A (en) | 1997-07-31 |
DE19654711A1 (en) | 1997-07-03 |
GB2308739A (en) | 1997-07-02 |
GB2308739A8 (en) | 1998-01-22 |
DE19654711C2 (en) | 2003-05-22 |
JP2936536B2 (en) | 1999-08-23 |
JPH1012894A (en) | 1998-01-16 |
GB2308739B (en) | 2000-06-28 |
KR100197656B1 (en) | 1999-07-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
713C | Proceeding under section 13(3) of the patents act 1977 | ||
713F | Application for mention of inventor (sect. 13(1)/1977) allowed | ||
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20091227 |